Computer Organization And Assembly Language

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Computer Organization And Assembly Language Prof. Muhammad Saeed

description

Computer Organization And Assembly Language. Prof. Muhammad Saeed. Moor’s Law. "The number of transistors incorporated in a chip will approximately double every 24 months.". Comparison Of CISC & RISC Technologies. Intel 4004. First single-chip microprocessor. Year. 1971. Clock Speed. - PowerPoint PPT Presentation

Transcript of Computer Organization And Assembly Language

Page 1: Computer Organization  And Assembly Language

Computer Organization And

Assembly Language

Prof. Muhammad Saeed

Page 2: Computer Organization  And Assembly Language

"The number of transistors incorporated in a chip will approximately double every 24 months."

Moor’s Law

Page 3: Computer Organization  And Assembly Language

CISC RISC

Emphasis on hardware Emphasis on software

Includes multi-clockcomplex instructions

Single-clock,reduced instruction only

Memory-to-memory:"LOAD" and "STORE"incorporated in instructions

Register to register:"LOAD" and "STORE"are independent instructions

Small code sizes,high cycles per second

Low cycles per second,large code sizes

Transistors used for storingcomplex instructions

Spends more transistorson memory registers

Comparison Of CISC & RISC Technologies

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Intel 4004

Year 1971

Clock Speed 740 KHz

No. Of Transistors 2300 at 10 m

MIPS 0.07

Register Length 4-bit

Data Bus Length 4-bit

Address Memory 640 bytes

First single-chip microprocessor

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Intel 8008

Year 1972

Clock Speed 800 KHz

No. Of Transistors 3500 at 10 m

MIPS 0.05

Register Length 8-bit

Data Bus Length 8-bit

Address Memory 16 kb

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Intel 8086

Year 1978

Clock Speed 5MHz

No. Of Transistors 29000 at 3 m

MIPS 0.33

Register Length 16-bit

Data Bus Length 16-bit

Address Memory 1 MB

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Intel 8088

Year 1979

Clock Speed 5MHz

No. Of Transistors 29000 at 3 m

MIPS 0.33

Register Length 16-bit

Data Bus Length Ext 8-bit

Address Memory 1 MB

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Intel 80286

Year 1982

Clock Speed 6-25MHz

No. Of Transistors 134000 at 1.5 m

MIPS 0.9-2.66

Register Length 16-bit

Data Bus Length 16-bit

Addressable Memory 16 MB

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Intel 80386DX

Year 1985

Clock Speed 16-33MHz

No. Of Transistors 275000 at 1 m

MIPS 5-9.9

Register Length 32-bit

Data Bus Length 32-bit

Addressable Memory 4G MB

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Intel 80486DX

Year 1989

Clock Speed 25-50MHz

No. Of Transistors 1.2million at 1-0.8 m

MIPS 20-41

Register Length 32-bit

Data Bus Length 32-bit

Addressable Memory 4G MB

Includes Math Coprocessor and Cache

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Intel Pentium

Year 1993

Clock Speed 60-200MHz

No. Of Transistors 3.1-5.5million at .8-.35 m

MIPS 100-270

Register Length 64-bit

Data Bus Length 64-bit

Addressable Memory 4GB

Includes data and Instruction Caches(8k)

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Intel Pentium II

Year 1997

Clock Speed -450MHz

No. Of Transistors 7.5million at .35-.25 m

MIPS 100-112

Register Length 64-bit

Data Bus Length 64-bit

Addressable Memory 4G B

Includes data and Instruction Caches(8k)

541 MIPS at 200 MHz

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Intel Pentium III

Year 1999

Clock Speed 600MHz

No. Of Transistors 9.5million at .35-.25 m

MIPS 2054

Register Length 64-bit

Data Bus Length 64-bit

Addressable Memory 64G B

2,054 MIPS at 600 MHz

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Intel i7

Year 2008

Clock Speed 3.2 GHz

No. Of Transistors 731,000,000 45 nm-22nm

MIPS 2,054

Register Length 64-bit

Data Bus Length 64-bit

Addressable Memory 64GB

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8088Block Diagram

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Intel 8088

Units: EU BIU ALU Bus Control EU Control Instruction Queue

Registers: General Purpose Pointer Segment Flags

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16 bit Flags Register

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Intel 8088

Levels of Programming Language:MicrocodeMachine CodeAssembly LanguageLow-Level Programming LanguageHigh-Level Programming Language

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PentiumBlock Diagram

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Registers 8-64 Bits

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32 bit Flags Register

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