Compal La-8022p r1.0 Schematics

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Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1

Compal Electronics, Inc.

4019FQBSCHEMATIC MB A8022

38

2012/06/202011/06/20

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Tuesday, July 10, 2012

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PICASSO M Schematics Document

REV: 1.0

Compal Confidential

2012-03-28

Nvdia(T30S) + LPDDRII

The content in this document contains confidential information of Compal Electronics, Inc. that is protected under all applicable trade secrets laws and regulations. If you are not the intended recipient or otherwise authorized to receive such information, please do not copy, distribute or otherwise use the information contained herein and please destroy this communication accordingly.

QAJ70-LA-8022P

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PCBMB

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PCBMB

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Compal ConfidentialModel Name : NVIDIA T30S System Block Diagram

NvidiaT30S

SDIO4 (1.8V)

eMMCP.11

SDIO1 (3.3V)

Micro SD slotP.20

LPDDR2512MB/1GBP.9

Debug Test PointP.7

JTAG

I2S

UART4Audience eS305

P.14 P.15

Audio Codec WM8903

P.15

Audio AMP APA2010

P.15

Speaker x 2 (1W)

MIC & Audio JackP.15

CIS(MIPI)

BroadcomBCM47511P.21

UART2

GPS Antenna

AzureWaveAW-AH662

P.22

BT/WLAN Antenna

UART3SDIODAP

I2C

CAM_I2C CAM_I2C CAM_I2CP.17

CAMERA5M(CJAA525)2M(CBFA152)

HostClient

Signal SwitchP.20

USB2 3G Modem ModuleP.18

3G Modem Antenna

P.20Micro USB

G-SensorKXTF9-4100

IME

P.16

GYRO Sensor MPU-3050

Light Sensor STK2203

P.16

E-Compass AKM8975Dock/B

P.12LVDS Transmitter(V105A)

10.1" LCD1920*1200

HDMI Switch(1.8V/3.3V)P.13

CORE_PWR_REQ

P.31~P.33

PMICTPS659110

CPU_PWR_REQ

PMU_32K_IN

PWR_I2C

SYS_RESET_N

32KHz

VIN

Power ON

HDMI_DDC

SIM CardP.18

P.19Micro HDMI

P.13Touch PanelControl

Func/B

CAM_I2C

P-SenserIQS12800100TSR

Dock/B

26MHz

EEPROMP.10

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

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RTC power rail

+VDD_1V2_RTC_TEGRA

VDD_1V2_SOC

+VDD_1V8_PMU_VRTC

+AVDD_3V3_USB_TEGRA

Voltage Rails

VIN

B+

Adapter power supply (19V)

AC or battery power rail for power circuit.

Power for RTC and always-on core logic.

AVDD_PLL power rail

Power Plane Description

+AVDD_1V1_PLL_TEGRA

+5VS

+3VS 3.3V switched power rail for standby mode

1.8V switched power rail for standby mode

USB power rail

+VDD_1V8_SYS_TEGRA System power rail

+VDD_1V8_CAM_TEGRA

+VDD_2V85_EMMC Core voltage for EMMC

VDD_1V8_GEN

+AVDD_3V3_HDMI_S

Core voltage for CAMERA

HDMI power rail

Power for remainder of core logic

+VDD_3V3_DDR_RX_TEGRA DDR RX power rail

5V switched power rail for standby mode

+VDD_LED_BL

+VDD_3V3_SDMMC1_TEGRA

+VDD_VCM_3V3

LED power rail

Micro SD power rail

CAMERA power rail

+VDD_1V2_DDR_MEM DDR power rail

Board ID

Touch Screen

Camera 5MCamera 2M

GyroE CompassLight Senser

Flash LED

Thermal SenserES305CodecPMUTPS62361BATT Conn

Device Address

Address

CAM_I2C < +VDD_1V8_CAM_TEGRA >

PWR_I2C < +VDD_1V8_SYS_TEGRA>

Device

EEPROM (Low level) 0xA0 , 0xA10xA2 , 0xA3EEPROM (High level)

GEN2_I2C / TS_I2C < +VDD_3V3_GMI_TEGRA >

AddressDevice

AddressDevice

0x98 , 0x99

0x78 , 0x790x20 , 0x21

0xD0 , 0xD10x18 , 0x190x38 , 0x39

0x66 , 0x67

0x98 , 0x990x3E

0x34 , 0x35

0x600xAA , 0xAB

0x2D

GEN1_I2C

LVDS strap pin

LPDDR2

PICASSO 2

PICASSO M

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NV_LCD_PCLK

FORCE_RECOVERY#

NAND_D0

NOR_BOOT

NAND_D4NAND_D5NAND_D6NAND_D7

NAND_D0

3.3V10MIL0.1A

EN_HDMI_3V3#

AVDD_HDMI_R

AVDD_HDMI_PLLHDMI_PROBE

HDMI_RSET

BOOT_PD

NOR_BOOT

NAND_D5

NAND_D6

NAND_D7

NAND_D4

NAND_D5

NAND_D6

NAND_D7

NAND_D4

PCB_ID0PCB_ID1PCB_ID2

PCB_ID0

PCB_ID1

PCB_ID2

PCB_ID0

PCB_ID1

PCB_ID2

BOOT_PD

BOOT_PD

GEN2_I2C_SCLGEN2_I2C_SDA

NV_LCD_PCLK LCD_PCLK_R

TS_PWR_EN

EN_WIFI_VDD

EN_SENSOR_3V3BOARD_ID0BOARD_ID1

BOARD_ID1

BOARD_ID0

BOARD_ID0

BOARD_ID1

EN_P_SENSOR

FORCE_RECOVERY#

+VDD_3V3_LCD_TEGRA

+VDD_3V3_GMI_TEGRA+VDD_3V3_GMI_TEGRA

+AVDD_3V3_HDMI_S


+AVDD_3V3_HDMI_S

+VDD_3V3_GMI_TEGRA

+VDD_3V3_GMI_TEGRA

+VDD_3V3_GMI_TEGRA

+VDD_3V3_GMI_TEGRA

VDD_1V8_GEN

VDD_1V8_GEN

+3VS

+VDD_3V3_GMI_TEGRA

+VDD_1V8_SYS_TEGRA

LCD_DE LCD_HSYNC LCD_VSYNC

LCD_D00 LCD_D01 LCD_D02 LCD_D03 LCD_D04 LCD_D05 LCD_D06 LCD_D07 LCD_D08 LCD_D09 LCD_D10 LCD_D11 LCD_D12 LCD_D13 LCD_D14 LCD_D15 LCD_D16 LCD_D17

DDC_SDA_R DDC_SCL_R

HDMI_DET_T30S

GEN2_I2C_SDA

LCD_PWM_OUT

LCD_D18 LCD_D19 LCD_D20 LCD_D21 LCD_D22 LCD_D23

VIB_EN_T30S

HDMI_TXCN HDMI_TXCP

HDMI_TXD0N HDMI_TXD0P



EMMC_DA0 EMMC_DA1 EMMC_DA2 EMMC_DA3 EMMC_DA4 EMMC_DA5 EMMC_DA6 EMMC_DA7

EMMC_CLK EMMC_CMD

EMMC_RST#

DISPOFF#

TS_INT# CHARGER_STAT

POUT_WIFI TEMP_ALERT#

3G_WAKE#

TS_RST# LVDS_SHTDN#

GEN2_I2C_SCL

LCD_PCLK

EN_T30S_FUSE_3V3 LCD_DCR

POUT_3G

3G_DISABLE#

EN_VDDLCD_T30S TS_PWR_EN

POUT_3G_1

EN_WIFI_VDD

EN_SENSOR_3V3

EN_HDMI_5V0

VOL_UP#

VOL_DOWN#

EN_P_SENSOR

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SDMMC4 : eMMC

RF

PD

PD

PD

PD

PD

PDPD

PD

PD

PDPDPDPD

Z

Z

PD

Z

PDPDPDPDPDPDPDPD

PDPD

PD

PUPU

PU

PD

PU

PD

PD

PD

PUPU

PD

PU

PU

PD

PU

PD

PU

ZZ

Z

Z

Z

Z

PU

Z

Z

PU

Z

PU

Z

0

1

1

Z

1

PDPD

PU

PU

PD

1

PD

1

ZZZZ

PU

PUPU

0

PUPU

ZZZZZZZZ

Z

Vth=1.4V

08/16 Change U55 footprint08/16 Delete U56 footprintAdd

8/22 Change BOM structure

8/22 Change BOM structure to LPDDR2 & EMMC

9/15 Modify R23 from 100K to 47K. 9/15 Add R90 for FORCE_RECOVERY issue9/19 Modify Q44 part number to SB00000J500 .

9/29 Leakage Issue Modify R10&R11 from mount to unmount

10/03 Co-lay SOT-23 and SC-70SB93413000000 and SB000009O00

11/6 Add for COMPAL EMI request.

02/17 Change to 0201 shortpad

R90 47K_0201_1%

R90 47K_0201_1%

1 2

R85 100K_0201_5%@R85 100K_0201_5%@ 12

(1.8/3.3V)

8/21 LCDU1I

T30S-R-A3-1.4G_FCCSP681

(1.8/3.3V)

8/21 LCDU1I


VDDIO_LCD_2AH24VDDIO_LCD_1AG23

HDMI_INT AN23

DDC_SDA AT26DDC_SCL AH20

CRT_VSYNC AJ21CRT_HSYNC AK18

LCD_DC1 AP24LCD_DC0 AL27

LCD_SDIN AR25LCD_SDOUT AM28

LCD_CS1* AP18LCD_CS0* AL23LCD_SCK AK26

LCD_PWR2 AN25LCD_PWR1 AP20LCD_PWR0 AN17

LCD_M1 AM20

LCD_D23 AM24LCD_D22 AR27LCD_D21 AU23LCD_D20 AN27LCD_D19 AT24LCD_D18 AT20LCD_D17 AJ19LCD_D16 AM22LCD_D15 AL21LCD_D14 AH18LCD_D13 AJ17LCD_D12 AT18LCD_D11 AU27LCD_D10 AR21LCD_D09 AM26LCD_D08 AU21LCD_D07 AK22LCD_D06 AK16LCD_D05 AR23LCD_D04 AJ23LCD_D03 AN19LCD_D02 AM18LCD_D01 AP26LCD_D00 AR17

LCD_VSYNC AL17LCD_HSYNC AK20

LCD_DE AR19LCD_WR* AK24

LCD_PCLK AN21

U55

74AUP1G02GW_TSSOP5

U55

74AUP1G02GW_TSSOP5

B1

A2Y 4

G

3

V

c

c

5

G

D S

Q2

NTS4101PT1G_SC70-3@

G

D S

Q2

NTS4101PT1G_SC70-3@

2

1 3

R2 100K_0201_5%R2 100K_0201_5%12

R541M_0201_1%R541M_0201_1%

1

2

L2

MPZ1005S300CT_2P

L2

MPZ1005S300CT_2P1 2

R1 100K_0201_5%R1 100K_0201_5%12

L1

MPZ1005S300CT_2P

L1

MPZ1005S300CT_2P1 2

C4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C164

12P_0201_50V8J

C164

12P_0201_50V8J

1

2

R152 100K_0201_5%QAJ50@

R152 100K_0201_5%QAJ50@

12

L49 27NH_LQG15HS27NJ02D_5%_0402L49 27NH_LQG15HS27NJ02D_5%_04021 2

R271M_0201_1%

R271M_0201_1%

1

2

R11

2.2K_0201_1%

@ R11

2.2K_0201_1%

@

1

2

R5 100K_0201_5%X76_ELP_1GB@

R5 100K_0201_5%X76_ELP_1GB@

12

R453

47_0402_5%

R453

47_0402_5%12

C

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

R84 100K_0201_5%@R84 100K_0201_5%@ 12

R87 100K_0201_5%NH660@

R87 100K_0201_5%NH660@

12

R43 100K_0201_5%@R43 100K_0201_5%@ 12

R12100K_0201_5%

R12100K_0201_5%

1

2

C70.1U_0201_10V6K

C70.1U_0201_10V6K

1

2

R79 100K_0201_5%@

R79 100K_0201_5%@

12

R22 100K_0201_5%R22 100K_0201_5%12

9/21 VDAC(2.8V)

U1J


9/21 VDAC(2.8V)

U1J


VDAC_RSET AM12

VDAC_VREF AN11

VDAC_B AH12VDAC_G AJ13VDAC_R AH14AVDD_VDACAD2

R261K_0201_1%R261K_0201_1%

1

2

G

D S

Q6AO3413_SOT23-3

G

D S

Q6AO3413_SOT23-3

2

1 3

R88 100K_0201_5%

R88 100K_0201_5%

12

C2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C147

3

3

0

0

P

_

0

2

0

1

_

1

6

V

6

K

C147

3

3

0

0

P

_

0

2

0

1

_

1

6

V

6

K

1

2

R2347K_0201_1%

R2347K_0201_1%

1

2

R158 0_0201_5%@

R158 0_0201_5%@ 12

(1.8/3.3V)4/21 GMI

U1E


(1.8/3.3V)4/21 GMI

U1E


VDDIO_GMI_2T12VDDIO_GMI_1P12

GEN2_I2C_SDA E3GEN2_I2C_SCL D2

GMI_DQS L7

GMI_WR* M6GMI_OE* M2

GMI_IORDY R7

GMI_WP* L3GMI_WAIT N5GMI_RST* L5

GMI_CLK L1

GMI_ADV* M4

GMI_CS7* L9GMI_CS6* M10GMI_CS4* H4GMI_CS3* K8GMI_CS2* G5GMI_CS1* P10GMI_CS0* R11

GMI_A19 R9GMI_A18 N9GMI_A17 M8GMI_A16 P8

GMI_AD15 R5GMI_AD14 P2GMI_AD13 F4GMI_AD12 F2GMI_AD11 J1GMI_AD10 J5GMI_AD09 E1GMI_AD08 G3GMI_AD07 R3GMI_AD06 N3GMI_AD05 P6GMI_AD04 P4GMI_AD03 H2GMI_AD02 J3GMI_AD01 K6GMI_AD00 J7

R17100K_0201_5%

R17100K_0201_5%

1

2

C80.1U_0201_10V6K

C80.1U_0201_10V6K

1

2

C

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

G

D

S

Q44S TR DMN3150LW-7 1N SOT-323-3G

D

S

Q44S TR DMN3150LW-7 1N SOT-323-3

2

1

3

R38 100K_0201_5%X76_SAM_1GB@

R38 100K_0201_5%X76_SAM_1GB@

12

C54.7U_0402_6.3V6M

C54.7U_0402_6.3V6M

1

2

C60

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C60

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R10

2.2K_0201_1%

@R10

2.2K_0201_1%

@

1

2

R63 100K_0201_5%QAJ70@

R63 100K_0201_5%QAJ70@

12

R89 100K_0201_5%@

R89 100K_0201_5%@

12

R18100K_0201_5%

R18100K_0201_5%

1

2

R153 100K_0201_5%AH663@

R153 100K_0201_5%AH663@

12

T1PAD@ T1PAD@

T21 PAD

@

T21 PAD

@

R100 100K_0201_5%LTE@

R100 100K_0201_5%LTE@

12

R8 100K_0201_5%

R8 100K_0201_5%

12

G

D

S

Q3BSS138W-7-F_SOT323-3

G

D

S


2

1

3

R7 100K_0201_5%

R7 100K_0201_5%

12

R154 100K_0201_5%NONLTE@

R154 100K_0201_5%NONLTE@

12

(1.2/1.8V)

5/21 SDMM4

U1F


(1.2/1.8V)

5/21 SDMM4

U1F


VDDIO_SDMMC4E7

SDMMC4_RST* B8

SDMMC4_CMD H10SDMMC4_CLK F8

SDMMC4_DAT7 D8SDMMC4_DAT6 C7SDMMC4_DAT5 D6SDMMC4_DAT4 A5SDMMC4_DAT3 B4SDMMC4_DAT2 C5SDMMC4_DAT1 G9SDMMC4_DAT0 B6

C165

12P_0201_50V8J

C165

12P_0201_50V8J

1

2

10/21 HDMI

(1.8V)

(3.3V)

U1K


10/21 HDMI

(1.8V)

(3.3V)

U1K


AVDD_HDMI_PLLAT8

AVDD_HDMIAP8

HDMI_RSET AM8

HDMI_PROBE AR11

HDMI_TXD2P AT12HDMI_TXD2N AU11

HDMI_TXD1P AP14HDMI_TXD1N AR13

HDMI_TXD0P AN13HDMI_TXD0N AP12

HDMI_TXCP AN9HDMI_TXCN AR9

R78 100K_0201_5%

R78 100K_0201_5%

12

R6 100K_0201_5%

R6 100K_0201_5%

12

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_RESET

DDR_COMP_PD

QUSE2QUSE3

QUSE0

DDR_COMP_PU

QUSE1

SDMMC1_COMP_PU

SDMMC1_COMP_PD

SDMMC3_COMP_PU

SDMMC3_COMP_PD





+VDD_3V3_DDR_RX_TEGRA

+VDD_1V0_DDR_HS_TEGRA

VDD_1V2_MEM

VDD_1V2_MEM

VDD_1V2_MEM

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS0

DDR_A_DQS1

DDR_A_DQS2

DDR_A_DQS3

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9

M_CS#0 M_CS#1

M_CKE0 M_CKE1

M_CLK_DDR#0 M_CLK_DDR0

SDMMC_DAT0 SDMMC_DAT1 SDMMC_DAT2 SDMMC_DAT3

SDMMC_CLK SDMMC_CMD

WFMMC_DAT0 WFMMC_DAT1 WFMMC_DAT2 WFMMC_DAT3

WFMMC_CLK WFMMC_CMD

CP_GPIO

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SDMMC1 : SD card

SDMMC3 : WIFI

PUPU

PUPUPUPU

PDZ

ZZ

PUPUPUPUPUPU

PUPU

PUPU

Acer request

Add U1.U3 GPIO to control Power CP function.9/22

9/26 Modify BOARD_ID3 from U1.J37 to U1.R37

C

1

1

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

1

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

2

1

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

2

1

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R33 0_0201_5%R33 0_0201_5%1 2

R35 49.9_0402_1%R35 49.9_0402_1%1 2

R31 33.2_0402_1%

R31 33.2_0402_1%

1 2

C

1

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R30 33.2_0402_1%R30 33.2_0402_1%1 2

C

1

2

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

1

2

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

T17PAD@ T17PAD@

C

1

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

2

0

5

3

3

P

5

0

V

J

N

P

O

0

2

0

1

C

2

0

5

3

3

P

5

0

V

J

N

P

O

0

2

0

1

1

2

C

1

6

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

6

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

2

1

5

3

3

P

5

0

V

J

N

P

O

0

2

0

1

C

2

1

5

3

3

P

5

0

V

J

N

P

O

0

2

0

1

1

2

C

1

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

1

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

6/21 SDMMC3

(1.8/2.8~3.3V)

U1O


6/21 SDMMC3

(1.8/2.8~3.3V)

U1O


VDDIO_SDMMC3M36

SDMMC3_COMP_PD N35

SDMMC3_COMP_PU L35

SDMMC3_CMD M30SDMMC3_CLK J35

SDMMC3_DAT7 M28SDMMC3_DAT6 M32SDMMC3_DAT5 N29SDMMC3_DAT4 J37SDMMC3_DAT3 P34SDMMC3_DAT2 M34SDMMC3_DAT1 L37SDMMC3_DAT0 N33

C

1

9

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

9

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C26

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C26

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

15/21 HSIC

(1.2V)

U1M


15/21 HSIC

(1.2V)

U1M


HSIC_REXT AD10

HSIC_STROBE AD6HSIC_DATA AC5VDDIO_HSICY2

R32 33.2_0402_1%

R32 33.2_0402_1%

1 2

C

1

0

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

0

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

(1.2/1.25/1.35/1.5V)

(2.8/3.3V)

(1.05V)

3/21 DDR MEMORY

U1D


(1.2/1.25/1.35/1.5V)

(2.8/3.3V)

(1.05V)

3/21 DDR MEMORY

U1D


VDD_DDR_HS_2L23VDD_DDR_HS_1K12

VDD_DDR_RXA15

VDDIO_DDR_14T26VDDIO_DDR_13R25VDDIO_DDR_12P26VDDIO_DDR_11N23VDDIO_DDR_10N21VDDIO_DDR_09N19VDDIO_DDR_08N17VDDIO_DDR_07N15VDDIO_DDR_06M24VDDIO_DDR_05M22VDDIO_DDR_04M20VDDIO_DDR_03M18VDDIO_DDR_02M16VDDIO_DDR_01M14

DDR_COMP_PD E15

DDR_COMP_PU E17

DDR_QUSE3 H16DDR_QUSE2 G15DDR_QUSE1 D26DDR_QUSE0 C27

DDR_RESET K20

DDR_CLK C19DDR_CLK* D18

DDR_CKE1 E19DDR_CKE0 B20

DDR_ODT1 L19DDR_ODT0 G23

DDR_CS1* D20DDR_CS0* C21

DDR_BA2 F22DDR_BA1 G21DDR_BA0 F20

DDR_WE* H22

DDR_CAS* H20DDR_RAS* J21

DDR_A14 J19DDR_A13 H18DDR_A12 J17DDR_A11 G17DDR_A10 F16DDR_A09 C17DDR_A08 B14DDR_A07 F18DDR_A06 A17DDR_A05 B18DDR_A04 E23DDR_A03 A23DDR_A02 E21DDR_A01 C23DDR_A00 J23

DDR_DQS3P F12DDR_DQS3N E11

DDR_DQS2P H26DDR_DQS2N K26

DDR_DQS1P B12DDR_DQS1N A11

DDR_DQS0P A27DDR_DQS0N B26

DDR_DM3 J13DDR_DM2 C29DDR_DM1 E13DDR_DM0 F26

DDR_DQ31 E9DDR_DQ30 C9DDR_DQ29 G11DDR_DQ28 H12DDR_DQ27 J15DDR_DQ26 L15DDR_DQ25 F10DDR_DQ24 K14DDR_DQ23 J25DDR_DQ22 H28DDR_DQ21 G29DDR_DQ20 E27DDR_DQ19 H24DDR_DQ18 G27DDR_DQ17 K24DDR_DQ16 D30DDR_DQ15 A9DDR_DQ14 D12DDR_DQ13 C11DDR_DQ12 C13DDR_DQ11 H14DDR_DQ10 D14DDR_DQ09 C15DDR_DQ08 F14DDR_DQ07 F24DDR_DQ06 D24DDR_DQ05 C25DDR_DQ04 A29DDR_DQ03 E25DDR_DQ02 B30DDR_DQ01 F28DDR_DQ00 E29

T3PAD@ T3PAD@

(1.8/2.8~3.3V)17/21 SDMMC1

U1P


(1.8/2.8~3.3V)17/21 SDMMC1

U1P


VDDIO_SDMMC1R1

CLK2_REQ U5CLK2_OUT U3

GPIO_PV3 W9GPIO_PV2 Y6

SDMMC1_COMP_PD U9

SDMMC1_COMP_PU AF10

SDMMC1_CMD T8SDMMC1_CLK T6

SDMMC1_DAT3 Y10SDMMC1_DAT2 U1SDMMC1_DAT1 W11SDMMC1_DAT0 U7

C

2

4

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

2

4

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

2

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

2

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C17

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C17

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

(1.8/3.0V)

16/21 IC_USB

U1N


(1.8/3.0V)

16/21 IC_USB

U1N


IC_USB_REXT AD8

IC_USB_DP AE3IC_USB_DN AD4AVDD_IC_USBAB8

C

2

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

2

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

1

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

1

0

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

1

0

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

2

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

2

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R29 33.2_0402_1%R29 33.2_0402_1%1 2

C

1

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

1

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

R34 0_0201_5%R34 0_0201_5%1 2

C

3

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

3

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R36 49.9_0402_1%R36 49.9_0402_1%1 2

C

1

0

9

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

0

9

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

2

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

2

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

USB_REXT

DSI_CSI_RUP

DSI_CSI_RDN

3.3V10MIL0.1A

EN_T30S_USB1

AUDIO_CLK

CAM_I2C_SCL CAM_I2C_SDA

+T30S_USB1

+AVDD_1V8_USB_PLL_TEGRA

+AVDD_1V2_DSI_CSI_TEGRA

+AVDD_3V3_USB_TEGRA

+VDD_1V8_CAM_TEGRA

+VDD_1V8_CAM_TEGRA

+AVDD_3V3_USB_TEGRA

+T30S_USB1

+VDD_1V8_AUDIO_TEGRA

+AVDD_1V2_DSI_CSI_TEGRA

VBUS_USB

+T30S_USB1

3G_USB_DN 3G_USB_DP

USB1_DN USB1_DP

5M_CAM_DA1#_R 5M_CAM_DA1_R



CAM_I2C_SDA CAM_I2C_SCL

USB1_ID

CAM_MCLK

CDC_IRQ#

AUDIO_CLK_R

AUDIO_RST#

ENABLE_USB_HOST ES305_INT_R

GYRO_INT_R

LIGHT_INT HP_DET#


COMPASS_DRDY

EN_ES305_OSC

5M_CAM_CLK#_R 5M_CAM_CLK_R

2M_CAM_CLK#_R 2M_CAM_CLK_R

5M_CAM_RST# 5M_CAM_PWDN

2M_CAM_PWDN

USB_HOST_DN USB_HOST_DP

AUDIO_SEL

AUDIO_SCLK2 AUDIO_FS2 AUDIO_DOUT2

AUDIO_DIN2

DOCK_DET#

2M_CAM_RST#

BATT_LEARN

Title


Date: Sheet of




6



38

2012/06/202011/06/20

C


Title


Date: Sheet of




6



38

2012/06/202011/06/20

C


Title


Date: Sheet of




6



38

2012/06/202011/06/20

C


U1Q is not place on grid , need check connection

USB VBUS overvoltage protection

RF note

RF note

PUPU

PDPDPDPD

PD

PDPD

PD

PU

PDPD

PUPUPU

PU

PUPU

PD

ZZ

Z

ZZ

PUPU

ZZZZ

8/24 Modify Off-Page type.

9/26 Swap U1.AM16 to U1.AM10 for WAKE UP issue

10/03 Add D18 on +T30S_USB1 to protect CPU.

SC400003Z00

10/19 Modify D18 from +T30S_USB1 to VBUS_USB

10/24 Add BATT_LEARN GPIO to Power request.

12/2 Modify D18 from moun to @,Add Zener on samll board.

R37 0_0201_5%R37 0_0201_5%1 2(1.8/3.3V)

13/21 AUDIO

U1Q


(1.8/3.3V)13/21 AUDIO

U1Q


VDDIO_AUDIOG33

SPI2_MISO E37SPI2_MOSI D36SPI2_CS2* F30SPI2_CS1* B32SPI2_CS0* J33SPI2_SCK K32

SPI1_MISO F36SPI1_MOSI L33SPI1_CS0* H36SPI1_SCK G35

SPDIF_OUT J31SPDIF_IN L31

DAP2_DIN C33DAP2_DOUT F34

DAP2_FS K30DAP2_SCLK H34

DAP1_DIN A33DAP1_DOUT D32

DAP1_FS B34DAP1_SCLK L29

CLK1_OUT E35

C

2

7

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

2

7

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

R44453_0402_1%R44453_0402_1%

1

2

R412.2K_0201_1%R412.2K_0201_1%

1

2

R402.2K_0201_1%

R402.2K_0201_1%

1

2

C

3

4

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

3

4

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

R421M_0201_1%

R421M_0201_1%

1

2

R72 0_0201_5%R72 0_0201_5%1 2

C

3

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

3

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

G

D S

Q18AO3413_SOT23-3

G

D S

Q18AO3413_SOT23-3

2

1 3

(1.8V)

(3.3V)

11/21 USB

U1L


(1.8V)

(3.3V)

11/21 USB

U1L


AVDD_USB_PLLV2

AVDD_USBAB6

USB_REXT AE9

USB3_ID AK12

USB3_DP AE5USB3_DN AF4

USB3_VBUS AR5

USB2_ID AJ7

USB2_DP AG1USB2_DN AG3

USB2_VBUS AH6

USB1_ID AU5

USB1_DP AM4USB1_DN AL5

USB1_VBUS AF8

18/21 CAM

(1.8/2.8 ~ 3.3V)

U1G


18/21 CAM

(1.8/2.8 ~ 3.3V)

U1G


VDDIO_CAMAL11

GPIO_PCC2 AR15GPIO_PCC1 AU15

GPIO_PBB7 AT14GPIO_PBB6 AM16GPIO_PBB5 AJ15GPIO_PBB4 AL15GPIO_PBB3 AM14GPIO_PBB0 AM10

CAM_MCLK AG15

CAM_I2C_SDA AN15CAM_I2C_SCL AK14

D18

BZT52-B5V6S_SOD323-2@D18

BZT52-B5V6S_SOD323-2@

2

1

C

3

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

3

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R39

1K_0201_1%

R39

1K_0201_1%

12

C

2

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

2

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C372

1

0

P

_

0

2

0

1

_

5

0

V

8

J

C372

1

0

P

_

0

2

0

1

_

5

0

V

8

J

1

2

C

2

9

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

2

9

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C187

3

9

P

_

0

2

0

1

_

5

0

V

8

J

C187

3

9

P

_

0

2

0

1

_

5

0

V

8

J

1

2

(1.2V)7/21 DSI/CSI

U1H


(1.2V)7/21 DSI/CSI

U1H


AVDD_DSI_CSIAF2

DSI_CSI_RDN AT4

DSI_CSI_RUP AG7

DSI_D2AP AG9DSI_D2AN AH8

DSI_D1AP AM2DSI_D1AN AN1

DSI_CLKAP AK2DSI_CLKAN AJ1

CSI_D2BP AP6CSI_D2BN AT6

CSI_D1BP AL3CSI_D1BN AK4

CSI_CLKBP AN7CSI_CLKBN AR7

CSI_D2AP AK10CSI_D2AN AL9

CSI_D1AP AJ3CSI_D1AN AJ5

CSI_CLKAP AN3CSI_CLKAN AP2

C

3

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

3

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C186

3

9

P

_

0

2

0

1

_

5

0

V

8

J

C186

3

9

P

_

0

2

0

1

_

5

0

V

8

J

1

2

G

D

S

Q5BSS138W-7-F_SOT323-3G

D

S


2

1

3

R4549.9_0402_1%R4549.9_0402_1%

1

2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

T30S_XTAL_IN

T30S_XTAL_OUTCORE_PWR_REQ

CPU_PWR_REQ

T30S_XTAL_IN

T30S_XTAL_OUT

NV_THERM_DNNV_THERM_DP

TEST_MODE_EN

SYS_CLK_REQ

PLL_S_PLL_LF

AVDD_OSC

PWR_I2C_SCLPWR_I2C_SDA

+3VS_TH

THERMD_F_N

THERMD_F_P

NV_THERM_DN

NV_THERM_DP

ON_KEY#

JTAG_TCKJTAG_TDIJTAG_TDOJTAG_TMSJTAG_TRST#JTAG_RTCK

JTAG_TDI

JTAG_TMS

JTAG_RTCK

JTAG_TCK

JTAG_TRST#

ON_KEY#

BT_RST# GPS_RESET#

EN_SENSOR_1V8#

JTAG_TRST#JTAG_TDIJTAG_TMSJTAG_TCKJTAG_RTCKJTAG_TDO

ONKEY#

DEBUG_UART1_RX_R

PCB_ID3

LINE_OUT_DET#

+VDD_1V8_UART_TEGRA

+VDD_1V8_SYS_TEGRA

+VDD_1V8_SYS_TEGRA

+AVDD_1V1_PLL_TEGRA

+VDD_1V8_BB_TEGRA

+VDD_1V8_SYS_TEGRA

VDD_1V8_PMU_VRTC+VDD_1V8_SYS_TEGRA

+VDD_1V8_BB_TEGRA

VDD_1V8_GEN

+3VS

+3VS

+VDD_1V8_SENSOR

+VDD_1V8_BB_TEGRA

+VDD_1V8_SYS_TEGRA

+VDD_1V8_SYS_TEGRA

+VDD_1V8_SYS_TEGRA

GEN1_I2C_SDA

BT_RST#

GPS_PWRON GPS_RESET#

PWR_I2C_SCL PWR_I2C_SDA

PMU_RESET_OUT_1V8#

PMU_INT#

CORE_PWR_REQ CPU_PWR_REQ

PMU_CLK_32K CLK_32K_OUT

HDMI_CEC

AP_OVERHEAT#

PWR_I2C_SCLPWR_I2C_SDA

AUDIO_UART4_TX AUDIO_UART4_RX

BT_PCM_IN BT_PCM_OUT BT_PCM_SYNC BT_PCM_CLK

DEBUG_UART1_TX DEBUG_UART1_RX

BT_UART_CTS# BT_UART_RTS#

BT_UART_RXD BT_UART_TXD

GPS_UART_CTS# GPS_UART_RTS#

GPS_UART_RXD GPS_UART_TXD

TEMP_ALERT#

WF_RST#

GEN1_I2C_SCL

BT_IRQ#

BT_WAKEUP

CLK_12M_ES305

WAKE_UP_ACIN

WF_WAKE#

WAKE_UP_VBUS

SC_LOCK# VOL_UP# VOL_DOWN#

WAKEUP_LED

SHORT_DET

G_ACC_INT

UART_SW

EN_SENSOR_1V8#

SIM_DET

SD_DET#

LINE_OUT_DET#

CAM_LED_EN_NV BOARD_ID_WP

ONKEY# HOT_RST#

EN_VDD_GPS

PMU_OSC32KOUT PMU_OSC32KIN

DEBUG_UART1_RX

EN_3V3_MODEM

EN_CAM_2V8

EN_CAM_1V8#

BT_PD#

EN_SENSOR_3V3_2

Title


Date: Sheet of




7



38

2012/06/202011/06/20

C


Title


Date: Sheet of




7



38

2012/06/202011/06/20

C


Title


Date: Sheet of




7



38

2012/06/202011/06/20

C


max current is 350uAVR1 =17mV

Thermal

we not use Audio LDO

ZZ

PD

Z

PD

Z

PD

Z

PD

Z

Z0

ZZ

PUPUPUPU

PUPUPUPU

Z

PUPUPUPUPUPUPUPU

ZZZ

ZZ

PD

PDPD

PD

Z

ZZZ

PD

ZZ

PDPDPD

Z

PU

PUPUPU

PUPU

PUPU

PDPDPDPDPDPDPDPDPDPD

0

PD

Z

PD

Open Drain For PMU RTCCLK , Load BOM HW .

08/12 Delete EN_ACER_USB_CHARGE

8/25 Modify C36&C37 from 12P to 8P.

Deep Sleep : ON

Deep Sleep : OFF

9/22Change EN_3V3_MODEM from AE35 to AF36.

9/22 Change EN_3V3_MODEM to AF36

9/22 Swap AD36 & W29 GPIO function.Default pull up& pull down swap

9/26Change BT_PD# from Y36 to AJ33

9/26 Change BT_PD# to AJ33

9/26

H LPCB_ID3

Change from J37 to R37.

09/15 Add for Acer request.

9/27ADD EN_SENSOR_3V3_2 to U1.AA3

9/28 Change Net name from Board_ID3 to PCB_ID3

PICASSO_M PICASSO_2

10/11 Modify C36&C37 from 8P to 10P.

10/19 Modify R51 and R52 to 1K ohm

12/29 Modify R48 from 100K to 10K to meet Voltage level.

R1490_0201_5%

R1490_0201_5%1 2

T5PAD@ T5PAD@

R60

100K_0201_5%

R60

100K_0201_5%

1

2

T8PAD@ T8PAD@

T14PAD@ T14PAD@

T4PAD@ T4PAD@

R15910K_0201_5%

R15910K_0201_5%

1 2

(1.1V)

(1.8V)

(1.1V)

2/21 OSC, PLL & SYS

(1.1V)

(1.1V)

(1.05V)

(1.8V)

U1C


(1.1V)

(1.8V)

(1.1V)

2/21 OSC, PLL & SYS

(1.1V)

(1.1V)

(1.05V)

(1.8V)

U1C


VDDIO_SYSY32

AVDD_PLLEAF30

AVDD_PLLU_DAG5

AVDD_PLLMA21

AVDD_PLLXK18

AVDD_PLLA_P_C_SB24

AVDD_OSCP36

TEST_MODE_EN V28

HDMI_CEC V32

OWR R29

THERM_DP C31THERM_DN E31

JTAG_RTCK AD34JTAG_TRST* W33

JTAG_TMS AA33JTAG_TDO Y28JTAG_TDI AC35

JTAG_TCK AA31

KB_ROW15 AB30KB_ROW14 P32KB_ROW13 AC29KB_ROW12 P30KB_ROW11 Y36KB_ROW10 AA29KB_ROW09 AA37KB_ROW08 AA35KB_ROW07 AE35KB_ROW06 U33KB_ROW05 V34KB_ROW04 U35KB_ROW03 R31KB_ROW02 W29KB_ROW01 R37KB_ROW00 AC33

KB_COL07 W35KB_COL06 AD30KB_COL05 Y30KB_COL04 AC31KB_COL03 AD36KB_COL02 AD32KB_COL01 U29KB_COL00 U37

CLK_32K_OUT AB32CLK_32K_IN T30

SYS_CLK_REQ W27

CPU_PWR_REQ Y34CORE_PWR_REQ T32

PWR_INT* P28

SYS_RESET* U31

PWR_I2C_SDA V30PWR_I2C_SCL V36

PLL_S_PLL_LF R27

XTAL_OUT R35

XTAL_IN R33

R511K_0201_1%

R511K_0201_1%

1

2

R58

100K_0201_5%

R58

100K_0201_5%

1

2

U4

NCT1008CMT3R2G_WDFN8_2X2

U4

NCT1008CMT3R2G_WDFN8_2X2

THERM# 4ALERT# 6

SDA7SCL8

GND 5

VDD 1D+2D-3

C461000P_0201_16V7K

C461000P_0201_16V7K

1

2

R62

0_0201_5%

R62

0_0201_5%

1

2

C

4

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

@

C

4

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

@

1

2

Y1

32.768KHZ_12.5P_1TJF125DP1A000D

Y1

32.768KHZ_12.5P_1TJF125DP1A000D

1 2

R46

2.2K_0201_1%

R46

2.2K_0201_1%

1

2

C37

10P_0201_50V8J

C37

10P_0201_50V8J

1 2

T7PAD@ T7PAD@

(3.3V)

(3.3V)

(1.05V)

(1.05V)

19/21 PEX

(1.05V)

U1T


(3.3V)

(3.3V)

(1.05V)

(1.05V)

19/21 PEX

(1.05V)

U1T


VDDIO_PEX_CTLAK28

HVDD_PEXAL29

AVDD_PEX_PLLAN31

VDD_PEXBAM30

AVDD_PEXBAN29

PEX_TERMP AP36

PEX_WAKE* AP32

PEX_L2_RST* AU33PEX_L2_PRSNT* AT32

PEX_L2_CLKREQ* AR31

PEX_CLK3P AR33PEX_CLK3N AT34

PEX_L5_RXP AR29PEX_L5_RXN AP30

PEX_L5_TXP AU29PEX_L5_TXN AT30

R47

2.2K_0201_1%

R47

2.2K_0201_1%

1

2

T6PAD@ T6PAD@

R75

100K_0201_5%

R75

100K_0201_5%

1

2

R161 100K_0201_5%R161 100K_0201_5%12

R521K_0201_1%R521K_0201_1%

1

2

C

4

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

4

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R77

100K_0201_5%

R77

100K_0201_5%1

2

G

G Y1026MHZ_10PF_7M26000039

G

G Y1026MHZ_10PF_7M26000039

1

4 3

2

C

4

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

4

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C36

10P_0201_50V8J

C36

10P_0201_50V8J

1 2

R195

10K_0201_5%

PICASSO

_M@

R195

10K_0201_5%

PICASSO

_M@

1

2

R53

0_0201_5%

R53

0_0201_5%

1

2

R91

100K_0201_5%

R91

100K_0201_5%

1

2

JDBUG1

ACES_87036-1001-CPCONN@

JDBUG1

ACES_87036-1001-CPCONN@

991010

1122334455667788

GND11GND12

R164100K_0201_5%R164100K_0201_5%

1

2

L3

MPZ1005S300CT_2P

L3

MPZ1005S300CT_2P1 2

R61 100_0201_1%R61 100_0201_1%12

R163

10K_0201_5%

PICASSO

_2@R

163

10K_0201_5%

PICASSO

_2@

1

2

R56

100K_0201_5%

R56

100K_0201_5%

1

2

C

4

1

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

4

1

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

T10PAD@ T10PAD@

R15510K_0201_5%

R15510K_0201_5%

1 2

D20RB751V-40_SOD323-2D20RB751V-40_SOD323-2

12

(1.8/3.3V)

14/21 UART

U1R


(1.8/3.3V)

14/21 UART

U1R


VDDIO_UARTAC37

CLK3_REQ AF32CLK3_OUT AH32

DAP4_SCLK AL35DAP4_FS AF28

DAP4_DOUT AG35DAP4_DIN AF34

GPIO_PU6 AJ33GPIO_PU5 AG37GPIO_PU4 AM36GPIO_PU3 AG33GPIO_PU2 AN37GPIO_PU1 AF36GPIO_PU0 AK34

UART3_CTS* AJ37UART3_RTS* AK36UART3_RXD AJ35UART3_TXD AE33

UART2_CTS* AJ31UART2_RTS* AG31UART2_RXD AG29UART2_TXD AN35

GEN1_I2C_SDA AE29GEN1_I2C_SCL AH30

R49100K_0201_5%R49100K_0201_5%

1

2

T2PAD@ T2PAD@

C

4

3

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

4

3

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

3

9

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

3

9

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

R4810K_0201_5%

R4810K_0201_5%

1

2

C

4

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

4

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R162 100K_0201_5%@R162 100K_0201_5%@ 12

R59 100_0201_1%R59 100_0201_1%12

R57

49.9_0402_1%

R57

49.9_0402_1%

1 2

(1.8/3.3V)

12/21 BB

U1S


(1.8/3.3V)

12/21 BB

U1S


VDDIO_BBV6

GPIO_PV1 AA5GPIO_PV0 Y8

DAP3_SCLK AA3DAP3_FS Y4

DAP3_DOUT W5DAP3_DIN AA1

ULPI_STP V10ULPI_NXT AC9ULPI_DIR W3ULPI_CLK AC1

ULPI_DATA7 AA9ULPI_DATA6 AF6ULPI_DATA5 AC11ULPI_DATA4 V4ULPI_DATA3 AC3ULPI_DATA2 V8ULPI_DATA1 AC7ULPI_DATA0 AA7

R50

2M_0201_5%

R50

2M_0201_5%

1

2

C

3

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

3

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R16010K_0201_5%

R16010K_0201_5%

1 2

T9PAD@ T9PAD@

20/21 SPARE

U1U


20/21 SPARE

U1U


SPARE_4 AL33SPARE_3 AG19SPARE_2 AD28SPARE_1 AC27

SPARE_5 AM34

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VPP_KFUSE

+VDD_1V2_RTC_TEGRA

+VDD_3V3_FUSE_TEGRA

VDD_1V2_SOC

VDD_1V0_GEN

Title


Date: Sheet of




8



38

2012/06/202011/06/20

C


Title


Date: Sheet of




8



38

2012/06/202011/06/20

C


Title


Date: Sheet of




8



38

2012/06/202011/06/20

C


Acer request 07/04

Acer request 07/04

12/12 Modify R65 from @ to mount.

C

5

2

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

5

2

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

6

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

6

1

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

6

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

6

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

1

0

1

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

0

1

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

4

8

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

4

8

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

R64

10K_0201_5%

R64

10K_0201_5%

1

2

C

4

9

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

4

9

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

1

0

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

0

5

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

5

8

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

5

8

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

5

0

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

5

0

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

5

3

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

5

3

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

1

0

7

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

0

7

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

5

9

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

5

9

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

1

0

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

0

2

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

6

0

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

6

0

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

(1.0 ~ 1.2V)1/21 CORE POWER

(0.9 ~ 1.0V)

(1.0 ~ 1.2V)

(3.3V)(3.3V)

U1A


(1.0 ~ 1.2V)1/21 CORE POWER

(0.9 ~ 1.0V)

(1.0 ~ 1.2V)

(3.3V)(3.3V)

U1A


VPP_KFUSE AU9VPP_FUSE AU17

VDD_CORE_34 Y26VDD_CORE_33 Y24VDD_CORE_32 Y22VDD_CORE_31 Y16VDD_CORE_30 Y14VDD_CORE_29 Y12VDD_CORE_28 W25VDD_CORE_27 V26VDD_CORE_26 V24VDD_CORE_25 V22VDD_CORE_24 V16VDD_CORE_23 V14VDD_CORE_22 V12VDD_CORE_21 T24VDD_CORE_20 T22VDD_CORE_19 T18VDD_CORE_18 T16VDD_CORE_17 T14VDD_CORE_16 P22VDD_CORE_15 P20VDD_CORE_14 P18VDD_CORE_13 P16VDD_CORE_12 P14VDD_CORE_11 AF24VDD_CORE_10 AF22VDD_CORE_09 AF20VDD_CORE_08 AF18VDD_CORE_07 AD26VDD_CORE_06 AD24VDD_CORE_05 AD22VDD_CORE_04 AD20VDD_CORE_03 AB26VDD_CORE_02 AB24VDD_CORE_01 AB22

VDD_CPU_16 Y20VDD_CPU_15 Y18VDD_CPU_14 V20VDD_CPU_13 V18VDD_CPU_12 T20VDD_CPU_11 AF16VDD_CPU_10 AF14VDD_CPU_09 AD18VDD_CPU_08 AD16VDD_CPU_07 AD14VDD_CPU_06 AD12VDD_CPU_05 AB20VDD_CPU_04 AB18VDD_CPU_03 AB16VDD_CPU_02 AB14VDD_CPU_01 AB12

VDD_RTC_2 AJ25VDD_RTC_1 AH26

C

5

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

5

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

R6510K_0201_5%R6510K_0201_5%

1

2

C

4

7

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

4

7

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

6

2

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

6

2

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

6

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

6

3

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

5

7

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

C

5

7

4

.

7

U

_

0

4

0

2

_

6

.

3

V

6

M

1

2

C

1

0

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

1

0

4

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

C

8

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

C

8

8

0

.

1

U

_

0

2

0

1

_

1

0

V

6

K

1

2

21/21 GND

U1B


21/21 GND

U1B


GND_191W7GND_190W37GND_189W31GND_188W23GND_187W21GND_186W19GND_185W17GND_184W15GND_183W13GND_182W1GND_181U27GND_180U25GND_179U23GND_178U21GND_177U19GND_176U17GND_175U15GND_174U13GND_173U11GND_172T4GND_171T36GND_170T34GND_169T28GND_168T2GND_167T10GND_166R23GND_165R21GND_164R19GND_163R17GND_162R15GND_161R13GND_160P24GND_159N7GND_158N37GND_157N31GND_156N27GND_155N25GND_154N13GND_153N11GND_152N1GND_151M26GND_150M12GND_149L27GND_148L25GND_147L21GND_146L17GND_145L13GND_144L11GND_143K4GND_142K36GND_141K34GND_140K28GND_139K22GND_138K2GND_137K16GND_136K10GND_135J9GND_134J29GND_133J27GND_132J11GND_131H8GND_130H6GND_129H32GND_128H30GND_127G7GND_126G37GND_125G31GND_124G25GND_123G19GND_122G13GND_121G1GND_120F6GND_119F32GND_118E5GND_117E33GND_116D4GND_115D34GND_114D28GND_113D22GND_112D16GND_111D10GND_110C37GND_109C35GND_108C3GND_107C1GND_106B36GND_105B28GND_104B22GND_103B2GND_102B16GND_101B10GND_100AU7

GND_99 AU35GND_98 AU31GND_97 AU3GND_96 AU25GND_95 AU19GND_94 AU13GND_93 AT36GND_92 AT28GND_91 AT22GND_90 AT2GND_89 AT16GND_88 AT10GND_87 AR37GND_86 AR35GND_85 AR3GND_84 AR1GND_83 AP4GND_82 AP34GND_81 AP28GND_80 AP22GND_79 AP16GND_78 AP10GND_77 AN5GND_76 AN33GND_75 AM6GND_74 AM32GND_73 AL7GND_72 AL37GND_71 AL31GND_70 AL25GND_69 AL19GND_68 AL13GND_67 AL1GND_66 AK8GND_65 AK6GND_64 AK32GND_63 AK30GND_62 AJ9GND_61 AJ29GND_60 AJ27GND_59 AJ11GND_58 AH4GND_57 AH36GND_56 AH34GND_55 AH28GND_54 AH22GND_53 AH2GND_52 AH16GND_51 AH10GND_50 AG27GND_49 AG25GND_48 AG21GND_47 AG17GND_46 AG13GND_45 AG11GND_44 AF26GND_43 AF12GND_42 AE7GND_41 AE37GND_40 AE31GND_39 AE27GND_38 AE25GND_37 AE23GND_36 AE21GND_35 AE19GND_34 AE17GND_33 AE15GND_32 AE13GND_31 AE11GND_30 AE1GND_29 AC25GND_28 AC23GND_27 AC21GND_26 AC19GND_25 AC17GND_24 AC15GND_23 AC13GND_22 AB4GND_21 AB36GND_20 AB34GND_19 AB28GND_18 AB2GND_17 AB10GND_16 AA27GND_15 AA25GND_14 AA23GND_13 AA21GND_12 AA19GND_11 AA17GND_10 AA15GND_9 AA13GND_8 AA11GND_7 A7GND_6 A35GND_5 A31GND_4 A3GND_3 A25GND_2 A19GND_1 A13

C

6

5

0

.

1

U

_

0

2

0

1

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1

0

V

6

K

C

6

5

0

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1

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1

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C

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55

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3

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1

1

D D

C C

B B

A A

+VDD_1V8_DDR_MEM

+VDD_1V8_DDR_MEM

+VDD_1V8_DDR_MEM

+VDD_1V8_DDR_MEM

+VDD_1V2_DDR_MEM

+VRAM_VREFA

+VDD_1V2_DDR_MEM

+VDD_1V2_DDR_MEM

+VRAM_VREDQ+VDD_1V2_DDR_MEM

+VDD_1V8_DDR_MEM +VDD_1V8_DDR_MEM

+VDD_1V2_DDR_MEM

DDR_A_D10

DDR_A_D31

DDR_A_D27

DDR_A_D16

DDR_A_D23

DDR_A_D7

DDR_A_D13

DDR_A_D11

DDR_A_MA9DDR_A_MA8

DDR_A_MA7DDR_A_MA6

DDR_A_MA5

DDR_A_MA4 DDR_A_MA3 DDR_A_MA2

DDR_A_MA1

DDR_A_MA0

M_CS#0 M_CS#1

M_CLK_DDR0

M_CLK_DDR#0

M_CKE0 M_CKE1

DDR_A_DQS3DDR_A_DQS#3

DDR_A_DQS2 DDR_A_DQS#2

DDR_A_DQS1

DDR_A_DQS#1

DDR_A_DQS0 DDR_A_DQS#0

DDR_A_DM3

DDR_A_DM2

DDR_A_DM1

DDR_A_DM0

DDR_A_D15

DDR_A_D14

DDR_A_D9

DDR_A_D6 DDR_A_D5

DDR_A_D22

DDR_A_D21

DDR_A_D19

DDR_A_D28

DDR_A_D17

DDR_A_D24

DDR_A_D8

DDR_A_D0

DDR_A_D12

DDR_A_D29

DDR_A_D18

DDR_A_D25

DDR_A_D2

DDR_A_D1

DDR_A_D4

DDR_A_D30

DDR_A_D26

DDR_A_D20

DDR_A_D3

Title


Date: Sheet of




9



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2012/06/202011/06/20

C


Title


Date: Sheet of




9



38

2012/06/202011/06/20

C


Title


Date: Sheet of




9



38

2012/06/202011/06/20

C


( 1GB Samsung )

( 1GB Elpida )

Acer request

Follow NV designNET NAME BALL NAMEA0 P3A1 N3A2 M3A3 M2A4 M1A5 G2A6 F2A7 F3A8 E3A9 E2CKE0 K1CKE1 K2CLK J3CLK# H3CS0 L1CS1 L2DM0 K5DM1 H5DQ0 M9DQ1 N8DQ10 F7DQ11 F9DQ12 F6DQ13 G9DQ14 F8DQ15 E8DQ2 M8DQ3 M7DQ4 L9DQ5 L7DQ6 L8DQ7 M6DQ8 G7DQ9 G8DQS0 L6DQS0# L5DQS1 G6DQS1# G5Layer 2))))DM2 N7DM3 E7DQ16 T8DQ17 N6DQ18 P7DQ19 N5DQ20 T7DQ21 T9DQ22 R8DQ23 P6DQ24 D6DQ25 B8DQ26 E5DQ27 E6DQ28 D7DQ29 B7DQ30 C8DQ31 B9DQS2 P8DQS2# P9DQS3 D8DQS3# D9

F1,H1,N2 are the NC pins which assembled/embedded the interconnection into ELP Vdd sources already.due to co-layout the LPDDR2, it is need to apply 1.2 volt on F1, H1 and N2 pins.

R67100K_0201_5%R67100K_0201_5%

1

2

C800.1U_0201_10V6KC800.1U_0201_10V6K

1

2

C85

0

.

0

1

U

_

0

2

0

1

_

1

6

V

7

C85

0

.

0

1

U

_

0

2

0

1

_

1

6

V

7

1

2

C94

0.1U_0201_10V6K

C94

0.1U_0201_10V6K1

2

C

7

5

4

.

7

U

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0

4

0

2

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6

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3

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6

M

C

7

5

4

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7

U

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0

4

0

2

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6

.

3

V

6

M

1

2

U7

EDB8132B2MA-6D-F_FBGA134

X76_ELP_512M@

U7

EDB8132B2MA-6D-F_FBGA134

X76_ELP_512M@

NUA1NUA2NUA9NUA10NUB1NCB2NCB3VDD2B5VDD1B6DQ31B7DQ29B8DQ26B9NUB10VDD1C1VSSC2ZQ1C3VssC5VSSC6VDDQC7DQ25C8VSSC9VDDQC10VSSD1VDD2D2ZQ0D3VDDQD5DQ30D6DQ27D7DQS3D8/DQS3D9VSSD10

VSSE1CA9E2CA8E3

DQ28E5DQ24E6DM3E7DQ15E8VDDQE9VSSE10NCF1CA6F2CA7F3VSSF5DQ11F6DQ13F7

DQ14F8

DQ12F9

VDDQF10

VDD2G1

CA5G2

VREFCAG3/DQS1G5

DQS1G6DQ10G7DQ9G8DQ8G9

VSSG10NCH1VSSH2/CKH3

DM1H5VDDQH6VSSJ1NCJ2

CKJ3

VSSJ5

VDDQJ6

VDD2J7

VSS J8VREFDQ J9

CKE0 K1CKE1 K2

NC K3DM0 K5

VDDQ K6/CS0 L1/CS1 L2

NC L3/DQS0 L5DQS0 L6

DQ5 L7DQ6 L8DQ7 L9VSS L10CA4 M1CA3 M2CA2 M3VSS M5DQ4 M6DQ2 M7

DQ1 M8DQ3 M9

VDDQ M10VSS N1

NC N2CA1 N3

DQ19 N5DQ23 N6

DM2 N7DQ0 N8

VDDQ N9VSS N10VSS P1

VDD2 P2CA0 P3

VDDQ P5DQ17 P6DQ20 P7DQS2 P8/DQS2 P9

VSS P10VDD1 R1

VSS R2NC R3

VSS R5VSS R6

VDDQ R7DQ22 R8

VSS R9VDDQ R10

NU T1NC T2NC T3

VDD2 T5VDD1 T6DQ16 T7

DQ18 T8DQ21 T9

NU T10NU U1

NU U10

NU U2NU U9

C

2

5

2

3

3

P

5

0

V

J

N

P

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0

2

0

1

C

2

5

2

3

3

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5

0

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0

2

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C71

1U_0402_6.3V4Z

C71

1U_0402_6.3V4Z

1

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6

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1

2

R69100K_0201_5%

R69100K_0201_5%

1

2

U7

SA00004YY20X76_SAM_1GB@

U7

SA00004YY20X76_SAM_1GB@

C870.1U_0201_10V6KC870.1U_0201_10V6K

1

2

C79

1U_0402_6.3V4Z

C79

1U_0402_6.3V4Z

1

2

C86

0.1U_0201_10V6K

C86

0.1U_0201_10V6K1

2

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7

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6

6

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6

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1

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C93

0

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6

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C93

0

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6

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1

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C95

1U_0402_6.3V4Z

C95

1U_0402_6.3V4Z

1

2

C92

1U_0402_6.3V4Z

C92

1U_0402_6.3V4Z

1

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C720.1U_0201_10V6KC720.1U_0201_10V6K

1

2R68

100K_0201_5%R68

100K_0201_5%

1

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C

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1

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C680.1U_0201_10V6KC680.1U_0201_10V6K

1

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C70

0.1U_0201_10V6K

C70

0.1U_0201_10V6K1

2

C77

0

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0

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C77

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1

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C960.1U_0201_10V6KC960.1U_0201_10V6K

1

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R71240_0402_1%

R71240_0402_1%1 2

C

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6

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3

3

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1

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1

0

V

6

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1

2

C78

0.1U_0201_10V6K

C78

0.1U_0201_10V6K1

2

R66100K_0201_5%R66100K_0201_5%

1

2

C69

0

.

0

1

U

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0

2

0

1

_

1

6

V

7

C69

0

.

0

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U

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0

2

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1

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1

6

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1

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C

8

1

0

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1

U

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0

2

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V

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C

8

1

0

.

1

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0

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0

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1

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R70240_0402_1%R70240_0402_1%

1 2

C

1

0

0

0

.

1

U

_

0

2

0

1

_

1

0

V

6

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C

1

0

0

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1

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2

0

1

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1

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V

6

K

1

2

C

9

8

0

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1

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0

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1

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1

0

V

6

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C

9

8

0

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1

U

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0

2

0

1

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1

0

V

6

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1

2

U7

SA000050Z10

X76_ELP_1GB@U7

SA000050Z10

X76_ELP_1GB@

C

1

7

8

0

.

1

U

_

0

2

0

1

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1

0

V

6

K

C

1

7

8

0

.

1

U

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0

2

0

1

_

1

0

V

6

K

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VDD_1V8_SYS_TEGRA

BOARD_ID_WP PWR_I2C_SCL PWR_I2C_SDA

Title


Date: Sheet of


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTA

Compal La-8022p r1.0 Schematics

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Transcript of Compal La-8022p r1.0 Schematics