Compal LA 7322P

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Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-7322P 1.0P01-Cover Page

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1 47Thursday, February 17, 2011

2010/06/30 2012/06/30Compal Electronics, Inc.

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AMD APU Zacate-FT1 + FCH Hudson-M1 + GPU Seymour XT-M2

PBL60 Schematics Document

REV:1.0

Compal Confidential

2010-02-15

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LA-7322P 1.0P02-Block Diagrams

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BGA 605-Ball23mm x 23mm

AMD Brazos APU

UMI Gen.1 x4

Hudson M1

page 5,6,7

page 12 ~ 16

Single Channel BANK 0, 1, 2, 3204pin DDRIII-SO-DIMM X2

1.5V DDRIII

Memory BUS(DDRIII)page 8,9

PCI-E 2.0 x1

FT1BGA 413-Ball19mm x 19mm

LAN(GbE)RTL8111E

2.5GT/s per lane

Mini Card WLAN (With Bluetooth)

USB Conn.

SATA HDD Conn.

SATA ODD Conn.SATA

Camera

Audio CodecALC269

2Channel Speaker

AZALIA

USB2.0

USB Conn.(LS-7322P)

Card ReaderRTS5137SPI ROM

LPC BUS

Int.KBDTouch Pad

ENE KB930

Thermal Sensor

File Name : LA-7322PCompal confidential

page 25

page 26

page 26

page 18

page 28

page 29

page 28

page 30

page 31 page 31page 30 page 27

page 32

page 10

Mini Card-1 WLAN (With Bluetooth)

RJ45

Port 0Port 1

Port 1

Port 5

Port 2

Port 3

Port 4

Port 0

Port 1

USB Conn.page 32

Port 0

page 29

page 25

Audio Jacks X 2(Headphone, MIC)

DMICpage 10

page 26

page 17 ~ 24

AMD Seymour-XT

DDR3 VRAM 512M/1G64*16/128*16 *4

PCI-E GPP x4 GEN2

HDMI(UMA & PX)

CRT(UMA & PX)

LVDS(UMA & PX)LVDS Conn.

CRT Conn.

page 10

page 10

page 11HDMI Conn.

LS-7326PPower BD

LS-7322PAudio BD

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LA-7322P 1.0P03-Notes List

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+APU_CORE_NB 1.0V switched power rail ON OFF

+0.75VS 0.75VS switched power rail for DDR terminator

+RTCVCC RTC power

+1.8VS 1.8V switched power rail

+5VS

+3VS+5VALW

+1.5V

+3VALW

1.5V power rail for CPU VDDIO and DDRIII

3.3V always on power rail

5V always on power rail3.3V switched power rail

5V switched power rail+VSB VSB always on power rail ON ON*

ONONONON

ON

OFF

OFF

+APU_CORE

Voltage Rails

VINB+

+1.0VS

Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU (0.7-1.2V)

OFF1.0V switched power rail for NB VDDC & VGA

+1.1VS 1.1VS switched power rail ON OFF OFF

ON ON*

ON OFF OFF

+3V_LAN 3.3V power rail for LAN ON ON(WOL) OFF

S1 S3 S5

ON OFF

ON

N/A N/A N/AN/AN/AN/A

Power Plane Description

OFF

OFF

ONOFF

OFF

ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

OFFON

ON

ONON ON*

OFF

OFF

ONOFF

ON ON*ON+1.1VALW 1.1V always on power rail

FCH Hudson-M1USB Port ListUSB1.1

USB2.0

Port0

Port1

Port0

Port1

Port2

Port3

Port4

Port5

Port6

Port7

Port8

Port9

Port10

Port11

Port12

Port13

JUSB1

JUSB2

JUSB3

Camera

JMINI(WLAN)

Card Reader

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

BrazosPCIE Port List

PCIE0

PCIE1

PCIE2

PCIE3

PCIE0

PCIE1

PCIE2

PCIE3

A

P

U

F

C

H

GPU PCIE x4

LAN

WLAN

NC

NC

FCH Hudson-M1SATA Port ListSATA0

SATA1

SATA2

SATA3

SATA4

SATA5

HDD

ODD

NC

NC

NC

BOM Structure15G@: 1.5G CPU (E240)16G@: 1.6G CPU (E350)1G@ : 1G CPU (C50)UMA@ : APU output.VGA@ : GPU used.LS@ : Level shift used.X76@L01 :VRAM 1G.X76@L03 :VRAM 512M.

NC

Symbol Note :

: means Digital Ground

: means Analog Ground

SCL0, SDA0 (Primary SMBUS in the S0 domain) SCL1, SDA1 (Secondary SMBUS supporting ASF) SCL2, SDA2 (Primary SMBUS in the S5 domain) SCL3, SDA3 (Primary low-voltage SBMBUS for Processor TSI) SCL4, SDA4 (Primary SMBUS in the S5 domain)

V

APU FCH

EC_SMB_CK2

SOURCE

KB930

MIINI1 BATT SODIMM

SMBUS Control Table

FCH_SMCLK0FCH_SMDAT0

FCH(+3VS)

EC_SMB_DA2

EC_SMB_CK1EC_SMB_DA1

KB930

FCH_SMCLK3 FCH(+3VALW)

XX

X X

X

X

X

X XV X

FCH_SMDAT3

V VVX

XXV

VRAM

X

X

XXV

L01 :

L02 :

L03 :

L04 :

16G@/VGA@/LS@/X76@L03

16G@/UMA@/LS@

15G@/UMA@/LS@

15G@/VGA@/LS@/X76@L03

L05 :

L06 :

16G@/VGA@/LS@/X76@L01

15G@/VGA@/LS@/X76@L01

L07 :

L08 :

L09 :

1G@/VGA@/LS@/X76@L03

1G@/VGA@/LS@/X76@L01

1G@/UMA@/LS@

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

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LA-7322P 1.0P04-dGPU Block Diagram

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Note: Do not drive any IOs before VDDR3 is ramped up.

VDD_CT(1.8V)

VDDR3(3.3VSG)

VDDC/VDDCI(1.12V)

PERSTb

Straps Reset

Straps Valid

REFCLK

VDDR1(1.5VSG)

Power-Up/Down Sequence1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-upsequence, though a shorter ramp-up duration is preferred.2. VDDR3 should ramp-up before or simultaneously with VDDC.3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin beforeDPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10.4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC andVDD_CT have ramped up.

5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts toramp-up (or vice versa).)

PCIE_VDDC(1.0V)

Global ASIC Reset

T4+16clock

'WhWW D

W/WsW/sZd^ssZsdWWsW&sWWsWsss/sYs/W>>WsDWs^WsW&sWsW>>s^WsW/ssZs/&ssK

sZss/

ss

s

ss

s^

ss

WyK&&

MOS

K&&

K&&K&&K&&

K&&K&&

KDKE

KE

KEKEKE^W/sK&&K&&

s^'

s^'

s^'

s'KZs^'

'Wh

s

'Wh

s>t

PE_GPIO1

s

s

PE_GPIO0 PE_EN K^

BIF_VDDC

PX_mode

PWRGOOD

W'W/K>Z'Wh,EW'W/K>'WhWK&&,'WhWKE

tK

KW'W/K,E'WhKW'W/K>'WhWK&&,'WhWKE,

SI4800

SI4800

Regulator

Regulator

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

APU_RST#APU_PWRGD

APU_SVC

APU_PROCHOT#APU_THERMTRIP#

APU_TDIAPU_TDOAPU_TCKAPU_TMSAPU_TRST#APU_DBRDYAPU_DBREQ#

APU_SICAPU_SID

APU_SVD

APU_ALERT#_R

APU_SIC

APU_SID

TEST19TEST18

TEST25_HTEST_25_L

APU_PROCHOT#

APU_THERMTRIP#

TEST31

TEST36TEST37

TEST15

TEST_25_L

TEST33_HTEST33_L

TEST36

APU_LCD_CLKAPU_LCD_DATA

APU_HDMI_DATAAPU_HDMI_CLK

J108_PLLTST0

APU_TDO

J108_PLLTST1

APU_PWRGD

TEST19

TEST18

APU_TRST#_R

APU_RST#

APU_TCK

APU_DBRDY

APU_TMS

APU_DBREQ#

APU_TRST#

APU_TDI

TEST35

FCH_SID

FCH_SIC

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_DAAPU_SID

EC_SMB_CKAPU_SIC

APU_ALERT#_R

APU_RST#

APU_PWRGD

APU_CLKP12APU_CLKN12

APU_DISP_CLKP12APU_DISP_CLKN12

APU_RST#12APU_PWRGD12

H_THERMTRIP# 13

APU_HDMI_HPD 11

ALLOW_STOP# 12

APU_ENBKL 10APU_ENVDD 10APU_BLPWM 10

APU_CRT_HSYNC 10APU_CRT_VSYNC 10

APU_CRT_DDC_SCL 10APU_CRT_DDC_SDA 10

APU_VDDNB_RUN_FB_H43APU_VDD0_RUN_FB_H43

APU_SVC43APU_SVD43

APU_LCD_CLK 10APU_LCD_DATA 10

APU_TXOUT2+10APU_TXOUT2-10

APU_TXCLK+10APU_TXCLK-10



APU_VDD0_RUN_FB_L43

APU_HDMI_DATA 11APU_HDMI_CLK 11

EC_SMB_DA2 18,30

FCH_SIC 13

FCH_SID 13

EC_SMB_CK2 18,30

EC_THERM#30FCH_PROCHOT#12

APU_HDMI_TX2N11APU_HDMI_TX2P11



APU_HDMI_CLKN11APU_HDMI_CLKP11

APU_CRT_R 10

APU_CRT_G 10

APU_CRT_B 10

+1.8VS

+3VS

+3VS

+1.8VS

+1.8VS

+1.8VS +1.8VS

+1.8VS

+3VS

+5VS

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LA-7322P 1.0P05-FT1 CTRL/DP/CRT

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If FCH internal pull-up disabled, level-shifter could be deleted. Need BIOS to disable internal pull-up!!

Close to APU

AMD Debug

Please be noted about TEST_18 and TEST_19

CPU TSI interface level shift

BSH111, the Vgs is:min = 0.4VTyp = 1.0VMax = 1.3V

FDV301N, the Vgs is:min = 0.65VTyp = 0.85VMax = 1.5V

1.607V for Gate

T0 FCHTO EC

TO ECT0 FCH

If use level shift, EC_SMB need pull up(pop R747 & R748)

Delete Test point for layout limitation20100917

Close to U22

R398 150_0402_1%R398 150_0402_1%1 2

U22

ZACATE ZM161032B2238 1.6G BGA 413P

16G@U22

ZACATE ZM161032B2238 1.6G BGA 413P

16G@

T76PAD T76PAD

R431 0_0402_5%R431 0_0402_5%1 2

R169 0_0402_5%R169 0_0402_5%1 2

C516 0.1U_0402_16V4ZC516 0.1U_0402_16V4Z1 2

T

E

S

T

V

G

A

D

A

C

J

T

A

G

C

T

R

L

S

E

R

C

L

K

D

P

M

I

S

C

D

I

S

P

L

A

Y

P

O

R

T

0

D

I

S

P

L

A

Y

P

O

R

T

1

U22B

ONTARIO-2M161000-1.6G_BGA41315G@

T

E

S

T

V

G

A

D

A

C

J

T

A

G

C

T

R

L

S

E

R

C

L

K

D

P

M

I

S

C

D

I

S

P

L

A

Y

P

O

R

T

0

D

I

S

P

L

A

Y

P

O

R

T

1

U22B


RSVD_3V5RSVD_2W11RSVD_1B4VSS_SENSEF1VDDIO_MEM_S_SENSEF3VDDCR_CPU_SENSEG1VDDCR_NB_SENSEF4DBREQ_LM1DBRDYM3TRST_LM4TCKP1TDON1TDIN2ALERT_LT2THERMTRIP_LU2PROCHOT_LU1PWROKT4RESET_LT3SIDP4SICP3SVDJ2SVCJ1DISP_CLKIN_LD1DISP_CLKIN_HD2CLKIN_LV1CLKIN_HV2LTDP0_TXN3C8LTDP0_TXP3D8LTDP0_TXN2B6LTDP0_TXP2A6LTDP0_TXN1C6LTDP0_TXP1D6LTDP0_TXN0A5LTDP0_TXP0B5

TDP1_TXP3A10TDP1_TXN2C10

TDP1_TXN1A9TDP1_TXP1B9TDP1_TXN0B8TDP1_TXP0A8

DMAACTIVE_L T1TEST38 K3

TEST37 R5TEST36 N5TEST35 H4

TEST34_L T15TEST34_H U15TEST33_L J19TEST33_H J18

TEST31 M21TEST28_L M5TEST28_H L5TEST25_L K2TEST25_H K1

TEST19 M2TEST18 L2TEST17 L1TEST16 K4TEST15 E4TEST14 T5

TEST6 R6TEST5 R2TEST4 R1

DAC_ZVSS D12DAC_SDA D4DAC_SCL F2

DAC_VSYNC E2DAC_HSYNC E1DAC_BLUEB B13

DAC_BLUE A13DAC_GREENB B12

DAC_GREEN A12DAC_REDB D13

DAC_RED C12LTDP0_HPD D3

LTDP0_AUXN B3LTDP0_AUXP A3

TDP1_HPD C1TDP1_AUXN C2TDP1_AUXP B2

DP_VARY_BL H1DP_DIGON H2DP_BLON G2DP_ZVSS H3

TDP1_TXP2D10

TDP1_TXN3B10

TMSP2

R8460_0402_5%

R8460_0402_5%

1 2

R176 10K_0402_5%R176 10K_0402_5%12

C237 0.01U_0402_25V7K@C237 0.01U_0402_25V7K@1 2

R423 1K_0402_5%R423 1K_0402_5%1 2

C517 0.1U_0402_16V4ZC517 0.1U_0402_16V4Z1 2

R432 0_0402_5%@

R432 0_0402_5%@1 2

R420 51_0402_1%R420 51_0402_1%1 2

R430 0_0402_5%R430 0_0402_5%1 2

R406 100K_0402_5%R406 100K_0402_5%1 2

R434 0_0402_5%R434 0_0402_5%1 2

R429 0_0402_5%@

R429 0_0402_5%@1 2

R427 0_0402_5%R427 0_0402_5%1 2

T93PADT93PAD

R410 1K_0402_5%R410 1K_0402_5%1 2

R843 1K_0402_5%R843 1K_0402_5%12

R401 300_0402_5%R401 300_0402_5%12

R143 1K_0402_5%R143 1K_0402_5%1 2

R168 0_0402_5%@R168 0_0402_5%@1 2

R408 150_0402_1%R408 150_0402_1%1 2

R798 1K_0402_5%R798 1K_0402_5%12

U22

ONTARIO CMC50AFPB22GT 1G

1G@U22

ONTARIO CMC50AFPB22GT 1G

1G@

C238 0.01U_0402_25V7K@C238 0.01U_0402_25V7K@1 2

R399 1K_0402_5%R399 1K_0402_5%1 2

T94PADT94PAD

C639 0.1U_0402_16V4Z@

C639 0.1U_0402_16V4Z@

1 2

R417 1K_0402_5%R417 1K_0402_5%1 2

R414 1K_0402_5%R414 1K_0402_5%1 2

R958 1K_0402_5%R958 1K_0402_5%1 2

G

DS

Q23BSH111 1N_SOT23-3

@

G

DS


@

2

13

T67PAD T67PAD

T68PAD T68PAD

R

8

4

2

1

K

_

0

4

0

2

_

5

%

R

8

4

2

1

K

_

0

4

0

2

_

5

%

1

2

JHDT1

SAMTE_ASP-136446-07-BCONN@

JHDT1

SAMTE_ASP-136446-07-BCONN@

11

33

55

77

99

1111

1313

1515

1717

1919

2 2

4 4

6 6

8 8

10 10

12 12

14 14

16 16

18 18

20 20

R433 0_0402_5%R433 0_0402_5%1 2

R863 0_0402_5%R863 0_0402_5%1 2

R407 150_0402_1%R407 150_0402_1%1 2

C236 0.1U_0402_10V7K@

C236 0.1U_0402_10V7K@

1 2

R178 300_0402_5%R178 300_0402_5%1 2

EB

C

Q79

MMBT3904_NL_SOT23-3

EB

C

Q79

MMBT3904_NL_SOT23-3

2

3 1

R411 1K_0402_5%R411 1K_0402_5%1 2

T73PAD T73PAD

R415 1K_0402_5%@R415 1K_0402_5%@1 2

R416 1K_0402_5%R416 1K_0402_5%1 2

R799 0_0402_5%R799 0_0402_5%1 2

R142 300_0402_5%

R142 300_0402_5%

12

R177 10K_0402_5%R177 10K_0402_5%12

R42410K_0402_5%@

R42410K_0402_5%@

1

2

R141 1K_0402_5%R141 1K_0402_5%1 2

R422 1K_0402_5%@R422 1K_0402_5%@1 2

R402 510_0402_1%R402 510_0402_1%1 2

R144 499_0402_1%R144 499_0402_1%1 2

T77PADT77PAD

R428

31.6K_0402_1%

@R428

31.6K_0402_1%

@1 2 R160

30K_0402_1%

@R160

30K_0402_1%

@1 2

R418 510_0402_1%R418 510_0402_1%1 2

R847 10K_0402_5%R847 10K_0402_5%12

R421 51_0402_1%R421 51_0402_1%1 2

R840 1K_0402_5%R840 1K_0402_5%12

R400 1K_0402_5%R400 1K_0402_5%1 2

R409 150_0402_1%R409 150_0402_1%1 2

T66PAD T66PAD

G

DS


@

G

DS


@

2

13

R425

1K_0402_5%

R425

1K_0402_5%

1

2

AA

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

DDR_A_MA15

DDR_A_MA12

DDR_A_MA14DDR_A_MA13

DDR_A_MA11DDR_A_MA10

DDR_A_MA6

DDR_A_MA1

DDR_A_MA7

DDR_A_MA2DDR_A_MA3

DDR_A_MA8

DDR_A_MA5DDR_A_MA4

DDR_A_MA9

DDR_A_MA0

DDR_A_DM6DDR_A_DM5DDR_A_DM4DDR_A_DM3DDR_A_DM2DDR_A_DM1DDR_A_DM0

DDR_A_DM7

DDR_A_DQS7DDR_A_DQS#7








DDR_A_CLK#1

DDR_A_CLK#0DDR_A_CLK0

DDR_A_CLK1

+MEM_VREF

DDR_A_D33DDR_A_D32

DDR_A_D37DDR_A_D36DDR_A_D35DDR_A_D34

DDR_A_D38DDR_A_D39

DDR_A_D19

DDR_A_D22DDR_A_D23

DDR_A_D16DDR_A_D17

DDR_A_D21DDR_A_D20

DDR_A_D29

DDR_A_D24

DDR_A_D28DDR_A_D27

DDR_A_D18

DDR_A_D26

DDR_A_D30DDR_A_D31

DDR_A_D25

DDR_A_D47

DDR_A_D40DDR_A_D41


DDR_A_D46

DDR_A_D1

DDR_A_D5

DDR_A_D0

DDR_A_D4DDR_A_D3DDR_A_D2

DDR_A_D6DDR_A_D7

DDR_A_D62DDR_A_D63

DDR_A_D57


DDR_A_D56

DDR_A_D58

DDR_A_D8


DDR_A_D14DDR_A_D15

DDR_A_D9

DDR_A_D13

DDR_A_D49


DDR_A_D54

DDR_A_D48

DDR_A_D55

DDR_A_ODT1DDR_A_ODT0

DDR_EVENT#DDR_RST#

DDR_A_WE#DDR_A_CAS#DDR_A_RAS#

DDR_CKE0DDR_CKE1

DDR_CS1_DIMMA#DDR_CS0_DIMMA#

+MEM_VREF

DDR_B_ODT1DDR_B_ODT0

DDR_CS1_DIMMB#DDR_CS0_DIMMB#

DDR_B_CLK#3

DDR_B_CLK#2DDR_B_CLK2

DDR_B_CLK3

P_ZVDD_10

UMI_TX2P_CUMI_TX2N_C




P_ZVSS

DDR_A_D[0..63]DDR_A_MA[0..15]

DDR_A_DM[0..7]

PCIE_FTX_GRX_N0PCIE_FTX_GRX_P0




PCIE_GTX_C_FRX_P0PCIE_GTX_C_FRX_N0




DDR_EVENT#

DDR_CKE1

DDR_CKE0

DDR_A_BS08,9DDR_A_BS18,9DDR_A_BS28,9

DDR_A_DQS08,9

DDR_A_DQS18,9

DDR_A_DQS28,9

DDR_A_DQS38,9

DDR_A_DQS48,9

DDR_A_DQS58,9

DDR_A_DQS68,9

DDR_A_DQS78,9

DDR_A_DQS#08,9

DDR_A_DQS#18,9

DDR_A_DQS#28,9

DDR_A_DQS#38,9

DDR_A_DQS#48,9

DDR_A_DQS#58,9

DDR_A_DQS#68,9

DDR_A_DQS#78,9

DDR_A_CLK09DDR_A_CLK#09DDR_A_CLK19DDR_A_CLK#19

DDR_RST#8,9DDR_EVENT#8,9

DDR_A_RAS#8,9DDR_A_CAS#8,9DDR_A_WE#8,9

DDR_A_ODT09DDR_A_ODT19

DDR_CKE08,9DDR_CKE18,9

DDR_CS0_DIMMA#9DDR_CS1_DIMMA#9

DDR_B_ODT08DDR_B_ODT18

DDR_CS0_DIMMB#8DDR_CS1_DIMMB#8

DDR_B_CLK28DDR_B_CLK#28DDR_B_CLK38DDR_B_CLK#38

UMI_TX0P 12

UMI_TX1N 12

UMI_TX0N 12

UMI_TX1P 12

UMI_TX2P 12UMI_TX2N 12

UMI_TX3N 12UMI_TX3P 12UMI_RX3P12

UMI_RX3N12

UMI_RX2P12UMI_RX2N12



DDR_A_MA[0..15] 8,9DDR_A_D[0..63] 8,9

DDR_A_DM[0..7] 8,9





PCIE_FTX_C_GRX_P0 17PCIE_FTX_C_GRX_N0 17




+1.5V

+1.5V

+1.05VS

+1.5V

Title


Date: Sheet of




LA-7322P 1.0P06-FT1 DDRIII/UMI/PCIE

Custom


2010/06/30 2012/06/30 Title


Date: Sheet of





Custom


2010/06/30 2012/06/30 Title


Date: Sheet of





Custom


2010/06/30 2012/06/30Compal Electronics, Inc.Place within 1000 mils to APU20100526

Less than 1"Less than 1"

15 mils

For AMD recommend to fix S3 issue.

DD

R SYSTEM

MEM

OR

Y

U22E


DD

R SYSTEM

MEM

OR

Y

U22E


M_WE_LV17M_CAS_LV19

M1_CS_L1V16M1_CS_L0U17M0_CS_L1W16M0_CS_L0T17M1_ODT1W15M1_ODT0U19M0_ODT1V15M0_ODT0W19

M_CKE1E15M_CKE0F15

M_EVENT_LN17M_RESET_LL23

M_CLK_H3L18M_CLK_L2N19M_CLK_H2N18M_CLK_L1M18M_CLK_H1M19M_CLK_L0M16M_CLK_H0M17M_DQS_L7AC16M_DQS_L6AC21M_DQS_H6AC20M_DQS_L5V22M_DQS_H5W22M_DQS_L4P22M_DQS_H4R22M_DQS_L3J23M_DQS_H3J22M_DQS_L2E22M_DQS_H2E23M_DQS_L1A20M_DQS_H1B20M_DQS_L0B16M_DQS_H0A16M_DM7AA16M_DM6AB20M_DM5V23M_DM4P23M_DM3H22M_DM2D21M_DM1B19M_DM0D15M_BANK2F16M_BANK1T18M_BANK0R18M_ADD15G15M_ADD14E16M_ADD13W17M_ADD12E18M_ADD11F17M_ADD10T19M_ADD9E19M_ADD8F19M_ADD7G18M_ADD6H15M_ADD5G17M_ADD4H17M_ADD3H18M_ADD2J17M_ADD1H19M_ADD0R17

M_ZVDDIO_MEM_S M22

M_VREF M23

M_DATA63 AC15M_DATA62 AB15M_DATA61 AB18M_DATA60 AC18M_DATA59 AC14M_DATA58 AB14M_DATA57 Y16M_DATA56 AC17M_DATA55 Y18M_DATA54 AB19M_DATA53 AA20M_DATA52 AA23M_DATA51 AA18M_DATA50 AC19M_DATA49 AB22M_DATA48 Y20M_DATA47 Y21M_DATA46 W23M_DATA45 U23M_DATA44 T21M_DATA43 Y22M_DATA42 Y23M_DATA41 V21M_DATA40 V20M_DATA39 T22M_DATA38 R23M_DATA37 P20M_DATA36 M20M_DATA35 T23M_DATA34 T20M_DATA33 P21M_DATA32 N23M_DATA31 K23M_DATA30 K20M_DATA29 H20M_DATA28 G23M_DATA27 K21M_DATA26 K22M_DATA25 H23M_DATA24 H21M_DATA23 F21M_DATA22 F20M_DATA21 D22M_DATA20 C22M_DATA19 F22M_DATA18 F23M_DATA17 D23M_DATA16 C23M_DATA15 C20M_DATA14 A21M_DATA13 B18M_DATA12 A18M_DATA11 D20M_DATA10 B21M_DATA9 A19M_DATA8 C18M_DATA7 D16M_DATA6 C16M_DATA5 C14M_DATA4 A14M_DATA3 D18M_DATA2 A17M_DATA1 A15M_DATA0 B14

M_CLK_L3L17

M_DQS_H7AB16

M_RAS_LU18

C525 0.1U_0402_16V7KVGA@C525 0.1U_0402_16V7KVGA@1 2

C528 0.1U_0402_16V7KC528 0.1U_0402_16V7K1 2

C530 0.1U_0402_16V7KC530 0.1U_0402_16V7K1 2

C529 0.1U_0402_16V7KC529 0.1U_0402_16V7K1 2

C532 0.1U_0402_16V7KC532 0.1U_0402_16V7K1 2

R170568_0402_5%

R170568_0402_5%

1

2

U

M

I

I

/

F

P

C

I

E

I

/

F

U22A


U

M

I

I

/

F

P

C

I

E

I

/

F

U22A


P_UMI_RXN3AB7P_UMI_RXP3AC7P_UMI_RXN2AC10P_UMI_RXP2AB10P_UMI_RXN1Y10P_UMI_RXP1AA10P_UMI_RXN0Y12P_UMI_RXP0AA12

P_ZVDD_10Y14P_GPP_RXN3Y3P_GPP_RXP3Y4P_GPP_RXN2AA2P_GPP_RXP2AA1P_GPP_RXN1AC4P_GPP_RXP1AB4P_GPP_RXN0Y6P_GPP_RXP0AA6

P_UMI_TXN3 AC8P_UMI_TXP3 AB8P_UMI_TXN2 Y8P_UMI_TXP2 AA8P_UMI_TXN1 AB11P_UMI_TXP1 AC11P_UMI_TXN0 AC12P_UMI_TXP0 AB12

P_ZVSS AA14P_GPP_TXN3 V4P_GPP_TXP3 V3P_GPP_TXN2 Y2P_GPP_TXP2 Y1P_GPP_TXN1 AC3P_GPP_TXP1 AB3P_GPP_TXN0 AC6P_GPP_TXP0 AB6

C521 0.1U_0402_16V7KVGA@C521 0.1U_0402_16V7KVGA@1 2

C534

1000P_0402_50V7K

C534

1000P_0402_50V7K

1

2

R1491K_0402_5%

R1491K_0402_5%

1 2

C526 0.1U_0402_16V7KC526 0.1U_0402_16V7K1 2

R170668_0402_5%R170668_0402_5%

1

2

C524 0.1U_0402_16V7KVGA@C524 0.1U_0402_16V7KVGA@1 2

R4391K_0402_1%

R4391K_0402_1%

1

2

C535

0.1U_0402_16V4Z

C535

0.1U_0402_16V4Z

1

2

C527 0.1U_0402_16V7KC527 0.1U_0402_16V7K1 2

R436 1.27K_0402_1%R436 1.27K_0402_1%1 2

R437

39.2_0402_1%

R437

39.2_0402_1%

12

C522 0.1U_0402_16V7KVGA@C522 0.1U_0402_16V7KVGA@1 2

C531 0.1U_0402_16V7KC531 0.1U_0402_16V7K1 2

R435 2K_0402_1%R435 2K_0402_1%1 2

C533 0.1U_0402_16V7KC533 0.1U_0402_16V7K1 2

C523 0.1U_0402_16V7KVGA@C523 0.1U_0402_16V7KVGA@1 2

C519 0.1U_0402_16V7KVGA@C519 0.1U_0402_16V7KVGA@1 2C518 0.1U_0402_16V7KVGA@C518 0.1U_0402_16V7KVGA@1 2

C520 0.1U_0402_16V7KVGA@C520 0.1U_0402_16V7KVGA@1 2

R4381K_0402_1%

R4381K_0402_1%

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VDD_18

+VDD_10

+VDDL_10

+VDD_18_DAC

+APU_CORE

+APU_CORE_NB

+1.5V

+1.8VS

+1.8VS

+1.05VS

+3VS

+APU_CORE

+APU_CORE_NB

+1.5V

+1.5V

+APU_CORE

+APU_CORE_NB

+1.5V +1.8VS

+1.05VS

+1.5V

Title


Date: Sheet of




LA-7322P 1.0P07-FT1 PWR/VSS

C


2010/06/30 2012/06/30 Title


Date: Sheet of





C


2010/06/30 2012/06/30 Title


Date: Sheet of





C


2010/06/30 2012/06/30

By case (Along split plane)

Near CPU Socket

Near CPU Socket Near CPU Socket

POWER

Near CPU Socket

(390uF_2.5V_6.3x5.7_ESR10m)*1=(SF000002O00)

POWER POWER

POWER

Compal Electronics, Inc.

Change from SM010014520 to SD00200008020100816



Power Cap. Summary

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->1.05VS(Qty : 1)

S POLY C 330U 2.5V M D2E TPE LESR9M H1.8 --->+APU_CORE(Qty : 3) Unpop:2

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU--->+APU_CORE_NB(Qty : 1)S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->+APU_CORE_NB(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.8VS(Qty : 1)

APU

DDR3 Socket

GPU

USB

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+APU_CORE(Qty : 2)

S POLY C 330U 2V M X LESR6M SX H1.9 --->1.5V(Qty : 1)

FCHS POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->1.1VS(Qty : 1) UMA unpop

S_A-P_CAP 220U 6.3V M C45 R17M SVPE H4.4 --->+USB_VCCA(Qty : 1)

180PF Qt'y follow the distance betweenCPU socket and DIMM0.

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.5V(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+VGA_CORE(Qty : 1)S POLY C 330U 2V M X LESR6M SX H1.9 --->VGA_CORE(Qty : 2) Unpop:1

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.5VSG(Qty : 1)

+APU_CORE

+APU_CORE_NB

+1.5V

+1.05VS

+1.8VS

+1.5V

+1.1VS

+GPU_CORE

+1.5VSG

+USB_VCCA

11A

10A

2A

2A

0.15A

0.2A

5.5A

0.5A

FOR EMI PURPOSE

L32

FBMA-L11-201209-221LMA30T_0805

L32

FBMA-L11-201209-221LMA30T_0805

12

CPU COREGPU AND NB CORE

DDR3

TSense/PLL/DP/PCIE/IODIS PLL

PCIE/IO/DDR3 PhyDAC

DP Phy/IO

POWER

U22C


CPU COREGPU AND NB CORE

DDR3

TSense/PLL/DP/PCIE/IODIS PLL

PCIE/IO/DDR3 PhyDAC

DP Phy/IO

POWER

U22C


VDDIO_MEM_S_11U16VDDIO_MEM_S_10W18VDDIO_MEM_S_9R19VDDIO_MEM_S_8R16VDDIO_MEM_S_7N16VDDIO_MEM_S_6L19VDDIO_MEM_S_5L16VDDIO_MEM_S_4J16VDDIO_MEM_S_3E17VDDIO_MEM_S_2G19VDDIO_MEM_S_1G16

VDDCR_NB_22P13VDDCR_NB_21P11VDDCR_NB_20N14VDDCR_NB_19N12VDDCR_NB_18N10VDDCR_NB_17M13VDDCR_NB_16M12VDDCR_NB_15M11VDDCR_NB_14L14VDDCR_NB_13L12VDDCR_NB_12L10VDDCR_NB_11K13VDDCR_NB_10K11VDDCR_NB_9H12VDDCR_NB_8H9VDDCR_NB_7G13VDDCR_NB_6G11VDDCR_NB_5F12VDDCR_NB_4F9VDDCR_NB_3E13VDDCR_NB_2E11VDDCR_NB_1E8

VDDCR_CPU_15R8VDDCR_CPU_14N7VDDCR_CPU_13M8VDDCR_CPU_12M6VDDCR_CPU_11L7VDDCR_CPU_10J8VDDCR_CPU_9J6VDDCR_CPU_8H7VDDCR_CPU_7H5VDDCR_CPU_6G8VDDCR_CPU_5G6VDDCR_CPU_4F7VDDCR_CPU_3F5VDDCR_CPU_2E6VDDCR_CPU_1E5

VDD_33 A4

VDD_10_4 T12VDD_10_3 V12VDD_10_2 W13VDD_10_1 U13

VDDPL_10 U11

VDD_18_DAC W9

VDD_18_7 V7VDD_18_6 T7VDD_18_5 W6VDD_18_4 U9VDD_18_3 U6VDD_18_2 W8VDD_18_1 U8

C

5

8

1

1

U

_

0

4

0

2

_

6

.

3

V

6

K

C

5

8

1

1

U

_

0

4

0

2

_

6

.

3

V

6

K

1

2

C559

0.1U_0402_16V7K

C559

0.1U_0402_16V7K

1

2

C

6

0

4

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

C

6

0

4

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

1

2

C543

10U_0603_6.3V6M

C543

10U_0603_6.3V6M

1

2

C

5

4

8

1

U

_

0

4

0

2

_

6

.

3

V

6

K

C

5

4

8

1

U

_

0

4

0

2

_

6

.

3

V

6

K

1

2

GN

D

U22D


GN

D

U22D


VSS_49N11VSS_48N8VSS_47N6VSS_46N4VSS_45M7VSS_44L22VSS_43L20VSS_42L13VSS_41L11VSS_40L8VSS_39L6VSS_38L4VSS_37K14VSS_36K10VSS_35J20VSS_34J7VSS_33J5VSS_32J4VSS_31H13VSS_30H11VSS_29H6VSS_28G22VSS_27G20VSS_26G12VSS_25G9VSS_24G7VSS_23G5VSS_22G4VSS_21F13VSS_20F11VSS_19F8VSS_18E20VSS_17E12VSS_16E9VSS_15E7VSS_14D19VSS_13D17VSS_12B15VSS_11D14VSS_10D11VSS_9D9VSS_8D7VSS_7D5VSS_6C4VSS_5B22VSS_4B17VSS_3B11VSS_2B7VSS_1A7

VSSBG_DAC A11VSS_97 AC13VSS_96 AC9VSS_95 AC5VSS_94 AB21VSS_93 AB17VSS_92 AB13VSS_91 AB9VSS_90 AB5VSS_89 AB2VSS_88 AA22VSS_87 AA4VSS_86 Y19VSS_85 Y17VSS_84 Y15VSS_83 Y13VSS_82 Y11VSS_81 Y9VSS_80 Y7VSS_79 Y5VSS_78 W20VSS_77 W12VSS_76 W7VSS_75 W5VSS_74 W4VSS_73 W2VSS_72 W1VSS_71 V13VSS_70 V11VSS_69 V9VSS_68 V8VSS_67 U22VSS_66 U20VSS_65 U12VSS_64 U7VSS_63 U5VSS_62 U4VSS_61 T13VSS_60 T11VSS_59 T9VSS_58 T6VSS_57 R20VSS_56 R7VSS_55 R4VSS_54 P14VSS_53 P10VSS_52 N22VSS_51 N20VSS_50 N13

C555

180P_0402_50V8J

C555

180P_0402_50V8J

1

2

C623

10U_0603_6.3V6M

C623

10U_0603_6.3V6M

1

2

C597

1U_0402_6.3V6K

C597

1U_0402_6.3V6K

1

2

C542

10U_0603_6.3V6M

C542

10U_0603_6.3V6M

1

2

C

6

1

3

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

@

C

6

1

3

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

@

1

2

C587

180P_0402_50V8J

C587

180P_0402_50V8J

1

2

C616

10U_0603_6.3V6M

@C616

10U_0603_6.3V6M

@

1

2

C539

10U_0603_6.3V6M

C539

10U_0603_6.3V6M

1

2

C

5

5

6

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

C

5

5

6

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

1

2

C579

10U_0603_6.3V6M

C579

10U_0603_6.3V6M

1

2

C

5

6

6

1

U

_

0

4

0

2

_

6

.

3

V

6

K

C

5

6

6

1

U

_

0

4

0

2

_

6

.

3

V

6

K

1

2

C685

10U_0603_6.3V6M

C685

10U_0603_6.3V6M

1

2

C584

1U_0402_6.3V6K

C584

1U_0402_6.3V6K

1

2

C554

180P_0402_50V8J

C554

180P_0402_50V8J

1

2

C536

10U_0603_6.3V6M

C536

10U_0603_6.3V6M

1

2

C

5

7

4

1

0

U

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0

6

0

3

_

6

.

3

V

6

M

C

5

7

4

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

1

2

+C1105

390U_2.5V_10M

+C1105

390U_2.5V_10M

1

2

C1020.1U_0402_16V7KC1020.1U_0402_16V7K

1

2

C

5

4

7

1

U

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0

4

0

2

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6

.

3

V

6

K

C

5

4

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1

U

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0

4

0

2

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6

.

3

V

6

K

1

2

C

6

1

1

0

.

1

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4

0

2

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1

6

V

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K

@

C

6

1

1

0

.

1

U

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0

4

0

2

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1

6

V

7

K

@

1

2

C541

10U_0603_6.3V6M

C541

10U_0603_6.3V6M

1

2

C551

1U_0402_6.3V6K

C551

1U_0402_6.3V6K

1

2

C596

1U_0402_6.3V6K

C596

1U_0402_6.3V6K

1

2

C593

0.1U_0402_16V7K

C593

0.1U_0402_16V7K

1

2

+C617

390U_2.5V_10M

@

+C617

390U_2.5V_10M

@

1

2

C

5

4

6

1

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4

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3

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5

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5

5

7

1

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4

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2

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6

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3

V

6

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1

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C563

0.1U_0402_16V7K

C563

0.1U_0402_16V7K

1

2

C

5

6

9

0

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1

U

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4

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6

V

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C

5

6

9

0

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1

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0

4

0

2

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1

6

V

7

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1

2

C591

0.1U_0402_16V7K

C591

0.1U_0402_16V7K

1

2

C

6

1

5

1

8

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4

0

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V

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1

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C598

1U_0402_6.3V6K

C598

1U_0402_6.3V6K

1

2

C104180P_0402_50V8JC104180P_0402_50V8J

1

2+C1104

390U_2.5V_10M+C1104

390U_2.5V_10M1

2

C625

10U_0603_6.3V6M@C625

10U_0603_6.3V6M@

1

2+C618

390U_2.5V_10M

+C618

390U_2.5V_10M

1

2

C600

0.1U_0402_16V7K

C600

0.1U_0402_16V7K

1

2

C620

10U_0603_6.3V6M@C620

10U_0603_6.3V6M@

1

2

+C621

390U_2.5V_10M@

+C621

390U_2.5V_10M@

1

2

C588

180P_0402_50V8J

C588

180P_0402_50V8J

1

2

C595

1U_0402_6.3V6K

C595

1U_0402_6.3V6K

1

2

C

6

1

0

0

.

1

U

_

0

4

0

2

_

1

6

V

7

K

@

C

6

1

0

0

.

1

U

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0

4

0

2

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1

6

V

7

K

@

1

2

C

5

7

0

0

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1

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0

4

0

2

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1

6

V

7

K

C

5

7

0

0

.

1

U

_

0

4

0

2

_

1

6

V

7

K

1

2

C552

1U_0402_6.3V6K

C552

1U_0402_6.3V6K

1

2

C586

1U_0402_6.3V6K

C586

1U_0402_6.3V6K

1

2

C589

10U_0603_6.3V6M

C589

10U_0603_6.3V6M

1

2

L29

FBMA-L11-201209-221LMA30T_0805

L29

FBMA-L11-201209-221LMA30T_080512

C

5

6

7

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

C

5

6

7

1

0

U

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0

6

0

3

_

6

.

3

V

6

M

1

2

C

5

4

5

1

8

0

P

_

0

4

0

2

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5

0

V

8

J

C

5

4

5

1

8

0

P

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0

4

0

2

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5

0

V

8

J

1

2

C

5

6

5

0

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1

U

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0

4

0

2

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1

6

V

7

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C

5

6

5

0

.

1

U

_

0

4

0

2

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1

6

V

7

K

1

2

C544

10U_0603_6.3V6M

C544

10U_0603_6.3V6M

1

2

C575

10U_0603_6.3V6M

C575

10U_0603_6.3V6M

1

2

C582

1U_0402_6.3V6K

C582

1U_0402_6.3V6K

1

2

+

C606330U_D2E_2.5VM_R9M

@+

C606330U_D2E_2.5VM_R9M

@

1

2

+C622

390U_2.5V_10M

+C622

390U_2.5V_10M

1

2

L31

FBMA-L11-201209-221LMA30T_0805

L31

FBMA-L11-201209-221LMA30T_0805

12

C

5

8

0

0

.

1

U

_

0

4

0

2

_

1

6

V

7

K

C

5

8

0

0

.

1

U

_

0

4

0

2

_

1

6

V

7

K

1

2

C578

10U_0603_6.3V6M

C578

10U_0603_6.3V6M

1

2

C

6

8

4

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

@

C

6

8

4

1

0

U

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0

6

0

3

_

6

.

3

V

6

M

@1

2

C577

10U_0603_6.3V6M

C577

10U_0603_6.3V6M

1

2

L30

FBMA-L11-201209-221LMA30T_0805

L30

FBMA-L11-201209-221LMA30T_0805

12

C553

1U_0402_6.3V6K

C553

1U_0402_6.3V6K

1

2

C550

1U_0402_6.3V6K

C550

1U_0402_6.3V6K

1

2

C601

0.1U_0402_16V7K

C601

0.1U_0402_16V7K

1

2

C602

180P_0402_50V8J

C602

180P_0402_50V8J

1

2

+C607390U_2.5V_10M

+C607390U_2.5V_10M

1

2

+C624

390U_2.5V_10M

+C624

390U_2.5V_10M

1

2

C

6

1

2

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

@

C

6

1

2

1

8

0

P

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4

0

2

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V

8

J

@

1

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C

6

0

8

0

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1

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4

0

2

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6

V

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K

@

C

6

0

8

0

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1

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0

4

0

2

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V

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1

2

C

5

3

8

1

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4

0

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6

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6

K

C

5

3

8

1

U

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0

4

0

2

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6

.

3

V

6

K

1

2

C603

180P_0402_50V8J

C603

180P_0402_50V8J

1

2

C

5

3

7

0

.

1

U

_

0

4

0

2

_

1

6

V

7

K

C

5

3

7

0

.

1

U

_

0

4

0

2

_

1

6

V

7

K

1

2

C560

0.1U_0402_16V7K

C560

0.1U_0402_16V7K

1

2

C619

10U_0603_6.3V6M

C619

10U_0603_6.3V6M

1

2

C

5

7

2

1

U

_

0

4

0

2

_

6

.

3

V

6

K

C

5

7

2

1

U

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0

4

0

2

_

6

.

3

V

6

K

1

2

C

5

4

9

1

0

U

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6

0

3

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6

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3

V

6

M

C

5

4

9

1

0

U

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6

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3

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6

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3

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6

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1

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C

6

0

9

0

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1

U

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4

0

2

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1

6

V

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K

@

C

6

0

9

0

.

1

U

_

0

4

0

2

_

1

6

V

7

K

@

1

2

C540

10U_0603_6.3V6M

C540

10U_0603_6.3V6M

1

2

C594

0.1U_0402_16V7K

C594

0.1U_0402_16V7K

1

2

C599

0.1U_0402_16V7K

C599

0.1U_0402_16V7K

1

2

C590

10U_0603_6.3V6M

C590

10U_0603_6.3V6M

1

2

C

6

1

4

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

@

C

6

1

4

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

@

1

2

C592

0.1U_0402_16V7K

C592

0.1U_0402_16V7K

1

2

C103180P_0402_50V8JC103180P_0402_50V8J

1

2

C

5

7

3

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

C

5

7

3

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

1

2

C561

0.1U_0402_16V7K

C561

0.1U_0402_16V7K

1

2

C562

0.1U_0402_16V7K

C562

0.1U_0402_16V7K

1

2

C

5

7

1

1

U

_

0

4

0

2

_

6

.

3

V

6

K

C

5

7

1

1

U

_

0

4

0

2

_

6

.

3

V

6

K

1

2

C

5

6

4

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

C

5

6

4

1

8

0

P

_

0

4

0

2

_

5

0

V

8

J

1

2

+C605

330U_D2E_2.5VM_R9M@

+C605

330U_D2E_2.5VM_R9M@

1

2

C1010.1U_0402_16V7KC1010.1U_0402_16V7K

1

2C

5

5

8

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

C

5

5

8

1

0

U

_

0

6

0

3

_

6

.

3

V

6

M

1

2

C585

1U_0402_6.3V6K

C585

1U_0402_6.3V6K

1

2

C576

10U_0603_6.3V6M

C576

10U_0603_6.3V6M

1

2

C583

1U_0402_6.3V6K

C583

1U_0402_6.3V6K

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D26

DDR_A_D2

DDR_A_D25

DDR_A_D35

DDR_A_MA12

DDR_A_D42

DDR_A_D27

DDR_A_D59

DDR_A_MA3

DDR_A_D57

DDR_A_D0

DDR_A_DM0

DDR_A_D51

DDR_A_D19

DDR_A_D33

DDR_A_D58

DDR_A_DM5

DDR_A_MA8

DDR_A_D10

DDR_A_MA10

DDR_A_D3

DDR_A_D1

DDR_A_D40

DDR_A_MA9

DDR_A_D16

DDR_A_DM3

DDR_A_D49

DDR_A_D9

DDR_A_DM7

DDR_A_MA1

DDR_A_MA5

DDR_A_D24

DDR_A_D56

DDR_A_D18

DDR_A_D43

DDR_A_D34

DDR_A_D48

DDR_A_D11

DDR_A_D32

DDR_A_MA13

DDR_A_D50

DDR_A_D8

DDR_A_D41

DDR_A_D17

DDR_A_D[0..63]DDR_A_MA[0..15]DDR_A_DM[0..7]

DDR_A_D36

DDR_A_D63

DDR_A_D5

DDR_A_D22

DDR_A_D14

DDR_A_DM6

DDR_A_MA15

DDR_A_D31

DDR_A_D12

DDR_A_D6

DDR_A_D39

DDR_A_MA7

DDR_A_MA0

DDR_A_DM2

DDR_A_DM1

DDR_A_D46

DDR_A_D28

DDR_A_DM4

DDR_A_D4

DDR_A_D30

DDR_A_D44

DDR_A_MA6

DDR_A_D29

DDR_A_D52

DDR_A_D54

DDR_A_D45

DDR_A_D7

DDR_A_D13

DDR_A_D20

DDR_A_D60

DDR_A_D37

DDR_A_MA14

DDR_A_D55

DDR_A_MA4

DDR_A_D21

DDR_A_D62

DDR_A_D15

DDR_A_D23

DDR_A_D53

DDR_A_D47

DDR_A_D38

DDR_A_MA11

DDR_A_D61

DDR_A_MA2

DDR_CKE06,9

DDR_CS1_DIMMB#6

DDR_A_WE#6,9

DDR_A_BS26,9

DDR_A_BS06,9

DDR_A_CAS#6,9

DDR_B_CLK26DDR_B_CLK#26

DDR_A_DQS#16,9DDR_A_DQS16,9




DDR_A_MA[0..15] 6,9DDR_A_D[0..63] 6,9

DDR_A_DM[0..7] 6,9

DDR_A_BS1 6,9DDR_A_RAS# 6,9

DDR_CS0_DIMMB# 6

DDR_RST# 6,9

DDR_B_ODT0 6

DDR_B_ODT1 6

DDR_B_CLK#3 6DDR_B_CLK3 6

DDR_CKE1 6,9

DDR_A_DQS3 6,9

DDR_A_DQS0 6,9

DDR_A_DQS#3 6,9

DDR_A_DQS#0 6,9

DDR_A_DQS5 6,9DDR_A_DQS#5 6,9


DDR_EVENT# 6,9FCH_SMDAT0 9,13,28FCH_SMCLK0 9,13,28

+0.75VS

+VREF_DQ

+1.5V

+3VS

+1.5V

+1.5V

+VREF_CA

+0.75VS+3VS

Title


Date: Sheet of




LA-7322P 1.0P08-DDR3 SODIMM-I Socket

Custom


2010/06/30 2012/06/30 Title


Date: Sheet of





Custom


2010/06/30 2012/06/30 Title


Date: Sheet of





Custom


2010/06/30 2012/06/30

Place near JDIMM2

CRB 0.1u X1 4,7uX1


DDR3 SO-DIMM A H:5.2mmStandard Typ

C667

2

.

2

U

_

0

6

0

3

_

6

.

3

V

4

Z

C667

2

.

2

U

_

0

6

0

3

_

6

.

3

V

4

Z

1

2

C666

1000P_0402_50V7K

C666

1000P_0402_50V7K

1

2

C48

0.1U_0402_16V4Z

C48

0.1U_0402_16V4Z1

2

C683

0.1U_0402_16V4Z

C683

0.1U_0402_16V4Z1

2

R155 10K_0402_5%

R155 10K_0402_5%

1 2

C47

0.1U_0402_16V4Z

C47

0.1U_0402_16V4Z

1

2

C45

0.1U_0402_16V4Z

C45

0.1U_0402_16V4Z

1

2

C652

0.1U_0402_16V4Z

C652

0.1U_0402_16V4Z1

2

C668

0

.

1

U

_

0

4

0

2

_

1

6

V

4

Z

C668

0

.

1

U

_

0

4

0

2

_

1

6

V

4

Z

1

2

C490.1U_0402_16V4Z

C490.1U_0402_16V4Z

1

2

R151

10K_0402_5%

R151

10K_0402_5%

1

2

R152 10K_0402_5%@

R152 10K_0402_5%@

1 2

C682

0.1U_0402_16V4Z

C682

0.1U_0402_16V4Z1

2

C46

0.1U_0402_16V4Z

C46

0.1U_0402_16V4Z

1

2

C680

0.1U_0402_16V4Z

C680

0.1U_0402_16V4Z

1

2

C655

0.1U_0402_16V4Z

C655

0.1U_0402_16V4Z

1

2

C44

0.1U_0402_16V4Z

C44

0.1U_0402_16V4Z1

2

C654

0.1U_0402_16V4Z

C654

0.1U_0402_16V4Z1

2

C50

0.1U_0402_16V4Z@C50

0.1U_0402_16V4Z@

1

2C664

4.7U_0603_6.3V6K

C664

4.7U_0603_6.3V6K

1

2

C665

0.1U_0402_16V4Z

C665

0.1U_0402_16V4Z

1

2

R150 10K_0402_5%@

R150 10K_0402_5%@1 2

C681

1000P_0402_50V7K

C681

1000P_0402_50V7K

1

2

C51

0.1U_0402_16V4Z

C51

0.1U_0402_16V4Z1

2

C653

0.1U_0402_16V4Z

C653

0.1U_0402_16V4Z

1

2

JDIMM1

TYCO_2-2013289-1

JDIMM1

TYCO_2-2013289-1

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90

CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82

A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204

G1205 G2 206

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D[0..63]DDR_A_MA[0..15]DDR_A_DM[0..7]

DDR_A_D26

DDR_A_D2

DDR_A_D25

DDR_A_D27

DDR_A_D0

DDR_A_DM0

DDR_A_D19

DDR_A_D10

DDR_A_D3

DDR_A_D1

DDR_A_D16

DDR_A_DM3

DDR_A_D9

DDR_A_D24

DDR_A_D18

DDR_A_D11

DDR_A_D8

DDR_A_D17

DDR_A_MA12

DDR_A_MA3

DDR_A_MA8

DDR_A_MA10

DDR_A_MA9

DDR_A_MA1

DDR_A_MA5

DDR_A_MA13

DDR_A_D35

DDR_A_D42

DDR_A_D59

DDR_A_D57

DDR_A_D51

DDR_A_D33

DDR_A_D58

DDR_A_DM5

DDR_A_D40

DDR_A_D49

DDR_A_DM7

DDR_A_D56

DDR_A_D43

DDR_A_D34

DDR_A_D48

DDR_A_D32

DDR_A_D50

DDR_A_D41

DDR_A_D5

DDR_A_D22

DDR_A_D14

DDR_A_D31

DDR_A_D12

DDR_A_D6

DDR_A_DM2

DDR_A_DM1

DDR_A_D28

DDR_A_D4

DDR_A_D30

DDR_A_D29

DDR_A_D7

DDR_A_D13

DDR_A_D20DDR_A_D21

DDR_A_D15

DDR_A_D23

DDR_A_D36

DDR_A_D63

DDR_A_DM6

DDR_A_D39

DDR_A_D46

DDR_A_DM4

DDR_A_D44

DDR_A_D52

DDR_A_D54

DDR_A_D45

DDR_A_D60

DDR_A_D37

DDR_A_D55

DDR_A_D62

DDR_A_D53

DDR_A_D47

DDR_A_MA15

DDR_A_MA7

DDR_A_MA0

DDR_A_D38

DDR_A_D61

DDR_A_MA6

DDR_A_MA14

DDR_A_MA4

DDR_A_MA11

DDR_A_MA2

DDR_A_MA[0..15] 6,8DDR_A_D[0..63] 6,8

DDR_A_DM[0..7] 6,8



DDR_CKE06,8

DDR_CS1_DIMMA#6

DDR_A_WE#6,8

DDR_A_BS26,8

DDR_A_BS06,8

DDR_A_CAS#6,8

DDR_A_CLK06DDR_A_CLK#06



DDR_RST# 6,8

DDR_A_DQS3 6,8

DDR_A_DQS0 6,8

DDR_A_DQS#3 6,8

DDR_A_DQS#0 6,8

DDR_EVENT# 6,8FCH_SMDAT0 8,13,28FCH_SMCLK0 8,13,28



DDR_A_BS1 6,8DDR_A_RAS# 6,8

DDR_CS0_DIMMA# 6DDR_A_ODT0 6

DDR_A_ODT1 6

DDR_A_CLK#1 6DDR_A_CLK1 6

DDR_CKE1 6,8

+VREF_DQ

+1.5V

+VREF_CA

+1.5V

+0.75VS

+1.5V

+VREF_DQ

+1.5V

+3VS

+1.5V

+VREF_CA

+0.75VS

+1.5V

+1.5V

Title


Date: Sheet of




LA-7322P 1.0P09-DDR3 SODIMM-II Socket

Custom


2010/06/30 2012/06/30 Title


Date: Sheet of





Custom


2010/06/30 2012/06/30 Title


Date: Sheet of





Custom


2010/06/30 2012/06/30

Place near JDIMM1

CRB 0.1u X1 4.7u X1 CRB 100U X2


15mil 15mil

330U ESR:9m H:2P/N:SGA20331E10

For DRAM strap pin reservation20100817

For DRAM strap pin reservation20100817

DDR3 SO-DIMM B H:9.2mmStandard Type

CRB only one 4.7k

C629

0.1U_0402_16V4Z

C629

0.1U_0402_16V4Z

1

2

C675

0.1U_0402_16V4Z

C675

0.1U_0402_16V4Z

1

2

C635

0.1U_0402_16V4Z

C635

0.1U_0402_16V4Z

1

2

C636

0.1U_0402_16V4Z

C636

0.1U_0402_16V4Z1

2

C631

0.1U_0402_16V4Z

C631

0.1U_0402_16V4Z

1

2

R1481K_0402_1%R1481K_0402_1%

1

2

R15410K_0402_5%

@

R15410K_0402_5%

@1 2

C643

0.1U_0402_16V4Z

C643

0.1U_0402_16V4Z

1

2

JDIMM2

TYCO_2-2013310-1

JDIMM2

TYCO_2-2013310-1

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90

CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82

A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204

G1205 G2 206

+ C1102330U_D2E_2.5VM_R9M

+ C1102330U_D2E_2.5VM_R9M

1

2

R96210K_0402_5%

R96210K_0402_5%

1

2

C646

2.2U_0603_6.3V4Z

C646

2.2U_0603_6.3V4Z

1

2

C632

0.1U_0402_16V4Z

C632

0.1U_0402_16V4Z1

2

R1461K_0402_1%R1461K_0402_1%

1

2

C628

0.1U_0402_16V4Z

C628

0.1U_0402_16V4Z1

2

C637

0.1U_0402_16V4Z

C637

0.1U_0402_16V4Z

1

2

C641

0.1U_0402_16V4Z

C641

0.1U_0402_16V4Z1

2

C633

0.1U_0402_16V4Z

C633

0.1U_0402_16V4Z

1

2

C626

0.1U_0402_16V4Z

C626

0.1U_0402_16V4Z

1

2

R961 10K_0402_5%@R961 10K_0402_5%@1 2

C642

4.7U_0603_6.3V6K

C642

4.7U_0603_6.3V6K

1

2

C647

0.1U_0402_16V4Z

C647

0.1U_0402_16V4Z

1

2

R153 10K_0402_5% R153 10K_0402_5% 1 2

C678

0.1U_0402_16V4Z

C678

0.1U_0402_16V4Z

1

2

R1471K_0402_1%R1471K_0402_1%

1

2

C638

0.1U_0402_16V4Z

C638

0.1U_0402_16V4Z1

2

R1451K_0402_1%R1451K_0402_1%

1

2

C676

0.1U_0402_16V4Z

C676

0.1U_0402_16V4Z

1

2

C110

0.1U_0402_16V4Z

C110

0.1U_0402_16V4Z

1

2

C627

1000P_0402_50V7K

C627

1000P_0402_50V7K

1

2

C640

0.1U_0402_16V4Z@C640

0.1U_0402_16V4Z@

1

2

C630

0.1U_0402_16V4Z

C630

0.1U_0402_16V4Z1

2

C644

0.1U_0402_16V4Z

C644

0.1U_0402_16V4Z

1

2

C634

0.1U_0402_16V4Z

C634

0.1U_0402_16V4Z1

2

C645

1000P_0402_50V7K

C645

1000P_0402_50V7K

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

INVTPWM

VGA_DDC_DATA_C

RED

VGA_DDC_CLK_C

CRT_VSYNC_D

CRT_HSYNC_D

GREEN

VSYNC_L

HSYNC_LBLUE

+5VS_CRTVCC

DISPOFF#

APU_ENBKL

B+_L

RED

GREEN

BLUECRT_B_R

CRT_G_R

APU_CRT_HSYNC_R

CRT_DATA

CRT_CLK

CRT_R_R

APU_CRT_VSYNC_R VSYNC_L

HSYNC_L

BKOFF#

VGA_DDC_DATA_C

VGA_DDC_CLK_C

INVTPWMDISPOFF#

RED

BLUE

GREEN

HSYNC_L

VSYNC_L

VGA_DDC_DATA_C

VGA_DDC_CLK_C

USB20_N2USB20_P2

CRT_DATA

CRT_CLK VGA_DDC_CLK_C

VGA_DDC_DATA_C

APU_LCD_CLK5APU_LCD_DATA5


APU_TXCLK-5APU_TXCLK+5

INVT_PWM30

APU_BLPWM5

USB20_N213USB20_P213

APU_CRT_DDC_SDA5

APU_CRT_DDC_SCL5APU_CRT_VSYNC5

APU_CRT_HSYNC5

APU_ENBKL5

BKOFF#30

APU_ENVDD5

ENBKL 30

DMIC_CLK26DMIC_DATA26

APU_CRT_R5

APU_CRT_G5

APU_CRT_B5



+3VS+LCDVDD

+5VS

+CRT_VCC

+CRT_VCC

+CRT_VCC

B+

+CRT_VCC

+LCDVDD+5VALW

+LCDVDD

+LCDVDD

+3VS

+3VS

+CRT_VCC+3VS

+3VS

+CRT_VCC

Title


Date: Sheet of




1.0

P10-LVDS/CRT CONNC



LA-7322P

Title


Date: Sheet of




1.0

P10-LVDS/CRT CONNC



LA-7322P

Title


Date: Sheet of




1.0

P10-LVDS/CRT CONNC



LA-7322P

Camera

C R T

For EMI

W=40mils

DDC_MD2

W=40mils

Close to APU

W=60mils

W=60mils

W=60mils

LCD POWER CIRCUIT

ESD

ESD

For EMI, close to JLVDS1.

For EMI, close to JLVDS1.

For AMD check list

C1589

0.047U_0402_16V7K

C1589

0.047U_0402_16V7K

R1647

0_0402_5%

R1647

0_0402_5%1 2

C1581

1

0

0

P

_

0

4

0

2

_

5

0

V

8

J

@C1581

1

0

0

P

_

0

4

0

2

_

5

0

V

8

J

@

1

2

D1

YSDA0502C 3P C/A SOT-23@

D1


2

31

C9

2

2

P

_

0

4

0

2

_

5

0

V

8

J

@

C9

2

2

P

_

0

4

0

2

_

5

0

V

8

J

@

1

2

C1587

0.1U_0402_16V4Z

C1587

0.1U_0402_16V4Z

1

2

C1573

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

C1573

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

1

2

R16550_0402_5%

@R16550_0402_5%

@1 2

C1578

0.1U_0402_16V4Z

C1578

0.1U_0402_16V4Z1 2

R1639

1

5

0

_

0

4

0

2

_

1

%

R1639

1

5

0

_

0

4

0

2

_

1

%

1

2

C1575

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

C1575

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

1

2

C1579

0.1U_0402_16V4Z

C1579

0.1U_0402_16V4Z1 2

C122680P_0402_50V7K @ C122680P_0402_50V7K @1 2

R1656

220K_0402_1%

R1656

220K_0402_1%

12

R1642

2

.

2

K

_

0

4

0

2

_

5

%

R1642

2

.

2

K

_

0

4

0

2

_

5

%

1

2

R165347K_0402_5%

R165347K_0402_5%

1

2

R16430_0603_5%

R16430_0603_5%

1 2

R1636

0_0402_5%

R1636

0_0402_5%1 2

L117

NBQ160808T-800Y-N 0603

L117

NBQ160808T-800Y-N 06031 2

C1574

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

C1574

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

1

2

C1576

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

C1576

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

1

2

R1635

0_0402_5%

R1635

0_0402_5%1 2

L119FBMA-L11-201209-221LMA30T_0805L119FBMA-L11-201209-221LMA30T_0805

1 2

R1634

0_0402_5%

R1634

0_0402_5%1 2

C1577

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

C1577

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

1

2

L116

NBQ160808T-800Y-N 0603

L116

NBQ160808T-800Y-N 06031 2

C1572

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

C1572

6

.

8

P

_

0

4

0

2

_

5

0

V

8

J

1

2

Q99B2N7002DW-7-F_SOT363-6Q99B2N7002DW-7-F_SOT363-6

3

5

4

R16500_0603_5%

R16500_0603_5%

1 2

C1570

0

.

1

U

_

0

4

0

2

_

1

6

V

4

ZC1570

0

.

1

U

_

0

4

0

2

_

1

6

V

4

Z

1

2

R1644

2

.

2

K

_

0

4

0

2

_

5

%

R1644

2

.

2

K

_

0

4

0

2

_

5

%

1

2

D5 RB751V40_SC76-2@ D5 RB751V40_SC76-2@

1 2

D29

AZC199-02SPR7G_SOT23-3

@ D29


@

2

2

3

3

1

1

R167010K_0402_5%@R167010K_0402_5%@

1

2

JLVDS1

HONDA_LVD-A40SFYG+CONN@

JLVDS1

HONDA_LVD-A40SFYG+CONN@

1122334455667788991010111112121313141415151616171718181919202021212222232324242525262627272828292930303131323233333434353536363737383839394040

G1 41G2 42G3 43G4 44G5 45

R1638

1

5

0

_

0

4

0

2

_

1

%

R1638

1

5

0

_

0

4

0

2

_

1

%

1

2

D2


D2


2

31

R16590_0402_5%

R16590_0402_5%

1 2

R16540_0402_5%

R16540_0402_5%

1 2

C1590

0

.

1

U

_

0

4

0

2

_

1

6

V

4

Z@C1590

0

.

1

U

_

0

4

0

2

_

1

6

V

4

Z@ 1

2

R16720_0402_5%

R16720_0402_5%

1 2

G

D

S

Q93SI2301BDS-T1-E3_SOT23-3

G

D

S

Q93SI2301BDS-T1-E3_SOT23-3

2

1 3

R1660

100K_0402_5%

R1660

100K_0402_5%

1

2

R1652100_0805_5%

R1652100_0805_5%

1

2

C1584

1

5

P

_

0

4

0

2

_

5

0

V

8

J

C1584

1

5

P

_

0

4

0

2

_

5

0

V

8

J

1

2

D30


@ D30


@

2

2

3

3

1

1

R165710K_0402_5%R165710K_0402_5%

1

2

GG

JCRT1

SUYIN_070546FR015S263ZR

CONN@

GG

JCRT1

SUYIN_070546FR015S263ZR

CONN@

61117

1228

1339

144

10155

1617

L118

NBQ160808T-800Y-N 0603

L118

NBQ160808T-800Y-N 06031 2

D4

RB491D_SOT23-3

D4

RB491D_SOT23-3

21

3

R16481K_0402_5%

R16481K_0402_5%

1 2C1580

1

0

0

P

_

0

4

0

2

_

5

0

V

8

J

C1580

1

0

0

P

_

0

4

0

2

_

5

0

V

8

J

1

2

Q101B DMN66D0LDW-7_SOT363-6

Q101B DMN66D0LDW-7_SOT363-6

34

5

Q99A2N7002DW-7-F_SOT363-6Q99A2N7002DW-7-F_SOT363-6

6

1

2

D3


D3


2

31

T69 PADT69 PAD

R16630_0402_5%

R16630_0402_5%

1 2

R1664100K_0402_1%

R1664100K_0402_1%

1

2

R1645

2

.

2

K

_

0

4

0

2

_

5

%

R1645

2

.

2

K

_

0

4

0

2

_

5

%

1

2

R1637

1

5

0

_

0

4

0

2

_

1

%

R1637

1

5

0

_

0

4

0

2

_

1

%

1

2

L115

SMD1812P075TF .75A 13.2V

L115

SMD1812P075TF .75A 13.2V

21

R310_0402_5%

@R310_0402_5%

@1 2

Q101ADMN66D0LDW-7_SOT363-6

Q101ADMN66D0LDW-7_SOT363-6

61

2

R1649

0_0402_5%

R1649

0_0402_5%1 2

U8874AHCT1G125GW_SOT353-5

U8874AHCT1G125GW_SOT353-5

A2 Y 4OE

#

1

G

3

P

5

R1661

2

.

2

K

_

0

4

0

2

_

5

%R1661

2

.

2

K

_

0

4

0

2

_

5

%

1

2

C1588

0.1U_0402_16V4Z

C1588

0.1U_0402_16V4Z

1

2

C1583

1

5

P

_

0

4

0

2

_

5

0

V

8

J

C1583

1

5

P

_

0

4

0

2

_

5

0

V

8

J

1

2

C1571

0

.

1

U

_

0

4

0

2

_

1

6

V

4

Z

@C1571

0

.

1

U

_

0

4

0

2

_

Compal LA 7322P

Documents

Transcript of Compal LA 7322P