Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15...

45
A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4841P 1.0 Cover Sheet Custom 1 45 Monday, December 15, 2008 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10 Compal Electronics, Inc.

Transcript of Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15...

Page 1: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

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B

C

C

D

D

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E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Cover SheetCustom

1 45Monday, December 15, 2008

2007/1/15 2008/1/15

Schematic Document

Cantiga + ICH9Rev:1.0

Compal Confidential

2008 / 12 / 10

Compal Electronics, Inc.

Page 2: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Block diagramCustom

2 45Monday, December 15, 2008

2007/1/15 2008/1/15

File Name : LA-4841P

Compal confidential

Thermal SensorADT7421ARMZ

Clock Generator ICS9LPRS397AKLFTFan conn

Penryn -4MB (Socket P)

uFCPGA-478 CPU

FSB667/800MHz 1.05V

H_A#(3..35)H_D#(0..63)

1329pin BGA

Intel Cantiga MCH

DMI X4

BANK 0, 1, 2, 3DDR2-SO-DIMM X2DDR2 667/800MHz 1.8V

Dual Channel

LPC BUS

CardBus ControllerO2MICRO OZH24

CDROM Conn.

PCI

676pin BGA

Intel ICH9-M

Touch Pad CONN. Int.KBD

ENE KB926

10/100/1000 LAN

RJ45/11 CONN

PCI-E BUS

SATA HDD Connector

SATA Master

SATA Slave

1394

C-Link

CK505

ALC272Audio CODEC AMP & Audio Jack

USB conn x 4

USB2.0

Azalia BT Conn

MLK 14

TSSOP-64

Express Card

Camera

Power On/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

RTC CKT.

Power OK CKT.

Express Card

Mini-Card-3

BIOS(System/EC)

Mini-CardX1(WLAN)

Compal Electronics, Inc.

CRT

LVDS Panel Interface

Media Card

REALTEKRTL8111C-GR

P.17

P.16

P.4

P.4

P.4,5,6

P.7,8,9,10,11,12

P.26

P.22

P.24P.27

P.13,14

P.15

P.18,19,20,21

P.28

P.28P.29P.29

P.23

P.23

P.25 P.25

P.23

P.27

P.30

P.30

P.30

MXM II VGA/BNB9M-GS 512M

P.33

Mini-CardX1

P.24

ZZZ1

PCB

Page 3: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

1 1

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Notes ListCustom

3 45Monday, December 15, 2008

2005/03/10 2006/03/10Compal Electronics, Inc.

O MEANS ON X MEANS OFFVoltage Rails

O

O

X

+0.9V

S3

+3VS

X

X

+3VALW

+5VS

S1

O

+2.5VS

+CPU_CORE

OO

OO

X

X X

+VCCP

powerplane

O

O

O

O

O

X

S5 S4/ Battery only

X X X

+B

State

+1.5VS

+1.8V

S5 S4/AC & Batterydon't exist

S5 S4/AC

+5VALW

S0

O

O

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no buildDEBUG@ : means just reserve for debug.

V V V

V

SERIAL SENSOR(CPU)

SMB_EC_CK2

SOURCE

KB926

INVERTER BATT EEPROM

THERMAL

SODIMM CLK CHIP

SMBUS Control Table

SMB_CK_CLK1SMB_CK_DAT1 ICH9

MINI CARD

SMB_EC_DA2

SMB_EC_CK1SMB_EC_DA1

KB926

LCD_CLKLCD_DAT Cantiga

LCD

XX

X

X X

X

X X

X

X X

X

X XX

X X

XX

X

XX X

X

X

V VV

1 0 1 0 0 1 0 0A4

I2C / SMBUS ADDRESSING

1 0 1 0 0 0 0 0

D2

A0

CLOCK GENERATOR (EXT.)

HEX

DDR SO-DIMM 1

ADDRESS

DDR SO-DIMM 0

1 1 0 1 0 0 1 0

DEVICE

+VGA_CORE

+1.8VS

+0.9VGA

+1.2VS

Page 4: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_THERMDA

H_THERMDC

L_THERM#

EC_SMB_DA2

EC_SMB_CK2

H_PROCHOT# OCP#

H_THERMDC

H_THERMTRIP#

H_THERMDAH_THERMDA_RH_THERMDC_R

H_PROCHOT#

H_HIT#

H_RESET#

H_TRDY#

H_RS#1H_RS#2

H_RS#0

H_LOCK#

XDP_DBRESET#

XDP_TDI

XDP_TMS

XDP_TRST#

XDP_TCK

H_IERR#

H_A#3

H_A#10

H_A#13

H_A#11

H_ADSTB#0

H_A#7

H_A#9

H_A#16

H_A#6

H_A#8

H_A#12

H_A#15

H_A#5

H_A#14

H_A#4

H_REQ#2

H_REQ#4

H_REQ#1

H_REQ#3

H_A#32

H_A#34H_A#35

H_A#33

H_A#18

H_A#30

H_A#27H_A#26

H_A#21

H_A#17

H_A#20

H_A#25

H_REQ#0

H_ADSTB#1

H_A#28H_A#29

H_A#19

H_A#23H_A#24

H_A#22

H_A#31

H_SMI#

H_STPCLK#H_INTR

H_IGNNE#

H_A20M#H_FERR#

H_NMICLK_CPU_BCLK#CLK_CPU_BCLK

XDP_TRST#

XDP_TCK

XDP_TMS

XDP_TDI

XDP_DBRESET#

H_BNR#H_ADS#

H_BPRI#

H_DEFER#

H_DBSY#H_DRDY#

H_BR0#

H_INIT#H_IERR#

FAN1_POWEREN_DFAN1

H_HITM#

OCP# 20

H_THERMTRIP# 7,19

H_HIT# 7

H_RESET# 7

H_LOCK# 7H_ADSTB#07

H_REQ#07H_REQ#17H_REQ#27

H_ADSTB#17

H_REQ#47H_REQ#37

H_A20M#19H_FERR#19H_IGNNE#19

H_STPCLK#19H_INTR19H_NMI19H_SMI#19

CLK_CPU_BCLK 15CLK_CPU_BCLK# 15

XDP_DBRESET# 20

H_ADS# 7H_BNR# 7H_BPRI# 7

H_DEFER# 7H_DRDY# 7H_DBSY# 7

H_BR0# 7

H_INIT# 19

EC_SMB_CK2 29,33

EC_SMB_DA2 29,33

FAN_SPEED129

EN_DFAN129

H_A#[3..16]7

H_A#[17..35]7

H_RS#2 7H_RS#1 7H_RS#0 7

H_TRDY# 7

H_HITM# 7

+3VS

+3VS

+VCCP

+VCCP

+3VS

+VCCP

+VCCP

+3VS

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Penryn(1/3)-AGTL+/ITP-XDPCustom

4 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

Address:100_1100H_THERMDA, H_THERMDC routing together,Trace width / Spacing = 10 / 10 mil

This shall place near CPU

FAN1

40mil

FAN Control circuit

No need in check list

Thermal Sensor EMC1402-1-ACZL-TR

R5 54.9_0402_1%1 2

JFAN1

ACES_85205-03001CONN@

112233

GND4GND5

C881000P_0402_50V7K~N

12

C940.01U_0402_16V7K 1

2

C7610U_1206_16V4Z~N

12

EB

C

Q2MMBT3904_SOT23

@

2

3 1

C13

0.1U

_040

2_16

V4Z 1

2

R11 54.9_0402_1%1 2

R35 54.9_0402_1%1 2

R57 100_0402_5%1 2

ADDR GRO

UP_0ADDR G

ROUP_1

CO

NTR

OL

XDP/

ITP

SIG

NA

LS

H CLK

THERMAL

RES

ERVE

D

ICH

JCPU1A

Penryn

CONN@

A[10]#N3A[11]#P5A[12]#P2A[13]#L2A[14]#P4A[15]#P1A[16]#R1

A[17]#Y2A[18]#U5A[19]#R3A[20]#W6A[21]#U4A[22]#Y5A[23]#U1A[24]#R4A[25]#T5A[26]#T3A[27]#W2A[28]#W5A[29]#Y4

A[3]#J4

A[30]#U2A[31]#V4

RSVD[01]M4RSVD[02]N5RSVD[03]T2RSVD[04]V3RSVD[05]B2RSVD[06]D2RSVD[07]D22

A[4]#L5A[5]#L4A[6]#K5A[7]#M3A[8]#N2A[9]#J1

A20M#A6

ADS# H1

ADSTB[0]#M1

ADSTB[1]#V1

RSVD[08]D3

BCLK[0] A22BCLK[1] A21

BNR# E2

BPM[0]# AD4BPM[1]# AD3BPM[2]# AD1BPM[3]# AC4

BPRI# G5

BR0# F1

DBR# C20

DBSY# E1

DEFER# H5DRDY# F21

FERR#A5

HIT# G6HITM# E4

IERR# D20

IGNNE#C4

INIT# B3

LINT0C6LINT1B4

LOCK# H4

PRDY# AC2PREQ# AC1

PROCHOT# D21

REQ[0]#K3REQ[1]#H2REQ[2]#K2REQ[3]#J3REQ[4]#L1

RESET# C1RS[0]# F3RS[1]# F4RS[2]# G3

SMI#A3

STPCLK#D5

TCK AC5TDI AA6

TDO AB3

THERMTRIP# C7

THERMDA A24THERMDC B25

TMS AB5

TRDY# G2

TRST# AB6

A[32]#W3A[33]#AA4A[34]#AB2A[35]#AA3

RSVD[09]F6U3

RT9027BPS SO 8P

VEN1VIN2

GND 5GND 6

GND 8

VO3VSET4

GND 7

R511K_0402_5%

@1 2

R1756_0402_5%

@12

R53 100_0402_5%1 2

R146 56_0402_5%

12

R16

10K_0402_5%1 2

C77 10U_1206_16V4Z~N1 2

R6110K_0402_5%

12

C5

2200P_0402_50V7K1 2

U2

EMC1402-2-ACZL-TR MSOP 8P

VDD1

ALERT# 6

THERM#4 GND 5

D+2

D-3

SCLK 8

SDATA 7

R4 54.9_0402_1%1 2

R1856_0402_5%

12

Page 5: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

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5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

V_CPU_GTLREF

H_D#4

H_D#14

H_D#10H_D#9

H_D#3

H_D#13

H_D#6

H_D#2

H_D#8

H_D#12

H_D#1

H_D#5

H_D#7

H_D#11

H_D#0

H_D#15

H_D#27

H_D#25

H_D#31

H_D#24

H_D#20

H_D#30

H_D#23

H_D#19

H_D#29

H_D#16

H_D#18

H_D#22

H_D#26

H_D#28

H_D#17

H_D#21

H_DINV#0

H_DINV#1H_DSTBP#1H_DSTBN#1

H_DSTBP#0H_DSTBN#0

VSSSENSE

VCCSENSE

VSSSENSE

VCCSENSE

V_CPU_GTLREF

TEST4

CPU_BSEL2CPU_BSEL1CPU_BSEL0

TEST1TEST2TEST3

TEST5TEST6TEST7

H_D#35

H_D#46H_D#47

H_D#37

H_D#34

H_D#41

H_D#45

H_D#43

H_D#33

H_D#39H_D#40

H_D#44

H_D#32

H_D#42

H_D#38

H_D#36

H_DINV#2

H_DSTBN#2H_DSTBP#2

H_DINV#3

H_DSTBN#3H_DSTBP#3

H_D#48

H_D#56

H_D#52

H_D#59

H_D#63

H_D#55

H_D#51

H_D#62

H_D#58

H_D#54

H_D#50

H_D#57

H_D#61

H_D#53

H_D#49

H_D#60

COMP0

COMP2COMP3

COMP1

H_PWRGOODH_CPUSLP#

H_DPSLP#H_DPRSTP#

H_PSI#

H_DPWR#

VCCSENSE 43

VSSSENSE 43

H_D#[0..15]7

H_DSTBN#07H_DSTBP#07H_DINV#07H_D#[16..31]7

H_DSTBN#17H_DSTBP#17H_DINV#17

CPU_VID0 43CPU_VID1 43CPU_VID2 43CPU_VID3 43CPU_VID4 43CPU_VID5 43CPU_VID6 43

CPU_BSEL015CPU_BSEL115CPU_BSEL215

H_D#[32..47] 7

H_DSTBN#2 7H_DSTBP#2 7H_DINV#2 7H_D#[48..63] 7

H_DSTBN#3 7H_DSTBP#3 7H_DINV#3 7

H_DPRSTP# 7,19,43H_DPSLP# 19

H_CPUSLP# 7

H_DPWR# 7

H_PSI# 43

H_PWRGOOD 19

+VCCP

+VCCP

+1.5VS

+CPU_CORE +CPU_CORE

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Penryn(2/3)-AGTL+/ITP-XDPCustom

5 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

Close to CPU pin AD26within 500mils.

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

200

0 1

0 1

CPU_BSEL0

1

0

Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from any othertoggling signal.COMP[0,2] trace width is18 mils. COMP[1,3] tracewidth is 4

Length match within 25 mils.The trace width/space/other is20/7/25.

Close to CPU pinwithin 500mils.

Near pin B26

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

266 0 0 0

0814 Change to 220uF

0819 Change to C_D2E

For 8 layer condition

Z=27.4 ohmVCCSENSE, VSSSENSE/ 14mils (MS), 16mils (SL) width, 7mils space, 25mils space to other signals Mismatch =25mils.

For 6 layer

Check 220u?

layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU

To IMVP

No need incheck list

No stuff 27.4 pull down near IMVP for testing

T6

R26

27.4

_040

2_1% 1

2

T3T4

+ C10330U_D2E_2.5VM_R7

1

2R52 1K_0402_5%@ 1 2

T5

DA

TA G

RP 0

DA

TA G

RP 1

DA

TA G

RP

2D

ATA

GR

P 3

MISC

JCPU1B

Penryn

CONN@

COMP[0] R26COMP[1] U26COMP[2] AA1COMP[3] Y1

D[0]#E22D[1]#F24

D[10]#J24D[11]#J23D[12]#H22D[13]#F26D[14]#K22D[15]#H23

D[16]#N22D[17]#K25D[18]#P26D[19]#R23

D[2]#E26

D[20]#L23D[21]#M24D[22]#L22D[23]#M23D[24]#P25D[25]#P23D[26]#P22D[27]#T24D[28]#R24D[29]#L25

D[3]#G22

D[30]#T25D[31]#N25

D[32]# Y22D[33]# AB24D[34]# V24D[35]# V26D[36]# V23D[37]# T22D[38]# U25D[39]# U23

D[4]#F23

D[40]# Y25D[41]# W22D[42]# Y23D[43]# W24D[44]# W25D[45]# AA23D[46]# AA24D[47]# AB25

D[48]# AE24D[49]# AD24

D[5]#G25

D[50]# AA21D[51]# AB22D[52]# AB21D[53]# AC26D[54]# AD20D[55]# AE22D[56]# AF23D[57]# AC25D[58]# AE21D[59]# AD21

D[6]#E25

D[60]# AC22D[61]# AD23D[62]# AF22D[63]# AC23

D[7]#E23D[8]#K24D[9]#G24

TEST5AF1

DINV[0]#H25

DINV[1]#N24

DINV[2]# U22

DINV[3]# AC20

DPRSTP# E5DPSLP# B5DPWR# D24

DSTBN[0]#J26

DSTBN[1]#L26

DSTBN[2]# Y26

DSTBN[3]# AE25

DSTBP[0]#H26

DSTBP[1]#M26

DSTBP[2]# AA26

DSTBP[3]# AF24

GTLREFAD26

PSI# AE6

PWRGOOD D6SLP# D7

TEST3C24

BSEL[0]B22BSEL[1]B23BSEL[2]C21

TEST2D25

TEST4AF26

TEST6A26

TEST1C23

TEST7C3

R22 1K_0402_5%@ 1 2

JCPU1C

Penryn .

CONN@

VCC[001]A7VCC[002]A9VCC[003]A10VCC[004]A12VCC[005]A13VCC[006]A15VCC[007]A17VCC[008]A18VCC[009]A20VCC[010]B7VCC[011]B9VCC[012]B10VCC[013]B12VCC[014]B14VCC[015]B15VCC[016]B17VCC[017]B18VCC[018]B20VCC[019]C9VCC[020]C10VCC[021]C12VCC[022]C13VCC[023]C15VCC[024]C17VCC[025]C18VCC[026]D9VCC[027]D10VCC[028]D12VCC[029]D14VCC[030]D15VCC[031]D17VCC[032]D18VCC[033]E7VCC[034]E9VCC[035]E10VCC[036]E12VCC[037]E13VCC[038]E15VCC[039]E17VCC[040]E18VCC[041]E20VCC[042]F7VCC[043]F9VCC[044]F10VCC[045]F12VCC[046]F14VCC[047]F15VCC[048]F17VCC[049]F18VCC[050]F20VCC[051]AA7VCC[052]AA9VCC[053]AA10VCC[054]AA12VCC[055]AA13VCC[056]AA15VCC[057]AA17VCC[058]AA18VCC[059]AA20VCC[060]AB9VCC[061]AC10VCC[062]AB10VCC[063]AB12VCC[064]AB14VCC[065]AB15VCC[066]AB17VCC[067]AB18

VCC[068] AB20VCC[069] AB7VCC[070] AC7VCC[071] AC9VCC[072] AC12VCC[073] AC13VCC[074] AC15VCC[075] AC17VCC[076] AC18VCC[077] AD7VCC[078] AD9VCC[079] AD10VCC[080] AD12VCC[081] AD14VCC[082] AD15VCC[083] AD17VCC[084] AD18VCC[085] AE9VCC[086] AE10VCC[087] AE12VCC[088] AE13VCC[089] AE15VCC[090] AE17VCC[091] AE18VCC[092] AE20VCC[093] AF9VCC[094] AF10VCC[095] AF12VCC[096] AF14VCC[097] AF15VCC[098] AF17VCC[099] AF18VCC[100] AF20

VCCA[01] B26

VCCP[03] J6VCCP[04] K6VCCP[05] M6VCCP[06] J21VCCP[07] K21VCCP[08] M21VCCP[09] N21VCCP[10] N6VCCP[11] R21VCCP[12] R6VCCP[13] T21VCCP[14] T6VCCP[15] V21VCCP[16] W21

VCCSENSE AF7

VID[0] AD6VID[1] AF5VID[2] AE5VID[3] AF4VID[4] AE3VID[5] AF3VID[6] AE2

VSSSENSE AE7

VCCA[02] C26

VCCP[01] G21VCCP[02] V6

R30 100_0402_1%1 2R292K_0402_1%

12

R23

54.9

_040

2_1% 1

2

C12

10U

_080

5_6.

3V6M

1

2

R271K_0402_1%

12

R28 100_0402_1%1 2

R25

54.9

_040

2_1% 1

2

T2

R24

27.4

_040

2_1% 1

2

C11

0.01

U_0

402_

16V7

K

1

2

Page 6: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCCP

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Penryn(3/3)-AGTL+/ITP-XDPCustom

6 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

Place these insidesocket cavity on L8(North sideSecondary)

10uF 0805 X5R -> 85 degree.High Frequence Decoupling

Capacitor > 880 uF

ESR <= 1.5m ohm

Place these caps insidethe CPU socket cavity.

( Left side on Top ).

Place these caps insidethe CPU socket cavity.

Place these caps insidethe CPU socket.( Right side on Top side).( Left side on Top ).

Place these caps insidethe CPU socket.

( Right side on Top side).

Place these caps insidethe CPU socket cavity.( Right side on Bottom ).

( Left side on Bottom ).

Place these caps insidethe CPU socket cavity.

Place these caps insidethe CPU socket.( Left side on Top ).

Place these caps insidethe CPU socket.( Right side on Top ).

C53210U_0805_6.3V6M

1

2

C22610U_0805_6.3V6M

1

2

C213

0.1U_0402_10V6K

1

2

C23210U_0805_6.3V6M

1

2

C20010U_0805_6.3V6M

1

2

C50810U_0805_6.3V6M

1

2

C51510U_0805_6.3V6M

1

2

C50410U_0805_6.3V6M

1

2

C20310U_0805_6.3V6M

1

2

C184

0.1U_0402_10V6K

1

2

+

C196

330U_D

2E_2.5VM_R

9

1

2

C183

0.1U_0402_10V6K

1

2

C52910U_0805_6.3V6M

1

2

C51410U_0805_6.3V6M

1

2

C25210U_0805_6.3V6M

1

2

C52610U_0805_6.3V6M

1

2

C50110U_0805_6.3V6M

1

2

C16210U_0805_6.3V6M

1

2

C19910U_0805_6.3V6M

1

2

+

C250

330U_D

2E_2.5VM_R

9

1

2

C25410U_0805_6.3V6M

1

2

C16110U_0805_6.3V6M

1

2

C51010U_0805_6.3V6M

1

2

C52010U_0805_6.3V6M

1

2

C52210U_0805_6.3V6M

1

2

C185

0.1U_0402_10V6K

1

2

C53310U_0805_6.3V6M

1

2

JCPU1D

Penryn .

CONN@

VSS[082] P6

VSS[148] AE11

VSS[002]A8VSS[003]A11VSS[004]A14VSS[005]A16VSS[006]A19VSS[007]A23VSS[008]AF2VSS[009]B6VSS[010]B8VSS[011]B11VSS[012]B13VSS[013]B16VSS[014]B19VSS[015]B21VSS[016]B24VSS[017]C5VSS[018]C8VSS[019]C11VSS[020]C14VSS[021]C16VSS[022]C19VSS[023]C2VSS[024]C22VSS[025]C25VSS[026]D1VSS[027]D4VSS[028]D8VSS[029]D11VSS[030]D13VSS[031]D16VSS[032]D19VSS[033]D23VSS[034]D26VSS[035]E3VSS[036]E6VSS[037]E8VSS[038]E11VSS[039]E14VSS[040]E16VSS[041]E19VSS[042]E21VSS[043]E24VSS[044]F5VSS[045]F8VSS[046]F11VSS[047]F13VSS[048]F16VSS[049]F19VSS[050]F2VSS[051]F22VSS[052]F25VSS[053]G4VSS[054]G1VSS[055]G23VSS[056]G26VSS[057]H3VSS[058]H6VSS[059]H21VSS[060]H24VSS[061]J2VSS[062]J5VSS[063]J22VSS[064]J25VSS[065]K1VSS[066]K4VSS[067]K23VSS[068]K26VSS[069]L3VSS[070]L6VSS[071]L21VSS[072]L24VSS[073]M2VSS[074]M5VSS[075]M22VSS[076]M25VSS[077]N1VSS[078]N4VSS[079]N23VSS[080]N26VSS[081]P3 VSS[162] A25VSS[161] AF21VSS[160] AF19VSS[159] AF16VSS[158] AF13VSS[157] AF11VSS[156] AF8VSS[155] AF6VSS[154] A2VSS[153] AE26VSS[152] AE23VSS[151] AE19

VSS[083] P21VSS[084] P24VSS[085] R2VSS[086] R5VSS[087] R22VSS[088] R25VSS[089] T1VSS[090] T4VSS[091] T23VSS[092] T26VSS[093] U3VSS[094] U6VSS[095] U21VSS[096] U24VSS[097] V2VSS[098] V5VSS[099] V22VSS[100] V25VSS[101] W1VSS[102] W4VSS[103] W23VSS[104] W26VSS[105] Y3

VSS[107] Y21VSS[108] Y24VSS[109] AA2VSS[110] AA5VSS[111] AA8VSS[112] AA11VSS[113] AA14VSS[114] AA16VSS[115] AA19VSS[116] AA22VSS[117] AA25VSS[118] AB1VSS[119] AB4VSS[120] AB8VSS[121] AB11VSS[122] AB13VSS[123] AB16VSS[124] AB19VSS[125] AB23VSS[126] AB26VSS[127] AC3VSS[128] AC6VSS[129] AC8VSS[130] AC11VSS[131] AC14VSS[132] AC16VSS[133] AC19VSS[134] AC21VSS[135] AC24VSS[136] AD2VSS[137] AD5VSS[138] AD8VSS[139] AD11VSS[140] AD13VSS[141] AD16VSS[142] AD19VSS[143] AD22VSS[144] AD25VSS[145] AE1VSS[146] AE4

VSS[106] Y6

VSS[001]A4

VSS[149] AE14VSS[150] AE16

VSS[147] AE8

VSS[163] AF25

+

C198

330U_D

2E_2.5VM_R

9

1

2

C25510U_0805_6.3V6M

1

2

C21410U_0805_6.3V6M

1

2

C19010U_0805_6.3V6M

1

2

C19710U_0805_6.3V6M

1

2

C212

0.1U_0402_10V6K

1

2

C50510U_0805_6.3V6M

1

2

C50210U_0805_6.3V6M

1

2

C209

0.1U_0402_10V6K

1

2

C20810U_0805_6.3V6M

1

2

C51910U_0805_6.3V6M

1

2

+

C258

330U_D

2E_2.5VM_R

9

1

2

C20210U_0805_6.3V6M

1

2

C25710U_0805_6.3V6M

1

2

Page 7: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PM_EXTTS#0

PM_EXTTS#1

V_DDR_MCH_REF

H_RCOMP

H_SWNG

H_D#32

H_D#24

H_D#19

H_D#59

H_D#42

H_D#36

H_D#3

H_D#40

H_RCOMP

H_D#55

H_D#4

H_D#60

H_D#30

H_D#34

H_D#27

H_D#1

H_D#23

H_D#51

H_D#48

H_D#46

H_D#44

H_D#39

H_D#22

H_D#15H_D#14

H_D#9

H_D#56

H_D#54

H_D#8

H_RESET#

H_D#37

H_D#35

H_D#28

H_D#25

H_D#12

H_D#38

H_D#26

H_D#11

H_D#7

H_D#53H_D#52

H_D#41

H_D#18

H_D#10

H_VREF

H_D#57

H_D#33

H_D#29

H_SWNG

H_D#6

H_D#45

H_D#43

H_D#20

H_D#61

H_D#17

H_D#63

H_D#58

H_D#21

H_D#16

H_D#50

H_CPUSLP#

H_D#62

H_D#5

H_D#49

H_D#31

H_D#2

H_D#47

H_D#13

H_D#0

H_A#7

H_A#12

H_A#32

H_A#24

H_A#3

H_A#18

H_A#21

H_A#16

H_A#19

H_A#31

H_A#27

H_A#5

H_A#30

H_A#9

H_A#26

H_A#14

H_A#11

H_A#22H_A#23

H_A#34

H_A#20

H_A#8

H_A#15

H_A#6

H_A#25

H_A#17

H_A#4

H_A#13

H_A#33

H_A#29H_A#28

H_A#10

H_A#35

CLK_MCH_BCLK#

H_LOCK#

CLK_MCH_BCLK

H_ADSTB#1

H_DEFER#

H_HITM#

H_ADS#

H_BR0#

H_DBSY#

H_HIT#

H_BPRI#

H_DRDY#

H_BNR#

H_DPWR#

H_ADSTB#0

H_TRDY#

H_VREF

H_DINV#0

H_DINV#3

H_DINV#1H_DINV#2

H_DSTBN#1

H_DSTBN#3

H_DSTBN#0

H_DSTBN#2

H_DSTBP#2

H_DSTBP#0

H_DSTBP#3

H_DSTBP#1

H_REQ#0

H_REQ#3

H_REQ#1

H_REQ#4

H_REQ#2

H_RS#1H_RS#0

H_RS#2

DMI_RXP0

DMI_TXP1

MCH_SSCDREFCLK#

DDR_CS0_DIMMA#

SM_REXT

DMI_RXP1

DMI_TXP2

M_ODT3

DMI_TXN0

SMRCOMP#

DMI_RXN2

M_CLK_DDR2

CL_VREF CL_VREF

DMI_RXN3

DMI_TXP0

TP_SM_DRAMRST#

DDR_CKE2_DIMMB

CLK_MCH_3GPLL#

MCH_ICH_SYNC#

SMRCOMP_VOH

MCH_CLKSEL2

MCH_SSCDREFCLK

SMRCOMP

DDR_CKE3_DIMMB

CLKREQ#_7

M_PWROK

M_CLK_DDR#3

DMI_RXN1

DDR_CS1_DIMMA#

SMRCOMP_VOH

CL_CLK0

DMI_TXN3

PM_EXTTS#0

MCH_CLKSEL0

DMI_RXN0

CLK_MCH_DREFCLK

MCH_CLKSEL1

DMI_RXP3

M_ODT2

DDR_CKE1_DIMMA

CL_RST#

M_CLK_DDR3

M_ODT1

M_CLK_DDR#2

DMI_TXN2

M_CLK_DDR1

CLK_MCH_3GPLL

H_DPRSTP#

CLK_MCH_DREFCLK#

DDR_CS3_DIMMB#SMRCOMP_VOL

V_DDR_MCH_REF

SMRCOMP_VOL

DMI_RXP2

DMI_TXP3

PM_BMBUSY#

M_ODT0

DDR_CS2_DIMMB#

DDR_CKE0_DIMMA

M_CLK_DDR#0

CL_DATA0

M_CLK_DDR#1

DMI_TXN1

PM_EXTTS#1

M_CLK_DDR0

THERMTRIP#PLT_RST#_NBPLT_RST#

TSATN#

CFG7

CFG5

CFG13

CFG9

CFG16

CFG19

CFG12

CFG6

CFG20

DPRSLPVR

PM_PWROK_R

PM_PWROK_RH_DPRSTP#

V_DDR_MCH_REF13,14

H_D#[0..63]5

H_CPUSLP#5H_RESET#4

H_A#[3..35] 4

H_ADS# 4

H_ADSTB#1 4H_ADSTB#0 4

H_BPRI# 4H_BNR# 4

H_DEFER# 4H_BR0# 4

H_DBSY# 4CLK_MCH_BCLK 15CLK_MCH_BCLK# 15H_DPWR# 5H_DRDY# 4H_HIT# 4H_HITM# 4H_LOCK# 4H_TRDY# 4

H_DINV#0 5H_DINV#1 5H_DINV#2 5H_DINV#3 5

H_DSTBN#0 5H_DSTBN#1 5H_DSTBN#2 5H_DSTBN#3 5

H_DSTBP#0 5H_DSTBP#1 5H_DSTBP#2 5H_DSTBP#3 5

H_REQ#3 4H_REQ#2 4H_REQ#1 4

H_REQ#4 4

H_REQ#0 4

H_RS#2 4H_RS#1 4H_RS#0 4

MCH_CLKSEL015MCH_CLKSEL115MCH_CLKSEL215

DMI_TXP0 20

DMI_RXN0 20

DMI_RXP0 20

DMI_TXN0 20

DMI_TXN2 20

DMI_TXP2 20

DMI_RXN2 20

DMI_RXP2 20

CLK_MCH_3GPLL 15CLK_MCH_3GPLL# 15

DDR_CKE0_DIMMA 13DDR_CKE1_DIMMA 13DDR_CKE2_DIMMB 14DDR_CKE3_DIMMB 14

DDR_CS0_DIMMA# 13DDR_CS1_DIMMA# 13DDR_CS2_DIMMB# 14DDR_CS3_DIMMB# 14

M_CLK_DDR0 13M_CLK_DDR1 13M_CLK_DDR2 14M_CLK_DDR3 14

M_CLK_DDR#0 13M_CLK_DDR#1 13M_CLK_DDR#2 14M_CLK_DDR#3 14

PM_BMBUSY#20H_DPRSTP#5,19,43PM_EXTTS#013PM_EXTTS#114

H_THERMTRIP#4,19

M_ODT1 13

CLK_MCH_DREFCLK 15

DMI_RXN3 20

M_ODT0 13

MCH_SSCDREFCLK# 15

DMI_TXN1 20

PLT_RST#18,22,24,28,29,33

CLKREQ#_7 15

MCH_SSCDREFCLK 15

DMI_RXP3 20

CL_RST# 20

DMI_TXP1 20

M_ODT3 14

DMI_RXN1 20

MCH_ICH_SYNC# 20

M_PWROK 20

M_ODT2 14

CLK_MCH_DREFCLK# 15

DMI_TXN3 20

CL_DATA0 20CL_CLK0 20

DMI_TXP3 20

TSATN#

DMI_RXP1 20

CFG59

CFG99

CFG79

CFG169

CFG209CFG199

CFG69

DPRSLPVR20,43

ICH_PWROK20,29

VGATE20,29,43

+VCCP+VCCP

+3VS

+1.8V

+1.8V

+VCCP

+1.8V

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Cantiga(1/6)-AGTL/DMI/DDRCustom

7 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

Layout Note:H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20Layout Note: V_DDR_MCH_REFtrace width andspacing is 20/20.

NA lead free

Near B3 pinwithin 100 mils from NB

0814 Add pull up R

0905 Add test point

0913 Delete V_DDR_MCH_REF from POWER circuit

H_RCOMP Dual core 24.9 ohm_1% pull down Quad core 16.9 ohm_1% pull downH_SWNG Dual core 100 ohm_1% pull down Quad core 75 ohm_1% pull down

R421K_0402_1%

12

T37PAD

T32

R82

10K_0402_5%

1 2

R407 0_0402_5%@1 2

C53

10P_0402_50V8J

@ 1

2

R83

10K_0402_5%

1 2

T10PAD

T35

R324

24.9

_040

2_1%

12

T13

HOST

U4A

CANTIGA_1p0

H_A#_10 P16H_A#_11 R16H_A#_12 N17H_A#_13 M13H_A#_14 E17H_A#_15 P17H_A#_16 F17H_A#_17 G20H_A#_18 B19H_A#_19 J16H_A#_20 E20H_A#_21 H16H_A#_22 J20H_A#_23 L17H_A#_24 A17H_A#_25 B17H_A#_26 L16H_A#_27 C21H_A#_28 J17H_A#_29 H20

H_A#_3 A14

H_A#_30 B18H_A#_31 K17

H_A#_4 C15H_A#_5 F16H_A#_6 H13H_A#_7 C18H_A#_8 M16H_A#_9 J13

H_ADS# H12H_ADSTB#_0 B16H_ADSTB#_1 G17

H_BNR# A9H_BPRI# F11

H_BREQ# G12

HPLL_CLK# AH6

H_CPURST#C12

HPLL_CLK AH7

H_D#_0F2

H_REQ#_2 F13H_REQ#_3 B13

H_D#_1G8

H_D#_10M9

H_D#_20L6

H_D#_30N10

H_D#_40AA8

H_D#_50AA2

H_D#_60AE11

H_D#_8D4H_D#_9H3

H_DBSY# B10

H_D#_11M11H_D#_12J1H_D#_13J2H_D#_14N12H_D#_15J6H_D#_16P2H_D#_17L2H_D#_18R2H_D#_19N9

H_D#_2F8

H_D#_21M5H_D#_22J3H_D#_23N2H_D#_24R1H_D#_25N5H_D#_26N6H_D#_27P13H_D#_28N8H_D#_29L7

H_D#_3E6

H_D#_31M3H_D#_32Y3H_D#_33AD14H_D#_34Y6H_D#_35Y10H_D#_36Y12H_D#_37Y14H_D#_38Y7H_D#_39W2

H_D#_4G2

H_D#_41Y9H_D#_42AA13H_D#_43AA9H_D#_44AA11H_D#_45AD11H_D#_46AD10H_D#_47AD13H_D#_48AE12H_D#_49AE9

H_D#_5H6

H_D#_51AD8H_D#_52AA3H_D#_53AD3H_D#_54AD7H_D#_55AE14H_D#_56AF3H_D#_57AC1H_D#_58AE3H_D#_59AC3

H_D#_6H2

H_D#_61AE8H_D#_62AG2H_D#_63AD6

H_D#_7F6

H_DEFER# E9

H_DINV#_0 J8H_DINV#_1 L3H_DINV#_2 Y13H_DINV#_3 Y1

H_DPWR# J11H_DRDY# F9

H_DSTBN#_0 L10H_DSTBN#_1 M7H_DSTBN#_2 AA5H_DSTBN#_3 AE6

H_DSTBP#_0 L9H_DSTBP#_1 M8H_DSTBP#_2 AA6H_DSTBP#_3 AE5

H_AVREFA11H_DVREFB11

H_TRDY# C9

H_HIT# H9H_HITM# E12H_LOCK# H11

H_REQ#_0 B15H_REQ#_1 K13

H_REQ#_4 B14

H_A#_32 B20H_A#_33 F21H_A#_34 K21H_A#_35 L20

H_SWINGC5

H_CPUSLP#E11

H_RCOMPE3

H_RS#_0 B6H_RS#_1 F12H_RS#_2 C8

T99

T66PAD

R3311K_0402_1%

12

T26

T39PAD

T24

C121

0.1U

_040

2_16

V4Z

1

2

T36

T103

T22

T65PAD

C1810.1U_0402_16V4Z

1

2

R521 56_0402_5%

12

T12

R1001K_0402_1%

12

T33

T27

T18

T28

T101

T20

C40

0

0.01

U_0

402_

25V7

K

1

2

T63

T29 PAD

R328 80.6_0402_1%

1 2

T15

T31

T11

T68PAD

T67PAD

C39

82.

2U_0

603_

6.3V

4Z

1

2

T9PAD

T41

T25

PM

MISC

NC

DDR CLK/ CONTROL/COMPENSATION

CLK

DMICF

GRSVD

GRAPHICS VID

ME

HDA

U4B

CANTIGA_1p0

SA_CK_0 AP24SA_CK_1 AT21SB_CK_0 AV24

SA_CK#_0 AR24SA_CK#_1 AR21SB_CK#_0 AU24

SA_CKE_0 BC28SA_CKE_1 AY28SB_CKE_0 AY36SB_CKE_1 BB36

SA_CS#_0 BA17SA_CS#_1 AY16SB_CS#_0 AV16SB_CS#_1 AR13

SM_DRAMRST# BC36

SA_ODT_0 BD17SA_ODT_1 AY17SB_ODT_0 BF15SB_ODT_1 AY13

SM_RCOMP BG22SM_RCOMP# BH21

CFG_18P29CFG_19R28

CFG_2P25

CFG_0T25CFG_1R25

CFG_20T28

CFG_3P20CFG_4P24CFG_5C25CFG_6N24CFG_7M24CFG_8E21CFG_9C23CFG_10C24CFG_11N21CFG_12P21CFG_13T21CFG_14R20CFG_15M20CFG_16L21CFG_17H21

PM_SYNC#R29

PM_EXT_TS#_0N33PM_EXT_TS#_1P32PWROKAT40RSTIN#AT11

DPLL_REF_CLK B38DPLL_REF_CLK# A38

DPLL_REF_SSCLK E41DPLL_REF_SSCLK# F41

DMI_RXN_0 AE41DMI_RXN_1 AE37DMI_RXN_2 AE47DMI_RXN_3 AH39

DMI_RXP_0 AE40DMI_RXP_1 AE38DMI_RXP_2 AE48DMI_RXP_3 AH40

DMI_TXN_0 AE35DMI_TXN_1 AE43DMI_TXN_2 AE46DMI_TXN_3 AH42

DMI_TXP_0 AD35DMI_TXP_1 AE44DMI_TXP_2 AF46DMI_TXP_3 AH43

RSVD10AL34

RSVD12AN35 RSVD11AK34

RSVD13AM35

RSVD22BG23RSVD23BF23RSVD24BH18RSVD25BF18

PM_DPRSTP#B7

SB_CK_1 AU20

SB_CK#_1 AV20

RSVD20AY21

RSVD5AH9RSVD6AH10RSVD7AH12RSVD8AH13

RSVD1M36RSVD2N36RSVD3R33RSVD4T33

GFX_VID_0 B33GFX_VID_1 B32GFX_VID_2 G33GFX_VID_3 F33

GFX_VR_EN C34

SM_RCOMP_VOH BF28SM_RCOMP_VOL BH28

THERMTRIP#T20DPRSLPVRR32

RSVD9K12

CL_CLK AH37CL_DATA AH36

CL_PWROK AN36CL_RST# AJ35CL_VREF AH34

NC_26A47

NC_1BG48NC_2BF48NC_3BD48NC_4BC48NC_5BH47NC_6BG47NC_7BE47NC_8BH46NC_9BF46NC_10BG45NC_11BH44NC_12BH43NC_13BH6NC_14BH5NC_15BG4

SDVO_CTRLCLK G36SDVO_CTRLDATA E36

CLKREQ# K36

RSVD14T24

ICH_SYNC# H36

TSATN# B12

PEG_CLK# E43PEG_CLK F43

NC_16BH3

GFX_VID_4 E33

RSVD15B31

DDPC_CTRLCLK N28

NC_17BF3NC_18BH2NC_19BG2NC_20BE2NC_21BG1NC_22BF1NC_23BD1NC_24BC1NC_25F1

SM_VREF AV42SM_PWROK AR36

SM_REXT BF17

RSVD17M1

HDA_BCLK B28HDA_RST# B30

HDA_SDI B29HDA_SDO C29

HDA_SYNC A28

DDPC_CTRLDATA M28

RSVD16B2

T17

T74

T8PAD

T14

C40

32.

2U_0

603_

6.3V

4Z

1

2

R40 499_0402_1%1 2

T48

R322

221_

0603

_1% 1

2

R3323.01K_0402_1%

12

C55

10P_0402_50V8J

@ 1

2

T34

C386

0.1U

_040

2_16

V4Z

1

2

R46

2K_0

402_

1%

12

T64

T73T44

R56 0_0402_5%1 2

R99511_0402_1%

12

C391

0.1U

_040

2_16

V4Z 1

2

T40PAD

T19

T7

T47PAD

R3331K_0402_1%

12

T16

T30

R323

100_

0402

_1%

12

R39 10K_0402_1%

1 2

R329 80.6_0402_1%1 2

T100

C40

4

0.01

U_0

402_

25V7

K

1

2

R408 0_0402_5%1 2

R523 100_0402_5%1 2

R45

1K_0

402_

1%

12 R43

1K_0402_1%

12 T102

T21

Page 8: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_BS0DDR_A_BS1DDR_A_BS2

DDR_A_MA0DDR_A_MA1

DDR_A_MA4

DDR_A_MA2DDR_A_MA3

DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9

DDR_A_MA12DDR_A_MA13

DDR_A_MA11DDR_A_MA10

DDR_A_DQS#0DDR_A_DQS#1

DDR_A_DQS#3DDR_A_DQS#2

DDR_A_DQS#5DDR_A_DQS#4

DDR_A_DQS#6DDR_A_DQS#7

DDR_A_DQS0DDR_A_DQS1DDR_A_DQS2DDR_A_DQS3DDR_A_DQS4DDR_A_DQS5DDR_A_DQS6DDR_A_DQS7

DDR_A_DM7

DDR_A_DM5

DDR_A_DM2DDR_A_DM1

DDR_A_DM6

DDR_A_DM4

DDR_A_DM0

DDR_A_DM3

DDR_A_CAS#DDR_A_RAS#

DDR_A_WE#

DDR_B_BS2DDR_B_BS1DDR_B_BS0

DDR_B_CAS#DDR_B_RAS#

DDR_B_WE#

DDR_A_D63DDR_A_D62DDR_A_D61DDR_A_D60DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56DDR_A_D55DDR_A_D54

DDR_A_D51DDR_A_D50DDR_A_D49DDR_A_D48

DDR_A_D53DDR_A_D52

DDR_A_D47DDR_A_D46

DDR_A_D43DDR_A_D42DDR_A_D41DDR_A_D40

DDR_A_D45DDR_A_D44

DDR_A_D39DDR_A_D38

DDR_A_D35DDR_A_D34DDR_A_D33DDR_A_D32

DDR_A_D37DDR_A_D36

DDR_A_D31DDR_A_D30

DDR_A_D27DDR_A_D26DDR_A_D25DDR_A_D24

DDR_A_D15DDR_A_D14

DDR_A_D11DDR_A_D10DDR_A_D9

DDR_A_D13DDR_A_D12

DDR_A_D29DDR_A_D28

DDR_A_D23DDR_A_D22

DDR_A_D19DDR_A_D18DDR_A_D17DDR_A_D16

DDR_A_D21DDR_A_D20

DDR_A_D8

DDR_A_D5DDR_A_D4DDR_A_D3

DDR_A_D7DDR_A_D6

DDR_A_D2DDR_A_D1DDR_A_D0 DDR_B_D0

DDR_B_D1DDR_B_D2DDR_B_D3DDR_B_D4DDR_B_D5DDR_B_D6DDR_B_D7DDR_B_D8DDR_B_D9

DDR_B_D12DDR_B_D13DDR_B_D14DDR_B_D15

DDR_B_D10DDR_B_D11

DDR_B_D16DDR_B_D17

DDR_B_D20DDR_B_D21DDR_B_D22DDR_B_D23

DDR_B_D18DDR_B_D19

DDR_B_D24DDR_B_D25

DDR_B_D28DDR_B_D29DDR_B_D30DDR_B_D31

DDR_B_D26DDR_B_D27

DDR_B_D32DDR_B_D33

DDR_B_D36DDR_B_D37DDR_B_D38DDR_B_D39

DDR_B_D48DDR_B_D49

DDR_B_D52DDR_B_D53DDR_B_D54DDR_B_D55

DDR_B_D50DDR_B_D51

DDR_B_D56DDR_B_D57

DDR_B_D60DDR_B_D61DDR_B_D62DDR_B_D63

DDR_B_D58DDR_B_D59

DDR_B_D34DDR_B_D35

DDR_B_D40DDR_B_D41

DDR_B_D44DDR_B_D45DDR_B_D46DDR_B_D47

DDR_B_D42DDR_B_D43

DDR_A_MA14

DDR_B_DM3

DDR_B_DM0DDR_B_DM1

DDR_B_DM5DDR_B_DM6DDR_B_DM7

DDR_B_DM2

DDR_B_DM4

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS5

DDR_B_DQS1

DDR_B_DQS4DDR_B_DQS3

DDR_B_DQS6

DDR_B_DQS2

DDR_B_DQS#1

DDR_B_DQS#5

DDR_B_DQS#7

DDR_B_DQS#3DDR_B_DQS#4

DDR_B_DQS#0

DDR_B_DQS#6

DDR_B_DQS#2

DDR_B_MA2DDR_B_MA3

DDR_B_MA10DDR_B_MA11

DDR_B_MA8DDR_B_MA9

DDR_B_MA0DDR_B_MA1

DDR_B_MA6DDR_B_MA7

DDR_B_MA4DDR_B_MA5

DDR_B_MA14

DDR_B_MA12DDR_B_MA13

DDR_A_BS#0 13DDR_A_BS#1 13DDR_A_BS#2 13

DDR_A_D[0..63]13

DDR_A_MA[0..14] 13

DDR_A_DQS#[0..7] 13

DDR_A_DQS[0..7] 13

DDR_A_DM[0..7] 13

DDR_A_CAS# 13DDR_A_RAS# 13

DDR_A_WE# 13

DDR_B_D[0..63]14

DDR_B_BS#0 14DDR_B_BS#1 14DDR_B_BS#2 14

DDR_B_CAS# 14DDR_B_RAS# 14

DDR_B_WE# 14

DDR_B_DM[0..7] 14

DDR_B_DQS[0..7] 14

DDR_B_DQS#[0..7] 14

DDR_B_MA[0..14] 14

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Cantiga(2/6)-DDR2 A/B CHCustom

8 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

DDR

SYS

TEM

MEM

ORY

A

U4D

CANTIGA_1p0

SA_DQ_0AJ38SA_DQ_1AJ41

SA_DQ_10AU40SA_DQ_11AT38SA_DQ_12AN41SA_DQ_13AN39SA_DQ_14AU44SA_DQ_15AU42SA_DQ_16AV39SA_DQ_17AY44SA_DQ_18BA40SA_DQ_19BD43

SA_DQ_2AN38

SA_DQ_20AV41SA_DQ_21AY43SA_DQ_22BB41SA_DQ_23BC40SA_DQ_24AY37SA_DQ_25BD38SA_DQ_26AV37SA_DQ_27AT36SA_DQ_28AY38SA_DQ_29BB38

SA_DQ_3AM38

SA_DQ_30AV36SA_DQ_31AW36SA_DQ_32BD13SA_DQ_33AU11SA_DQ_34BC11SA_DQ_35BA12SA_DQ_36AU13SA_DQ_37AV13SA_DQ_38BD12SA_DQ_39BC12

SA_DQ_4AJ36

SA_DQ_40BB9SA_DQ_41BA9SA_DQ_42AU10SA_DQ_43AV9SA_DQ_44BA11SA_DQ_45BD9SA_DQ_46AY8SA_DQ_47BA6SA_DQ_48AV5SA_DQ_49AV7

SA_DQ_5AJ40

SA_DQ_50AT9SA_DQ_51AN8SA_DQ_52AU5SA_DQ_53AU6SA_DQ_54AT5SA_DQ_55AN10SA_DQ_56AM11SA_DQ_57AM5SA_DQ_58AJ9SA_DQ_59AJ8

SA_DQ_6AM44

SA_DQ_60AN12SA_DQ_61AM13SA_DQ_62AJ11SA_DQ_63AJ12

SA_DQ_7AM42SA_DQ_8AN43SA_DQ_9AN44

SA_BS_0 BD21SA_BS_1 BG18SA_BS_2 AT25

SA_CAS# BD20

SA_DM_0 AM37SA_DM_1 AT41SA_DM_2 AY41SA_DM_3 AU39SA_DM_4 BB12SA_DM_5 AY6SA_DM_6 AT7

SA_DQS_0 AJ44SA_DQS_1 AT44SA_DQS_2 BA43SA_DQS_3 BC37SA_DQS_4 AW12SA_DQS_5 BC8SA_DQS_6 AU8SA_DQS_7 AM7

SA_DM_7 AJ5

SA_DQS#_0 AJ43SA_DQS#_1 AT43SA_DQS#_2 BA44SA_DQS#_3 BD37SA_DQS#_4 AY12SA_DQS#_5 BD8SA_DQS#_6 AU9SA_DQS#_7 AM8

SA_MA_0 BA21SA_MA_1 BC24

SA_MA_10 BC21SA_MA_11 BG26SA_MA_12 BH26SA_MA_13 BH17

SA_MA_2 BG24SA_MA_3 BH24SA_MA_4 BG25SA_MA_5 BA24SA_MA_6 BD24SA_MA_7 BG27SA_MA_8 BF25SA_MA_9 AW24

SA_RAS# BB20

SA_WE# AY20

SA_MA_14 AY25

DDR SYSTEM MEMORY B

U4E

CANTIGA_1p0

SB_DQ_0AK47SB_DQ_1AH46

SB_DQ_10BA48SB_DQ_11AY48SB_DQ_12AT47SB_DQ_13AR47SB_DQ_14BA47SB_DQ_15BC47SB_DQ_16BC46SB_DQ_17BC44SB_DQ_18BG43SB_DQ_19BF43

SB_DQ_2AP47

SB_DQ_20BE45SB_DQ_21BC41SB_DQ_22BF40SB_DQ_23BF41SB_DQ_24BG38SB_DQ_25BF38SB_DQ_26BH35SB_DQ_27BG35SB_DQ_28BH40SB_DQ_29BG39

SB_DQ_3AP46

SB_DQ_30BG34SB_DQ_31BH34SB_DQ_32BH14SB_DQ_33BG12SB_DQ_34BH11SB_DQ_35BG8SB_DQ_36BH12SB_DQ_37BF11SB_DQ_38BF8SB_DQ_39BG7

SB_DQ_4AJ46

SB_DQ_40BC5SB_DQ_41BC6SB_DQ_42AY3SB_DQ_43AY1SB_DQ_44BF6SB_DQ_45BF5SB_DQ_46BA1SB_DQ_47BD3SB_DQ_48AV2SB_DQ_49AU3

SB_DQ_5AJ48

SB_DQ_50AR3SB_DQ_51AN2SB_DQ_52AY2SB_DQ_53AV1SB_DQ_54AP3SB_DQ_55AR1SB_DQ_56AL1SB_DQ_57AL2SB_DQ_58AJ1SB_DQ_59AH1

SB_DQ_6AM48

SB_DQ_60AM2SB_DQ_61AM3SB_DQ_62AH3SB_DQ_63AJ3

SB_DQ_7AP48SB_DQ_8AU47SB_DQ_9AU46

SB_BS_0 BC16SB_BS_1 BB17SB_BS_2 BB33

SB_CAS# BG16

SB_DM_0 AM47SB_DM_1 AY47SB_DM_2 BD40SB_DM_3 BF35SB_DM_4 BG11SB_DM_5 BA3SB_DM_6 AP1SB_DM_7 AK2

SB_DQS_0 AL47SB_DQS_1 AV48SB_DQS_2 BG41SB_DQS_3 BG37SB_DQS_4 BH9SB_DQS_5 BB2SB_DQS_6 AU1SB_DQS_7 AN6

SB_DQS#_0 AL46SB_DQS#_1 AV47SB_DQS#_2 BH41SB_DQS#_3 BH37SB_DQS#_4 BG9SB_DQS#_5 BC2SB_DQS#_6 AT2SB_DQS#_7 AN5

SB_MA_0 AV17SB_MA_1 BA25

SB_MA_10 BB16SB_MA_11 AW33SB_MA_12 AY33SB_MA_13 BH15

SB_MA_2 BC25SB_MA_3 AU25SB_MA_4 AW25SB_MA_5 BB28SB_MA_6 AU28SB_MA_7 AW28SB_MA_8 AT33SB_MA_9 BD33

SB_MA_14 AU33

SB_RAS# AU17

SB_WE# BF14

Page 9: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3VDDCCL3VDDCDA

GMCH_LVDSA1+GMCH_LVDSA2+

GMCH_LVDSA0+

GMCH_LVDSA3+

GMCH_LVDSA0-

GMCH_LVDSA2-GMCH_LVDSA1-

GMCH_LVDSA3-

GMCH_LVDSAC+GMCH_LVDSAC-

GMCH_LVDDEN

GMCH_EDID_CLK_LCDGMCH_EDID_DAT_LCD

CTRL_CLKGMCH_ENBKL

CRT_RCRT_GCRT_B

CTRL_DATAPEG_NRX_GTX_N0

PEG_NRX_GTX_P0

PEG_NRX_GTX_P2

PEG_NRX_GTX_P5

PEG_NRX_GTX_N1

PEG_NRX_GTX_P8

PEG_NRX_GTX_P4PEG_NRX_GTX_P3

PEG_NRX_GTX_P7

PEG_NRX_GTX_P15

PEG_NRX_GTX_P9PEG_NRX_GTX_P10

PEG_NRX_GTX_P14

PEG_NRX_GTX_P12PEG_NRX_GTX_P11

PEG_NRX_GTX_N15

PEG_NRX_GTX_N5

PEG_NRX_GTX_N8

PEG_NRX_GTX_N3

PEG_NRX_GTX_N14

PEG_NRX_GTX_N9PEG_NRX_GTX_N10

PEG_NRX_GTX_N13

PEG_NRX_GTX_N4

PEG_NRX_GTX_N7

PEG_NRX_GTX_N11

PEG_NRX_GTX_P1

PEG_NRX_GTX_P13

PEG_NRX_GTX_N6

BIA_PWM

GMCH_EDID_DAT_LCD

GMCH_EDID_CLK_LCD

PEG_NRX_GTX_N[0..15]

PEG_NRX_GTX_P[0..15]

PEG_NRX_GTX_N2

CRT_HSYNC

CRT_VSYNC

PEG_NRX_GTX_N12

PEG_NRX_GTX_P6

PEG_NTX_GRX_N4PEG_NTX_GRX_N3

PEG_NTX_GRX_N12

PEG_NTX_GRX_N10

PEG_NTX_GRX_N7

PEG_NTX_GRX_N9

PEG_NTX_GRX_N6

PEG_NTX_GRX_N0PEG_NTX_GRX_N1

PEG_NTX_GRX_N15PEG_NTX_GRX_N14

PEG_NTX_GRX_N2

PEG_TXN5 PEG_NTX_GRX_N5

PEG_NTX_GRX_N11PEG_TXN11

PEG_NTX_GRX_N8

PEG_NTX_GRX_N13PEG_TXN12PEG_TXN13

PEG_TXN10

PEG_TXN14

PEG_TXN4

PEG_TXN6

PEG_TXN1PEG_TXN0

PEG_TXN15

PEG_TXN7PEG_TXN8

PEG_TXN2PEG_TXN3

PEG_TXN9

PEG_TXP15PEG_TXP14PEG_TXP13PEG_TXP12

PEG_TXP8PEG_TXP9

PEG_TXP4PEG_TXP5PEG_TXP6

PEG_TXP10PEG_TXP11

PEG_TXP7

PEG_TXP0PEG_TXP1PEG_TXP2PEG_TXP3

PEG_NTX_GRX_P10

PEG_NTX_GRX_P4PEG_NTX_GRX_P5

PEG_NTX_GRX_P7

PEG_NTX_GRX_P2

PEG_NTX_GRX_P6

PEG_NTX_GRX_P3

PEG_NTX_GRX_P11

PEG_NTX_GRX_P14

PEG_NTX_GRX_P12

PEG_NTX_GRX_P9

PEG_NTX_GRX_P13

PEG_NTX_GRX_P1PEG_NTX_GRX_P0

PEG_NTX_GRX_P8

PEG_NTX_GRX_P15

GMCH_TV_CRMAGMCH_TV_LUMAGMCH_TV_COMPS

CRT_VSYNC17

3VDDCDA17CRT_HSYNC17

3VDDCCL17

GMCH_LVDSA0+16GMCH_LVDSA1+16GMCH_LVDSA2+16

GMCH_LVDSA0-16GMCH_LVDSA1-16GMCH_LVDSA2-16

GMCH_LVDSAC-16GMCH_LVDSAC+16

GMCH_LVDDEN16

GMCH_EDID_CLK_LCD16GMCH_EDID_DAT_LCD16

GMCH_ENBKL16

CRT_B17CRT_G17CRT_R17

CFG57

CFG67

CFG77

CFG97

CFG167

CFG197

CFG207

BIA_PWM16

PEG_NTX_GRX_N[0..15] 33

PEG_NTX_GRX_P[0..15] 33

PEG_NRX_GTX_P[0..15] 33

PEG_NRX_GTX_N[0..15] 33

+VCC_PEG

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Cantiga(3/6)-VGA/LVDS/TVCustom

9 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

PEGCOMP trace widthand spacing is 20/25 mils. 000 = FSB 1066MHz

CFG[4:3] Reserved

CFG60 = The iTPM Host Interface is enable1 = The iTPM Host Interface is disable

*

Reserved

CFG10 (PCIE Lookback enable)

(Default)11 = Normal Operation10 = All Z Mode Enabled00 = Reserved01 = XOR Mode Enabled

*

0 = Enable1 = Disable *

CFG9 (PCIE Graphics Lane Reversal)

CFG[2:0] FSB Freq select

Reserved

ReservedCFG[15:14]

Strap Pin Table

ReservedCFG[18:17]

(Lane number in Order)

Others = Reserved011 = FSB 667MHz010 = FSB 800MHz

*

1 = Reverse Lane

0 = Reverse Lane,15->0, 14->1

1 = Enabled

0 = Normal Operation

0 = Disabled

*

0 = DMI x 2

*

*

*

1 = PCIE/SDVO are operating simu.0 = Only PCIE or SDVO is operational. *

1 = Normal Operation,Lane Number in order

1 = DMI x 4

0 =(TLS)chiper suite with no confidentiality1 =(TLS)chiper suite with confidentiality

CFG5 (DMI select)

CFG19 (DMI Lane Reversal)

CFG16 (FSB Dynamic ODT)

CFG6

CFG7 (Intel Management Engine Crypto strap)

CFG20 (PCIE/SDVO concurrent)

CFG11CFG[13:12] (XOR/ALLZ)

CFG8

2.4K for check list

CFG[19:20] have internal pulldown

CFG[5:16] have internal pullup

R56 within 500 mils from pin T37,T36

For Cantiga:2.37kohm

For Calero: 1.5Kohm For Crestline:2.4kohm

UMA place 75 ohm

R74

150_

0402

_1%

UM

A@

12

R1440_0402_5%

12

R484 2.2K_0402_5%UMA@

1 2

T46

R81 10K_0402_5% UMA@1 2

C563 0.1U_0402_16V7KVGA@1 2

R80 10K_0402_5% UMA@1 2

C554 0.1U_0402_16V7KVGA@1 2

LVDS

PCI-EXPRESS GRAPHICS

TV

VGA

U4C

CANTIGA_1p0

PEG_COMPI T37PEG_COMPO T36

PEG_RX#_0 H44PEG_RX#_1 J46PEG_RX#_2 L44PEG_RX#_3 L40PEG_RX#_4 N41PEG_RX#_5 P48PEG_RX#_6 N44PEG_RX#_7 T43PEG_RX#_8 U43PEG_RX#_9 Y43

PEG_RX#_10 Y48PEG_RX#_11 Y36PEG_RX#_12 AA43PEG_RX#_13 AD37PEG_RX#_14 AC47PEG_RX#_15 AD39

PEG_RX_0 H43PEG_RX_1 J44PEG_RX_2 L43PEG_RX_3 L41PEG_RX_4 N40PEG_RX_5 P47PEG_RX_6 N43PEG_RX_7 T42PEG_RX_8 U42PEG_RX_9 Y42

PEG_RX_10 W47PEG_RX_11 Y37PEG_RX_12 AA42PEG_RX_13 AD36PEG_RX_14 AC48PEG_RX_15 AD40

PEG_TX#_0 J41

PEG_TX#_10 Y40

PEG_TX#_3 M40PEG_TX#_4 M42PEG_TX#_5 R48PEG_TX#_6 N38PEG_TX#_7 T40PEG_TX#_8 U37PEG_TX#_9 U40

PEG_TX#_1 M46

PEG_TX#_11 AA46PEG_TX#_12 AA37PEG_TX#_13 AA40PEG_TX#_14 AD43PEG_TX#_15 AC46

PEG_TX#_2 M47

PEG_TX_0 J42PEG_TX_1 L46PEG_TX_2 M48PEG_TX_3 M39PEG_TX_4 M43PEG_TX_5 R47PEG_TX_6 N37PEG_TX_7 T39PEG_TX_8 U36PEG_TX_9 U39

PEG_TX_10 Y39PEG_TX_11 Y46PEG_TX_12 AA36PEG_TX_13 AA39PEG_TX_14 AD42PEG_TX_15 AD46

L_CTRL_CLKM32

L_CTRL_DATAM33L_DDC_CLKK33L_DDC_DATAJ33

L_VDD_ENM29LVDS_IBGC44LVDS_VBGB43LVDS_VREFHE37LVDS_VREFLE38LVDSA_CLK#C41LVDSA_CLKC40

LVDSA_DATA#_0H47LVDSA_DATA#_1E46LVDSA_DATA#_2G40

LVDSA_DATA_1D45LVDSA_DATA_2F40

LVDSB_CLK#B37LVDSB_CLKA37

LVDSB_DATA#_0A41LVDSB_DATA#_1H38LVDSB_DATA#_2G37

LVDSB_DATA_1G38LVDSB_DATA_2F37

L_BKLT_ENG32

TVA_DACF25TVB_DACH25TVC_DACK25

TV_RTNH24

CRT_BLUEE28

CRT_DDC_CLKH32CRT_DDC_DATAJ32

CRT_GREENG28

CRT_HSYNCJ29CRT_TVO_IREFE29

CRT_REDJ28

CRT_IRTNG29

CRT_VSYNCL29

LVDSA_DATA_0H48

LVDSB_DATA_0B42

L_BKLT_CTRLL32

TV_DCONSEL_0C31TV_DCONSEL_1E32

LVDSA_DATA#_3A40

LVDSA_DATA_3B40

LVDSB_DATA#_3J37

LVDSB_DATA_3K37

C568 0.1U_0402_16V7KVGA@1 2

C562 0.1U_0402_16V7KVGA@1 2

C558 0.1U_0402_16V7KVGA@1 2

C544 0.1U_0402_16V7KVGA@1 2

C542 0.1U_0402_16V7KVGA@1 2

R94 2.37K_0402_1%~D

1 2

C557 0.1U_0402_16V7KVGA@1 2

C540 0.1U_0402_16V7KVGA@1 2

C537 0.1U_0402_16V7KVGA@1 2

R1420_0402_5%

12

C559 0.1U_0402_16V7KVGA@1 2

C541 0.1U_0402_16V7KVGA@1 2

R6760_0402_5%

VGA@ 12

C555 0.1U_0402_16V7KVGA@1 2

R59 2.21K_0402_1%~D@ 1 2

C551 0.1U_0402_16V7KVGA@1 2

R76

0_0402_5%VGA@

C567 0.1U_0402_16V7KVGA@1 2

R3341.02K_0402_1%UMA@

12

C552 0.1U_0402_16V7KVGA@1 2

C564 0.1U_0402_16V7KVGA@1 2

C538 0.1U_0402_16V7KVGA@1 2

C546 0.1U_0402_16V7KVGA@1 2

R55 2.21K_0402_1%~D@ 1 2

C560 0.1U_0402_16V7KVGA@1 2

C547 0.1U_0402_16V7KVGA@1 2

C545 0.1U_0402_16V7KVGA@1 2

C550 0.1U_0402_16V7KVGA@1 2

R76

150_

0402

_1%

UM

A@

12

C561 0.1U_0402_16V7KVGA@1 2

R73 2.21K_0402_1%~D@ 1 2

C556 0.1U_0402_16V7KVGA@1 2

C553 0.1U_0402_16V7KVGA@1 2

C548 0.1U_0402_16V7KVGA@1 2

T38

R483 2.2K_0402_5%UMA@

1 2

C543 0.1U_0402_16V7KVGA@1 2

R74

0_0402_5%VGA@

R1430_0402_5%

12

C565 0.1U_0402_16V7KVGA@1 2

R70 2.21K_0402_1%~D@ 1 2

R72 2.21K_0402_1%~D@ 1 2

C549 0.1U_0402_16V7KVGA@1 2

C566 0.1U_0402_16V7KVGA@1 2

R58 2.21K_0402_1%~D@ 1 2

C539 0.1U_0402_16V7KVGA@1 2

R95

49.9_0402_1%1 2

R6750_0402_5%

VGA@ 12

R75

150_

0402

_1%

UM

A@

12

R66 2.21K_0402_1%~D@ 1 2

R334

0_0402_5%VGA@

R75

0_0402_5%VGA@

Page 10: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.05VS_A_SM

+1.05VS_A_SM_CK

+1.8V_TXLVDS

+3VS_DAC_BG

+3VS_DAC_CRT

+1.8V_TXLVDS

+1.8V

+1.05VS_HPLL

+1.05VS_MPLL

+VCCP

+1.05VS_PEGPLL +VCCP

+VCCP+V1.05VS_AXF

+VCC_PEG+1.05VS_DMI

+1.8V+1.8V_SM_CK

+1.05VS_DPLLA

+VCCP

+1.5VS+1.5VS_TVDAC

+VCC_PEG

+VCCP

+1.8V

+1.8V_LVDS

+1.5VS_PEG_BG

+1.5VS

+1.05VS_PEGPLL

+VCCP+1.05VS_DPLLB

+VCCP

+VCCP

+VCCP

+3VS

+VCCP_D

+3VS_HV

+VCCP

+3VS

+1.5VS+1.5VS_QDAC

+3VS_DAC_CRT

+3VS_DAC_BG

+1.05VS_MPLL

+1.05VS_DPLLB

+1.05VS_HPLL

+1.05VS_DPLLA

+3VS_DAC_CRT

+1.5VS_TVDAC

+1.5VS_QDAC

+1.05VS_PEGPLL

+1.05VS_HPLL

+1.8V_LVDS

+1.05VS_DMI

+VCC_PEG

+3VS_HV+1.8V_TXLVDS

+1.8V_SM_CK

+V1.05VS_AXF

+3VS_DAC_CRT

+3VS_DAC_CRT

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Cantiga(4/6)-PWRCustom

10 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

40 mils

73mA

2.68mA

852mA

64.8mA

720mA

24mA

139.2mA

50mA

414uA

13.2mA

64.8mA

26mA 321.35mA

118.8mA

124mA

105.3mA

1732mA

456mA

TVA 24.15mATVB 39.48mATVX 24.15mA

50mA

58.67mA

48.363mA

157.2mA

50mA

60.31mA

HDMI disable connected to GND

20mils

C173

0.1U_0402_16V

4Z

UMA@

1

2

+C191

220U_D

2_4VY

_R15M

UMA@

1

2

C116

0.1U_0402_16V

4Z

1

2

R110

0_0603_5%

UMA@1 2

C123

0.1U_0402_16V

4Z

1

2

R112

0_0603_5%

1 2

C174

0.1U_0402_16V

4Z

UMA@

1

2

L1310U_FLC-453232-100K_0.25A_10%

UMA@

1 2

R50

0_0805_5%

1 2

C66

10U

_080

5_10

V4Z

1

2

R113

10_0402_5%

@1 2

C96

10U_0805_10V

4Z

1

2

+C370

220U_D

2_4VY

_R15M

1

2

C97

0.01U_0402_25V

7K~N

1

2

R114

0_0402_5%

1 2

C407

0_0402_5%VGA@

C405

0_0402_5%VGA@

L11

BLM18PG181SN1D_0603

UMA@1 2

C82

10U_0805_10V

4Z

1

2

R64

0_0805_5% UMA@1 2

C408

0.1U_0402_16V

4Z

UM

A@

1

2

C411

0.1U_0402_16V

4Z

UM

A@

1

2

C402

0.1U_0402_16V

4Z

UM

A@

1

2

C182

10U_0805_10V

4Z

UMA@

1

2

D3

CH751H-40PT_SOD323-2

@2 1

C20

410

U_0

805_

10V

4Z

1

2

POWER

CRT

PLL

A PEG

A SM

TV

D TV/CRT

LVDS

VTTLF

PEG

SM CK

AXF

VTT

DMI

HV

A CK

A LVDS

HDA

U4H

CANTIGA_1p0

VTT_19 V3VTT_20 U3VTT_21 V2VTT_22 U2

VCCA_PEG_BGAD48

VCCA_PEG_PLLAA48

VCCA_CRT_DAC_1B27VCCA_CRT_DAC_2A26

VCCA_DPLLAF47

VCCA_DPLLBL48

VCCA_HPLLAD1

VCCA_LVDSJ48

VCCA_MPLLAE1

VCCA_TV_DAC_1B24VCCA_TV_DAC_2A24

VCCD_PEG_PLLAA47

VTT_15 U6VTT_16 T6VTT_17 U5VTT_18 T5

VTT_12 T8VTT_13 U7VTT_14 T7

VCCD_HPLLAF1

VTT_1 U13VTT_2 T13

VTT_4 T12VTT_5 U11VTT_6 T11VTT_7 U10VTT_8 T10VTT_9 U9

VTT_10 T9VTT_11 U8

VTT_3 U12

VCCA_SM_CK_1AP28VCCA_SM_CK_2AN28

VCCA_DAC_BGA25

VCCD_TVDACM25

VTTLF1 A8VTTLF2 L1VTTLF3 AB2

VCC_DMI_1 AH48VCC_DMI_2 AF48

VCC_SM_CK_1 BF21VCC_SM_CK_2 BH20VCC_SM_CK_3 BG20VCC_SM_CK_4 BF20

VCCD_LVDS_1M38

VCCD_QDACL28

VCC_AXF_1 B22VCC_AXF_2 B21VCC_AXF_3 A21

VCCA_SM_1AR20VCCA_SM_2AP20VCCA_SM_3AN20VCCA_SM_4AR17VCCA_SM_5AP17

VCCA_SM_7AT16VCCA_SM_8AR16VCCA_SM_9AP16

VCC_TX_LVDS K47

VSSA_LVDSJ47

VCC_HV_1 C35VCC_HV_2 B35

VCC_PEG_1 V48

VCCD_LVDS_2L37

VCC_PEG_2 U48VCC_PEG_3 V47VCC_PEG_4 U47VCC_PEG_5 U46

VCCA_SM_6AN17

VCCA_SM_CK_3AP25VCCA_SM_CK_4AN25VCCA_SM_CK_5AN24VCCA_SM_CK_NCTF_1AM28VCCA_SM_CK_NCTF_2AM26VCCA_SM_CK_NCTF_3AM25VCCA_SM_CK_NCTF_4AL25VCCA_SM_CK_NCTF_5AM24VCCA_SM_CK_NCTF_6AL24VCCA_SM_CK_NCTF_7AM23

VTT_23 T2VTT_24 V1VTT_25 U1

VCC_HV_3 A35

VCC_DMI_3 AH47VCC_DMI_4 AG47

VSSA_DAC_BGB25

VCCA_SM_CK_NCTF_8AL23

VCC_HDAA32

C114

0.1U_0402_16V

4Z

UM

A@

1

2

C401

0.01U_0402_25V

7K~N

UM

A@

1

2

C63

0.1U_0402_16V4Z

1

2

R101

0_0603_5%

1 2

C405

0.01U_0402_25V

7K~N

UM

A@

1

2

C115

0.022U_0402_16V

7K

UM

A@

1

2

C113

10U_0805_10V

4Z

1

2

C407

0.01U_0402_25V

7K~N

UM

A@

1

2

C414

1000P_0402_50V

7K

UMA@

1

2C186

0_0603_5%VGA@

C186

1U_0603_10V

4Z

UMA@1

2

C388

0.1U_0402_16V

4Z

1

2

C104

10U_0805_10V

4Z

1

2

C385

0.47U_0603_10V

7K

1

2

R102

0_0805_5%

1 2

U4

CRESTLINE_1p0VGA@

R350

0_0603_5%UMA@

1 2

C174

0_0402_5%VGA@

+C95

220U_D

2_4VY

_R15M

1

2

R109

0_0805_5%1 2

L14

10U_FLC-453232-100K_0.25A_10%

UMA@

1 2

C173

0_0402_5%VGA@

C65

0.47U_0603_10V

7K

1

2

+C68

220U_D

2_4VY

_R15M

1

2

L12

BLM18PG121SN1D_06031 2

C122

1U_0603_10V

4Z

1

2

C175

0.1U_0402_16V4Z

1

2

C176

0.1U_0402_16V

4Z

1

2

C187

10U_0805_10V

4Z

UMA@1

2

C72

1U_0603_10V4Z

1

2

L29

MBK2012121YZF_08051 2

C83

4.7U_0805_10V4Z

1

2

C410

0.1U_0402_16V

4Z

1

2

C179

10U_0805_10V

4Z

1

2

C413

0_0402_5%VGA@

C382

0.47U_0603_10V

7K1

2

R97

0_0603_5%

1 2

C103

1U_0603_10V4Z

1

2

C418

10U_0805_10V

4Z

UMA@

1

2

C62

10U_0805_10V4Z

1

2

C117

10U_0805_10V

4Z

1

2

C413

1000P_0402_50V7K

UMA@1

2

C115

0_0402_5%VGA@

C98

0.1U_0402_16V

4Z

1

2

C401

0_0402_5%VGA@

C69

1U_0603_10V

4Z

1

2

C384

4.7U_0805_10V

4Z

1

2

C37

3

4.7U_0805_10V

4Z

1

2C38

3

0.47U_0603_10V

7K

1

2 C178

10U_0805_10V

4Z

UMA@

1

2

C56

2.2U_0805_16V

4Z

1

2 C102

0.1U_0402_16V

4Z

1

2

C87

10U_0805_10V

4Z

@

1

2

R836 0_0402_5%~DUMA@1 2

R69

100_0603_1%1 2

C387

10U_0805_10V

4Z

1

2

R71

0_0603_5%

1 2

L9

MBK2012121YZF_0805

1 2

Page 11: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSM_LF2VCCSM_LF3

VCCSM_LF1

VCCSM_LF6VCCSM_LF7

VCCSM_LF4VCCSM_LF5

+VCCP

+VCCP

+VCCP

+VCCP

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Cantiga(5/6)-PWR/GNDCustom

11 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

3000mA

6326.84mA

Extnal Graphic: 1210.34mAintegrated Graphic: 1930.4mA

0317 change value

C120

0.1U_0402_16V4Z

1

2

+C374

220U_D

2_4VY_R15M

1

2

C163

1U_0603_10V4Z

1

2

C99

0.1U_0402_16V4Z

VGA@

1

2

C78

1U_0603_10V4Z VGA@

1

2

T42PAD

C100

10U_0805_10V4Z

VGA@

1

2

C70

0.1U_0402_16V4Z

1

2

C118

10U_0805_10V4Z

1

2

C79

10U_0805_10V4Z

VGA@

1

2

C147

10U_0805_10V4Z

1

2

C86

0.22U_0402_10V4Z

VGA@

1

2

POWER

VCC NCTF

VCC CORE

U4F

CANTIGA_1p0

VCC_NCTF_1 AM32

VCC_NCTF_20 AC30

VCC_NCTF_29 AJ29

VCC_NCTF_42 AK25

VCC_NCTF_9 AA32VCC_NCTF_10 Y32VCC_NCTF_11 W32VCC_NCTF_12 U32VCC_NCTF_13 AM30VCC_NCTF_14 AL30VCC_NCTF_15 AK30

VCC_NCTF_17 AG30VCC_NCTF_18 AF30VCC_NCTF_19 AE30

VCC_NCTF_2 AL32

VCC_NCTF_24 W30VCC_NCTF_25 V30

VCC_NCTF_3 AK32

VCC_NCTF_30 AH29VCC_NCTF_31 AG29VCC_NCTF_32 AE29

VCC_NCTF_38 AL28VCC_NCTF_39 AK28VCC_NCTF_40 AL26VCC_NCTF_41 AK26

VCC_NCTF_4 AJ32

VCC_NCTF_43 AK24

VCC_NCTF_5 AH32VCC_NCTF_6 AG32VCC_NCTF_7 AE32VCC_NCTF_8 AC32

VCC_NCTF_33 AC29VCC_NCTF_34 AA29VCC_NCTF_35 Y29VCC_NCTF_36 W29VCC_NCTF_37 V29

VCC_NCTF_26 U30VCC_NCTF_27 AL29VCC_NCTF_28 AK29

VCC_NCTF_16 AH30

VCC_NCTF_21 AB30VCC_NCTF_22 AA30VCC_NCTF_23 Y30

VCC_1AG34VCC_2AC34VCC_3AB34VCC_4AA34VCC_5Y34VCC_6V34VCC_7U34VCC_8AM33VCC_9AK33VCC_10AJ33VCC_11AG33VCC_12AF33

VCC_13AE33VCC_14AC33VCC_15AA33VCC_16Y33VCC_17W33VCC_18V33VCC_19U33VCC_20AH28VCC_21AF28VCC_22AC28VCC_23AA28VCC_24AJ26VCC_25AG26VCC_26AE26VCC_27AC26VCC_28AH25VCC_29AG25VCC_30AF25VCC_31AG24VCC_32AJ23VCC_33AH23VCC_34AF23

VCC_35T32

VCC_NCTF_44 AK23

+

C148

330U

_V_2

.5VM

1

2

C145

1U_0603_10V4Z

1

2

C67

0.22U_0603_10V7K

1

2

C81

0.22U_0603_10V7K

1

2

C164

0.01U_0402_16V7K

1

2

C80

0.1U_0402_16V4Z

VGA@

1

2

C143

0.22U_0402_10V4Z

1

2

C71

0.1U_0402_16V4Z

1

2

+C57

330U_V_2.5VM

VGA@

1

2

POWER

VCC SM

VCC GFX

VCC GFX NCTF

VCC SM LF

U4G

CANTIGA_1p0

VCC_SM_10AY32

VCC_SM_20BF31

VCC_SM_30AW29

VCC_SM_6BD32VCC_SM_7BC32VCC_SM_8BB32VCC_SM_9BA32

VCC_SM_11AW32VCC_SM_12AV32VCC_SM_13AU32VCC_SM_14AT32VCC_SM_15AR32VCC_SM_16AP32VCC_SM_17AN32VCC_SM_18BH31VCC_SM_19BG31

VCC_SM_2AN33

VCC_SM_21BG30VCC_SM_22BH29VCC_SM_23BG29VCC_SM_24BF29VCC_SM_25BD29VCC_SM_26BC29VCC_SM_27BB29VCC_SM_28BA29VCC_SM_29AY29

VCC_SM_3BH32

VCC_SM_31AV29VCC_SM_32AU29VCC_SM_33AT29VCC_SM_34AR29

VCC_AXG_NCTF_10 V23VCC_AXG_NCTF_11 AM21VCC_AXG_NCTF_12 AL21VCC_AXG_NCTF_13 AK21VCC_AXG_NCTF_14 W21VCC_AXG_NCTF_15 V21VCC_AXG_NCTF_16 U21VCC_AXG_NCTF_17 AM20VCC_AXG_NCTF_18 AK20VCC_AXG_NCTF_19 W20

VCC_AXG_NCTF_2 V28

VCC_AXG_NCTF_20 U20VCC_AXG_NCTF_21 AM19VCC_AXG_NCTF_22 AL19VCC_AXG_NCTF_23 AK19VCC_AXG_NCTF_24 AJ19VCC_AXG_NCTF_25 AH19VCC_AXG_NCTF_26 AG19VCC_AXG_NCTF_27 AF19VCC_AXG_NCTF_28 AE19VCC_AXG_NCTF_29 AB19

VCC_AXG_NCTF_3 W26

VCC_AXG_NCTF_30 AA19VCC_AXG_NCTF_31 Y19VCC_AXG_NCTF_32 W19VCC_AXG_NCTF_33 V19VCC_AXG_NCTF_34 U19VCC_AXG_NCTF_35 AM17VCC_AXG_NCTF_36 AK17VCC_AXG_NCTF_37 AH17VCC_AXG_NCTF_38 AG17VCC_AXG_NCTF_39 AF17

VCC_AXG_NCTF_4 V26

VCC_AXG_NCTF_40 AE17VCC_AXG_NCTF_41 AC17VCC_AXG_NCTF_42 AB17VCC_AXG_NCTF_43 Y17VCC_AXG_NCTF_44 W17VCC_AXG_NCTF_45 V17VCC_AXG_NCTF_46 AM16VCC_AXG_NCTF_47 AL16VCC_AXG_NCTF_48 AK16VCC_AXG_NCTF_49 AJ16

VCC_AXG_NCTF_5 W25

VCC_AXG_NCTF_50 AH16VCC_AXG_NCTF_51 AG16VCC_AXG_NCTF_52 AF16VCC_AXG_NCTF_53 AE16VCC_AXG_NCTF_54 AC16VCC_AXG_NCTF_55 AB16VCC_AXG_NCTF_56 AA16

VCC_AXG_NCTF_6 V25VCC_AXG_NCTF_7 W24VCC_AXG_NCTF_8 V24VCC_AXG_NCTF_9 W23

VCC_SM_35AP29

VCC_SM_4BG32VCC_SM_5BF32

VCC_AXG_NCTF_1 W28VCC_SM_1AP33

VCC_AXG_1Y26VCC_AXG_2AE25VCC_AXG_3AB25VCC_AXG_4AA25VCC_AXG_5AE24VCC_AXG_6AC24VCC_AXG_7AA24VCC_AXG_8Y24VCC_AXG_9AE23VCC_AXG_10AC23VCC_AXG_11AB23VCC_AXG_12AA23VCC_AXG_13AJ21VCC_AXG_14AG21VCC_AXG_15AE21VCC_AXG_16AC21VCC_AXG_17AA21VCC_AXG_18Y21VCC_AXG_19AH20VCC_AXG_20AF20VCC_AXG_21AE20VCC_AXG_22AC20VCC_AXG_23AB20VCC_AXG_24AA20VCC_AXG_25T17

VCC_AXG_27AM15VCC_AXG_28AL15

VCC_AXG_30AJ15VCC_AXG_31AH15

VCC_AXG_33AF15VCC_AXG_34AB15

VCC_SM_LF1 AV44VCC_SM_LF2 BA37VCC_SM_LF3 AM40VCC_SM_LF4 AV21VCC_SM_LF5 AY5VCC_SM_LF6 AM10VCC_SM_LF7 BB13

VCC_AXG_26T16

VCC_AXG_32AG15

VCC_AXG_35AA15VCC_AXG_36Y15VCC_AXG_37V15VCC_AXG_38U15VCC_AXG_39AN14VCC_AXG_40AM14VCC_AXG_41U14VCC_AXG_42T14

VCC_AXG_SENSEAJ14VSS_AXG_SENSEAH14

VCC_AXG_NCTF_57 Y16VCC_AXG_NCTF_58 W16VCC_AXG_NCTF_59 V16VCC_AXG_NCTF_60 U16

VCC_SM_36/NCBA36VCC_SM_37/NCBB24VCC_SM_38/NCBD16VCC_SM_39/NCBB21VCC_SM_40/NCAW16VCC_SM_41/NCAW13VCC_SM_42/NCAT13

VCC_AXG_29AE15C

165

10U_0805_10V4Z

1

2

T43PAD

C119

0.22U_0402_10V4Z

1

2

C146

0.47U_0402_6.3V6K

1

2

C101

4.7U_0603_6.3V6M

VGA@

1

2

Page 12: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Cantiga(6/6)-PWR/GNDCustom

12 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

VSS

VSS NCTF

VSS SCB

NC

U4J

CANTIGA_1p0

VSS_199BG21

VSS_201AW21VSS_202AU21VSS_203AP21VSS_204AN21VSS_205AH21VSS_206AF21VSS_207AB21VSS_208R21VSS_209M21VSS_210J21VSS_211G21VSS_212BC20VSS_213BA20VSS_214AW20VSS_215AT20VSS_216AJ20VSS_217AG20VSS_218Y20VSS_219N20VSS_220K20VSS_221F20VSS_222C20VSS_223A20VSS_224BG19VSS_225A18VSS_226BG17VSS_227BC17VSS_228AW17VSS_229AT17VSS_230R17VSS_231M17VSS_232H17VSS_233C17

VSS_235BA16

VSS_237AU16VSS_238AN16VSS_239N16VSS_240K16VSS_241G16VSS_242E16VSS_243BG15

VSS_245W15VSS_246A15VSS_247BG14VSS_248AA14VSS_249C14VSS_250BG13VSS_251BC13VSS_252BA13

VSS_255AN13VSS_256AJ13VSS_257AE13VSS_258N13VSS_259L13VSS_260G13VSS_261E13VSS_262BF12VSS_263AV12VSS_264AT12VSS_265AM12VSS_266AA12VSS_267J12VSS_268A12VSS_269BD11VSS_270BB11VSS_271AY11VSS_272AN11VSS_273AH11

VSS_275Y11VSS_276N11VSS_277G11VSS_278C11VSS_279BG10VSS_280AV10VSS_281AT10VSS_282AJ10VSS_283AE10VSS_284AA10

VSS_293BH8 VSS_292B9 VSS_291G9 VSS_290AD9 VSS_289AM9 VSS_288AN9 VSS_287BC9

VSS_285M10VSS_286BF9

VSS_297 AH8VSS_298 Y8VSS_299 L8VSS_300 E8VSS_301 B8VSS_302 AY7VSS_303 AU7VSS_304 AN7VSS_305 AJ7VSS_306 AE7VSS_307 AA7VSS_308 N7VSS_309 J7VSS_310 BG6VSS_311 BD6VSS_312 AV6VSS_313 AT6

VSS_244AC15

VSS_314 AM6VSS_315 M6VSS_316 C6VSS_317 BA5VSS_318 AH5VSS_319 AD5VSS_320 Y5VSS_321 L5VSS_322 J5VSS_323 H5VSS_324 F5VSS_325 BE4

VSS_327 BC3VSS_328 AV3VSS_329 AL3

VSS_NCTF_1 AF32VSS_NCTF_2 AB32VSS_NCTF_3 V32VSS_NCTF_4 AJ30VSS_NCTF_5 AM29VSS_NCTF_6 AF29VSS_NCTF_7 AB29VSS_NCTF_8 U26VSS_NCTF_9 U23

VSS_NCTF_10 AL20VSS_NCTF_11 V20VSS_NCTF_12 AC19VSS_NCTF_13 AL17VSS_NCTF_14 AJ17VSS_NCTF_15 AA17VSS_NCTF_16 U17

VSS_SCB_1 BH48VSS_SCB_2 BH1VSS_SCB_3 A48VSS_SCB_4 C1VSS_SCB_5 A3

NC_26 E1NC_27 D2NC_28 C3NC_29 B4NC_30 A5NC_31 A6NC_32 A43NC_33 A44NC_34 B45NC_35 C46NC_36 D47NC_37 B47NC_38 A46NC_39 F48NC_40 E48NC_41 C48NC_42 B48

VSS_330 R3VSS_331 P3

VSS_333 BA2

VSS_336 AR2VSS_335 AU2

VSS_337 AP2

VSS_332 F3

VSS_334 AW2

VSS_341 AE2VSS_340 AF2VSS_339 AH2VSS_338 AJ2

VSS_342 AD2VSS_343 AC2VSS_344 Y2VSS_345 M2VSS_346 K2VSS_347 AM1VSS_348 AA1VSS_349 P1VSS_350 H1

VSS_294BB8VSS_295AV8VSS_296AT8

VSS_351 U24VSS_352 U28VSS_353 U25VSS_354 U29

VSS_200L12

VSS

U4I

CANTIGA_1p0

VSS_1AU48

VSS_198 A23

VSS_2AR48VSS_3AL48VSS_4BB47VSS_5AW47VSS_6AN47VSS_7AJ47VSS_8AF47VSS_9AD47VSS_10AB47VSS_11Y47VSS_12T47VSS_13N47VSS_14L47VSS_15G47VSS_16BD46VSS_17BA46

VSS_19AV46VSS_20AR46VSS_21AM46VSS_22V46VSS_23R46VSS_24P46VSS_25H46VSS_26F46VSS_27BF44VSS_28AH44VSS_29AD44VSS_30AA44VSS_31Y44VSS_32U44VSS_33T44VSS_34M44VSS_35F44VSS_36BC43VSS_37AV43VSS_38AU43VSS_39AM43VSS_40J43VSS_41C43VSS_42BG42VSS_43AY42VSS_44AT42VSS_45AN42VSS_46AJ42VSS_47AE42VSS_48N42VSS_49L42VSS_50BD41VSS_51AU41VSS_52AM41VSS_53AH41VSS_54AD41VSS_55AA41VSS_56Y41VSS_57U41VSS_58T41VSS_59M41VSS_60G41VSS_61B41VSS_62BG40VSS_63BB40VSS_64AV40VSS_65AN40VSS_66H40VSS_67E40VSS_68AT39VSS_69AM39VSS_70AJ39VSS_71AE39VSS_72N39VSS_73L39VSS_74B39VSS_75BH38VSS_76BC38VSS_77BA38VSS_78AU38VSS_79AH38VSS_80AD38VSS_81AA38VSS_82Y38VSS_83U38VSS_84T38VSS_85J38VSS_86F38VSS_87C38

VSS_97BD36

VSS_100 AM36VSS_101 AE36VSS_102 P36VSS_103 L36VSS_104 J36VSS_105 F36VSS_106 B36VSS_107 AH35VSS_108 AA35VSS_109 Y35VSS_110 U35VSS_111 T35VSS_112 BF34VSS_113 AM34VSS_114 AJ34VSS_115 AF34VSS_116 AE34VSS_117 W34VSS_118 B34VSS_119 A34VSS_120 BG33VSS_121 BC33VSS_122 BA33VSS_123 AV33VSS_124 AR33VSS_125 AL33VSS_126 AH33VSS_127 AB33VSS_128 P33VSS_129 L33VSS_130 H33VSS_131 N32VSS_132 K32VSS_133 F32VSS_134 C32VSS_135 A31VSS_136 AN29VSS_137 T29VSS_138 N29VSS_139 K29VSS_140 H29VSS_141 F29VSS_142 A29VSS_143 BG28VSS_144 BD28VSS_145 BA28VSS_146 AV28VSS_147 AT28VSS_148 AR28VSS_149 AJ28VSS_150 AG28VSS_151 AE28VSS_152 AB28VSS_153 Y28VSS_154 P28VSS_155 K28VSS_156 H28VSS_157 F28VSS_158 C28VSS_159 BF26VSS_160 AH26VSS_161 AF26VSS_162 AB26VSS_163 AA26VSS_164 C26VSS_165 B26VSS_166 BH25VSS_167 BD25VSS_168 BB25VSS_169 AV25VSS_170 AR25VSS_171 AJ25VSS_172 AC25VSS_173 Y25VSS_174 N25VSS_175 L25VSS_176 J25VSS_177 G25VSS_178 E25VSS_179 BF24

VSS_88BF37VSS_89BB37VSS_90AW37VSS_91AT37VSS_92AN37VSS_93AJ37VSS_94H37VSS_95C37VSS_96BG36

VSS_99AU36

VSS_182 AT24

VSS_184 AH24

VSS_186 AB24

VSS_188 L24

VSS_18AY46

VSS_191 G24

VSS_193 E24

VSS_195 AG23

VSS_197 B23

VSS_181 AY24

VSS_183 AJ24

VSS_185 AF24

VSS_187 R24

VSS_189 K24VSS_190 J24

VSS_192 F24

VSS_194 BH23

VSS_196 Y23VSS_98AK15

VSS_180 AD12

VSS_199 AJ6

Page 13: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D1

DDR_A_D49

DDR_A_D23DDR_A_D22

DDR_A_D48

M_CLK_DDR#1

M_CLK_DDR#0

M_CLK_DDR1

M_CLK_DDR0

DDR_CKE1_DIMMA

DDR_A_MA3

DDR_A_MA10

DDR_A_MA1

CLK_SMBCLK

DDR_CS0_DIMMA#DDR_A_WE#

DDR_A_MA5

DDR_A_MA12DDR_A_MA7DDR_A_MA9

DDR_A_DQS1

DDR_A_D26DDR_A_D27

DDR_A_D16DDR_A_D17

DDR_A_D8

DDR_A_DM2

DDR_A_DM1

DDR_A_DM3

DDR_A_DQS2

DDR_A_DQS0

CLK_SMBDATA

DDR_A_DQS7

DDR_A_DQS6

DDR_A_DQS4

DDR_A_DM0

DDR_CS1_DIMMA#

DDR_A_MA8

DDR_CKE0_DIMMA

DDR_A_MA6

DDR_A_MA4

DDR_A_MA0DDR_A_MA2

DDR_A_MA11

DDR_A_D53

DDR_A_D21DDR_A_D20

DDR_A_RAS#DDR_A_BS#1

DDR_A_CAS#

DDR_A_D3

DDR_A_DM4

DDR_A_DM6

DDR_A_D55

DDR_A_D52

DDR_A_DQS5

DDR_A_MA13

DDR_A_DM7

DDR_A_DM5

DDR_A_D2

DDR_A_BS#2

DDR_A_BS#0

DDR_A_DQS#4

DDR_A_DQS#3DDR_A_DQS3

DDR_A_DQS#2

DDR_A_DQS#1

DDR_A_DQS#0

DDR_A_DQS#7

DDR_A_DQS#6

DDR_A_DQS#5

DDR_A_BS#1DDR_A_MA0

DDR_A_RAS#

DDR_A_MA5

M_ODT1

DDR_CS0_DIMMA#

DDR_A_MA8

M_ODT1

DDR_CS1_DIMMA#DDR_A_MA13M_ODT0

DDR_A_VM_ODT0

DDR_A_D19DDR_A_D18

DDR_A_D60DDR_A_D61

DDR_A_D35

DDR_A_D57

DDR_A_D25

DDR_A_D13DDR_A_D12

DDR_A_D56

DDR_A_D51

DDR_A_D63

DDR_A_D36

DDR_A_D58

DDR_A_D42

DDR_A_D37

DDR_A_D54DDR_A_D50

DDR_A_D6

DDR_A_D4

DDR_A_D9

DDR_A_D11DDR_A_D10DDR_A_D15

DDR_A_D28

DDR_A_D30DDR_A_D31

DDR_A_D7

DDR_A_D45DDR_A_D40DDR_A_D44

DDR_A_D24DDR_A_D29

DDR_A_D62DDR_A_D59

DDR_A_D46DDR_A_D41

DDR_A_D0

DDR_A_BS#2

DDR_A_MA7

DDR_A_MA9

DDR_A_MA4DDR_A_MA2

DDR_CKE1_DIMMA

DDR_A_MA1DDR_A_MA3

DDR_A_MA10DDR_A_BS#0

DDR_A_CAS#DDR_A_WE#

DDR_A_MA6

DDR_A_D38DDR_A_D39

DDR_A_D34

DDR_A_D33DDR_A_D32

DDR_A_MA14

DDR_A_MA14

DD

R_A

_V

DDR_A_MA11

DDR_A_D14

DDR_A_D5

DDR_A_D47

DDR_A_D43

DDR_CKE0_DIMMADDR_A_MA12

DDR_A_DQS[0..7]8

DDR_A_DM[0..7]8

DDR_CKE0_DIMMA7

DDR_A_MA[0..13]8

DDR_A_BS#08

DDR_A_BS#28

DDR_A_CAS#8

DDR_A_WE#8

DDR_CS1_DIMMA#7

M_ODT17

M_CLK_DDR#0 7M_CLK_DDR0 7

DDR_A_BS#1 8

DDR_CKE1_DIMMA 7

DDR_CS0_DIMMA# 7DDR_A_RAS# 8

M_ODT0 7

M_CLK_DDR#1 7

ICH_SM_DA14,15,20,24

M_CLK_DDR1 7

ICH_SM_CLK14,15,20,24

PM_EXTTS#0 7

DDR_A_MA14 8

V_DDR_MCH_REF 7,14

DDR_A_D[0..63]8

DDR_A_DQS#[0..7]8

+3VS

+1.8V

+0.9VS

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

DDR2 SO-DIMM ICustom

13 45Monday, December 15, 2008

2007/1/15 2008/1/15

Close to VREF pins of SO-DIMM

Layout Note:Place these resistorclosely JP41,alltrace length Max=1.5"

Layout Note:Place near JDIM1

Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V

SO-DIMM AREVERSEBottom side

Compal Electronics, Inc.

C59

2.2U_0603_6.3V6K

1

2

C106

0.1U_0402_16V4Z

1

2

RP17 56_0404_4P2R_5%1423

RP6

56_0404_4P2R_5%

1 42 3

C167

0.1U_0402_16V4Z

1

2

C169

2.2U_0603_6.3V6K

1

2

RP23 56_0404_4P2R_5%1423

C220

0.1U_0402_16V4Z

1

2

C166

2.2U_0603_6.3V6K

1

2

C124

2.2U_0603_6.3V6K

1

2

C152

0.1U_0402_16V4Z

1

2C126

0.1U_0402_16V4Z

1

2

C131

0.1U_0402_16V4Z

1

2

C105

2.2U_0603_6.3V6K

1

2

C153

0.1U_0402_16V4Z

1

2

JDIM2

P-TWO_A5652C-A0G16

VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39

VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199

VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22

VSS 24DM1 26VSS 28CK0 30

CK0# 32VSS 34

DQ14 36DQ15 38

VSS 40

VSS 42DQ20 44DQ21 46

VSS 48NC 50

DM2 52VSS 54

DQ22 56DQ23 58

VSS 60DQ28 62DQ29 64

VSS 66DQS3# 68

DQS3 70VSS 72

DQ30 74DQ31 76

VSS 78NC/CKE1 80

VDD 82NC/A15 84NC/A14 86

VDD 88A11 90

A7 92A6 94

VDD 96A4 98A2 100A0 102

VDD 104BA1 106

RAS# 108S0# 110

VDD 112ODT0 114

NC/A13 116VDD 118

NC 120VSS 122

DQ36 124DQ37 126

VSS 128DM4 130VSS 132

DQ38 134DQ39 136

VSS 138DQ44 140DQ45 142

VSS 144DQS5# 146

DQS5 148VSS 150

DQ46 152DQ47 154

VSS 156DQ52 158DQ53 160

VSS 162CK1 164

CK1# 166VSS 168DM6 170VSS 172

DQ54 174DQ55 176

VSS 178DQ60 180DQ61 182

VSS 184DQS7# 186

DQS7 188VSS 190

DQ62 192DQ63 194

VSS 196SA0 198SA1 200

R32

10K_

0402

_5%

12

RP16 56_0404_4P2R_5%1423

C201

2.2U_0805_16V4Z

1

2

C58

0.1U_0402_16V4Z

1

2

R96 56_0402_5%

1 2

RP15 56_0404_4P2R_5%1423

RP5

56_0404_4P2R_5%

1 42 3

RP2 56_0404_4P2R_5%1423

C108

0.1U_0402_16V4Z

1

2

+

C84

330U 2.5V Y D

2

@

1

2

RP8 56_0404_4P2R_5%1423

C150

0.1U_0402_16V4Z

1

2 C128

0.1U_0402_16V4Z

1

2 C168

0.1U_0402_16V4Z

1

2C125

0.1U_0402_16V4Z

1

2

C149

2.2U_0603_6.3V6K

1

2

C107

0.1U_0402_16V4Z

1

2

RP14

56_0404_4P2R_5%

1 42 3

RP13

56_0404_4P2R_5%

1 42 3

C129

0.1U_0402_16V4Z

1

2C127

0.1U_0402_16V4Z

1

2

R31

10K_

0402

_5%

12

RP1

56_0404_4P2R_5%

1 42 3

RP7

56_0404_4P2R_5%

1 42 3

C130

0.1U_0402_16V4Z

1

2

C154

0.1U_0402_16V4Z

1

2

C151

0.1U_0402_16V4Z

1

2

RP22 56_0404_4P2R_5%1423

Page 14: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_MA11

DDR_CKE3_DIMMB

DDR_B_MA2DDR_B_MA4

DDR_B_BS#1DDR_B_MA0

DDR_B_MA6DDR_B_MA7

DDR_B_WE#

DDR_B_MA1

DDR_B_CAS#

DDR_B_MA3DDR_B_MA9DDR_B_MA12

DDR_B_MA14

DDR_B_D60

DDR_B_DM5

DDR_B_D45

DDR_B_DM2

DDR_B_D21

DDR_B_D40

DDR_B_CAS#

DDR_B_D11

DDR_B_D62

DDR_B_MA4

DDR_B_D27

DDR_B_DQS2

DDR_B_D10

DDR_B_DQS1

DDR_B_D0

DDR_B_D55

DDR_B_BS#1

DDR_B_MA7DDR_B_MA11

DDR_CKE3_DIMMB

DDR_B_D24

DDR_B_D22

DDR_B_D7DDR_B_D6

DDR_B_D30

DDR_B_D1

DDR_B_D47

DDR_B_MA6

M_CLK_DDR2

DDR_B_D12

DDR_B_DM0

DDR_B_D28

DDR_B_DQS0

DDR_B_DM6

DDR_B_D5

DDR_B_D3

DDR_B_DQS3

M_CLK_DDR#2

DDR_B_D41

M_ODT3

DDR_B_WE#

DDR_B_D8

DDR_B_D2

DDR_B_D57

DDR_B_D50

DDR_B_D37

DDR_B_D14

DDR_B_MA5

DDR_B_D51

DDR_B_D42

DDR_B_D38

DDR_B_MA0

DDR_B_D32

DDR_B_MA3

DDR_B_D46

DDR_B_DQS5

DDR_B_BS#0

DDR_B_MA9

DDR_B_D31

CLK_SMBCLK

DDR_B_D58

DDR_B_D43

DDR_B_D34

DDR_B_MA12

DDR_CKE2_DIMMB

DDR_B_D25

DDR_B_DQS6

DDR_B_D49DDR_B_D48

DDR_CS2_DIMMB#

DDR_B_MA2

DDR_B_D16

DDR_B_D4

DDR_CS3_DIMMB#

DDR_B_BS#2

DDR_B_DM3

DDR_B_DQS7

M_CLK_DDR#3

DDR_B_D53

DDR_B_D59

DDR_B_D23

DDR_B_D33

DDR_B_DQS#1

DDR_B_D36

DDR_B_MA14

DDR_B_DQS4DDR_B_DQS#4

DDR_B_DQS#0

CLK_SMBDATA

DDR_B_DM7

DDR_B_D61

DDR_B_D39

DDR_B_MA13M_ODT2

DDR_B_D35

DDR_B_MA10

DDR_B_D19

DDR_B_DQS#2

+DDR_MCH_REF1

DDR_B_D63

M_CLK_DDR3

DDR_B_D56

DDR_B_DQS#6

DDR_B_DM4

DDR_B_RAS#

DDR_B_DQS#3

DDR_B_MA8

DDR_B_D18

DDR_B_D20

DDR_B_D9

DDR_B_D54

DDR_B_D52

DDR_B_DQS#5

DDR_B_D15

DDR_B_DM1

DDR_B_DQS#7

DDR_B_D44

DDR_B_D13

DDR_B_MA1

DDR_B_D17

M_ODT2DDR_B_MA13

DDR_B_D29

DDR_B_D26

DDR_B_V

DD

R_B

_V

M_ODT3DDR_CS3_DIMMB#

DDR_B_BS#0DDR_B_MA10

DDR_B_MA5DDR_B_MA8

DDR_B_RAS#DDR_CS2_DIMMB#

DDR_B_BS#2DDR_CKE2_DIMMB

DDR_B_DQS#[0..7]8

DDR_B_DQS[0..7]8

DDR_B_D[0..63]8

DDR_B_MA[0..13]8

DDR_B_DM[0..7]8

DDR_CKE3_DIMMB 7

DDR_CS2_DIMMB# 7DDR_B_WE#8

DDR_B_BS#1 8DDR_B_RAS# 8

DDR_B_CAS#8

M_ODT37

DDR_CKE2_DIMMB7

DDR_CS3_DIMMB#7

DDR_B_BS#28

DDR_B_BS#08

M_ODT2 7

M_CLK_DDR3 7M_CLK_DDR#3 7

M_CLK_DDR2 7M_CLK_DDR#2 7

PM_EXTTS#1 7

ICH_SM_DA13,15,20,24ICH_SM_CLK13,15,20,24

DDR_B_MA14 8

V_DDR_MCH_REF 7,13

+3VS+3VS

+1.8V

+0.9VS

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

DDR2 SO-DIMM IICustom

14 45Monday, December 15, 2008

2007/1/15 2008/1/15

Close to VREF pins of SO-DIMM

Bottom side

SO-DIMM BREVERSE

Layout Note:Place near JDIM2

Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS

Layout Note:Place these resistorclosely JP42,alltrace length Max=1.5"

Compal Electronics, Inc.C

137

0.1U_0402_16V4Z

1

2

C160

2.2U_0603_6.3V6K

1

2

C139

2.2U_0603_6.3V6K

1

2

C159

0.1U_0402_16V4Z

1

2

C132

0.1U_0402_16V4Z

1

2

C134

0.1U_0402_16V4Z

1

2 C172

0.1U_0402_16V4Z

1

2

RP3

56_0404_4P2R_5%

1 42 3

JDIM1

P-TWO_A5692A-A0G16-N

VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39

VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143

VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22

VSS 24DM1 26VSS 28CK0 30

CK0# 32VSS 34

DQ14 36DQ15 38

VSS 40

VSS 42DQ20 44DQ21 46

VSS 48NC 50

DM2 52VSS 54

DQ22 56DQ23 58

VSS 60DQ28 62DQ29 64

VSS 66DQS3# 68

DQS3 70VSS 72

DQ30 74DQ31 76

VSS 78NC/CKE1 80

VDD 82NC/A15 84NC/A14 86

VDD 88A11 90

A7 92A6 94

VDD 96A4 98A2 100A0 102

VDD 104BA1 106

RAS# 108S0# 110

VDD 112ODT0 114

NC/A13 116VDD 118

NC 120VSS 122

DQ36 124DQ37 126

VSS 128DM4 130VSS 132

DQ38 134DQ39 136

VSS 138DQ44 140DQ45 142

VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199

DQS5# 146DQS5 148

VSS 150DQ46 152DQ47 154

VSS 156DQ52 158DQ53 160

VSS 162CK1 164

CK1# 166VSS 168DM6 170VSS 172

DQ54 174DQ55 176

VSS 178DQ60 180DQ61 182

VSS 184DQS7# 186

DQS7 188VSS 190

DQ62 192DQ63 194

VSS 196SAO 198SA1 200

C177

2.2U_0603_6.3V6K

1

2

C135

0.1U_0402_16V4Z

1

2

C109

0.1U_0402_16V4Z

1

2

R34

10K_0402_5%

12

C133

0.1U_0402_16V4Z

1

2

RP10

56_0404_4P2R_5%

1 42 3

RP20 56_0404_4P2R_5%1423

RP21 56_0404_4P2R_5%1423

C111

0.1U_0402_16V4Z

1

2

RP24 56_0404_4P2R_5%1423

RP25

56_0404_4P2R_5%

1423

C155

0.1U_0402_16V4Z

1

2

RP19 56_0404_4P2R_5%1423

R335 56_0402_5%

1 2

RP12

56_0404_4P2R_5%

1 42 3

C112

2.2U_0603_6.3V6K

1

2

C156

0.1U_0402_16V4Z

1

2

+

C189

330U 2.5V Y D

2

@

1

2

RP4 56_0404_4P2R_5%1423

C110

0.1U_0402_16V4Z

1

2 C158

0.1U_0402_16V4Z

1

2

RP26 56_0404_4P2R_5%1423

RP9

56_0404_4P2R_5%

1 42 3

C221

2.2U_0805_16V4Z

1

2

C138

2.2U_0603_6.3V6K

1

2

RP11

56_0404_4P2R_5%

1 42 3

C61

0.1U_0402_16V4Z

1

2

C171

0.1U_0402_16V4Z

1

2 C136

0.1U_0402_16V4Z

1

2

C60

2.2U_0603_6.3V6K

1

2

C170

0.1U_0402_16V4Z

1

2

C222

0.1U_0402_16V4Z

1

2

C157

0.1U_0402_16V4Z

1

2

R33

10K_0402_5%

1 2

RP18

56_0404_4P2R_5%

1 42 3

Page 15: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FSC

FSB

FSA

CLK_XTAL_IN

CLK_XTAL_OUT

CLK_SMBCLK

CLK_SMBDATA

ITP_EN 27_SEL

R_CKPWRGDFSB

CLK_XTAL_OUTCLK_XTAL_IN

FSC

CLK_SMBDATACLK_SMBCLK

R_MCH_BCLKR_CPU_BCLK#

R_MCH_BCLK#

R_PCIE_SATA#R_PCIE_SATA

FSA

H_STP_CPU#H_STP_PCI#

R_MCH_DREFCLK#R_MCH_DREFCLK

PCI2_TME

R_CLK_PCIE_LAN#R_CLK_PCIE_LAN

27_SELITP_EN

R_MCH_3GPLLR_MCH_3GPLL#

R_CLK_PCIE_MCARD#R_CLK_PCIE_MCARD

R_CLKSATAREQ#

R_CLKREQ#_7

R_CLK_PCI_EC

PCI2_TME

R_CLK_RobR_CLK_Rob#

R_CPU_BCLK

R_PCIE_ICHR_PCIE_ICH#

SSCDREFCLKSSCDREFCLK#

R_CLKREQ#_ROB

R_PCIE_EXPR#R_PCIE_EXPR

R_CLKREQ#_EXPCARD

R_CLK_PCI_CBR_CLKREQ#_GLAN

CLKREQ#_7

WLAN_REQ#4

GLAN_REQ#9

CLKSATAREQ#

ROBSON_REQ#10

EXPCARD_REQ#16

CPU_BSEL25

MCH_CLKSEL2 7

CPU_BSEL15

MCH_CLKSEL1 7

CPU_BSEL05

MCH_CLKSEL0 7

ICH_SM_CLK13,14,20,24

ICH_SM_DA13,14,20,24

CK_PWRGD20

CLK_14M_ICH20 CLK_PCIE_SATA 19CLK_PCIE_SATA# 19

CLK_MCH_BCLK#7CLK_MCH_BCLK7CLK_CPU_BCLK#4

CLK_48M_ICH20

H_STP_CPU# 20H_STP_PCI# 20

CLK_DEBUG_PORT24CLK_PCI_EC29

CLK_PCIE_LAN# 22CLK_PCIE_LAN 22

PCI_CLK18

CLK_MCH_3GPLL# 7CLK_MCH_3GPLL 7

CLK_PCIE_MCARD# 24CLK_PCIE_MCARD 24

CLKSATAREQ# 20

CLKREQ#_77

CLK_PCIE_VGA33CLK_PCIE_VGA#33

CLK_MCH_DREFCLK#7CLK_MCH_DREFCLK7

CLK_PCIE_Rob# 24CLK_PCIE_Rob 24

CLK_CPU_BCLK4

CLK_PCIE_ICH 20CLK_PCIE_ICH# 20

MCH_SSCDREFCLK 7MCH_SSCDREFCLK# 7

WLAN_REQ#4 24

ROBSON_REQ#10

CLK_PCIE_EXPR 28CLK_PCIE_EXPR# 28

EXPCARD_REQ#16 28

CLK_PCI_CB27

CLK_PCI_TPM

CLK_NV_27M 33CLK_NVSS_27M 33

GLAN_REQ#9 22

+VCCP

+VCCP

+VCCP

+3VS_CK505

+3VS

+1.05VS_CK505+VCCP

+3VS_CK505 +3VS_CK505

+3VS_CK505

+3VS_CK505

+3VS_CK505

+1.05VS_CK505

+1.05VS_CK505

+3VS_CK505

+1.05VS_CK505

+1.05VS_CK505

+3VS_CK505

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Clock Generator CK505

15 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

Place close to U55

1000

CLKSEL1

0

PCIMHz

266

SRCMHz

CPUMHzCLKSEL2

33.30

FSACLKSEL0

FSC FSB REFMHz

DOT_96MHz

USBMHz

14.318 96.0 48.0

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1 Reserved

Routing the trace at least 10mil

SB, MINI PCI

1 = ITP/ITP#

27_SEL1 = Enable SRC0 & 27MHz(DIS)

0 = Enable DOT96 & SRC1(UMA)

ITP_EN

NB_3GPLL

CPUNB

ICH_SATA

NB (UMA)

GLAN

NB_SSC (UMA)

0905 Connect to +VCCP

0905 Connect PCI_CLK

ICH

MiniCard_WLAN

VGA (Discrete)

0 = SRC8/SRC8#

MiniCard_Roboson

CPU_STP

Express Card

0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowedPCI2_TME

VGA_27M (DIS)

R1015 0_0402_5%1 2

R1026 0_0402_5%VGA@ 12

R990 0_0402_5%

1 2

R1132 0_0402_5%1 2

R972

0_0805_5%1 2

R10250_0402_5%

@

12

R1016

10K_0402_5%

1 2R10171K_0402_5%

1 2

R1002 0_0402_5%1 2

R1014 0_0402_5%1 2

C1203

0.1U_0402_16V4Z

1

2

R9981K_0402_5%

1 2

R87 10K_0402_5%1 2

R1010 0_0402_5%

1 2

C1193

0.1U_0402_16V4Z

1

2

R981 0_0402_5%

1 2R982 0_0402_5%

12

S IC ICS9LPRS397AKLFT MLF 72P CLK GEN

U55

VDD

_48

19U

SB_0

/FS_

A20

USB

_1/C

LKR

EQ_A

#21

VSS_

4822

VD

D_I

O23

SRC

_0/D

OT_

9624

SRC

_0#/

DO

T_96

#25

VSS_

IO26

VD

D_P

LL3

27LC

DC

LK/2

7M28

LCD

CLK

#/27

M_S

S29

VSS_

PLL3

30VD

D_P

LL3_

IO31

SR

C_2

32SR

C_2

#33

VSS_

SRC

34S

RC

_335

SRC

_3#

36

VDD

_CPU

72C

PU

_071

CP

U_0

#70

VSS_

CPU

69C

PU

_168

CP

U_1

#67

VD

D_C

PU

_IO

66C

LKR

EQ_7

#65

SR

C_8

/CP

U_I

TP64

SRC

_8#/

CPU

_ITP

#63

VD

D_S

RC

_IO

62S

RC

_761

SRC

_7#

60VS

S_SR

C59

CLK

REQ

_6#

58S

RC

_657

SRC

_6#

56VD

D_S

RC

55

PCI_STOP# 54CPU_STOP# 53

VDD_SRC_IO 52SRC_10# 51

SRC_10 50CLKREQ_10# 49

SRC_11 48SRC_11# 47

CLKREQ_11# 46SRC_9# 45

SRC_9 44CLKREQ_9# 43

VSS_SRC 42CLKREQ_4# 41

SRC_4# 40SRC_4 39

VDD_SRC_IO 38CLKREQ_3# 37

CKPWRGD/PD#1FS_B/TEST_MODE2VSS_REF3XTAL_OUT4XTAL_IN5VDD_REF6REF_0/FS_C/TEST_7REF_18SDA9SCL10NC11VDD_PCI12PCI_113PCI_214PCI_315PCI_4/SEL_LCDCL16PCIF_5/ITP_EN17VSS_PCI18

GN

D73

R992 0_0402_5%1 2

R999 0_0402_5%1 2

C1202

0.1U_0402_16V4Z

1

2

C1194

0.1U_0402_16V4Z

1

2

C1200

0.1U_0402_16V4Z

1

2

R996 0_0402_5%1 2

R991 33_0402_1%1 2

C1195

0.1U_0402_16V4Z

1

2

R1023 0_0402_5%UMA@ 1 2

R10090_0402_5%

@

12

R983

2.2K_0402_5%

1 2

R1005 0_0402_5%1 2

R1012 0_0402_5%

1 2

R103410K_0402_5%@

12

R1022 0_0402_5%UMA@ 1 2R1019 0_0402_5%UMA@ 12

C1198

10U_0805_10V4Z

1

2

R1004 33_0402_1%1 2

R103310K_0402_5%

UMA@12

C1204

0.1U_0402_16V4Z

1

2

R90 10K_0402_5%1 2

R103110K_0402_5%

12

R102910K_0402_5%

@

12

C119622P_0402_50V8J

1

2

R977 0_0402_5%

1 2

C1201

10U_0805_10V4Z

1

2

R103210K_0402_5%

12

C1191

0.1U_0402_16V4Z

1

2

R1003

0_0402_5%1 2

R997 0_0402_5%1 2

C1189

10U_0805_10V4Z

1

2

R89 10K_0402_5%1 2

R10111K_0402_5%

@12

R994 0_0402_5%1 2T120PAD

C1192

0.1U_0402_16V4Z

1

2

R987 0_0402_5%1 2

R973

56_0402_5%

@1 2

R85 10K_0402_5%1 2

C1199

0.1U_0402_16V4Z

1

2

R88 10K_0402_5%1 2

R1018 0_0402_5%1 2

R60 10K_0402_5%1 2

R1006 33_0402_5%

1 2

R9931K_0402_5%

@

12

R979 0_0402_5%

1 2

R1024 0_0402_5%VGA@ 12

R971

0_0805_5%1 2

R976 0_0402_5%

1 2R978 0_0402_5%

1 2

Y714.31818MHZ_16P

12

R988 0_0402_5%

1 2

R1020

0_0402_5%1 2

R1008 33_0402_1%1 2

C1190

0.1U_0402_16V4Z

1

2

R1007 0_0402_5%1 2

R1021 0_0402_5%UMA@ 12

R1195 0_0402_5%VGA@ 1 2

R1001 33_0402_1%1 2

R1013 33_0402_1%1 2

C119722P_0402_50V8J

1

2

R9841K_0402_5%

1 2

R989 0_0402_5%

1 2

R1067 0_0402_5%VGA@ 1 2

R1000 33_0402_5%

1 2

R103010K_0402_5%

VGA@12

R985

0_0402_5%1 2

R995 0_0402_5%1 2

R11120_0402_5%

1 2

R980 0_0402_5%

12

R9861K_0402_5%

@

12

Page 16: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

BKOFF#

EC_ENBKL

EC_ENBKL

LVDSAC-LVDSAC+

LVDSA1-

LVDSA0+LVDSA0-

LVDSA2+

LVDSA1+

LVDSA2-

EDID_DAT_LCD

EDID_CLK_LCD

GMCH_EDID_DAT_LCDGMCH_EDID_CLK_LCD

VGA_LVDSA1-

VGA_LVDSA0-VGA_LVDSA0+

VGA_LVDSA1+

VGA_LVDSA2-VGA_LVDSA2+

EDID_CLK_LCD

EDID_DAT_LCD

LVDSAC-LVDSAC+

VGA_DAT_LCDVGA_CLK_LCD

LVDSA1+

LVDSA0-

LVDSA1-

LVDSA0+

LVDSA2+LVDSA2-

GMCH_LVDSAC-GMCH_LVDSAC+

GMCH_LVDSA1-

GMCH_LVDSA0-

GMCH_LVDSA2-

GMCH_LVDSA0+

GMCH_LVDSA1+

GMCH_LVDSA2+

GMCH_LVDDEN

VGA_LVDDEN

LCD_VCC_TEST_EN

DISPOFF#

LVDSAC+

EDID_DAT_LCDEDID_CLK_LCD

LVDSAC-

LVDSA2+LVDSA2-

LVDSA1+LVDSA1-

+LCDVDD_L

DAC_BRIG

INVT_PWM

DISPOFF#

BIA_PWM INVT_PWM

DISPOFF#DAC_BRIG

INVPWR_B+

INVT_PWM

INVPWR_B+

LVDSA0+LVDSA0-

BISTLCD_DET#

+LCDVDD

VGA_LVDSAC-VGA_LVDSAC+

GMCH_LVDDEN9

BKOFF#29

GMCH_ENBKL9

VGA_ENBKL33

VGA_LVDDEN33

GMCH_EDID_CLK_LCD 9

VGA_LVDSA2+33

GMCH_LVDSA2+ 9GMCH_LVDSA2- 9

GMCH_LVDSA0+ 9

VGA_LVDSA1+33

VGA_DAT_LCD33VGA_CLK_LCD33

VGA_LVDSA0-33

VGA_LVDSA2-33

VGA_LVDSA0+33

GMCH_LVDSA1- 9GMCH_LVDSA1+ 9

GMCH_LVDSA0- 9

VGA_LVDSA1-33

GMCH_LVDSAC- 9GMCH_LVDSAC+ 9

GMCH_EDID_DAT_LCD 9

EC_ENBKL29

LCD_VCC_TEST_EN29

BIA_PWM9

DAC_BRIG29

INVT_PWM29

BIST 29LCD_DET#29

VGA_LVDSAC+33VGA_LVDSAC-33

+3VS

+3VS +3VS

+LCDVDD

B+

+3VS

+LCDVDD

+LCDVDD +5VALW

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

CRT CONN/LCD CONNCustom

16 45Monday, December 15, 2008

2007/1/15 2008/1/15

L C D

Compal Electronics, Inc.

Except pin 29Follow HEL80's pin definition

60 MIL

0208 Add C796 , C797 for EMI

LCD/PANEL BD. Conn.

INVERTER Conn.

NBR

MXMII Conn.

LVDS

Routing Diagram

LVDS Bus

Use Daisy chain to route

JEPICO Conn.

W=60mils

W=60mils

R630 0_0402_5% VGA@1 2

R599 0_0402_5%UMA@ 1 2

R644 0_0402_5% VGA@1 2

R13

547

K_04

02_5

%

12

R19

0_0805_5% 1 2

R41 47K_0402_5%

1 2

C796

220P_0402_50V7K

1

2

R645 0_0402_5% VGA@1 2

G

D

S

Q6SI2301BDS-T1-E3 1P SOT23

7.3

2

13

C797

220P_0402_50V7K

1

2

R600 0_0402_5%UMA@ 1 2

R136 1K_0402_5%

12

C32

0.1U

_060

3_50

V4Z

1

2

D9

CH751H-40PT_SOD323-2 UMA@2 1

R596 0_0402_5%UMA@ 1 2

C415 470P_0402_50V7K 1 2

D26CH751H-40_SC76

21

R635 0_0402_5% VGA@1 2

R603 0_0402_5% VGA@1 2

L55

0_0805_5% 12

C34

0.1U_0603_50V4Z1

2

C46

0.047U_0402_16V7K

1

2

R652

100K_0402_5%UMA@

C416 470P_0402_50V7K 1 2

R602 0_0402_5% VGA@1 2

R598 0_0402_5%UMA@ 1 2

C41

0.1U_0402_16V4Z

1

2

R633 0_0402_5% VGA@1 2

R604 0_0402_5% VGA@1 2

R601 0_0402_5% VGA@1 2

C417 470P_0402_50V7K 1 2

R1196 0_0402_5%UMA@ 1 2

R6620_0402_5%

12

D8

CH751H-40PT_SOD323-2 VGA@

2 1

R13

710

0_06

03_1

%

12

R20 10_0402_5%@12

R21

4.7K_0402_5%

12

R13

810

K_04

02_5

%

@

12

D25CH751H-40_SC76@

21

JIVT1

MOLEX_53780-0790CONN@

1234567

R508 0_0402_5%UMA@ 1 2

R597 0_0402_5%UMA@ 1 2

C43

4.7U_0805_10V4Z

1

2

C361U_0603_10V4Z@

1

2

R570 0_0402_5%UMA@ 1 2

R634 0_0402_5% VGA@1 2

R6550_0402_5%UMA@

12

G

D

S

Q72N7002LT1G_SOT23

2

13

R6510_0402_5%VGA@

12

JLVDS1

ACES_88242-3001CONN@

2525

8 8

24 24

4 4

2121

18 1816 16

7799 10 10

33

2929

2323

15151717

55

2727 26 26

20 20

14 141111 12 12

6 6

11 2 2

1919

28 2830 30

1313

22 22

GND131GND232

R595 0_0402_5%UMA@ 1 2

R6522.2K_0402_5%VGA@

R510 0_0402_5%UMA@ 1 2

G

D

S

Q9

BSS138_NL_SOT23

2

13

Page 17: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VGA_DDC_DATA_C

CRT_HSYNC

VGA_DDC_CLK_C

VGA_DDC_DATA_C

VGA_DDC_CLK_CCRT_HSYNC_B

CRT_VSYNC_B D_CRT_VSYNC

D_CRT_HSYNC

CRT_VSYNC

CRT_B_C

HSYNC_L

CRT_G_C

CRT_R_C

VSYNC_L

CRT_R_L

CRT_B_L

CRT_G_LCRT_G9

CRT_R93VDDCDA 9

CRT_VSYNC9

CRT_HSYNC9

CRT_B9

VGA_CRT_G33

VGA_CRT_R33

3VDDCCL 9

VGA_DDCDATA 33

VGA_VSYNC33

VGA_HSYNC33

VGA_CRT_B33

VGA_DDCCLK 33

MSEN#29

+CRT_VCC

+CRT_VCC

+5VS

+CRT_VCC +3VS

+CRT_VCC

+3VS+CRT_VCC +3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

LA-4841P 1.0

<Title>

Custom

17 45Monday, December 15, 2008

Close to GMCH

For EMI

Close to VGA

DDC_MD2

W=40milsW=40milsC R T原本為4.7K 原本為10K

R375 0_0402_5%

UMA@12

C25

100P

_040

2_50

V8J

1

2

L21BK1608LL121-T 0603

1 2

C43

6

0.1U

_040

2_16

V4Z

@

1

2

R325 0_0603_5%

1 2C435

100P

_040

2_50

V8J

1

2

C433 0.1U_0402_16V4Z1 2

R77

2.2K

_040

2_5%

12

U674AHCT1G125GW_SOT353-5

A2 Y 4OE

#1

G3

P5

C397

15P_

0402

_50V

8J

1

2

JCRT1

SUYIN_070549FR015S208CRCONN@

61117

1228

1339

144

10155

1617

C28

4.7P_0402_50V8C

1

2

D20DAN217_SC59@

2 31

D27DAN217_SC59@

2 31

C26 0.1U_0402_16V4Z1 2

R78 0_0402_5%

VGA@12

C431

22P_

0402

_50V

8J

@1

2C3

4.7P_0402_50V8C

1

2

R125 0_0402_5%

VGA@12

C4

100P

_040

2_50

V8J1

2

R107

2.2K

_040

2_5%

12

R36

715

0_04

02_1

%

12

R84 0_0402_5%

UMA@12

D52

RB411DT146 SOT23

2 1

C399

15P_

0402

_50V

8J

1

2

C27

4.7P_0402_50V8C

1

2

R123 30_0402_5%

UMA@1 2

L25BK1608LL121-T 0603

1 2

R36

615

0_04

02_1

%

12

R103

2K_0

402_

5%1

2

C430

22P_

0402

_50V

8J

@1

2

C24

100P

_040

2_50

V8J1

2

R126 0_0402_5%

UMA@12

R63 0_0402_5%

VGA@12

R326 0_0603_5%

1 2

R368 10K_0402_5%12

L20BK1608LL121-T 0603

1 2

R392 0_0402_5%

VGA@12

R376 0_0402_5%

UMA@12

U574AHCT1G125GW_SOT353-5A2 Y 4O

E#

1G

3P

5R393 0_0402_5%

VGA@12

R108

2.2K

_040

2_5%

12

R374 0_0402_5%

UMA@12

G

D S

Q3BSS138_NL_SOT23

2

1 3

R6

2K_0

402_

5%1

2

R127 0_0402_5%

VGA@12

C60.1U_0402_16V4Z

1

2

D22DAN217_SC59@2 3

1

C432

22P_

0402

_50V

8J

@1

2

R98 0_0402_5%

VGA@12

R124 30_0402_5%

UMA@ 1 2

R36

415

0_04

02_1

%

12

G

D S

Q5BSS138_NL_SOT23

2

1 3

Page 18: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SPI_CS1#_R

PCI_GNT3#

PCI_PIRQA#PCI_PIRQB#

PCI_PIRQD#PCI_PIRQC# PCI_PIRQG#

PCI_PIRQE#

PCI_PLTRST#

PCI_SERR#

PCI_REQ3#

PCI_REQ1#

PCI_REQ2#

PCI_FRAME#PCI_TRDY#

PCI_DEVSEL#

PCI_STOP#

PCI_IRDY#

PCI_PERR#PCI_PLOCK#

PCI_GNT0#

PCI_PCIRST#

PCI_REQ0#

PCI_GNT3#

PCI_PIRQE#

PCI_PIRQG#

PCI_PIRQH#

PCI_REQ2#

PCI_REQ3#

PCI_PIRQD#

PCI_DEVSEL#

PCI_TRDY#

PCI_FRAME#

PCI_STOP#

PCI_PLOCK#

PCI_IRDY#

PCI_PERR#

PCI_SERR#

PCI_PIRQA#

PCI_PIRQC#

PCI_PIRQB#

PCI_REQ0#

PCI_REQ1#

PCI_PIRQF#

PCI_PIRQH#

PCI_PIRQF#

PCI_GNT0#

PCI_CLK

PCI_AD5

PCI_AD1PCI_AD0

PCI_AD3

PCI_AD7

PCI_AD12

PCI_AD2

PCI_AD6

PCI_AD8

PCI_AD4

PCI_AD13

PCI_AD11

PCI_AD20

PCI_AD9PCI_AD10

PCI_AD21

PCI_AD15

PCI_AD17

PCI_AD14

PCI_AD19

PCI_AD22

PCI_AD18

PCI_AD23

PCI_AD27

PCI_AD16

PCI_AD30

PCI_AD25PCI_AD24

PCI_AD26

PCI_AD31

PCI_AD28PCI_AD29

PLT_RST#PCI_PLTRST#

PCI_PCIRST#

PCI_CBE#2PCI_CBE#3

PCI_CBE#0PCI_CBE#1

PCI_PAR

PCI_CLK

SPI_CS1#_R20

PCI_CLK 15

PCI_AD[0..31]27

PCI_REQ0# 27PCI_GNT0# 27

PCI_PIRQG# 27

EC_PME# 20,29

PLT_RST# 7,22,24,28,29,33

PCI_RST# 27

PCI_CBE#0 27PCI_CBE#1 27PCI_CBE#2 27PCI_CBE#3 27

PCI_PAR 27

PCI_DEVSEL# 27

PCI_IRDY# 27

PCI_FRAME# 27PCI_TRDY# 27PCI_STOP# 27

+3VS

+3VS

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

ICH9(1/4)-PCI/INT

18 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

0

1

1

Boot BIOS Location

PCI

PCI_GNT0# SPI_CS#1

0

1

Boot BIOS Strap

*LPC

SPI

A16 swap override Strap

PCI_GNT3#Low= A16 swap override EnbleHigh= Default*

1

R1051 8.2K_0402_5%1 2

R1045 8.2K_0402_5%

1 2

R1037 8.2K_0402_5%

1 2

R1058

1K_0402_5%

@1 2

R1043 8.2K_0402_5%1 2

R1056100K_0402_5%

12

R1039 8.2K_0402_5%

1 2

R1046 8.2K_0402_5%

1 2

R1055

1K_0402_5%

@1 2

R10570_0402_5%

12

R10610_0402_5%

12

R1040 8.2K_0402_5%

1 2

R1060

1K_0402_5%

@1 2

R1052 8.2K_0402_5%1 2

R1042 8.2K_0402_5%

1 2

R1054 8.2K_0402_5%1 2

R1035 8.2K_0402_5%

1 2

R1044 8.2K_0402_5%

1 2

C2

22P_0402_50V8J

@12

PCI

Interrupt I/F

U56B

ICH9M REV 1.0

AD0D11AD1C8AD2D9AD3E12AD4E9AD5C9AD6E10AD7B7AD8C7AD9C5AD10G11AD11F8AD12F11AD13E7AD14A3AD15D2AD16F10AD17D5AD18D10AD19B3AD20F7AD21C3AD22F3AD23F4AD24C1AD25G7AD26H7AD27D1AD28G5AD29H6AD30G1AD31H3

REQ0# F1GNT0# G4

REQ1#/GPIO50 B6GNT1#/GPIO51 A7REQ2#/GPIO52 F13GNT2#/GPIO53 F12REQ3#/GPIO54 E6GNT3#/GPIO55 F6

C/BE0# D8C/BE1# B4C/BE2# D6C/BE3# A5

IRDY# D3PAR E3

PCIRST# R1DEVSEL# C6

PERR# E4PLOCK# C2

SERR# J4STOP# A4TRDY# F5

FRAME# D7

PLTRST# C14PCICLK D4

PME# R2

PIRQA#J5PIRQB#E1PIRQC#J6PIRQD#C4 PIRQH#/GPIO5 G2PIRQG#/GPIO4 F2PIRQF#/GPIO3 K6PIRQE#/GPIO2 H4

R1053 8.2K_0402_5%1 2

R1047 8.2K_0402_5%

1 2

R1050 8.2K_0402_5%

12

R1041 8.2K_0402_5%

1 2

R1049 8.2K_0402_5%

1 2

R1038 8.2K_0402_5%

1 2

R1048 8.2K_0402_5%

1 2

R10 33_0402_5%@1 2

R1036 8.2K_0402_5%

1 2

R1059100K_0402_5%

12

U58

MC74VHC1G08DFT2G SC70 5P

@

B2

A1 Y 4

P5

G3

Page 19: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KB_RST#

GATEA20

ICH_RTCX1

ICH_INTVRMENLAN100_SLP

ACZ_SDOUT

ICH_RTCX2

H_INIT#

H_IGNNE#

H_INTR

H_NMI

H_STPCLK#

H_DPRSTP#H_DPRSTP_R#

H_SMI#

R_H_FERR#

H_PWRGOOD

THRMTRIP_ICH#

KB_RST#

LPC_AD0

LPC_AD3LPC_AD2

LPC_FRAME#

GATEA20H_A20M#

LPC_AD1

H_DPSLP#

ICH_RSVD

ICH_INTVRMEN

H_FERR#

SM_INTRUDER#

PSATA_ITX_DRX_N0_CPSATA_ITX_DRX_P0_C

PSATA_ITX_DRX_N0PSATA_ITX_DRX_P0

ADC_ACZ_SDIN0

GLAN_COMP

HDA_BITCLKHDA_SYNC

HDARST#

HDA_SDOUT

ODD_ITX_DRX_N0_CODD_ITX_DRX_N0ODD_ITX_DRX_P0_CODD_ITX_DRX_P0

ICH_RTCX1

ICH_RTCX2

LPC_DRQ0#

LAN100_SLP

SM_INTRUDER#

ICH_RTCRST#SRTCRST#

HDA_BITCLKHDA_BITCLK_AUDIO_R

HDA_SYNC

HDARST#

HDA_SDOUT

HDA_SDIN1

CLK_PCIE_SATACLK_PCIE_SATA#

Z401

2

HDA_BITCLK_MDC_R

H_DPSLP# 5H_DPRSTP# 5,7,43

H_FERR# 4

H_PWRGOOD 5

H_IGNNE# 4

H_INIT# 4

H_NMI 4H_SMI# 4

H_STPCLK# 4

H_THERMTRIP# 4,7

LPC_AD[0..3] 24,29

LPC_FRAME# 24,29

H_A20M# 4GATEA20 29

H_INTR 4KB_RST# 29

ICH_RSVD 20

PSATA_IRX_DTX_P0_C23

PSATA_ITX_DRX_P023

PSATA_IRX_DTX_N0_C23

PSATA_ITX_DRX_N023

ADC_ACZ_SDIN025

ODD_IRX_DTX_P0_C23

ODD_ITX_DRX_P023

ODD_IRX_DTX_N0_C23

ODD_ITX_DRX_N023

HDA_SYNC_MDC28

ACZ_SYNC25

ACZ_RST#25

HDA_RST_MDC#28

ACZ_SDOUT25

HDA_SDOUT_MDC28

HDA_BITCLK_MDC28

ACZ_BITCLK25

HDA_SDIN128

CLK_PCIE_SATA# 15CLK_PCIE_SATA 15

+3VS

+3VS

+VCCP

+RTCVCC

+VCCP

+1.5VS

+RTCVCC

+COINCELL

+RTCVCC

RTCVREF

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

ICH9(2/4)_LAN,HD,IDE,LPCCustom

19 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

XOR CHAIN ENTRANCE STRAP:RSVD

placed within 2" fromICH8M

within 2" from R1557

3/28 add 56ohm

HDD

Within 500 milsODD

PLACE UNDER OPNE DOOR

modify_11/12

D55BAT54CW_SOT323~D

27.4

32

1

R1078 54.9_0402_1%1 2

C12150.01U_0402_50V7K

1 2

R317 33_0402_5%

1 2

C1210

1U_0603_10V4Z

1

2

R1069

10M_0402_5%

1 2

C1211

4.7P_0402_50V8J

1

2

C1220

1U_0603_10V4Z

1

2

R307 33_0402_5% 1 2

R1064 330K_0402_1%1 2

R1063

10K_0402_5%1 2

C12160.01U_0402_50V7K

1 2

R107556_0402_5%

12

R316 33_0402_5%

1 2

R1068 20K_0402_5%1 2

R306 33_0402_5% 1 2

T122 PAD

Y8

32.768KHZ_12.5P_MC-146

1 4

2 3

R1073 24.9_0402_1% 1 2

JOPEN1@1

2

T121 PAD

R315 33_0402_5%

1 2

R1109 20K_0402_5%1 2

R312 33_0402_5% 1 2

R1065 330K_0402_1%1 2

RTC

LAN / GLAN

IHDA

SATA

LPC

CPU

U56A

ICH9M REV 1.0

RTCX1C23RTCX2C24

INTVRMENB22

INTRUDER#C22

GLAN_CLKE25

LAN_RSTSYNCC13

LAN_RXD0F14LAN_RXD1G13LAN_RXD2D14

LAN_TXD0D13LAN_TXD1D12LAN_TXD2E13

HDA_BIT_CLKAF6HDA_SYNCAH4

HDA_RST#AE7

HDA_SDIN0AF4HDA_SDIN1AG4HDA_SDIN2AH3

HDA_SDOUTAG5

SATALED#AG8

SATA0RXNAJ16SATA0RXPAH16SATA0TXNAF17SATA0TXPAG17

SATA1RXNAH13SATA1RXPAJ13SATA1TXNAG14SATA1TXPAF14

SATA_CLKN AH18SATA_CLKP AJ18

SATARBIAS# AJ7SATARBIAS AH7

FWH0/LAD0 K5FWH1/LAD1 K4FWH2/LAD2 L6FWH3/LAD3 K2

LDRQ0# J3LDRQ1#/GPIO23 J1

FWH4/LFRAME# K3

A20GATE N7A20M# AJ27

DPRSTP# AJ25DPSLP# AE23

FERR# AJ26

CPUPWRGD AD22

IGNNE# AF25

INIT# AE22INTR AG25

RCIN# L3

SMI# AF24NMI AF23

STPCLK# AH27

THRMTRIP# AG26

RTCRST#A25

GPIO56B10

GLAN_COMPOB27 GLAN_COMPIB28

HDA_SDIN3AE5

SATA4TXN AG12

SATA4RXN AH11

SATA4TXP AF12

SATA4RXP AJ11

TP12 AG27

HDA_DOCK_EN#/GPIO33AG7HDA_DOCK_RST#/GPIO34AE8

LAN100_SLPA22

SATA5RXN AH9SATA5RXP AJ9SATA5TXN AE10SATA5TXP AF10

SRTCRST#F20

R107056_0402_5%

12

R1066

10K_0402_5%1 2

R1062 1M_0402_5%1 2

R817 0_0402_5% 1 2

T123PAD

JOPEN2@1

2

C1212

4.7P_0402_50V8J

1

2

R1130 33_0402_5%@

1 2

C14511U_0603_10V4Z~D

1

2

R1081

24.9_0402_1%

1 2

R818 0_0402_5% @1 2

C1214

0.01U_0402_50V7K

1 2

R10710_0402_5%

1 2

R1083

1K_0402_5%

@1 2

R12341K_0402_5%~D

12

T124PAD

R107256_0402_5%

1 2

C12130.01U_0402_50V7K

1 2

R1082

1K_0402_5%

@1 2

R119833_0402_5%

1 2

Page 20: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_LOW_BAT#

CL_RST#1

CL_RST#1

ICH_RI#

CLK_14M_ICHCLK_48M_ICH

USB_OC#4

USB_OC#1USB_OC#2

EC_SWI#

USB_OC#8USB_OC#7

USB_OC#3USB_OC#5

ICH_PCIE_WAKE#

ME_EC_DATA1ME_EC_CLK1

CL_VREF0_ICH

DMI_IRCOMP

USB_OC#10USB_OC#11

ICH_SMBCLKICH_SMBDATA

ME_EC_DATA1

ME_EC_CLK1

XDP_DBRESET#

CL_RST#

USB_OC#9USB_OC#0

GPIO37

CLK_48M_ICHCLK_14M_ICH

ICH_SUSCLK

SLP_S4#SLP_S5#

SLP_S3#

PWRBTN_OUT#

ICH_LOW_BAT#

M_PWROK

CK_PWRGD_R

CL_CLK0

CL_DATA0

XDP_DBRESET#

PM_BMBUSY#

SUS_STAT#

ICH_RI#

EC_LID_OUT#

H_STP_PCI#R_STP_CPU#

ICH_PCIE_WAKE#SERIRQEC_THERM#

PCI_CLKRUN#

OCP#

MCH_ICH_SYNC#

CLKSATAREQ#

ICH_RSVD

EC_SMI#

EC_SCI#

EC_SMI#

GPIO36GPIO19

R_EC_RSMRST#GPIO49

DMI_TXN2

DMI_RXN1

USB_OC#8

USB_OC#0

DMI_TXN3

DMI_TXP2

DMI_RXP1

DMI_TXN0

CLK_PCIE_ICH

EC_THERM#

DMI_TXN1

USB_OC#4

DMI_TXP1

DMI_RXP0

SERIRQ

USBRBIAS

USB_OC#7

CLK_PCIE_ICH#

PM_BMBUSY#

PCI_CLKRUN#

EC_SWI#

USB_OC#3

USB_OC#11

DMI_RXN3

DMI_TXP0

USB_OC#2

DMI_RXP3

USB_OC#10

USB_OC#5

DMI_RXN2

DMI_RXN0

DMI_TXP3

DMI_RXP2

USB_OC#9

USB_OC#1

CLKSATAREQ#

USB20_N7

USB20_N1

USB20_P9

USB20_P7

USB20_P2

USB20_P6

USB20_N2

USB20_P0

USB20_P5

USB20_N3

USB20_N9

USB20_P4

USB20_N6

USB20_N5

USB20_P8

USB20_N0

USB20_P1

USB20_N8

USB20_N4USB20_P3

PCIE_C_TXP3

PCIE_RXN3

PCIE_C_TXN3PCIE_RXP3

GLAN_TXP_CGLAN_TXN_CGLAN_RXPGLAN_RXN

PCIE_C_TXP4

PCIE_RXN4

PCIE_C_TXN4PCIE_RXP4

VRMPWRGD

EC_SCI#

SB_SPKR

ICH_SMBDATA

ICH_SMBCLK

OCP#

GPIO21

SB_SPKR

GPIO49

EC_LID_OUT#

USB20_P10USB20_N10

CLGPIO5

CLGPIO5

ISOLATEB

ICH_PWROKM_PWROK

R_EC_RSMRST#

R_EC_RSMRST#

PCIE_C_TXP5

PCIE_RXN5

PCIE_C_TXN5PCIE_RXP5

SPI_CS1#_R

ICH_PCIE_WAKE_R_ECARD# ICH_PCIE_WAKE#

LANWAKE_R_ICH_WAKE#

WL_WAKE_R_ICH_WAKE# EC_PME#

DMI_RXP0 7DMI_RXN0 7

DMI_TXP0 7DMI_TXN0 7

CLK_PCIE_ICH# 15CLK_PCIE_ICH 15

DMI_RXP1 7DMI_RXN1 7

DMI_TXP1 7DMI_TXN1 7

DMI_RXP2 7DMI_RXN2 7

DMI_TXP2 7DMI_TXN2 7

DMI_RXP3 7DMI_RXN3 7

DMI_TXP3 7DMI_TXN3 7

ICH_SMBCLK24,28ICH_SMBDATA24,28

CL_RST# 7

CLK_48M_ICH 15CLK_14M_ICH 15

SLP_S3# 29

SLP_S5# 29SLP_S4# 29

ICH_PWROK 7,29

PBTN_OUT# 29

M_PWROK 7

CK_PWRGD 15

CL_CLK0 7

CL_DATA0 7

XDP_DBRESET#4

PM_BMBUSY#7

EC_LID_OUT#29

H_STP_PCI#15H_STP_CPU#15

SERIRQ29EC_THERM#29

VGATE7,29,43

MCH_ICH_SYNC#7SB_SPKR26

ICH_RSVD19

EC_SMI#29

CLKSATAREQ#15

OCP#4

USB_OC#031USB_OC#131USB_OC#231USB_OC#331

USB20_N9 31

USB20_P7 28

USB20_N5 31

USB20_N8 31

USB20_N2 31

USB20_N3 24USB20_P3 24

USB20_N6 24USB20_P6 24

USB20_N1 31USB20_P1 31

USB20_P8 31

USB20_P9 31

USB20_P2 31

USB20_P4 31USB20_N4 31

USB20_P5 31

USB20_P0 31USB20_N0 31

USB20_N7 28

EC_SWI#29

PCI_CLKRUN#27,29

EC_SCI#29

ICH_SM_CLK13,14,15,24

ICH_SM_DA13,14,15,24

DPRSLPVR 7,43

ICH_SMBDATA 24,28

ICH_SMBCLK 24,28

USB20_N10USB20_P10

ISOLATEB22

POK 39

EC_RSMRST#29

PCIE_TXN428PCIE_RXP428PCIE_RXN428

PCIE_TXP428

GLAN_RXN22GLAN_RXP22

GLAN_TXP22GLAN_TXN22

PCIE_RXN324

PCIE_TXN324PCIE_TXP324

PCIE_RXP324

PCIE_TXN524PCIE_RXP524PCIE_RXN524

PCIE_TXP524

SPI_CS1#_R18

ACIN 29,37,38

ICH_PCIE_WAKE_R_ECARD#22,24,28

LANWAKE_R_ICH_WAKE#22,24,28

WL_WAKE_R_ICH_WAKE#22,24,28 EC_PME# 18,29

+3VALW

+3VALW

+1.5VS

+3VS

+3VALW+3VS

+5VS

+3VS

+3VS

+3VS

+3VS

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

ICH9(3/4)_DMI,USB,GPIO,PCIECustom

20 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

Place closely pin H1Place closely pin AF3

Within 500 mils

0612 Change GPIO pin assignment0825 Change GPIO pin assignment

NA lead free

Within 500 mils

checklist pull hi

WLANExpress Card

BlueTooth

Camera

USB3

USB0

USB2

FingerPrinter

USB1

3G/TV

ICH8 don't have

low-->default

High -->No boot

Mini Card2

RSMRST circuit

Express Card

GLAN

WLAN

3G

R10980_0402_5%1 2

C12280.1U_0402_16V7K~N 12

T125PAD

R1086 8.2K_0402_5%1 2

C1217

4.7P_0402_50V8C

@ 1

2

D54

RB411DT146 SOT23

@2 1

R1085 2.2K_0402_5%1 2

T128PAD

C12240.1U_0402_16V7K~N 12

R1101 10K_0402_5%@1 2

R1099 0_0402_5%1 2

C12230.1U_0402_16V7K~N 12

RP39

10K_1206_8P4R_5%

1 82 73 64 5

R1107453_0402_1%

12

RP41

10K_1206_8P4R_5%

1 82 73 64 5

R11030_0402_5%

1 2

SATA

SMB

SYS

GPIO

GPIO

GPIO

Clocks

Power MGT

Controller Link

MISC

U56C

ICH9M REV 1.0

SATA0GP/GPIO21 AH23SATA1GP/GPIO19 AF19SATA4GP/GPIO36 AE21SATA5GP/GPIO37 AD20

SMBCLKG16SMBDATAA13LINKALERT#/GPIO60/CLGPIO4E17SMLINK0C17SMLINK1B18

SUS_STAT#/LPCPD#R4SYS_RESET#G19

PMSYNC#/GPIO0M6

GPIO1AG19GPIO6AH21GPIO7AG21GPIO8A21GPIO12C12

SMBALERT#/GPIO11A17

GPIO17AE18GPIO18K1

SCLOCK/GPIO22AJ22

SATACLKREQ#/GPIO35L1

STP_PCI#A14STP_CPU#E19

SLOAD/GPIO38AE19SDATAOUT0/GPIO39AG22

CLKRUN#L4

SDATAOUT1/GPIO48AF21

WAKE#E20SERIRQM5THRM#AJ23

VRMPWRGDD21

CLK14 H1CLK48 AF3

SUSCLK P1

SLP_S3# C16SLP_S4# E16SLP_S5# G17

PWROK G20

DPRSLPVR/GPIO16 M2

BATLOW# B13

PWRBTN# R3

LAN_RST# D20

RSMRST# D22

RI#F19

S4_STATE#/GPIO26 C10

GPIO27A9GPIO28D19

TP11A20

CK_PWRGD R5

CLPWROK R6

SLP_M# B16

GPIO20AF8

CL_CLK0 F24CL_CLK1 B19

CL_DATA0 F22CL_DATA1 C19

CL_VREF0 C25CL_VREF1 A19

CL_RST0# F21

GPIO10/SUS_PWR_ACK C18

WOL_EN/GPIO9 C20GPIO14/AC_PRESENT C11

MEM_LED/GPIO24 A16SPKRM7

TP3B21

CL_RST1# D18GPIO49AH24

GPIO13C21

GPIO57/CLGPIO5A8

TP10AJ21

TP8AH20

MCH_SYNC#AJ24

TP9AJ20

R1094 8.2K_0402_5%@ 1 2

T129 PAD

R1092

10_0402_5%

@12

R1091

10_0402_5%

@ 12

C12220.1U_0402_16V7K~N 12

R1106

3.24K_0402_1%1 2

R1100 0_0402_5%1 2

R1097 10K_0402_5%@1 2

C12260.1U_0402_16V7K~N 12

R1087 2.2K_0402_5%1 2

R1088 8.2K_0402_5%@1 2

T130PAD

R695 100_0402_5%1 2

R1105 0_0402_5%1 2

R11242.2K_0402_5%1

2

R1115 10K_0402_5%1 2

G

DS

Q106SSM3K7002FU_SC70-3

2

13

R1090 10K_0402_5%1 2

C12210.1U_0402_16V7K~N 12

T126 PAD

R1108 10K_0402_5%1 2

R1089 8.2K_0402_5%1 2

RP40

10K_1206_8P4R_5%

1 82 73 64 5

R1118 10K_0402_5%@

1 2

R1102 100K_0402_5%@

1 2

R6560_0402_5%

@

1 2

C12250.1U_0402_16V7K~N 12

R1096 10K_0402_5% @1 2

R1117 10K_0402_5%1 2

R1120 24.9_0402_1%1 2

T134PAD

R1104 10K_0402_5%1 2

T132PAD

R1093 10K_0402_5%1 2

R1230 0_0402_5%@

1 2

R1229 0_0402_5%1 2

T133PAD

R11232.2K_0402_5%

12

C1218

4.7P_0402_50V8C

@1

2

R1163 10K_0402_5%1 2

C1219

0.1U_0402_16V4Z

1

2

G

DS

Q107SSM3K7002FU_SC70-3

2

13

R1084 10K_0402_5%1 2

R112522.6_0402_1%

12

R1095 8.2K_0402_5%1 2

C12270.1U_0402_16V7K~N 12

R1111 1K_0402_5%1 2

T127 PAD

R1116 10K_0402_5%1 2

R1113 10K_0402_5%1 2

T135PAD

R1119 8.2K_0402_5%1 2

R1114 10K_0402_5%1 2

R1110 8.2K_0402_5%1 2

PCI-Express

Direct Media Interface

USB

SPI

U56D

ICH9M REV 1.0

PERN1N29PERP1N28PETN1P27PETP1P26

PERN2L29PERP2L28PETN2M27PETP2M26

PERN3J29PERP3J28PETN3K27PETP3K26

PERN4G29PERP4G28PETN4H27PETP4H26

PERN5E29PERP5E28PETN5F27PETP5F26

PERN6/GLAN_RXNC29PERP6/GLAN_RXPC28PETN6/GLAN_TXND27PETP6/GLAN_TXPD26

DMI0RXN V27DMI0RXP V26DMI0TXN U29DMI0TXP U28

DMI1RXN Y27DMI1RXP Y26DMI1TXN W29DMI1TXP W28

DMI2RXN AB27DMI2RXP AB26DMI2TXN AA29DMI2TXP AA28

DMI3RXN AD27DMI3RXP AD26DMI3TXN AC29DMI3TXP AC28

DMI_CLKN T26DMI_CLKP T25

DMI_ZCOMP AF29DMI_IRCOMP AF28

OC0#/GPIO59N4OC1#/GPIO40N5OC2#/GPIO41N6OC3#/GPIO42P6OC4#/GPIO43M1OC5#/GPIO29N2OC6#/GPIO30M4OC7#/GPIO31M3

USBP0N AC5USBP0P AC4USBP1N AD3USBP1P AD2USBP2N AC1USBP2P AC2USBP3N AA5USBP3P AA4USBP4N AB2USBP4P AB3USBP5N AA1USBP5P AA2USBP6N W5USBP6P W4USBP7N Y3USBP7P Y2

USBRBIAS#AG1 USBRBIASAG2

SPI_CLKD23SPI_CS0#D24SPI_CS1#/GPIO58/CLGPIO6F23

SPI_MOSID25SPI_MISOE23

OC8#/GPIO44N3OC9#/GPIO45N1

USBP8P W2USBP8N W1

USBP9N V2USBP9P V3

USBP10N U5

USBP11N U1USBP10P U4

USBP11P U2

OC10#/GPIO46P5OC11#/GPIO47P3

Page 21: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_V5REF_RUN

ICH_V5REF_RUN

ICH_V5REF_SUS

VCCSUS1_5_ICH_1

VCCSUS1_5_ICH_2

VCCCL1_05_ICH

VCC_LAN1_05_INT_ICH_2VCC_LAN1_05_INT_ICH_1

ICH_V5REF_SUS

+RTCVCC

+1.5VS

+LAN_IO

+1.5VS

+5VS +3VS

+3VALW+5VALW

+1.5VS

+3VALW

+VCCP

+LAN_IO

+1.5VS

+1.5VS

+1.5VS

+1.5VS

+3VS

+1.5VS

+1.5VS

+VCCP

+3VS

+3VS

+3VALW

+3VALW

+3VS

+3VS

+3VS

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

ICH9(4/4)_POWER&GNDCustom

21 45Monday, December 15, 2008

2006/02/13 2006/03/10Compal Electronics, Inc.

20 mils

20 mils

20 mils

1634mA

2mA

G3: 6uA

646mA

2mA

47mA

1342mA

11mA

1mA

19/73/73mA

19/78/78mA

212mA

11mA

11mA

308mA

23mA

48mA

2mA

11mA

40 mils

23mA

80mA

(DMI)

0.1U Change to 1U

Add 0.1uF

0ohm Change to BEAD

5ohm@100MHz

L9910UH_LB2012T100MR_20%_0805~D

1 2

C1262

0.1U_0402_16V4Z

1

2

R1127100_0402_5%~D

12

C1250

0.1U_0402_16V4Z

1

2

C1258

1U_0603_10V4Z

1

2C

1246

0.1U_0402_16V4Z

1

2

C1233

0.1U_0402_16V4Z1

2

C1270

2.2U

_060

3_6.

3V4Z

1

2

C13061U_0603_10V6K~D

1

2

L96

BLM21PG600SN1D_0805~D1 2

+

C12

3422

0U_D

2_4V

M

1

2

C1232

0.1U_0402_16V4Z1

2

C123910U_0805_10V4Z

1

2

T140

C1269

10U

_080

5_10

V4Z

1

2

C1257

0.1U_0402_16V4Z

1

2

C1259

0.1U_0402_16V4Z~D

1

2

C1248

0.1U_0402_16V4Z

1

2

C1261

0.022U_0402_16V7K~D

1

2

L97BLM18PG181SN1_0603~D

1 2

C1264

0.1U_0402_16V4Z

1

2

C12411U_0603_10V6K~D

1

2

C1245

0.1U_0402_16V4Z 1

2

L98BLM18PG181SN1_0603~D

1 2

C12670.1U_0402_16V4Z~D

1 2

C1244

0.1U_0402_16V4Z

1

2

U56E

ICH9M REV 1.0

VSS[1]AA26VSS[2]AA27VSS[3]AA3VSS[4]AA6VSS[5]AB1VSS[6]AA23VSS[7]AB28VSS[8]AB29VSS[9]AB4VSS[10]AB5VSS[11]AC17VSS[12]AC26VSS[13]AC27VSS[14]AC3VSS[15]AD1VSS[16]AD10VSS[17]AD12VSS[18]AD13VSS[19]AD14VSS[20]AD17VSS[21]AD18VSS[22]AD21VSS[23]AD28VSS[24]AD29VSS[25]AD4VSS[26]AD5VSS[27]AD6VSS[28]AD7VSS[29]AD9VSS[30]AE12VSS[31]AE13VSS[32]AE14VSS[33]AE16VSS[34]AE17VSS[35]AE2VSS[36]AE20VSS[37]AE24VSS[38]AE3VSS[39]AE4VSS[40]AE6VSS[41]AE9VSS[42]AF13VSS[43]AF16VSS[44]AF18VSS[45]AF22VSS[46]AH26VSS[47]AF26VSS[48]AF27VSS[49]AF5VSS[50]AF7VSS[51]AF9VSS[52]AG13VSS[53]AG16VSS[54]AG18VSS[55]AG20VSS[56]AG23VSS[57]AG3VSS[58]AG6VSS[59]AG9VSS[60]AH12VSS[61]AH14VSS[62]AH17VSS[63]AH19VSS[64]AH2VSS[65]AH22VSS[66]AH25VSS[67]AH28VSS[68]AH5VSS[69]AH8VSS[70]AJ12VSS[71]AJ14VSS[72]AJ17VSS[73]AJ8VSS[74]B11VSS[75]B14VSS[76]B17VSS[77]B2VSS[78]B20VSS[79]B23VSS[80]B5VSS[81]B8VSS[82]C26VSS[83]C27VSS[84]E11VSS[85]E14VSS[86]E18VSS[87]E2VSS[88]E21VSS[89]E24VSS[90]E5VSS[91]E8VSS[92]F16VSS[93]F28VSS[94]F29VSS[95]G12VSS[96]G14VSS[97]G18

VSS[99]G24VSS[100]G26VSS[101]G27VSS[102]G8VSS[103]H2VSS[104]H23VSS[105]H28VSS[106]H29

VSS[107] H5VSS[108] J23VSS[109] J26VSS[110] J27VSS[111] AC22VSS[112] K28VSS[113] K29VSS[114] L13VSS[115] L15VSS[116] L2VSS[117] L26VSS[118] L27VSS[119] L5VSS[120] L7VSS[121] M12VSS[122] M13VSS[123] M14VSS[124] M15VSS[125] M16VSS[126] M17VSS[127] M23VSS[128] M28VSS[129] M29VSS[130] N11VSS[131] N12VSS[132] N13VSS[133] N14VSS[134] N15VSS[135] N16VSS[136] N17VSS[137] N18VSS[138] N26VSS[139] N27VSS[140] P12VSS[141] P13VSS[142] P14VSS[143] P15VSS[144] P16VSS[145] P17VSS[146] P2VSS[147] P23VSS[148] P28VSS[149] P29VSS[150] P4VSS[151] P7VSS[152] R11VSS[153] R12VSS[154] R13VSS[155] R14VSS[156] R15VSS[157] R16VSS[158] R17VSS[159] R18VSS[160] R28VSS[161] T12VSS[162] T13VSS[163] T14VSS[164] T15VSS[165] T16VSS[166] T17VSS[167] T23

VSS[169] U12VSS[170] U13VSS[171] U14VSS[172] U15VSS[173] U16VSS[174] U17VSS[175] AD23VSS[176] U26VSS[177] U27VSS[178] U3

VSS_NCTF[1] A1VSS_NCTF[2] A2VSS_NCTF[3] A28VSS_NCTF[4] A29VSS_NCTF[5] AH1VSS_NCTF[6] AH29VSS_NCTF[7] AJ1VSS_NCTF[8] AJ2VSS_NCTF[9] AJ28

VSS_NCTF[10] AJ29VSS_NCTF[11] B1VSS_NCTF[12] B29

VSS[179] V1VSS[180] V13VSS[181] V15VSS[182] V23VSS[183] V28

VSS[98]G21

VSS[184] V29VSS[185] V4VSS[186] V5VSS[187] W26VSS[188] W27VSS[189] W3VSS[190] Y1VSS[191] Y28VSS[192] Y29VSS[193] Y4VSS[194] Y5VSS[195] AG28VSS[196] AH6VSS[197] AF2

VSS[168] B26

VSS[198] B25

C1252

0.1U_0402_16V4Z1

2

C1268

0.1U

_040

2_16

V4Z 1

2

C12

300.

1U_0

402_

16V4

Z

1

2

C1271

4.7U_0603_6.3V6M~D

1

2

C12

54

10U

_080

5_10

V4Z

1

2

T144

C1235

22U_0805_6.3V6M~D

1

2

C1265

1U_0603_10V4Z

@1

2

C1237

2.2U_0603_6.3V4Z

1

2

CORE

VCCA3GP

ATX

ARX

USB CORE

PCI

GLAN POWER

VCCP_CORE

VCCPSUS

VCCPUSB

U56F

ICH9M REV 1.0

V5REFA6

V5REF_SUSAE1

VCC1_5_B[1]AA24VCC1_5_B[2]AA25VCC1_5_B[3]AB24VCC1_5_B[4]AB25VCC1_5_B[5]AC24VCC1_5_B[6]AC25VCC1_5_B[7]AD24VCC1_5_B[8]AD25VCC1_5_B[9]AE25VCC1_5_B[10]AE26VCC1_5_B[11]AE27VCC1_5_B[12]AE28VCC1_5_B[13]AE29VCC1_5_B[14]F25VCC1_5_B[15]G25VCC1_5_B[16]H24VCC1_5_B[17]H25VCC1_5_B[18]J24VCC1_5_B[19]J25VCC1_5_B[20]K24VCC1_5_B[21]K25VCC1_5_B[22]L23VCC1_5_B[23]L24VCC1_5_B[24]L25VCC1_5_B[25]M24VCC1_5_B[26]M25VCC1_5_B[27]N23VCC1_5_B[28]N24VCC1_5_B[29]N25VCC1_5_B[30]P24VCC1_5_B[31]P25VCC1_5_B[32]R24VCC1_5_B[33]R25VCC1_5_B[34]R26VCC1_5_B[35]R27VCC1_5_B[36]T24VCC1_5_B[37]T27VCC1_5_B[38]T28VCC1_5_B[39]T29VCC1_5_B[40]U24

VCC3_3[1] AG29

VCCDMIPLL R29

VCC1_5_A[1]AC16VCC1_5_A[2]AD15VCC1_5_A[3]AD16VCC1_5_A[4]AE15VCC1_5_A[5]AF15

VCCSATAPLLAJ19

VCC3_3[2] AJ6

VCC1_5_A[9]AC11VCC1_5_A[10]AD11

VCCUSBPLLAJ5

VCCLAN1_05[1]A10VCCLAN1_05[2]A11

VCC1_05[1] A15VCC1_05[2] B15VCC1_05[3] C15VCC1_05[4] D15VCC1_05[5] E15VCC1_05[6] F15VCC1_05[7] L11VCC1_05[8] L12VCC1_05[9] L14

VCC1_05[10] L16VCC1_05[11] L17VCC1_05[12] L18VCC1_05[13] M11VCC1_05[14] M18VCC1_05[15] P11VCC1_05[16] P18VCC1_05[17] T11VCC1_05[18] T18VCC1_05[19] U11VCC1_05[20] U18

VCCLAN3_3[1]A12VCCLAN3_3[2]B12

VCCHDA AJ4

VCCSUSHDA AJ3

V_CPU_IO[1] AB23V_CPU_IO[2] AC23

VCC3_3[9] F9VCC3_3[10] G3VCC3_3[11] G6VCC3_3[12] J2VCC3_3[13] J7VCC3_3[14] K7

VCCRTCA23

VCCSUS3_3[1] A18VCCSUS3_3[2] D16VCCSUS3_3[3] D17VCCSUS3_3[4] E22

VCCSUS3_3[6] T1VCCSUS3_3[7] T2VCCSUS3_3[8] T3VCCSUS3_3[9] T4

VCCSUS3_3[10] T5VCCSUS3_3[11] T6VCCSUS3_3[12] U6VCCSUS3_3[13] U7VCCSUS3_3[14] V6VCCSUS3_3[15] V7VCCSUS3_3[16] W6VCCSUS3_3[17] W7

VCC1_5_A[13]AG10

VCCSUS1_05[1] AC8VCCSUS1_05[2] F17

VCC1_5_A[22]G9

VCC1_5_A[23]AC12VCC1_5_A[24]AC13VCC1_5_A[25]AC14

VCC1_5_A[26]AA7

VCCSUS3_3[5] AF1

VCC3_3[8] B9

VCC1_5_A[27]AB6

VCC1_05[22] V12

VCC1_05[25] V17

VCC1_05[23] V14

VCC1_05[21] V11

VCC1_05[26] V18

VCC1_05[24] V16

VCCGLAN1_5[4]E27

VCCGLAN1_5[2]D29VCCGLAN1_5[3]E26

VCCGLAN1_5[1]D28

VCCGLAN3_3A26

VCCGLANPLLA27

VCC3_3[3] AD19

VCCSUS3_3[18] Y6

VCCSUS1_5[1] AD8

VCCSUS1_5[2] F18

VCC_DMI[2] Y23VCC_DMI[1] W23

VCCCL1_05 G22

VCCCL3_3[2] B24VCCCL3_3[1] A24

VCCCL1_5 G23

VCC1_5_B[45]W24

VCC1_5_B[43]V25

VCC1_5_B[41]U25

VCC1_5_B[46]W25

VCC1_5_B[44]U23

VCC1_5_B[42]V24

VCC1_5_B[47]K23VCC1_5_B[48]Y24VCC1_5_B[49]Y25

VCC1_5_A[6]AG15VCC1_5_A[7]AH15VCC1_5_A[8]AJ15

VCC1_5_A[11]AE11VCC1_5_A[12]AF11

VCCSUS3_3[19] Y7

VCC3_3[4] AF20VCC3_3[5] AG24VCC3_3[6] AC20

VCC3_3[7] AC10

VCC1_5_A[20]AC21

VCC1_5_A[21]G10

VCC1_5_A[19]AC19 VCC1_5_A[18]AC18

VCC1_5_A[17]AC9

VCC1_5_A[16]AJ10 VCC1_5_A[15]AH10 VCC1_5_A[14]AG11

VCC1_5_A[28]AB7VCC1_5_A[29]AC6VCC1_5_A[30]AC7

VCCSUS3_3[20] T7

L1001UH_20%_0805~D

1 2

T141

C12

290.

1U_0

402_

16V4

Z

1

2

R1128100_0402_5%~D

12

C1243

0.1U_0402_16V4Z

1

2

C1249

0.1U_0402_16V4Z

1

2

D45

CH751H-40PT_SOD323-2

21

C1253

0.1U_0402_16V4Z1

2

D46

CH751H-40PT_SOD323-2

21

C1231

1U_0603_10V4Z~D

1

2

C1260

0.022U_0402_16V7K~D

1

2

C1263

0.1U_0402_16V4Z

1

2

C1266

0.1U_0402_16V4Z~D

@1

2

C12

55

1U_0

603_

10V4

Z

1

2 T143

C1238

0.01U_0402_16V7K

1

2

C1240

22U_0805_6.3VAM

1

2

C1242

4.7U_0603_6.3V6M

1

2

T142C1256

1U_0603_10V4Z

1

2

C1247

0.1U_0402_16V4Z 1

2

C1236

22U_0805_6.3V6M~D

1

2

R1129 0_0603_5%

1 2

Page 22: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_MDIP3

LAN_MDIP2LAN_MDIN1

LAN_MDIN2

LAN_MDIP1

LAN_MDIN3

LAN_MDIN0LAN_MDIP0

LAN_EEDIGLAN_RXP_C

GLAN_RXN_C

GLAN_TXN

GLAN_TXP

+LAN_VDD_L

LAN_AVDD33

LAN_XTAL1

LAN_XTAL2

+LAN_VDDSR

+3VALW_Q

EN_WOL

+LAN_VDDSR

LAN_DVDD12

V_DAC

V_DAC

V_DACLAN_MDIP2

LAN_MDIP0

V_DAC

LAN_AVDD12

GLAN_REQ#9

LAN_MDIN3LAN_MDIP3

LAN_MDIN2

LAN_MDIP1

LAN_LED3LAN_LED2LAN_LED1LAN_LED0

ISOLATEB

LAN_CABDT

LAN_LED2

LAN_LED3

LAN_LED3

LAN_LED1 LED1_LED3

LED2_LED3

RJ45_TX3+

RJ45_TX3-

RJ45_RX1+

RJ45_TX2-

RJ45_TX2+

RJ45_RX1-

RJ45_TX0-

RJ45_TX0+

LAN_ACTIVITY#LAN_LED0

LED1_LED3 LINK_100_1000#

LED2_LED3

LINK_100_1000#

RJ45_TX3+RJ45_TX3-

RJ45_RX1-RJ45_RX1+

RJ45_TX0-RJ45_TX0+

RJ45_TX2+RJ45_TX2-

LAN_MDIN0

LAN_MDIN1

LANWAKE#LANWAKE_R_ICH_WAKE#

CLK_PCIE_LAN#15

CLK_PCIE_LAN15

PLT_RST#7,18,24,28,29,33

LANWAKE_R_ICH_WAKE#20,24,28

EN_WOL# 29

GLAN_TXN20

GLAN_TXP20

GLAN_RXP20

GLAN_RXN20

GLAN_REQ#915

LAN_CABDT

ISOLATEB20

+LAN_IO

+LAN_VDD

+LAN_VDD

LAN_AVDD12

LAN_DVDD12

+LAN_IO

+LAN_IO+3VS

+LAN_IO

+LAN_IO+3VALW

B+_BIAS

+LAN_VDD

+LAN_VDDSR

LAN_AVDD12+LAN_VDD

LAN_DVDD12

LAN_AVDD12

+LAN_IO

LAN_DVDD12

+3VS +LAN_IO

+LAN_IO

+LAN_IO

+LAN_IO

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Broadcom BCM5787MCustom

22 45Monday, December 15, 2008

2007/1/15 2008/1/15Compal Electronics, Inc.

L92, C788, C778close to U28(Pin 1) <200mil

1.5A

60mil60mil

C792 close to U47(PIN63), then C783 close to C792

30mil

These caps close to U47: Pin 16, 37, 46, 53

W=60mils

These caps close to U47: Pin 8, 11, 14, 58

These caps close to U47: Pin 21, 32, 38, 43, 49, 52

W=40mils

W=40mils

S

GD

Q108

SI3456BDV-T1-E3_TSOP6

3

6

245

1

T51

350uH_GSL5009LF

TCT11TD1+2TD1-3TCT24TD2+5TD2-6TCT37TD3+8TD3-9TCT410TD4+11TD4-12

MCT1 24MX1+ 23MX1- 22

MCT2 21MX2+ 20MX2- 19

MCT3 18MX3+ 17MX3- 16

MCT4 15MX4+ 14MX4- 13

C1447

0.1U

_040

2_10

V7K~

N

1

2

R7 0_0402_5% 1 2

JLAN1

TYCO_3-440470-4CONN@

PR1-2

PR1+1

PR2+3

PR3+4

PR3-5

PR2-6

PR4+7

PR4-8

Green LED+9

Green LED-10

Amber LED-11

Amber LED+12

SHLD1 13

SHLD2 14

SHLD2 16

SHLD1 15

RP42

75_1206_8P4R_5%

18273645

R106220_0402_5%1 2

D4

CH751H-40PT_SOD323-2

21

R1200470K_0402_5%

12

C1415 0.01U_0402_16V7K1 2

R1201 1.5M_0402_5%@ 12

R12210_0603_5%

1 2

L22FBMA-L11-322513-201LMA40T_1210

1 2

R12030_0805_5%

12

U47

RTL8111C-GR_QFN64_9X9

PERSTB20

HSOP29

HSON30

HSIP23

HSIN24

REFCLK_P26

REFCLK_N27

MDIP2 9MDIN2 10MDIP3 12MDIN3 13

EEDO 45EEDI/AUX 47

EESK 48EECS 44

LED3 54LED2 55LED1 56LED0 57

MDIN1 7MDIP1 6MDIN0 4MDIP0 3

SROUT121

VDDSR 63

RSET64

LANWAKEB19

ISOLATEB36

CKTAL160

CKTAL261

DVDD12 21

EVDD12 22EVDD12 28

DVDD12 32DVDD12 38DVDD12 43DVDD12 49DVDD12 52

FB125

ENSR62

VDD33 16VDD33 37VDD33 46VDD33 53

AVDD33 2

AVDD12 8AVDD12 11AVDD12 14

IGPIO 50OGPIO 51

AVDD12 58

AVDD33 59

CLKREQB33

NC15NC17NC18NC34NC35NC39NC40NC41NC42

EGND31

EGND25

EXPOSE_PAD65

C394

0.1U

_040

2_10

V7K~

N

1

2

C453

0.1U_0402_16V7K~N

12

C14411000P_1206_2KV7K

12

C419 0.01U_0402_16V7K1 2

C421

22U

_120

6_6.

3V6M

1

2

D5

CH751H-40PT_SOD323-2

21

R35810K_0402_5%

12

R35910K_0402_5%

12

C14311U_0603_10V6K

1

2

C14

390.

1U_0

402_

10V7

K~N

1

2

C1442 0.01U_0402_16V7K1 2

C390 0.1U_0402_16V7K~N

1 2

C452

0.1U_0402_16V7K~N

12

D2

CH751H-40PT_SOD323-2

21

L23

4.7UH_1098AS-4R7M_1.3A_20%1 2

TP60@

R20_0603_5%

1 2

Y6

25MHZ_20P_1BX25000CK1A

1 2

R120515K_0402_5%

12

R11993.6K_0402_5%

1 2

C14

380.

1U_0

402_

10V7

K~N

1

2

C14

230.

1U_0

402_

10V7

K~N1

2

C406

0.1U

_040

2_10

V7K~

N

1

2

C14

200.

1U_0

402_

10V7

K~N

1

2

C42

327

P_04

02_5

0V8J

1

2

TP59@

C42

227

P_04

02_5

0V8J

1

2

R1206

10K_0402_5%

@

1 2

C39

60.

1U_0

402_

10V7

K~N

1

2

C14

340.

1U_0

402_

10V7

K~N

1

2

R321 0_0402_5% 1 2

C14

500.

1U_0

402_

10V7

K~N

1

2

C14

480.

1U_0

402_

10V7

K~N

1

2

C14

350.

1U_0

402_

10V7

K~N

1

2

R3271K_0402_5%

12

C1436

0.1U

_040

2_10

V7K~

N

1

2

C1432

22U

_120

6_6.

3V6M

1

2

G

D

S

Q27SSM3K7002FU_SC70-3

2

13

R1224 0_0402_5% 1 2

L24FBML10160808121LMT_0603

12

C389 0.1U_0402_16V7K~N

1 2

C1433

0.1U

_040

2_10

V7K~

N

1

2

R105220_0402_5%1 2

R1231 0_0402_5%1 2

C14

490.

1U_0

402_

10V7

K~N

1

2

C420

22U

_120

6_6.

3V6M

@

1

2

R1222 2.49K_0402_1%

1 2

C14

210.

1U_0

402_

10V7

K~N1

2

R1204 0_0402_5%1 2C412

0.1U

_040

2_10

V7K~

N

1

2

TP58@

C1440 0.1U_0402_16V7K~N

1 2

C1419

0.1U

_040

2_10

V7K~

N

1

2

C14

250.

1U_0

402_

10V7

K~N

1

2

C1437

22U

_120

6_6.

3V6M

1

2

C14

220.

1U_0

402_

10V7

K~N1

2

R1223 0_0402_5% 1 2

C1426 0.1U_0402_16V7K~N

1 2

C409 0.01U_0402_16V7K1 2

R79220_0402_5%1 2

L101FBML10160808121LMT_0603

12

C39

50.

1U_0

402_

10V7

K~N

1

2

D6

CH751H-40PT_SOD323-2

21

Page 23: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ODD_ITX_DRX_P0ODD_ITX_DRX_N0

ODD_IRX_DTX_N0ODD_IRX_DTX_P0

PSATA_ITX_DRX_P0PSATA_ITX_DRX_N0

IRX_DTX_N0_C

IRX_DTX_P0_C

IRX_DTX_N0_CIRX_DTX_P0_C

ITX_DRX_P0ITX_DRX_N0

PSATA_ITX_DRX_P0PSATA_ITX_DRX_N0 ITX_DRX_P0

ITX_DRX_N0

PSATA_ITX_DRX_P019

PSATA_IRX_DTX_N0_C19

PSATA_IRX_DTX_P0_C19

ODD_ITX_DRX_P019ODD_ITX_DRX_N019

ODD_IRX_DTX_N0_C19ODD_IRX_DTX_P0_C19

PSATA_ITX_DRX_N019

PSATA_IRX_DTX_P0_C19

PSATA_IRX_DTX_N0_C19

PSATA_ITX_DRX_P019PSATA_ITX_DRX_N019

+5VS

+5VS_HD

+5VS_HD

+5VS

+5VS +5VS_HD

+1.8VS

+1.8VS

+1.8VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

HDD/CDROMCustom

23 45Monday, December 15, 2008

2007/1/15 2008/1/15

SATA HDD CONN

Close to SATA HDD

Close to ODD Conn

Compal Electronics, Inc.

SATA ODD CONN

close JSATA2

1x1.2x

SwingOutput Swing Control

0dB-3.5dB

De-emphasisOutput De-emphasis Adjustment

SEL3_ [A:B]

10* *

SEL2_ [A:B]01

0 101

1 1

no equalization[0:2.5dB] @ 1.6 GHz[2.5:4.5dB] @ 1.6 GHz[4.5:6.5dB] @ 1.6 GHz

Equalizer SelectionCompliance Channel

*

SEL0_ [A:B] SEL1_ [A:B]0 0

C28

6

0.1U

_040

2_16

V4Z~

N

1

2

R303 0_0402_5%

1 2

C29

0

0.1U

_040

2_16

V4Z~

N

1

2

R10

7447

0_04

02_5

%~D1

2

R295 0_0402_5%

1 2

C498

10U_0805_10V4Z

1

2

C499

1000P_0402_50V7K~N

1

2

R308 0_0402_5%@ 1 2

R289 0_0402_5%@ 1 2

JSATA1

SUYIN_127043FB022S338ZR_RVCONN@

GND1A+2A-3GND4B-5B+6GND7

V338V339V3310GND11GND12GND13V514V515V516GND17Reserved18GND19V1220V1221V1222

U23

PI2EQX3201BZFE_TQFN36_6X5~D

AI+2AI-3

BI+ 22BI- 21

SEL0_A34SEL0_B13

SEL1_A33SEL1_B14

SEL2_A32SEL2_B15

AO+ 27AO- 26

AGND 24GND 4GND 9

VDD 1VDD 6VDD 10VDD 23VDD 28

AVDD 5

BO+7

EN_B29 EN_A30

SEL3_B16 SEL3_A31

BO-8

OUT+ 17OUT- 18

SD_A 36

GND 20GND 25

SD_B 35

IREF19

CLKIN+11CLKIN-12 PAD 37

C326 0.01U_0402_50V7K1 2

R298 0_0402_5%

1 2

C296

0.1U_0402_16V7K~N

1

2

C376

1000P_0402_50V7K~N

1

2

R314 0_0402_5%@ 1 2

R290 0_0402_5%

1 2

R304 0_0402_5%@ 1 2

C69

1

10U

_120

6_16

V4Z

1

2

JSATA2

SUYIN_127382FR013S52_NR

GND1RX+2RX-3GND4TX-5TX+6GND7

DP85V95V10MD11GND12

GND 14GND 15

GND13

C327 0.01U_0402_50V7K

1 2

C506

1U_0603_10V4Z

1

2

R352 470_0402_5%@ 1 2

R616 5.1K _0402_1%1 2

R299 0_0402_5%

1 2

C28

7

0.1U

_040

2_16

V4Z~

N

1

2

R292 0_0402_5%

1 2

R305 0_0402_5%@ 1 2

C574

10U_0805_10V4Z~N

1

2

R285 0_0402_5%@ 1 2

C10524700P_0402_25V7K~D

12

+ C575

150U_B2_6.3VM_R45M

1

2

R617 5.1K _0402_1%1 2

R300 0_0402_5%

1 2

C12720.01U_0402_16V7K

1 2

C28

8

0.1U

_040

2_16

V4Z~

N

1

2

R293 0_0402_5%@ 1 2

L1

FBMA-L11-160808-301LMA20T_1206~D

1 2

C10534700P_0402_25V7K~D

12

R286 0_0402_5%@ 1 2

C503

0.1U_0402_16V4Z

1

2

C392

3900P_0402_50V7K12

R301 0_0402_5%

1 2

C28

9

0.1U

_040

2_16

V4Z~

N

1

2

C1251 0.01U_0402_16V7K

1 2

R294 0_0402_5%@ 1 2

C3933900P_0402_50V7K12

C377

0.1U_0402_16V7K~N

1

2

R288 0_0402_5%@ 1 2

Page 24: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

ICH_PCIE_WAKE#WLAN_ACTIVE MINI_PIN3BT_ACTIVE MINI_PIN4

WLAN_REQ#4

MINI_RF_OFF#

PCIE_RXN3 PCIE_C_RXN3PCIE_RXP3 PCIE_C_RXP3

PCIE_TXN3PCIE_TXP3

USB20_N6USB20_P6

LED_WLAN#

3G_CLKREQ#

MINI2_OFF#

MINI2_OFF#

ICH_SMBCLKICH_SMBDATA

3G_OFF#

CLK_PCIE_Rob#

LPC_FRAME_R#

LPC_AD2_RLPC_AD1_R

LPC_AD3_R

LPC_AD0_R

CLK_DEBUG_PORT CLK_DB_R

CLK_DB_R

LPC_FRAME#

WL_WAKE#WL_WAKE_R_ICH_WAKE#

MINI_RF_OFF#

WL_OFF#

CLK_PCIE_Rob

PLT_RST#

PLT_RST#

LPC_AD2

LPC_AD3

LPC_AD1LPC_AD0

LPC_AD1

LPC_AD3

LPC_AD2

LPC_AD0

LPC_FRAME#

ICH_PCIE_WAKE#WLAN_ACTIVE31

BT_ACTIVE31WLAN_REQ#415

CLK_PCIE_MCARD#15CLK_PCIE_MCARD15

MINI_RF_OFF#PLT_RST# 7,18,22,28,29,33

PCIE_RXN320PCIE_RXP320

ICH_SM_CLK 13,14,15,20PCIE_TXN320 ICH_SM_DA 13,14,15,20PCIE_TXP320

USB20_N6 20USB20_P6 20

LED_WLAN# 32

PCIE_RXP520PCIE_RXN520

PCIE_TXN520PCIE_TXP520

3G_OFF# 29

USB20_N3 20USB20_P3 20

ICH_SMBDATA 20,28ICH_SMBCLK 20,28

PLT_RST# 7,18,22,28,29,33

CLK_PCIE_Rob#15

LPC_FRAME# 19,29

LPC_AD[0..3] 19,29CLK_DEBUG_PORT15

LPC_FRAME# 19,29

LPC_AD[0..3] 19,29

WL_WAKE_R_ICH_WAKE#20,22,28

WL_OFF# 29

CLK_PCIE_Rob15

+3V_WLAN

+3VS+1.5VS

+3V_WLAN

+1.5VS

+5VS+1.5VS

+3V_WLAN

+1.5VS

+3V_WLAN

+3VS

+3VS +3VALW

+3VS

+1.5VS

+1.5VS

+3VS

+3VALW

+3V_WLAN

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

Mini-Card/LEDCustom

24 45Monday, December 15, 2008

2007/1/15 2008/1/15

Mini-Express Card---WLAN

Compal Electronics, Inc.

2005/09/27 modified.Base on OPTION GTM351E Datasheet Rev0.1

Vcc 3.3V +/- 8%Peak Icc 2750mAwith max supply droop 50mAAverage Icc 1000mA

(WWAN_LED#)

Mini-Express Card for 3G Or TV Tuner

R287 0_0402_5% @1 2

R412 0_0402_5%1 2

G

D

S

Q522N7002_SOT23

@ 2

13

R380 0_0402_5%@ 1 2

R404 0_0402_5%1 2

R283 0_0402_5%@ 1 2

C180

0.1U_0402_16V4Z

1

2

JMINI3

FOX_AS0B226-S56N-7FCONN@

1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151

GND153

2 24 46 68 8

10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52

GND2 54

G

D

S

Q1092N7002_SOT23

@ 2

13

R3730_0402_5%1 2

C485

0.01U_0402_16V7K~N

1

2

R389 0_0402_5% 1 2

C188

0.1U_0402_16V4Z

1

2

R12320_0402_5%

@1 2

R284 0_0402_5%

1 2

C488

0.01U_0402_16V7K~N

1

2

R3430_0402_5%

1 2

C192

0.1U_0402_16V4Z

1

2

R86100K_0402_5%12

R406 0_0402_5%@1 2

C489

0.1U_0402_16V4Z~N

1

2

C193

4.7U_0805_10V4Z

1

2

R388 0_0402_5% 1 2

R280 0_0402_5% @1 2

C456

4.7U_0805_10V4Z~N

1

2

R661 10K_0402_5%

1 2

R384 0_0402_5% 1 2

R282 0_0402_5%@1 2

C500

0.01U_0402_16V7K~N

1

2

C194

0.1U_0402_16V4Z

1

2

R737

10K_0402_5%

@

12

JMINI2

FOX_AS0B226-S56N-7FCONN@

1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151

GND153

2 24 46 68 8

10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52

GND2 54

R381 0_0402_5%@ 1 2

R281 0_0402_5%@ 1 2

R1233

10K_0402_5%

@

12

R403 0_0402_5%1 2

C195

4.7U_0805_10V4Z

1

2

Page 25: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GND

INTSPK_L2INTSPK_L1

INTSPK_R1INTSPK_R2

INTS

PK_R

2

INTS

PK_R

1

INTS

PK_L

2

INTS

PK_L

1

GNDA

HPR

HPL

MIC-L

MIC-R

MIC_JD

PLUG_IN#

HP_JD

AC97_SDIN0_CODEC

+MIC1_VREFO

HPLHP_LOUT

HPRHP_ROUT

ACZ_BITCLK_CODEC

MIC2_C_L

MIC2_C_R

MIC-L

MIC-R C_MIC2_R

C_MIC1_L

MONO_IN

ACZ_SDOUT

ACZ_SYNC

ACZ_RST#

HP_JD+AC97_VREF

LINEL

LINER

R_MIC_JD

R_HP_JD

CPLS HP-JD

CPLS HP-JD

PLUG_IN

MIC-R

MIC-L

MIC_JD

PLUG_IN26

HPR

HPL

INTS

PK_L

2 26

INTS

PK_L

1 26

INTS

PK_R

2 26

INTS

PK_R

1 26

PLUG_IN26

PLUG_IN#

ADC_ACZ_SDIN0 19

HPL

HPR

ACZ_BITCLK 19

MIC2_L26

MIC2_R26

MONO_IN26

ACZ_SDOUT19

ACZ_SYNC19

ACZ_RST#19

EAPD26

AMP_RIGHT 26

AMP_LEFT 26

MIC_JD

+5VS

+VDDA

+3VS

+MIC1_VREFO26

+MIC1_VREFO26

+MIC2_VREFO

+3VS

+VDDA

+AVDD_AC97

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

HD CODEC 92HD81

25 45Monday, December 15, 2008

2008/05/07 2009/05/07Compal Electronics, Inc.

GNDAGND Speaker ConnectorPlace U50 close to U6

10mil 10mil

12/13 Modified this symbol for pin 13 and 14.Do not re-copy this symbol for other use

10mil

GNDGNDA

+AC97_VREF=10mil

10mil

20milFor EMIHD Audio Codec

40mil

27 ohm

modify_11/12

modify_11/12

C145310U_0805_10V4Z

1

2

R130

0_0402_5%@

12

C68

610

P_04

02_5

0V8J

@ 1

2

R593 6.8K_0402_5%1 2

R900

10K_0603_1%

1 2

C669

0.1U_0402_16V4Z

1

2

R610 0_0402_5%

1 2

C66610U_1206_16V4Z

1

2

R131

0_0402_5%@

12

C881

4.7U

_080

5_10

V4Z

C689 2.2U_0603_10V6K

1 2

R554 27.4_0603_1%1 2

C68120K_0402_1%

12

R129 0_0603_5%@1 2

R612 10_0402_5%12

G

D

S

Q24SSM3K7002FU_SC70-3@

2

13

C6681000P_0402_50V7K~N

@

C37

220P_0402_50V7K

1

2

L41FBM-L11-160808-800LMT_0603

1 2

C672 1000P_0402_50V7K~N

R611 39.2K _0402_1%@12

R1160_0603_5%

1 2

R6130_0402_5%

1 2

R302

100K_0402_5% @

12

C50

10P_0402_50V8J

1

2

C88

40.

1U_0

402_

16V7

K~N

1

2

D14 SM05T1G_SOT23-3~D@

2

31

C667 1000P_0402_50V7K~N@

JSPK2

ACES_88231-0400CONN@

11223344GND15GND26

C8

100P

_040

2_25

V8K

@

R5692.2U_0603_6.3V6K

1

2C67

410

P_04

02_5

0V8J

@ 1

2

R140_0603_5%

1 2

JMIC1

ACES_87212-1200CONN@

112233445566778899101011111212G113G214

C39

220P_0402_50V7K

1

2C142 2.2U_0603_6.3V6K

1 2

G

D

S

Q25SSM3K7002FU_SC70-3

@

2

13

C9

100P

_040

2_25

V8K

@

R1180_0603_5%

1 2

R615 5.1K _0402_1%12

R546 27.4_0603_1%1 2

U22

ALC272-GR_LQFP48

LINE2-L(PORT E)14

LINE2-R(PORT E)15

MIC2_R(PORT F)17

MIC2_L(PORT F)16

LINE1_L(PORT C)23

LINE1_R(PORT C)24

LINE1-VREF18

LINE2-VREF20

MIC2-VREF19

MIC1_L(PORT B)21

MIC1_R(PORT B)22

SENSE A13

PCBEEP12

LINE1_OUT_L 35

LINE1_OUT_R 36

MONO_OUT 37RESET#11

SYNC10

BIT_CLK 6

SDATA_OUT5

SDATA_IN 8

GPIO0/DMIC1/22GPIO3/DMIC3/43

CBP 29

CBN 30

MIC1_VREFO_L 28

VREF 27

DVD

D1

DV

DD

_IO

9

AVD

D1

25

AVD

D2

38

HPOUT-R(PORT I) 32

DMIC_CLK1/2 46

EAPD47

SPDIFO148

DVSS14DVSS27

CPVEE 31

HPOUT-L(PORT I) 33

SENSE B34

NC 43

DMIC_CLK3/4 44

SPDIFO2 45

JDREF 40

AVSS1 26AVSS2 42

LOUT2-L(PORT A) 39

LOUT2-R(PORT A) 41

R92

2.2K_0402_5%

12

C140 2.2U_0603_6.3V6K

R313100K_0402_5%

@

12

C68

210

P_04

02_5

0V8J

@ 1

2

R1150_0603_5%

1 2

C88

34.

7U_0

805_

10V4

Z~N

1

2

C671

0.1U_0402_16V4Z

1

2

R5720_0402_5%

12

R111

2.2K_0402_5%

12

C141 2.2U_0603_6.3V6K

U50

RT9198-4GPBG SOT-23 5P 4.75V

EN1

GND2

VOUT 4

NC 5

VIN3

C685

0.1U_0402_16V4Z

1

2

C677 1000P_0402_50V7K~N

D18 SM05T1G_SOT23-3~D@

2

31

C14520.1U_0402_16V4Z

1

2

R568

0_0603_5%

1 2

C882

0.1U

_040

2_16

V7K~

N

C16

100P

_040

2_25

V8K

@

C51

10P_0402_50V8J

1

2R614 20K_0402_1%

1 2

C690 2.2U_0603_10V6K

1 2

C68710U_1206_16V4Z

1

2

R589 6.8K_0402_5%1 2

C15

100P

_040

2_25

V8K

@

C673 10P_0402_50V8J1 2

R1170_0603_5%

1 2

C680

0.1U_0402_16V4Z

1

2

Page 26: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

INTSPK_R1

INTSPK_R2

INTSPK_L1

INTSPK_L2

PLUG_IN

AMP_L

SPK_L1

SPK_L2

SPK_R1AMP_R

SPK_R2

MONO_IN

MIC2_R_L

MIC2_R_R

MIC_L_3

MIC_R_3

AMP_RIGHT25

AMP_LEFT25

EC_MUTE#29

EAPD25

BEEP#29

SB_SPKR20

MONO_IN 25

INTSPK_L2 25

INTSPK_L1 25

INTSPK_R2 25

INTSPK_R1 25

MIC2_L 25

MIC2_R 25

PLUG_IN 25

+5VS

+5VS

+3VS

+VDDA

+MIC2_VREFO

+MIC2_VREFO

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4121P 1.0

AMP/Audio JackCustom

26 45Monday, December 15, 2008

2007/1/15 2008/1/15

W=40Mil

Buzzer need to support ICH/PCM_SPK/Battery_low and WL_on/off

GAIN0 GAIN1 GAIN

0 0

0

0

1

1

1

6dB

10dB

15.6dB

21.6dB1

*

Change to 100p from 0.01u for EMI-1012

Compal Electronics, Inc.

EC Beep

ICH Beep

MIC_GND

MIC_GND

MIC_GNDGNDA

modify_11/12

R62610K_0402_5%

12

D10

RB751V_SOD323

2 1

C6360.47U_0603_10V7K

1 2

L590_0603_5%

1 2

C54

100P_0402_50V8J

@ 12

C654

1U_0603_10V4Z

1

2

R160

560_0402_5%

1 2

C52

100P_0402_50V8J

@ 12

C

BE

Q36

2SC2411K_SC59

1

2

3

R170100K_0402_5%

12

C6380.47U_0603_10V7K

1 2

R504 0_0603_5%1 2

R128 4.7K_0402_5% 1 2

C695

1U_0603_10V4Z

1 2

C6420.47U_0603_10V7K

1 2

R132 4.7K_0402_5% 1 2R502 0_0603_5%1 2

C367

1U_0603_10V4Z

1 2

C65110U_0805_10V4Z

1

2

C6480.1U_0402_16V4Z

1

2

R50610K_0402_5% @12

R505 0_0603_5%1 2

R171

2.7K_0402_5%

1 2

G

D

S

Q31SSM3K7002FU_SC70-3

2

13

R31010K_0402_5%

12

R157

47K_0402_5%

1 2

R134

0_0402_5%@

12

R156

47K_0402_5%

1 2

C624

100P

_040

2_50

V8J

1

2

R537

0_0402_5%

12

R513 10K_0402_5%1 2

D12

RB751V_SOD323

2 1

R512 10K_0402_5%@ 1 2

R573 10K_0402_5%@ 1 2

C366

1U_0603_10V4Z

1 2

R805

1K_0402_5%

12

R1228 0_0603_5%@

R311

560_0402_5%

1 2

R62410K_0402_5%

12

MIC_R1

ACES_88231-02001

1 12 2

GND 3GND 4

L580_0603_5%

1 2

R520 10K_0402_5%1 2

R6232.4K_0402_5%

1 2

L102MBK1608121YZF_0603

1 2

U18

P3017THF TSSOP 20P

G

ND

41

GN

D3

11G

ND

213

GN

D1

20

VDD

16PV

DD

115

RIN-17

BYPASS 10

NC 12

LOUT- 8

LOUT+ 4

ROUT- 14

ROUT+ 18

RIN+7

LIN-5

LIN+9

GAIN0 2

GAIN1 3

PVD

D2

6

SHUTDOWN19

GN

D21

C769

220P_0402_50V7K

1

2

C688

1U_0603_10V4Z

1 2

D53

PSOT05C-LF-T7 SOT-23-3

@

2

31

D28 CH751H-40_SC76

@

2 1

MIC_L1

ACES_88231-02001

1 12 2

GND 3GND 4

R801

1K_0402_5%

12

R503 0_0603_5%1 2

D11RB751V_SOD323

21

C770

220P_0402_50V7K

1

2

R5071K_0402_5%

12

C6500.47U_0603_10V7K

1 2

Page 27: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_RST#

CLK_PCI_CB

PCI_PIRQG#CB_PME#

PCI_AD26

PCI_AD30PCI_AD31

PCI_AD28PCI_AD29

PCI_AD23

PCI_AD27

PCI_AD25

PCI_AD22PCI_AD21

PCI_AD18PCI_AD17

PCI_AD20

PCI_AD24

PCI_AD19

PCI_AD16

PCI_AD14PCI_AD13

PCI_AD15

PCI_AD11PCI_AD12

PCI_AD10

PCI_AD6

PCI_AD9

PCI_AD7

PCI_AD5

PCI_AD8

PCI_AD2PCI_AD1

PCI_AD4

PCI_CBE#0PCI_CBE#1

PCI_CBE#3

PCI_AD3

PCI_AD0

PCI_CBE#2

IEEE1394_TPAP0IEEE1394_TPAN0IEEE1394_TPBP0IEEE1394_TPBN0

IEEE1394_TPBIAS0

CLK_PCI_CB

OZ129XIOZ129XO

PCI_PAR

PCI_FRAME#

PCI_STOP#

PCI_DEVSEL#

PCI_TRDY#PCI_IRDY#

+3VS_PHY

CBS_IDSELPCI_AD21

PCI_REQ0#

IEEE1394_TPBIAS0

IEEE1394_TPAP0

SDCLK

MSCLK

OZ129XO

OZ129XI

SDCD#

SDDATA3SDDATA2

SD_CMD

SDDATA1

SD_WP

SDDATA0

SDCLK_MSCLK

MSDATA2MSDATA0

MSDATA3

MSCD#

MSBS

MSDATA1

MC_3V#

PCI_GNT0#

SUSP

MC_3V#

MC_3V#

IEEE1394_TPBP0IEEE1394_TPAN0

IEEE1394_TPBN0

SD_CMDSDCD#

SD_WPSDCLKSDCLK_MSCLK

MSCD#

MSBS

MSCLKSDCLK_MSCLK

SDDATA0

SDDATA3

SDDATA1SDDATA2

MSDATA0

MSDATA3MSDATA2

MSDATA1

PCI_AD[0..31]18

PCI_CBE#018PCI_CBE#118PCI_CBE#218PCI_CBE#318

PCI_PAR18

PCI_FRAME#18

PCI_TRDY#18PCI_IRDY#18

PCI_STOP#18

PCI_DEVSEL#18

PCI_REQ0#18

CLK_PCI_CB15

PCI_CLKRUN#20,29

PCI_PIRQG#18CB_PME#

PCI_RST#18PCI_GNT0#18

SUSP36,42+3VS

+3VS

+3VS_PHY

+3VS

+3VS_CR

+3VS

+1.8VS_CR

+1.8V+1.8VS_CR

+3VS

+3VS_CR

+3VS_CR

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

OZ129_Card Reader / 1394Custom

27 45Monday, December 15, 2008

2007/09/01 2008/09/01Compal Electronics, Inc.

LED behave:Idel ---------> lowAccress data --> always high

Layout Note: Place close to OZ129 and Shield GND.

Layout Note: Place close to OZ129 Chipset.

PLACE C1136, C1137, C1138 AS CLOSE AS U44

PLACE C1139, C1140 AS CLOSE AS U44

PLACE C1141, C1142 AS CLOSE AS U44

AS CLOSE AS U44

IEEE1394TPA+/- and IEEE1394TPB+/-Same Wire Length

Layout Note: Shield GND forIEEE1394_TPA and TPB

3 in 1 Card Reader

C345

4.7U_ 0603_6.3V

C621

0.1U_0402_10V6K

1

2

X3

24.576MHz_16P_3XG-24576-43E1

12

L16

0_0603_5%

12

G

D

SQ82

SSM3K7002FU_SC70-3

2

13

J1394A

P-TWO_CU8042-A0G1G-P

TPB-1 TPB+2 TPA-3 TPA+4GND 5GND 6

R236 0_0402_5% 1 2

C32410P_0402_50V8J

1

2

C619

4.7U_ 0603_6.3V

R524 100K_0402_5% 12

C643

15P_0402_50V8J

12

OZH24TN

U44

OZH24TN LQFP 128P_14X14

PCI_RST#1

NC 2

PME#3

MC_3V# 4

IDSEL5

CLKRUN#6

VC

C3.

37

NC 8NC 9NC 10INTA#11

GN

D12

NC 13

VC

C1.

814

VC

C1.

815

GN

D16

PCI_REQ#17PCI_GNT#18

AD3119AD3020AD2921AD2822AD2723AD2624AD2525

PC

I_V

CC

26

AD2427

C/BE3#28

AD2329AD2230AD2131AD2032

GN

D33

AD1934AD1835AD1736AD1637

C/BE2#38

FRAME#39IRDY#40TRDY#41

DEVSEL#42

STOP#43PAR44

PCI_CLK45

C/BE1#46

AD1547AD1448AD1349AD1250AD1151AD1052AD953AD854

C/BE0#55

PC

I_V

CC

56AD757AD658AD559AD460AD361AD262AD163AD064

NC 128NC 127NC 126

VC

C1.

812

5G

ND

124

GN

D12

3

VC

C3.

312

2

GN

D12

1V

CC

1.8

120

XD_CE# 119

XD_CLE 118

SD_WP 117

GN

D11

6G

ND

115

SD_CD# 114

SD_CLK/MS_CLK 113

SD_D2 112SD_D3 111

SD_CMD 110

XD_ALE 109

SD_D0 108SD_D1 107

MEDIA_LED106

XD_WE# 105

GN

D10

4

VC

C3.

310

3V

CC

3.3

102

XD_RE# 101

XD_RB# 100

MS_CD# 99XD_WPO# 98

XD_CD# 97

MS_D3/XD_D0 96

MS_D1/XD_D7 95

MS_D2/XD_D1 94

XD_D6 93

VC

C1.

892

VC

C1.

891

MS_D0/XD_D2 90

XD_D5 89

MS_BS/XD_D3 88XD_D4 87

PHY_TEST1 86PHY_TEST0 85

XO 84XI 83

AG

ND

82

AV

CC

81

AG

ND

80

AV

CC

79

REF 78

AG

ND

77

TPBIAS 76TPA+ 75TPA- 74

AV

CC

73

TPB+ 72TPB- 71

AG

ND

70A

GN

D69

GN

D68

AV

CC

67

GN

D66

AG

ND

65

R514

100_0402_5%

1 2

R199 22_0402_5%1 2

C647

4.7U_ 0603_6.3V

R237 0_0402_5% 1 2

C323

4.7U_ 0603_6.3V

C343

0.1U_0402_10V6K

1

2

C635

15P_0402_50V8J

12

R1214

100K_0402_5%1 2

C659

270P_0402_50V7K

1

2

R200 22_0402_5%1 2

C660

4.7U_ 0603_6.3V

R1216

10_0402_5%~D

@

12

R525 0_0402_5%~D@ 1 2

R571

5.1K_0402_1%

12

L15

FBM-L11-160808-601LMT_06031 2

R559

56.2_0402_1%

12

C676

4.7P_0402_50V8C

@

1

2

R1215470_0402_5%

12

R241470_0402_5%

12

C3321U 10V Z Y5V 0603

1

2

G

D

SU45AP2301GN_SOT23-3

2

13

R555

56.2_0402_1%

12

R547

56.2_0402_1%

12

C1444

0.1U_0402_10V6K

1

2

R59422K_0402_5%

C632

0.1U_0402_10V6K

1

2

C32510P_0402_50V8J

1

2

R235 0_0402_5% 1 2

C656

1U_0603_10V4Z

1

2

C675

0.1U_0402_10V6K

1

2

G

D

S

Q21SSM3K7002FU_SC70-3

2

13

R1219

56.2_0402_1%

12

G

DS Q34AP2301GN_SOT23-3

2

13

R238 0_0402_5% 1 2

C620

0.1U_0402_10V6K

1

2

C337

0.1U_0402_10V6K

1

2R542 5.9K_0402_1%

1 2

C679

0.01U_0402_25V7K~N

1

2

J3IN1

PROCO_MDR019-C0-1202CONN@

GND23 GND22

SDIO_MS18BS_MS20

VSS_MS21

INS_MS16

VSS_SD8

SCLK_MS14

DAT1_SD10DAT2_SD2

CMD_SD4 WP_SD11

VCC_MS13

VDD_SD6

CD_SD1

RESERVED_MS17 RESERVED_MS15

VCC_MS19

CLK_SD7

DAT0_SD9

CD/DAT3_SD3

VSS_MS12

VSS_SD5

Page 28: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SUSP#

PERST#

PLT_RST#

EXPCARD_REQ#16

PCIE_PME#_RICH_PCIE_WAKE_R_ECARD#

PERST#

CPUSB#

EXPR_CPUSB#

USB20_N7USB20_P7

PCIE_TXP4

PCIE_RXN4PCIE_RXP4

PCIE_TXN4

CLK_PCIE_EXPR#CLK_PCIE_EXPR

ICH_SMBCLKICH_SMBDATA

USB20_N7_RUSB20_P7_R

EXPR_CPUSB#

CPUSB#

SYSON

PLT_RST#7,18,22,24,29,33

SUSP#29,33,36,40,41 CLK_PCIE_EXPR#15CLK_PCIE_EXPR15

ICH_SMBDATA20,24ICH_SMBCLK20,24

USB20_P720USB20_N720

PCIE_TXP420PCIE_TXN420

PCIE_RXN420PCIE_RXP420

EXPCARD_REQ#1615SYSON29,36,41

HDA_RST_MDC#19 HDA_BITCLK_MDC 19HDA_SDIN119

HDA_SDOUT_MDC19

HDA_SYNC_MDC19

MDC_ON#29

ICH_PCIE_WAKE_R_ECARD#20,22,24

+1.5VS

+3VALW

+3VS

+1.5VS_PEC

+3VS_PEC

+3VALW_PEC

+3VS_PEC

+3VALW_PEC

+1.5VS_PEC

+3VS_PEC

+1.5VS_PEC

+3VALW_PEC

+MDC_VCC

+3VALW

+MDC_VCC

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

EXPRESS CARDCustom

28 45Monday, December 15, 2008

2007/1/15 2008/1/15

Express card

Express Card Power Switch

+3V_CARD Max. 1300mA, Average 1000mA

+1.5V_CARD Max. 650mA, Average 500mA

Compal Electronics, Inc.

MDC Conn.

20mil

W=40mils

9/29 follow HEL80's

R47 0_0402_5%1 2

C751

0.1U_0402_16V4Z@

U11

P2231NL_QFN20

3.3Vin23.3Vin4 3.3Vout 3

3.3Vout 5

SYSRST#6

SHDN#20

STBY#1

PERST# 8

OC# 19

RCLKEN18

AUX_IN17 AUX_OUT 15

CPPE#10

CPUSB#9

NC 16

GND 7

1.5Vin121.5Vin14 1.5Vout 11

1.5Vout 13

C750.1U_0402_16V4Z~N

1

2

JEXP1

FOX_1CX41201_26P_LT-SCONN@

GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26

GND27GND28GND29GND30

C750

4.7U_0805_10V4Z@

1

2

R37 0_0402_5%1 2

R49 33_0402_5%@1 2

C74 0.1U_0402_16V4Z~N

12

Connector for MDC Rev1.5

JMDC1

ACES_88018-124GCONN@

GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11

RES0 2RES1 4

3.3V 6GND3 8GND4 10

IAC_BITCLK 12

GN

D13

GN

D14

GN

D15

GN

D16

GN

D17

GN

D18

C89

4.7U_0805_10V4Z~N

1

2

G

D

S

Q51SI2301BDS_SOT23@

2

13

C85 0.1U_0402_16V4Z~N

12

C1429

22P_0402_50V8J@

1

2

C920.1U_0402_16V4Z~N

1

2

R48 0_0402_5%1 2

C900.1U_0402_16V4Z~N

1

2

C748

0.1U_0402_16V4Z@

R735 100K_0402_5%@

1 2

C91 0.1U_0402_16V4Z~N

12

C93

4.7U_0805_10V4Z~N

1

2

C73

4.7U_0805_10V4Z~N

1

2

C749

1U_0603_10V4Z@

1

2

Page 29: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

ECAGND

ECAGND

TP_CLKTP_DATA

EC_MUTE#

EC_SMB_CK2

EC_SMB_DA1

EC_SMB_DA2

EC_SMB_CK1

FWR#SPI_SI

SPI_CLK

MSEN#

FRD#SPI_SO

FSEL#SPICS# SPI_CS#

SPI_SI

SPI_CLK_RSPI_SO

SPI_CLK_RVGATE

EC_RSMRST#

EC_SMB_CK2

KSI7

KSO10

KSO1

SLP_S4#

BATT_OVP

KSO13

NUMLED#

KB_RST#

EC_MUTE#

KSO11

LID_SW#

LPC_AD2

KSI[0..7]

BATT_TEMP

XCLKI

CAPSLED#

KSI0

KSO9

ON_OFF

LPC_AD1

EC_ENBKL

EC_SMB_DA2

KSO0

E51_TXD

FRD#SPI_SO

EC_SWI#

EN_DFAN1

KSO2

PWR_LED#

EC_SMI#

SYSON

TP_DATA

VGA_ONKSI6

BEEP#

LPC_AD3

EN_WOL#

FSTCHG

EC_SMB_CK1

KSI2KSI1

GATEA20

ICH_PWROK

EC_SMB_DA1

KSO6

EC_RST#

EC_LID_OUT#

BATT_LOW_LED#

TP_CLK

MSEN#

DAC_BRIG

AD_BID

EC_PME#

SLP_S5#

SCRLED#

BATT_CHG_LED#

M_PWROK_EC

KSO15

KSO8KSO7

LPC_FRAME#

KSO[0..15]

VR_ON

FWR#SPI_SI

ADP_I

KSI5

ACOFF

PLT_RST#

SPI_CLK

XCLKO

KSO12

CLK_PCI_EC

ECAGND

EC_ON

KSO14

KSO5

FAN_SPEED1

EC_SCI#

SLP_S3#

CLK_PCI_EC

AD_BID

USB_EN

SPI_PULLDOWNKSO3

SERIRQ

XCLKIXCLKO

KSI4

KSO4

EC_PME#

BKOFF#

IREF

KSI3

LPC_AD0

LID_SW#

PCI_CLKRUN#

PBTN_OUT#SUSP#

EC_THERM#

BIST

FSEL#SPICS#

LCD_DET#

LCD_VCC_TEST_EN

KILL_ON#

BT_ON#

WL_OFF#

E51_TXD

MDC_ON#3G_OFF#

ACIN

KSO1KSO2

DAC_BRIG 16EN_DFAN1 4IREF 38

BATT_CHG_LED# 32

SYSON 28,36,41

EC_RSMRST# 20

EC_ON 30

ACIN 20,37,38VR_ON 43

FSTCHG 38

ON_OFF30

BKOFF# 16

FAN_SPEED14

EC_LID_OUT# 20

EC_SWI# 20

EC_MUTE# 26

KB_RST#19GATEA2019

SERIRQ20LPC_FRAME#19,24

LPC_AD219,24LPC_AD119,24

LPC_AD319,24

LPC_AD019,24

CLK_PCI_EC15PLT_RST#7,18,22,24,28,33

EC_SCI#20PCI_CLKRUN#20,27

KSI[0..7]30

EC_SMB_CK144EC_SMB_DA144EC_SMB_CK24,33EC_SMB_DA24,33

SLP_S3#20SLP_S5#20EC_SMI#20

EC_PME#18,20

INVT_PWM 16

EN_WOL# 22

BATT_TEMP 44

TP_CLK 30TP_DATA 30

SLP_S4# 20

CHGVADJ 38

MSEN# 17

KSO[0..15]30

ACOFF 38

BEEP# 26

BATT_OVP 44ADP_I 38

VGA_ON 33

EC_ENBKL 16

VGATE 7,20,43

BATT_LOW_LED# 32

PWR_LED#30,32 USB_EN 31

ICH_PWROK 7,20

LID_SW#

PBTN_OUT# 20SUSP# 28,33,36,40,41

EC_THERM# 20

BIST 16

LCD_DET# 16

LCD_VCC_TEST_EN 16

KILL_ON#30

BT_ON#31

WL_OFF# 24

3G_OFF# 24MDC_ON# 28

EC_PME# 18,20

VGA_THER#33

+3VALW +EC_AVCC

+3VALW

+3VALW

+3VALW+3VALW+EC_AVCC

+5VS_HD

+3VALW

+3VS

+5VALW

+3VALW

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

BIOS & EC I/O PortCustom

29 45Monday, December 15, 2008

2007/1/15 2008/1/15

20mils

Board ID

M/B rev:0.1; 0.2; 0.3; 1.0Voltage:0.0; 0.4; 0.8; 1.0

2007-09-19 change Brd ID

Ra

Rb

SPI Flash (8Mb*1)

Compal Electronics, Inc.LID Switch

Place under open door location

R23115K_0402_5%

12

C277

0.1U_0402_16V4Z~N

1

2

R27820M_0603_5%@1 2

C2680.1U_0402_16V4Z

1

2

R22947K_0402_5%

1 2

C285

0.1U_0402_16V4Z~N

1

2

C314

0.1U_0402_16V4Z~N

1 2R265 4.7K_0402_5%12

C291

1000P_0402_50V7K~N 1

2

R4190_0402_5% 1 2

C281

0.1U_0402_16V4Z~N

1

2

L18

FBM-11-160808-601-T_0603

12

R262 4.7K_0402_5% 12

R43710K_0402_5%

12

R309 10K_0402_5%

1 2

U37

MX25L1605AM2C-12G_SO8

CS#1SO2WP#3GND4

VCC 8HOLD# 7

SCLK 6SI 5

X232.768KHZ_12.5PF_Q13MC14610002

OSC

4

OSC

1

NC

3

NC

2

C292

15P_

0402

_50V

8J

R23247K_0402_5% @

12

C4820.1U_0402_16V4Z~N

1

2

C273 0.01U_0402_16V7K1 2

T56 PAD

R43815_0402_5%

1 2R42015_0402_5%

1 2

C282

15P_0402_50V8J

@1

2

R272

10_0402_5%@

12

T57PAD

C493

0.1U_0402_16V4Z~N

1

2

C507

0.1U_0402_16V4Z~N

@1 2

L19FBM-11-160808-601-T_0603

12

T59PAD

C322 4.7U_0603_6.3V6M1 2

R264 4.7K_0402_5%12

R27515_0402_5%

1 2

T58 PAD

JECDB1

ACES_85205-0400 CONN@

11223344

R40510K_0402_5%

12

R2714.7K_0402_5%

1 2

R257 0_0402_5%@1 2R270

4.7K_0402_5%

1 2

R23047K_0402_5%

1 2

C297

15P_

0402

_50V

8J

C270 0.1U_0402_16V4Z12

C269

1000P_0402_50V7K~N 1

2

R228

47K_0402_5%

1 2

C4811000P_0402_50V7K~N

1

2

R263 4.7K_0402_5% 12

LPC & MISC

Int. K/B Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U29

KB926QFD2_LQFP128

GA20/GPIO001KBRST#/GPIO012SERIRQ#3LFRAME#4LAD35

PM_SLP_S3#/GPIO046

LAD27LAD18

VCC

9

LAD010

GN

D11

PCICLK12PCIRST#/GPIO0513

PM_SLP_S5#/GPIO0714EC_SMI#/GPIO0815LID_SW#/GPIO0A16SUSP#/GPIO0B17PBTN_OUT#/GPIO0C18EC_PME#/GPIO0D19

SCI#/GPIO0E20

INVT_PWM/PWM1/GPIO0F 21

VCC

22

BEEP#/PWM2/GPIO10 23

GN

D24

EC_THERM#/GPIO1125

FANPWM1/GPIO12 26ACOFF/FANPWM2/GPIO13 27

FAN_SPEED1/FANFB1/GPIO1428FANFB2/GPIO1529EC_TX/GPIO1630EC_RX/GPIO1731ON_OFF/GPIO1832

VCC

33

PWR_LED#/GPIO1934

GN

D35

NUMLED#/GPIO1A36

ECRST#37

CLKRUN#/GPIO1D38

KSO0/GPIO2039KSO1/GPIO2140KSO2/GPIO2241KSO3/GPIO2342KSO4/GPIO2443KSO5/GPIO2544KSO6/GPIO2645KSO7/GPIO2746KSO8/GPIO2847KSO9/GPIO2948KSO10/GPIO2A49KSO11/GPIO2B50KSO12/GPIO2C51KSO13/GPIO2D52KSO14/GPIO2E53KSO15/GPIO2F54

KSI0/GPIO3055KSI1/GPIO3156KSI2/GPIO3257KSI3/GPIO3358KSI4/GPIO3459KSI5/GPIO3560KSI6/GPIO3661KSI7/GPIO3762

BATT_TEMP/AD0/GPIO38 63BATT_OVP/AD1/GPIO39 64

ADP_I/AD2/GPIO3A 65AD3/GPIO3B 66

AVC

C67

DAC_BRIG/DA0/GPIO3C 68

AGN

D69

EN_DFAN1/DA1/GPIO3D 70IREF/DA2/GPIO3E 71

DA3/GPIO3F 72

CIR_RX/GPIO40 73CIR_RLC_TX/GPIO41 74

AD4/GPIO42 75SELIO2#/AD5/GPIO43 76

SCL1/GPIO4477SDA1/GPIO4578SCL2/GPIO4679SDA2/GPIO4780

KSO16/GPIO4881KSO17/GPIO4982

PSCLK1/GPIO4A 83PSDAT1/GPIO4B 84PSCLK2/GPIO4C 85PSDAT2/GPIO4D 86

TP_CLK/PSCLK3/GPIO4E 87TP_DATA/PSDAT3/GPIO4F 88

FSTCHG/SELIO#/GPIO50 89BATT_CHGI_LED#/GPIO52 90

CAPS_LED#/GPIO53 91BATT_LOW_LED#/GPIO54 92

SUSP_LED#/GPIO55 93

GN

D94

SYSON/GPIO56 95

VCC

96

SDICS#/GPXOA00 97SDICLK/GPXOA01 98SDIDO/GPXOA02 99

EC_RSMRST#/GPXO03 100EC_LID_OUT#/GPXO04 101

EC_ON/GPXO05 102EC_SWI#/GPXO06 103

ICH_PWROK/GPXO06 104BKOFF#/GPXO08 105

WL_OFF#/GPXO09 106GPXO10 107GPXO11 108

SDIDI/GPXID0 109

PM_SLP_S4#/GPXID1 110

VCC

111

ENBKL/GPXID2 112

GN

D11

3

GPXID3 114GPXID4 115GPXID5 116GPXID6 117GPXID7 118

SPIDI/RD# 119SPIDO/WR# 120

VR_ON/XCLK32K/GPIO57 121

XCLK1122XCLK0123 V18R 124

VCC

125

SPICLK/GPIO58 126

AC_IN/GPIO59 127

SPICS# 128

Q1APX9132ATI-TRL_SOT23-3

GN

D1

VDD 2VOUT3

C2720.1U_0402_16V4Z

1

2

R266 0_0402_5%1 2

C251 100P_0402_25V8K

R277

10K_0402_5%

1 2

R439 15_0402_5%

12

R256 0_0402_5%1 2

R2744.7K_0402_5%

@12

Page 30: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

51ON#KSI0

KSO15

KSO14

KSO13

KSO12

KSO11

KSO10

KSI1

KSI3

KSO8

KSI2

KSO9

KSI6

KSI7

KSO0

KSO5

KSO7

KSI5

KSO4

KSO6

KSO3

KSO2

KSI4

KSO1

EC_ON

PWR_ON-OFF_BTN#

TP_CLKTP_DATA

KILL

_ON

#

KSO6KSO8KSO7KSO4KSO2KSI0KSO1KSO5KSI3KSI2KSO0KSI5KSI4KSO9KSI6KSI7KSI1

KSO15KSO10KSO11KSO14KSO13KSO12KSO3

KSI[0..7]

KSO[0..15]

PWR_LED#PWR_ON-OFF_BTN#

ON_OFF 29

51ON# 37

EC_ON29

TP_CLK29TP_DATA29

KILL_ON#29

KSI[0..7]29

KSO[0..15]29

PWR_LED#29,32

+3VALW

+3VALW

+3VALW

+5VS

+3VS

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

PWR_OK/BTN/TPCustom

30 45Monday, December 15, 2008

2007/1/15 2008/1/15

Power Button

INT_KBD CONN.

For EMI

SW/B CONN.

Touch PAD/B CONN.

Compal Electronics, Inc.

Wireless_SW2-3:ON, 1-2:OFF

TP50@

C443 100P_0402_25V8K

R2964.7K_0402_5%

@

12

JFN1

ACES_85201-0405ME@

11 22 33 44

5 56 6

C248 100P_0402_25V8K

C238 100P_0402_25V8K

D24SM05T1G_SOT23-3~D@

2 31

JTP1

ACES_85201-06051@CONN

GND7GND8

112233445566

C14

1610

0P_0

402_

25V8

K

@1

2

SW11BS003-1210L_3P

11

22

33

G1

4G

25

R2910_0402_5%

1 2

C444 100P_0402_25V8K

C240 100P_0402_25V8K

C3000.01U_0402_16V7K

1

2

C247 100P_0402_25V8K

C449 100P_0402_25V8K

D15

CHN202UPT SC-70

2

31

C14

1710

0P_0

402_

25V8

K

@1

2

G

D

SQ26

SSM3K7002FU_SC70-3

2

13

C235 100P_0402_25V8K JKB1

ACES_85202-2505L@CONN

1122334455667788991010111112121313141415151616171718181919202021212222232324242525G126G227

C244 100P_0402_25V8K

C448 100P_0402_25V8K

C245 100P_0402_25V8K

C239 100P_0402_25V8K

C243 100P_0402_25V8K

D13RLZ20A_LL34

12

R1131100K_0402_5%

12

C249 100P_0402_25V8K

C447 100P_0402_25V8K

R29

7

100K

_040

2_5%

12

C236 100P_0402_25V8K

R12

0_0402_5% @

12

C445 100P_0402_25V8K

C237 100P_0402_25V8K

C14181000P_0402_50V7K~N

1

2

C242 100P_0402_25V8K

C446 100P_0402_25V8K

C246 100P_0402_25V8K

C441 100P_0402_25V8K

C442 100P_0402_25V8K C241 100P_0402_25V8K

Page 31: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

USB_N0

USB_P0

USB_EN#

USB_EN#

USB_EN#

USB_EN#

USB_EN#

USB_EN

USB_N0USB_P0

BT_ACTIVEWLAN_ACTIVE

USB20_P4USB20_N4

USB20_P1

USB_N1USB20_N1

USB_P1

USB_N1

USB_P1

USB20_N8USB20_P8

USB20_N9USB20_P9

USB20_P2USB20_N2

USB20_N5

USB20_P5

USB20_P5USB20_N5

USB20_P0

USB20_N0

USB_EN#

USB_EN#

BTON_LED

BT_LED#

USB_N2USB_P2

USB_OC#0 20

USB_OC#1 20

USB_OC#3 20

USB_OC#2 20

USB_EN#

USB_EN29

USB20_P420USB20_N420

USB20_N120

USB20_P120

USB_OC#1 20

BT_ACTIVE24WLAN_ACTIVE24

USB20_N820USB20_P820

USB20_N920USB20_P920

USB20_N220USB20_P220

USB20_N520USB20_P520

USB20_P020

USB20_N020

BT_LED#32

BT_ON#29

+USB_AS+5VALW

+USB_BS+5VALW

+USB_AS

+USB_CS+5VALW

+5VALW

+USB_AS

+BT_VCC

+USB_AS

+USB_CS+USB_BS

+5VS

+3VS+5VS

+5VS

+5VS

+BT_VCC

+3VS +3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

USB/BlueTooth/FP/FelciaCustom

31 45Monday, December 15, 2008

2007/1/15 2008/1/15

80 mils

80 mils

Fingerprint

Compal Electronics, Inc.

80 mils

Bluetooth

W=80mils

W=80mils

+USB_BS/+USB_CS =80mils

Camera

W=40mils

C223

0.1U_0402_16V4Z

C30

4.7U_0805_10V4Z

1

2

R606

10K_0402_5%

12

R755 100K_0402_5%

1 2

JUSB1

SUYIN_020173MR004G565ZRCONN@

VCC1D-2D+3GND4

GND15GND26GND37GND48

R62 0_0402_5%12

U14

RT9711BPS SO 8P

GND1IN2

OC# 5OUT 6

OUT 8

IN3EN#4

OUT 7

D29

PRTR5V0U2X_SOT143-4@

GND1

IO12

IO2 3

VIN 4

R90_0402_5%

12

D19

CM1293-04SO_SOT23-6

@CH3 6

Vp 5

CH4 4

CH23

Vn2

CH11

R15530K_0402_5%

12

R1 0_0402_5%12

R80_0402_5%

@12

C64

0.1U_0402_16V4Z

1

2

R122610K_0402_5%

12

JUSB3

E&T_3703-E12N-03RME@

112233445566778899101011111212G113G214

C760

1U_0603_10V4Z

1

2

R3 0_0402_5%12

G

D

S

Q4SSM3K7002FU_SC70-3

2

13

G

D

S

Q13SSM3K7002FU_SC70-3

2

13

C759

0.1U_0402_16V4Z

R154100K_0402_5%

12

JBT1

ACES_87212-0800

12345678

R3830K_0402_5%

12

U13

RT9711BPS SO 8P

GND1IN2

OC# 5OUT 6

OUT 8

IN3EN#4

OUT 7

G

D

S

Q14SSM3K7002FU_SC70-3

2

13

JCAM1

ACES_88266-05001CONN@

GND27 GND16

1122334455

JFP1

ACES_85201-06051CONN@

GND7GND8

112233445566

R13

0_0402_5%12

+ C434

150U_B2_6.3VM_R45M

1

2

G

D

S

Q432N7002_SOT23

2

13

U12

RT9711BPS SO 8P

GND1IN2

OC# 5OUT 6

OUT 8

IN3EN#4

OUT 7

C253

0.1U_0402_16V4Z

1

2

C29

0.1U_0402_16V4Z

1

2

C762

0.1U_0402_16V4Z

G

D

S

Q8SSM3K7002FU_SC70-3

2

13

JUSB2

SUYIN_020173MR004G565ZRME@

VCC1D-2D+3GND4

GND15GND26GND37GND48

R3630K_0402_5%

12

C228

0.1U_0402_16V4Z

1

2

R15 0_0402_5%12

R44 0_0402_5%

1 2

D1

PSOT24C_SOT23@

2 31

R605

10K_0402_5%

12

C761

4.7U_0805_10V4Z

1

2

R54 0_0402_5%12

G

D

S

Q56SI2301BDS_SOT23

2

13

Page 32: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BATT_LOW_LED#

BATT_CHG_LED#

PWR_LED#

BT_LED#

LED_WLAN#

BATT_LOW_LED# 29

BATT_CHG_LED# 29

BT_LED# 31

LED_WLAN# 24

PWR_LED# 29,30

+5VALW

+5VS

+5VALW

+5VS

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

PWR_OK/BTN/TPCustom

32 45Monday, December 15, 2008

2007/1/15 2008/1/15

Amber

Blue

White

Amber

Blue

B

A

LED5

HT-297UD/CB _BLUE/AMB_0603

2 1

4 3

R7113.3K_0402_5%

1 2

R932.2K_0402_5%

1 2 LED3

19-213A/T1D-CP2Q2HY/3T 0603 WHITE

2 1

R7083.3K_0402_5%

1 2

R7103.3K_0402_5%

1 2

B

A

LED2

HT-297UD/CB _BLUE/AMB_0603

2 1

4 3

R7093.3K_0402_5%

1 2

Page 33: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_PCIE_VGACLK_PCIE_VGA#

PEG_NRX_GTX_N0PEG_NRX_GTX_P0

PEG_NRX_GTX_P1PEG_NRX_GTX_N1

VGA_DAT_LCDVGA_CLK_LCD

VGA_ENBKL

ENVDD

VGA_CRT_R

VGA_TV_CRMA

VGA_TV_LUMA

VGA_TV_COMPS

VGA_CRT_B

VGA_CRT_GVGA_CRT_HSYNCVGA_CRT_VSYNC

VGA_DDC_DATAVGA_DDC_CLK

CLK_NV_27MCLK_NVSS_27M

VGA_LVDSAC+VGA_LVDSAC-

VGA_LVDSA1+VGA_LVDSA1-

VGA_LVDSA0-VGA_LVDSA0+

VGA_LVDSA2-VGA_LVDSA2+

PEG_NTX_GRX_N1PEG_NTX_GRX_P1

PEG_NTX_GRX_P0PEG_NTX_GRX_N0

PEG_NTX_GRX_P2PEG_NTX_GRX_N2

PEG_NTX_GRX_N3PEG_NTX_GRX_P3

PEG_NTX_GRX_N4PEG_NTX_GRX_P4

PEG_NTX_GRX_P5PEG_NTX_GRX_N5

PEG_NTX_GRX_N6PEG_NTX_GRX_P6

PEG_NTX_GRX_P7PEG_NTX_GRX_N7

PEG_NTX_GRX_N8PEG_NTX_GRX_P8

PEG_NTX_GRX_P9PEG_NTX_GRX_N9

PEG_NTX_GRX_N10PEG_NTX_GRX_P10

PEG_NTX_GRX_N11PEG_NTX_GRX_P11

PEG_NTX_GRX_N12

PEG_NTX_GRX_P13PEG_NTX_GRX_N13

PEG_NTX_GRX_P12

PEG_NTX_GRX_P14PEG_NTX_GRX_N14

PEG_NTX_GRX_P15PEG_NTX_GRX_N15

PEG_NRX_GTX_P2PEG_NRX_GTX_N2

PEG_NRX_GTX_N3PEG_NRX_GTX_P3

PEG_NRX_GTX_N4PEG_NRX_GTX_P4

PEG_NRX_GTX_P5PEG_NRX_GTX_N5

PEG_NRX_GTX_N6PEG_NRX_GTX_P6

PEG_NRX_GTX_P7PEG_NRX_GTX_N7

PEG_NRX_GTX_N8PEG_NRX_GTX_P8

PEG_NRX_GTX_P9PEG_NRX_GTX_N9

PEG_NRX_GTX_N10PEG_NRX_GTX_P10

PEG_NRX_GTX_N11PEG_NRX_GTX_P11

PEG_NRX_GTX_N12

PEG_NRX_GTX_P13PEG_NRX_GTX_N13

PEG_NRX_GTX_P12

PEG_NRX_GTX_P14PEG_NRX_GTX_N14

PEG_NRX_GTX_P15PEG_NRX_GTX_N15

PEG_NRX_GTX_N[0..15]

PEG_NRX_GTX_P[0..15]

PEG_NTX_GRX_N[0..15]

PEG_NTX_GRX_P[0..15]

VGA_ON

VGA_PWGOD#

CLK_PCIE_VGA15CLK_PCIE_VGA#15

PLT_RST#7,18,22,24,28,29

VGA_CLK_LCD 16VGA_DAT_LCD 16

VGA_LVDDEN 16

VGA_ENBKL 16

VGA_CRT_R 17

VGA_CRT_G 17

VGA_CRT_B 17

VGA_TV_CRMA

VGA_TV_COMPS

VGA_TV_LUMA

VGA_HSYNC17VGA_VSYNC17

EC_SMB_CK24,29EC_SMB_DA24,29

VGA_DDCDATA17VGA_DDCCLK17

CLK_NV_27M15CLK_NVSS_27M15

VGA_LVDSAC- 16VGA_LVDSAC+ 16

VGA_LVDSA0- 16VGA_LVDSA0+ 16

VGA_LVDSA1- 16VGA_LVDSA1+ 16

VGA_LVDSA2- 16VGA_LVDSA2+ 16

SUSP# 28,29,36,40,41

PEG_NRX_GTX_N[0..15] 9

PEG_NRX_GTX_P[0..15] 9

PEG_NTX_GRX_N[0..15] 9

PEG_NTX_GRX_P[0..15] 9

VGA_ON29

VGA_THER#29

VGA_PWGOD#36

+3VS

+1.8VS +3VS +5VSB+

B+ +1.8VS

+5VS

+5VALW+3VALW

+1.5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

MXM ConnectorCustom

33 45Monday, December 15, 2008

2006/08/18 2007/8/18Compal Electronics, Inc.

C424

4.7U_0805_10V4ZVGA@

1

2

C427

0.1U_0402_16V4ZVGA@

1

2

JP57A

ACES_88990-2D08

PWR_SRC1PWR_SRC3PWR_SRC5PWR_SRC7PWR_SRC9PWR_SRC11PWR_SRC13PWR_SRC15GND17GND19GND21GND23

PEX_RX15#25PEX_RX1527GND29PEX_RX14#31PEX_RX1433GND35PEX_RX13#37PEX_RX1339GND41PEX_RX12#43PEX_RX1245GND47PEX_RX11#49PEX_RX1151GND53PEX_RX10#55PEX_RX1057GND59PEX_RX9#61PEX_RX963GND65PEX_RX8#67PEX_RX869GND71PEX_RX7#73PEX_RX775GND77PEX_RX6#79PEX_RX681GND83PEX_RX5#85PEX_RX587GND89PEX_RX4#91PEX_RX493GND95PEX_RX3#97PEX_RX399GND101PEX_RX2#103PEX_RX2105GND107

1V8RUN 21V8RUN 41V8RUN 61V8RUN 81V8RUN 101V8RUN 121V8RUN 14

RUNPWROK 165VRUN 18

GND 20GND 22GND 24

PRSNT2# 26PEX_TX15# 28PEX_TX15 30

GND 32PEX_TX14# 34PEX_TX14 36

GND 38PEX_TX13# 40PEX_TX13 42

GND 44PEX_TX12# 46PEX_TX12 48

GND 50PEX_TX11# 52PEX_TX11 54

GND 56PEX_TX10# 58PEX_TX10 60

GND 62PEX_TX9# 64PEX_TX9 66

GND 68PEX_TX8# 70PEX_TX8 72

GND 74PEX_TX7# 76PEX_TX7 78

GND 80PEX_TX6# 82PEX_TX6 84

GND 86PEX_TX5# 88PEX_TX5 90

GND 92PEX_TX4# 94PEX_TX4 96

GND 98PEX_TX3# 100PEX_TX3 102

GND 104PEX_TX2# 106PEX_TX2 108

C426

4.7U_0805_10V4ZVGA@

1

2

C425

0.1U_0402_16V4ZVGA@

1

2

C429

0.1U_0402_16V4ZVGA@

1

2

JP57B

ACES_88990-2D08

PEX_RX1#109PEX_RX1111GND113PEX_RX0#115PEX_RX0117GND119PEX_REFCLK#121PEX_REFCLK123CLK_REQ#125PEX_RST#127RSVD129RSVD131SMB_DAT133SMB_CLK135THERM#137VGA_HSYNC139VGA_VSYNC141DDCA_CLK143DDCA_DAT145IGP_UCLK#147IGP_UCLK149GND151RSVD153RSVD155RSVD157IGP_UTX2#159IGP_UTX2161GND163IGP_UTX1#165IGP_UTX1167GND169IGP_UTX0#171IGP_UTX0173GND175IGP_LCLK#/DVI_B_CLK#177IGP_LCLK/DVI_B_CLK179DVI_B_HPD/GND181RSVD183RSVD185GND187IGP_LTX2#/DVI_B_TX2#189IGP_LTX2/DVI_B_TX2191GND193IGP_LTX1#/DVI_B_TX1#195IGP_LTX1/DVI_B_TX1197GND199IGP_LTX0#/DVI_B_TX0#201IGP_LTX0/DVI_B_TX0203DVI_A_HPD205DVI_A_CLK#207DVI_A_CLK209GND211DVI_A_TX2#213DVI_A_TX2215GND217DVI_A_TX1#219DVI_A_TX1221GND223DVI_A_TX0#225DVI_A_TX0227GND229

GND 110PEX_TX1# 112PEX_TX1 114

GND 116PEX_TX0# 118PEX_TX0 120PRSNT1# 122

TV_C/HDTV_Pr 124GND 126

TV_Y/HDTV_Y 128GND 130

TV_CVBS/HDTV_Pb 132GND 134

VGA_RED 136GND 138

VGA_GRN 140GND 142

VGA_BLU 144GND 146

LVDS_UCLK# 148LVDS_UCLK 150

GND 152LVDS_UTX3# 154LVDS_UTX3 156

GND 158LVDS_UTX2# 160LVDS_UTX2 162

GND 164LVDS_UTX1# 166LVDS_UTX1 168

GND 170LVDS_UTX0# 172LVDS_UTX0 174

GND 176LVDS_LCLK# 178LVDS_LCLK 180

GND 182LVDS_LTX3# 184LVDS_LTX3 186

GND 188LVDS_LTX2# 190LVDS_LTX2 192

GND 194LVDS_LTX1# 196LVDS_LTX1 198

GND 200LVDS_LTX0# 202LVDS_LTX0 204

GND 206DDCC_DAT 208DDCC_CLK 210

LVDS_PPEN 212LVDS_BL_BRGHT 214

LVDS_BLEN 216DDCB_DAT 218DDCB_CLK 220

2V5RUN 222GND 224

3V3RUN 2263V3RUN 2283V3RUN 230

C1443

0.1U_0603_25V7KVGA@ 1

2

Page 34: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

ScrewsCustom

34 45Monday, December 15, 2008

2007/1/15 2008/1/15Compal Electronics, Inc.

H_3P0

H_3P7

H_4P2

H_3P2

H_5P6

H_4P4 H_3P1N

H27HOLEA

1

H21HOLEA

1

H12HOLEA

1

FD4

@1

H34HOLEA

1

H16HOLEA

1

H28HOLEA

1

H26HOLEA

1

H31HOLEA

1

H37HOLEA

1

H36HOLEA

1

H3HOLEA

1

H4HOLEA

1

H33HOLEA

1

H9HOLEA

1

H11HOLEA

1

H22HOLEA

1H29HOLEA

1

H15HOLEA

1

H6HOLEA

1

H10HOLEA

1

H23HOLEA

1

H30HOLEA

1

H5HOLEA

1

H24HOLEA

1H20HOLEA

1

FD3

@1

H14HOLEA

1

H8HOLEA

1

FD2

@1

H35HOLEA

1

H7HOLEA

1

FD1

@1

H25HOLEA

1

H19HOLEA

1

H17HOLEA

1

H18HOLEA

1

H2HOLEA

1

H13HOLEA

1

Page 35: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

A A

Title

Size Document Number Rev

Date: Sheet of

LA-4841P 1.0

<Title>

Custom

35 45Monday, December 15, 2008

ACIN/BATT-IN

→←

→←→

←→

←→

←→

← →

→←

→←

←→

→←→

5VALW/3VALW

EC_ON

ON/OFF#

PWRBTN_OUT#

RSMRST#

SLP_S5#

SLP_S3# →←

SYSON#

1.8V

SUSP# ←→+5VS

+3VS

+1.5VS

+0.9VS

VCCP

VR_ON

CPU_CORE

VGATE

CLK_MCH_BCLK

ICH_PWROK

PCI_RST#

H_PWRGOOD

H_RESET#

←→←

→←

← →

←→

SLP_S4#

864us

360ms

644ms

→←250ms

1.59ms

←30.6us

30us

2.74ms

3.88s888us

104us 112us

2.02ms

1.46ms

24.1ms

1.20ms

5.26ms

1.03ns

114ms

1.20ms

1.06ms

2.20ms

→←

CK_PWRGD

This signal isasserted high whenboth SLP_S3# andVRMPWRGD are high

SUSCLKSuspend Clock (32KHz) ICH9 internal clock

KAL80 POWER UP SEQUENCE

51ON#(only BATT-IN)

126ms

← →

→←244ms

Page 36: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

SUSP

SUSP SUSPSUSP

SUSP

SYSON#

SUSP#

SYSON#

RUNON 3VS_GATERUNON 5VS_GATE

SUSP

1.8VS ON 1.8VS_GATE

SUSP

SYSON

VGA_PWGOD#

SUSP#28,29,33,40,41

SUSP27,42

SYSON28,29,41

VGA_PWGOD#33

+5VS+5VALW

+5VS

+3VS+3VALW

+1.5VS

B+_BIAS

+CPU_CORE

+1.8V +3VS

+5VALW

+3VALW

+0.9VS

+VCCP

+1.8VS+1.8VB+_BIAS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4841P 1.0

DC/DC CircuitsCustom

36 45Monday, December 15, 2008

2007/1/15 2008/1/15

Discharge circuit-1

+5VALW to +5VS Transfer+3VALW to +3VS Transfer

Compal Electronics, Inc.

4.7A

+1.8V to +1.8VS Transfer

SYSON -> SUSP# -> VGA_ON->VGA_PWGOD

4A 8AU40

SI4800DY_SO8

S 1S 2S 3G 4

D8D7D6D5

G

D

S Q12SSM3K7002FU_SC70-3

2

13

R608100K_0402_5%

VGA@

1 2

G

D

SQ48

SSM3K7002FU_SC70-3VGA@

2

13

G

D

SQ18

SSM3K7002FU_SC70-3

2

13

G

D

S Q39SSM3K7002FU_SC70-3

2

13

R12

2747

K_04

02_5

%

VGA@

12

R409

100K_0402_5%

12

R198

330K_0402_5%1

2

G

D

S Q37SSM3K7002FU_SC70-3

2

13

C697

10U_0805_10V4Z~N

VGA@

1

2

R133

470_0402_5%

12

C271

10U_0805_10V4Z~N

1

2

G

D

S Q38SSM3K7002FU_SC70-3

2

13

U39

SI4800DY_SO8

S 1S 2S 3G 4

D8D7D6D5

C211 0.1U_0402_16V4Z~N

1 2

G

D

S

Q42SSM3K7002FU_SC70-3

2

13

R33810K_0402_5%1

2

R6650_0402_5%@

1 2

C2640.01U_0402_25V7K~N

1

2

C279

0.01U_0402_25V7K~N

1

2

C6960.01U_0402_25V7K~NVGA@

1

2

R340

100K_0402_5%

12

R351

470_0402_5%

12

R26747K_0402_5%

1 2

R36510K_0402_5%1

2

G

D

S

Q32SSM3K7002FU_SC70-3

2

13

C727

10U_0805_10V4Z~NVGA@

1

2

U41

SI4800DY_SO8

VGA@

S 1S 2S 3G 4

D8D7D6D5

R383

470_0402_5%

12

R382

470_0402_5%

12

C283

10U_0805_10V4Z~N

1

2

C284

0.1U_0402_16V4Z~N

1

2

C728

0.1U_0402_16V4Z~N VGA@

1

2

C278

10U_0805_10V4Z~N

1

2

R391

470_0402_5%

12

G

D

S Q33SSM3K7002FU_SC70-3

2

13

C465

0.1U_0402_16V4Z~N

1

2

R197100K_0402_5%

1 2

C256

10U_0805_10V4Z~N

1

2

Page 37: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

51ON#_Gate

CHGRTCP

VinDe_Ref

VinDe_INN41VinDe_Out

ACIN 20,29,38

51ON#30

VINVIN

RTCVREF

VS

+3VALW

+5VALW+5VALWP

+3VALWP

VINADPIN

VIN

VS

BATT+

RTCVREF

+VCCP

+0.9VS

+1.5VSP +1.5VS

+0.9VSP

+VCCPP+1.8V+1.8VP

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

KFW11 1.0Custom

37 45Monday, December 15, 2008

2006/10/1 2007/5/01

3.3V

L-->H 18.234 17.841 17.449 H-->L 17.597 17.210 16.813

Vin Detector

Max. typ. Min.

DCIN / Precharge

PC6

100P

_040

2_50

V8J~

D 12

PC5

1000

P_04

02_5

0V7K

~D

12PC

210

0P_0

402_

50V8

J~D1

2

PR13200_0805_5%

12

PQ1TP0610K-T1-E3_SOT23-3

2

13

PC11

0.22

U_1

206_

25V7

K

12

PR510K_0402_5%~D

12

PC8

0.01

U_0

402_

25V7

K~D

12

PJP13JUMP_43X118@

11 2 2

PJP12JUMP_43X118@

11 2 2

PJP8JUMP_43X118@

11 2 2

PU1A

LM393DR_SO8

+3

-2 O 1

P8

G4

PC12200P_0402_50V7K~D@

1 2

1

2

3

4

PJPDC1

ACES_88290-044G@

1

2

4

3

5

6

PC3

1000

P_04

02_5

0V7K

~D

12

PR910K_0402_5%~D

12

PC91000P_0402_50V7K~D

12

PR1068_1206_5%

12

PJP4JUMP_43X118@

11 2 2

PR156K_0402_5%~D@

1 2

PR21M_0402_1%~N1 2

PR41K_0402_5%~D

1 2

PU3

APL5156-33DI-TRL_SOT89-3

VIN 2

GND

1

VOUT3

PJP10JUMP_43X118@

11 2 2

PC4

100P

_040

2_50

V8J~

D12

PR710K_0402_5%~D

12

PR8

19.6

K_04

02_1

%~D 1

2

PJP6JUMP_43X118@

11 2 2

PJP11JUMP_43X118@

11 2 2

PD2

RLS4148_LL34-212

PR622K_0402_1%~D

1 2

PD1RLZ4.3B_LL34

12

PD3

RLS4148_LL34-2

12

PJP1JUMP_43X118@

11 2 2

PC141U_0805_25V4Z~D

12

PR1468_1206_5%

12

PC10

0.1U

_040

2_16

V7K~

D

32.3

12

PJP2JUMP_43X118@

11 2 2

PC13

4.7U

_080

5_6.

3V6K

~D12

PC120.1U_0603_25V7K~D

12

PR11100K_0402_5%~D

12

PR382.5K_0402_1%~D

12

PU1B

LM393DR_SO8

+5

-6 O 7

P8

G4

PC7

1000

P_04

02_5

0V7K

~D1

2

PL1SMB3025500YA_2P

1 2

PR1222K_0402_5%~D

1 2

PJP7JUMP_43X118@

11 2 2

Page 38: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

GATE

ACOFF

DL_CHG

SRP

SRN

VADJ

REGN

ACSET

GATE

RE

GN

/BATDRV

ACNACP

ACDET

DH_CHG

IADAPT

OVPSET

ACDRV

PVC

C

/BATDRV

LX_CHG

VADJ

ACOP

CHG_B+

CHGEN#

ACSET

BTST

ACGOOD#

CH

GEN

#

ACGOOD#

IREF 29

ACOFF 29

FSTCHG29

ACIN 20,29,37

ADP_I29

CHGVADJ29

VREF

VREF

BATT+

VIN

VREF

+3VALW

B+

VREF

VREF

B+_BIAS

+5VALW

B+

RTCVREF

+3VALW

+COINCELL

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Charger

B

38 45Monday, December 15, 2008

2006/10/1 2007/5/01Compal Electronics, Inc.

90W adapter

Input UVP : 16.98V

Icharge=(Vsrset/Vvdac)*(0.1/PR222)=3A

Fsw : 300KHz

Iadapter=(Vacset/Vvdac)*(0.1/PR217)=4.27A

Input OVP : 22.3V

CP setting

ICHG setting

IREF Current

2.916V 3A

KFW11

0V 3V

0.486V 0.5A

CHGVADJ Battery Voltage/per cell

3.3V 4.2V

COIN RTC Battery

PR870_0402_5%~D@

12

G

D

S

PQ14SSM3K7002F_SC59-3

2

13

PC44

0.1U

_080

5_25

V7M

~N

12

G

D

S

PQ16RHU002N06_SOT323-3

2

13

PQ4FDS4435BZ_SO8

S 1S 2S 3G 4

D8D7D6D5

PQ6

AO4466_SO8

365 7 8

2

4

1

PC400.1U_0603_25V7K~D

12

PU4

BQ24751ARHDR_QFN28_5X5

ACN2ACP3

CHGEN1

ACSET6

IADAPT 15

VADJ12

PGND 22

ACDET5

ACOP7

BAT 17

BATDRV14

CELLS 20

SRN 18

SRP 19

LODRV 23

ACDRV4

VREF10

LEARN 21

SRSET 16

AGND9

VDAC11

OVPSET8

ACGOOD13

PVCC 28

HIDRV 26

PH 25

BTST 27

REGN 24

TP 29

PQ9SI2301BDS-T1-E3_SOT23-3

21

3

PC25

4.7U

_120

6_25

V6K~

D12

PR52340K_0402_1%~D

12

PC31

680P

_060

3_50

V7K~

D

12

PR50499K_0402_1%~D

12

G

D

S

PQ11SSM3K7002F_SC59-3

@

2

13

PR440_0402_5%~D@

12

PD9

1SS3

55_S

OD

323-

212

PC340.47U_0603_16V7K~N

1 2

PC46

0.1U

_060

3_25

V7K~

D1

2

PR53

220K

_040

2_5%

12

PC19

4.7U

_120

6_25

V6K~

D12

PC390.1U_0603_25V7K~D

12

PR3454.9K_0402_1%

12

PC450.1U_0402_16V7K~D

1 2

PR39100K_0402_1%~D

@ 12

PR294.7_1206_5%~D

12

PR23

3.3_

1210

_5%

~D12

PR272.2_0603_5%~D1 2

PC42100P_0402_50V8J~D

12

PC150.01U_0603_50V7K~D1

2

PR47

470K

_040

2_5%

~D

12

PC26

1000

P_04

02_5

0V7K

~D12

PQ12TP0610K-T1-E3_SOT23-3

2

13

PJP15

SUYIN_060003FA002G201NL

@

1122G13G24

PC272.2U_0805_25V6K1

2

PR48210K_0402_1%~D

1 2

PC301U_0603_10V6K~D

12

PR280.02_2512_1%

1

3

4

2

PR210.015_2512_1%

1

3

4

2

PD7

RLS4148_LL34-2

12

PJP14

JUMP_43X118@1 122

PR32100K_0402_1%~D

12

PR46100K_0402_1%~D

12

PR33340K_0402_1%~D

12

PR25340K_0402_1%~D

12

PC33

10U

_120

6_25

V6M

~D

12

PC240.1U_0402_16V7K~D

1 2PR24

100K

_040

2_1%

~D12

PC180.1U_0603_25V7K~D

12

PC32

10U

_120

6_25

V6M

~D

12

PC160.1U_0805_25V7K1 2

PC280.1U_0603_25V7K~D

1 2

PC290.01U_0402_25V7K~D

@

12

PR40100K_0402_1%~D

@

12

PR43

100_0805_5%~D

1 2

PC360.1U_0603_25V7K~D

12

PC170.1U_0603_25V7K~D

12

PL310U_LF919AS-100M-P3_4.5A_20%

1 2

PR3156.2K_0402_1%~D

1 2

PR49100K_0402_1%~D

12

PR37

47K_0402_1%~D12

PC21

1000

P_04

02_5

0V7K

~D12

PQ5FDS4435BZ_SO8

S1S2S3G4

D 8D 7D 6D 5

PR4210_0603_5%~D

1 2

G

D

S

PQ15SSM3K7002F_SC59-3

2

13

PR51

220K

_040

2_5%

12

PC20

0.01

U_0

402_

25V7

K~D

12

PR26

3.3_

1210

_5%

~D 12

PR35100K_0402_1%~D

1 2

PR22100K_0402_1%~D

12

PC381U_0603_10V6K~D

12

PC410.01U_0402_25V7K~D@

12

PR3054.9K_0402_1%

12

PC22

4.7U

_120

6_25

V6K~

D12

PR86

0_0402_5%~D1 2

PQ8

AO4712_SO8

365 7 8

2

4

1

PC23

0.01

U_0

402_

25V7

K~D

12

PR38100K_0402_1%~D

12

PR45200K_0402_1%~D

12

PC370.1U_0603_25V7K~D

12

PC350.1U_0402_16V7K~D

1 2

G

D

S

PQ13SSM3K7002F_SC59-3

2

13

PQ7FDS4435BZ_SO8

S1

S2

S3

G4

D8

D7

D6

D5

Page 39: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

6237_TON

ILIM2

BST3A BST5A

LX5

DL5

FB3

2VR

EF_

ISL6

237

6237_SKIP

2VR

EF_

ISL6

237

DH5DH3

EN_LDO

LX3

FB5

ILM1

6237_EN2

6237_EN1

DL3

6237_NC

MAINPWON44

POK 20

VL

VL

ISL6237_B+

VS

+3VALWP

+5VALWP

B+

VL

2VREF_ISL6237

ISL6237_B+

VL

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

KFW11 1.0Custom

39 45Monday, December 15, 2008

2006/10/1 2007/05/30Compal Electronics, Inc.+3VALWP, +5VALWP

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

3.3VALWP

Imax=6A

Iocp=9A

Fsw=300kHz

5VALWP

Imax=6A

Iocp=9A

Fsw=400kHz

PR74

0_0402_5%~D

@

12

PC65

1U_0

603_

10V

6K~D

12

PR540_0805_5%1 2

PR690_0402_5%~D@

12

PC580.1U_0603_25V7K~D1

2

PQ19AO4712_SO8

36 578

2

4

1

PC

5222

00P

_040

2_50

V7K

~D1

2

PC66

0.04

7U_0

603_

16V

7K~D

12

PR

574.

7_12

06_5

%~D 1

2

PR

564.

7_12

06_5

%~D

12

PR72

0_0402_5%~D

12

PC

514.

7U_0

805_

25V

6K~D

12

PR55

0_0603_5%~D12

PD11

1SS355_SOD323-2

1 2

PL4

4.7UH_PCMC063T-4R7MN_5.5A_20%12

PJP16JUMP_43X118@

11 2 2

PD10RLZ5.1B_LL34

1 2 PR67

255K_0402_1%~D12

PL5

4.7UH_PCMC063T-4R7MN_5.5A_20%1 2

PR65100K_0402_1%~D

1 2

PQ18

AO4466_SO8

365 7 8

2

4

1

+ PC62330U_D3L_6.3VM_R25M

1

2

PR

6620

0K_0

402_

5%~D

12

PC561U_0603_10V6K~D1 2

PR63 0_0402_5%~D@12

PC530.1U_0603_25V7K~D 1

2

PR58

0_0603_5%~D12

PC

484.

7U_0

805_

25V

6K~D

12

PC590.1U_0603_25V7K~D 1

2

PR64 0_0402_5%~D1 2

PC

504.

7U_0

805_

25V

6K~D

12

PR68

255K_0402_1%~D

12

PR7347K_0402_5%~D@

1 2

PQ17

AO4466_SO8

36 578

2

4

1

PC

670.

047U

_040

2_16

V7K

~N

@

12

PQ21TP0610K-T1-E3_SOT23-3

2

1 3

PR

6210

K_0

402_

1%~D

12

PC

4922

00P

_040

2_50

V7K

~D1

2

PC63 0.22U_0603_10V7K~D

1 2

PR

6061

.9K

_040

2_1%

~D1

2PR

590_

0402

_5%

~D

12

PC

54

1U_0

603_

10V

6K~D

12

PR

71

806K

_060

3_1%

12

PQ20

AO4712_SO8

365 7 8

2

4

1

PC

6068

0P_0

603_

50V

7K~D

12

PR

6110

K_0

402_

1%~D

@12

+PC57

330U_D3L_6.3VM_R25M

1

2P

C47

4.7U

_080

5_25

V6K

~D1

2

PC

61

680P

_060

3_50

V7K

~D1

2

PU5

SN0806081RHBR_QFN32_5X5

DRVH226

VBST224

LL225

DRVL223

VOUT230

REFIN232

TON

SE

2

LDOREFIN8

NC20

EN_LDO4

EN227

EN114

PGOOD1 13

PGOOD2 28

V5DRV 19

V5F

ILT

3

SKIPSEL 29

LDO

7

TRIP2 31

VSW 9

VOUT1 10

GN

D21

PGND 22

DRVL1 18

LL1 16

VBST1 17

DRVH1 15

VIN

6V

RE

F35

VREF21

FB1 11

TRIP1 12

TP33

PC640.22U_0603_25V7-K

12

PC

55

4.7U

_080

5_6.

3V6K

~D12

PR

700_

0402

_5%

~D

12

Page 40: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

6268_1.5V

LG_1.5V

ISEN_1.5V

PHASE_1.5V

UG_1.5V

6268_B+

BOOT_1.5V

6268_1.5V

6268_1.5V

SUSP#28,29,33,36,41

B+

+1.5VSP

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

KFW11 1.0

1.5VSP

40 45Monday, December 15, 2008

2006/10/1 2007/05/30

1.5VSP

Imax=3.5A

Iocp=6A

Fsw=294kHz

+1.5VSP

Compal Electronics, Inc.

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

PL64.7U_D104C-919AS-4R7N_5.2A_20%

1 2

PC75

0.1U_0402_16V7K~D

@12

PQ22AO4466_SO8

365 7 8

2

4

1

PR822K_0402_1%~D

12

PR794.7_1206_5%~D

12

PR75

10K_0402_1%~D@

1 2

PC79

2200

P_04

02_5

0V7K

~D

12

PC69

10U

_120

6_25

V6M

~D

12

PC68

10U

_120

6_25

V6M

~D

@

12

PR815.11K_0402_1%~D

1 2

PR8445.3K_0402_1%~D

12

PU6ISL6268CAZ-T_SSOP16

EN5

BO

OT

15

PVCC 14VIN3

VCC4

PG

OO

D2

PH

AS

E1

UG

16

LG 13

PGND 12

VO

10

CO

MP

6

FB7

FSE

T9

ISEN 11

GN

D8

PC70

0.1U_0603_25V7K~D

1 2PR76

0_0603_5%~D

1 2

PR83

49.9K_0402_1%~D

12

PC71

2.2U_0603_6.3V6K~D

1 2

PR78 4.7_0603_5%~D1 2

PR770_0603_5%~D

12

PC77

22P_

0402

_50V

8J~D1

2

PC76680P_0603_50V8J~D

12

+ PC73220U_6.3V_M

1

2

PC722.2U_0603_6.3V6K~D

12

PR800_0402_5%~D1 2

PQ23AO4712_SO8

365 7 8

2

4

1

PJP17JUMP_43X118@

11 2 2

PC780.01U_0402_25V7K~D

12

PC744.7U_0805_6.3V6K~D

12

PR851.33K_0402_1%~D

12

Page 41: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

UG_1.8VP

LX_1.8VP

BST_1.8VP

LG_1.8VP

UG_VCCPP

LG_VCCPP

LX_VCCPP

BST_VCCPP+1.8VP

FB2_+1.8VP

SYSON 28,29,36

SUSP#28,29,33,36,40

+1.8VP

ISL6228_B+

+5VALWP

+VCCPP

+5VALWP

ISL6228_B+

ISL6228_B+ ISL6228_B+

+5VALWP +5VALWP

B+ISL6228_B+

+5VALWP

+5VALWP

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

VCCPP/1.8VP

41 45Monday, December 15, 2008

2006/10/1 2007/5/01

KFW11

DCR 7.6m ohm(max)DCR 7.6m ohm(max)

+VCCPP

Imax=6A

Iocp=9A

Fsw=366kHz

1.8VP

Imax=6A

Iocp=9A

Fsw=303kHz

PJP19JUMP_43X118@

11 2 2

PR122

681_0402_1%~D

12

PR12134K_0402_1%~D

12

+

PC11

622

0U_D

2_4V

M

1

2

PR11522K_0402_1%~D

12

PC111

0.01U_0402_25V7K~D@

1 2

PR110

0_0402_5%~D

12

PU8

ISL6228HRTZ-T_QFN28_4X4

FSE

T21

VIN

22

VC

C2

3

VC

C1

4

VIN

15

FSE

T16

PG

OO

D1

7

FB18

VO19

OCSET110

EN111

PHASE112

UGATE113

BOOT114

PV

CC

115

LGA

TE1

16

PG

ND

117

PG

ND

218

LGA

TE2

19

PV

CC

220

BO

OT2

21

UGATE2 22

PHASE2 23

EN2 24

OCSET2 25

VO2 26

FB2 27

PGOOD2 28

GND_T 29

PC10

94.

7U_1

206_

25V6

K~D1

2

PR11690.9K_0402_1%~D

12

PC11

04.

7U_1

206_

25V6

K~D1

2

PC1071000P_0402_50V7K~D

1 2

PC10

368

0P_0

402_

50K

X7R

~D12

PR109

2.2_0603_1%~D

1 2

PR1274.7_1206_5%~D

12

PC114

.01U_0402_16V7K~D

1 2

PR12812.1K_0402_1%~D

12

PC120

0.1U_0402_16V7K~D

1 2

PR1260_0402_5%~D

1 2

PR123

68K_0402_1%~D

1 2

PC981U_0402_6.3V6K~D1

2PR1304.7_1206_5%~D

12

PC1051000P_0402_50V7K~D1

2PC1221U_0402_6.3V6K~D1

2

PC1211U_0402_6.3V6K~D1

2

+

PC11

922

0U_D

2_4V

M

1

2

PC11

24.

7U_1

206_

25V6

K~D1

2

PQ30FDS8884_SO8

365 7 8

2

4

1

+

PC11

522

0U_D

2_4V

M

@ 1

2

PC12

368

0P_0

603_

50V8

J~D

12

PR119

12.1K_0402_1%~D

1 2

PC10

247

0P_0

402_

50V8

J~D1

2

PC1041000P_0402_50V7K~D

12

PC108.01U_0402_16V7K~D

1 2

PQ29FDS8884_SO8

36 578

2

4

1

PR112

10_0603_1%

12

PR108

2.2_0603_1%~D

12

PC1000.1U_0603_25V7K~D

12

PC11

768

0P_0

603_

50V8

J~D

12 PR129

0_0603_5%~D

12

PR124

12.1K_0402_1%~D

1 2

PR12512.1K_0402_1%~D

12

PC971U_0402_6.3V6K~D 1

2

PC1010.1U_0603_25V7K~D

12

PR11418K_0402_1%~D

12

PR120

1K_0402_1%~D@

12

PC990.01U_0402_25V7K~D@

12

PR131

2.2_0603_5%~D

1 2

PC106

1000P_0402_50V7K~D

12

PC1180.1U_0402_16V7K~D

12

PR111

10_0603_1%

12

PL8

1.8U_D104C-919AS-1R8N_9.5A_30%

1 2

PC11

34.

7U_1

206_

25V6

K~D1

2

PQ32FDS6670AS_NL_SO8

S3

D6

D5

D7

D8

S2

G4

S1

PR118

68K_0402_1%~D

12

PR113

1K_0402_1%~D@

12

PR117

681_0402_1%~D

1 2

PQ31FDS6670AS_NL_SO8

S3

D6

D5

D7

D8

S2

G 4

S1

PL9

1.8U_D104C-919AS-1R8N_9.5A_30%

1 2

Page 42: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SUSP27,36

+3VALW

+0.9VSP

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

KFW11 1.0Custom

42 45Monday, December 15, 2008

2005/10/1 2007/05/30Compal Electronics, Inc.

+0.9VSP

PC13

310

U_0

805_

6.3V

6M~D1

2

PR136

0_0402_5%~D1 2

PR137

1K_0

402_

1%~D1

2

PC132

0.1U_0402_16V7K~D@

12

PC12

9

4.7U

_080

5_6.

3V6K

~D12

PU10

APL5331KAC-TRL_SO8~N

VOUT4

NC 5GND2

VREF3

VIN1 VCNTL 6

NC 7

NC 8

TP 9

PC131

0.1U_0402_16V7K~D

12

PC12

84.

7U_0

805_

6.3V

6K~D

12

PJP21JUMP_43X118@

11

22

G

D

SPQ33

RHU002N06_SOT323-3

2

13

PR134

1K_0

402_

1%~D1

2

Page 43: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PMON

UGATE_CPU2

LGATE_CPU2

VID

0

VID

1

VID

2

VID

3

VID

4

VID

5

VID

6

VSUM

VSUM

BOOT_CPU1

UGATE_CPU1

LGATE_CPU1

VR

_ON

_CP

U

DP

RS

LPV

R_C

PU

DP

RS

TP#_

CP

U

CLK

_EN

#_C

PU

3V3_

CP

UPVCC_CPU

FB2_CPU

BOOT_CPU2

RBIAS

PHASE_CPU2

NTC

VR_TT#

SOFT

OCSET

ISEN1

VCC_PRM

VW

COMP

VCC_PRM

FB_CPU

VCC_PRM

VD

IFF

PHASE_CPU1

VSUM

ISEN1ISEN2

VD

D_C

PU

Vin

_CP

U

DR

OO

P

DFB

VS

EN

_CP

U

RTN

ISEN2

CP

U_V

ID4 5

CP

U_V

ID3 5

CP

U_V

ID5 5

CP

U_V

ID2 5

CP

U_V

ID1 5

CP

U_V

ID0 5

CP

U_V

ID6 5

VR

_ON 29

DPRSLPVR7,20

H_DPRSTP#5,7,19

CLK_EN#

VGATE7,20,29

H_PSI#5

VCCSENSE5

VSSSENSE5

POW_MON

+3VS

+3VS

+5VS

+CPU_B+

+5VS

+CPU_CORE

B+

+CPU_B+

+CPU_B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

KFW11 1.0

+CPU_CORECustom

43 45Monday, December 15, 2008

2007/1/15 2008/1/15Compal Electronics, Inc.

Fsw=300kHz

PR

154

4.7_

1206

_5%

~D12

PR168

1_0402_5%~D

12

PR

151

1.91

K_0

402_

1%~D

12

PR171 97.6K_0402_1%~D1 2

PR

1490

_040

2_5%

~D1

2

PR

179

11K

_040

2_1%

~D

12

PL11 0.36UH_ETQP4LR36WFC_24A_20%

1

3

4

2

PQ39SI4634DY-T1-E3_SO8

4

7 865

123

PR

1420

_040

2_5%

~D1

2

PR

167

10K

_040

2_1%

~D1

2

PC167 180P_0402_50V8J~D1 2

PC1530.068U_0603_50V7K~N1 2

PR169 0_0402_5%~D@1 2

PC160

0.22U_0603_16V7K~D

1 2

PR161 4.22K_0402_1%@1 2

PC145

0.22U_0603_10V7K~D

1 2

PC157680P_0603_50V8J~D

12

PC

143

1U_0

603_

10V

6K~D

12

PR141 0_0402_5%~D1 2

PR

1440

_040

2_5%

~D1

2PR

145

0_04

02_5

%~D

12

PR181 3.57K_0402_1%~D

1 2

PL12 0.36UH_ETQP4LR36WFC_24A_20%

1

3

4

2

PR139 499_0402_1%~D1 2

PR180 1K_0402_1%~D

1 2

+

PC

136

100U

_25V

_M

1

2

PC164 0.022U_0603_25V7K1 2

PQ34SI7686DP-T1-E3_SO8

35

2

4

1

+

PC

142

100U

_25V

_M

1

2

PR

1460

_040

2_5%

~D1

2

PC

144

1U_0

603_

10V

6K~D

12

PC162 1000P_0402_50V7K~D1 2

PR158 0_0402_5%~D@1 2

PR1644.7_1206_5%~D

12

ISL6262ACRZ-T_QFN48_7X7

PU11

29.1

PGOOD1

PSI#2

PMON3

RBIAS4

VR_TT#5

NTC6

SOFT7

OCSET8

VW9

COMP10

FB11

FB212

VD

IFF

13

VS

EN

14

RTN

15

DR

OO

P16

DFB

17

VO

18

VS

UM

19

VIN

20

GN

D21

VD

D22

ISE

N2

23

ISE

N1

24

NC 25

BOOT2 26

UGATE2 27

PHASE2 28

PGND2 29

LGATE2 30

PVCC 31

LGATE1 32

PGND1 33

PHASE1 34

UGATE1 35

BOOT1 36VID

037

VID

138

VID

239

VID

340

VID

441

VID

542

VID

643

VR

_ON

44

DP

RS

LPV

R45

DP

RS

TP#

46

CLK

_EN

#47

3V3

48

GN

D49

PC1591U_0603_10V6K~D

12

PC

137

0.01

U_0

402_

25V

7K~D 1

2

PR1381_0603_5%~D

12

PR153

499_0402_1%~D

12

PR1721K_0402_1%~D

12

PC

152

10U

_120

6_25

V6M

~D12

PC1541000P_0402_50V7K~D

1 2

PC1510.015U_0402_16V7K@1 2

PC1461U_0603_10V6K~D1 2

PH1

100K_0603_1%_TH11-4H104FT@

1 2

PC

140

10U

_120

6_25

V6M

~D 12

PC1660.022U_0603_25V7K

12

PR

166

3.65

K_1

206_

1%

12

PR165 6.81K_0402_1%~D1 2

PC

135

10U

_120

6_25

V6M

~D 12

PC156 1000P_0402_50V7K~D

1 2

PC170 0.22U_0603_10V7K~D12

PR

156

10K

_040

2_1%

~D1

2

PL10FBMA-L18-453215-900LMA90T_1812

1 2

PC1690.22U_0603_16V7K~D

12

PR160 147K_0402_1%~D1 2

PR

155

3.65

K_1

206_

1%

12

PQ38

SI4634DY-T1-E3_SO8

4

7 865

123

PR159 10K_0402_1%~D1 2

PC

141

10U

_120

6_25

V6M

~D 12

PC168 0.068U_0603_50V7K~N1 2

PR162 11.5K_0402_1%~D1 2

PC

147

680P

_060

3_50

V8J

~D

12

PR

1500

_040

2_5%

~D1

2

PC155

0.22U_0603_10V7K~D

1 2

PC1650.022U_0603_25V7K@

12

PC161 220P_0402_50V7K~D

1 2

PQ35SI4634DY-T1-E3_SO8

4

7 865

123

PH2

10KB_0603_5%_ERTJ1VR103J

12

PC

150

10U

_120

6_25

V6M

~D12

PR140 0_0402_5%~D1 2

PR

1480

_040

2_5%

~D1

2

PR173

255_0402_1%~D1 2

PR147 0_0402_5%~D1 2

PR

1430

_040

2_5%

~D1

2

PR

177

2.61

K_0

402_

1%~D

12

PR163

2.2_0603_5%~D

1 2

PC

138

1U_0

603_

10V

6K~D

12 P

C13

9

0.01

U_0

402_

25V

7K~D1

2

PQ36SI4634DY-T1-E3_SO8

4

7 865

123

PR1571_0402_5%~D

12

PC134

5600P_0402_25V7K@

12

PR178 0_0402_5%~D1 2

PR152

2.2_0603_5%~D

1 2

PC148

0.22U_0603_16V7K~D

1 2

PC158 470P_0402_50V7K~D12

PR170 1_0603_5%~D

1 2

PC163

0.1U_0603_25V7K~D

12

PQ37SI7686DP-T1-E3_SO8

35

2

4

1

PR176 0_0402_5%~D

1 2

PR175 1K_0402_1%~D

1 2

PR174

10_0603_5%~D

1 2

PC

149

10U

_120

6_25

V6M

~D 12

Page 44: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OTP_IN+

OTP_IN-OTP_OUT

BATT_TEMP

BATT

+

BATT

_B/I

BATT_OUTBATT_IN

BATT

_SM

D

BATT++

BATT

_SM

C

BATT_TEMP 29

EC_SMB_DA1 29

BATT_OVP29

MAINPWON 39

EC_SMB_CK1 29

VL

VL VS

VL

+3VALWP

BATT++BATT+

+3VALWP

BATT+

VS

+3VALWP

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

KFW11 1.0Custom

44 45Monday, December 15, 2008

2005/10/1 2007/05/30Compal Electronics, Inc.

CPU

SMARTBattery:

1.BAT+2.BAT+3.ID4.B/I5.SMC6.SMD7.TS8.GND9.GND

CPU

Recovery at 50 +-3 degree C

PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C

Place clsoe to EC pin

PJPB1 battery connector

BATTERY CONN

Battery Connect/OTP

LI-3S :13.50V--BATT-OVP=1.5V

BATT-OVP=0.111*BATT+

OVP voltage :

PC1760.1U_0603_25V7K~D1

2PR188340K_0402_1%~D

12

PD15

DA2

04U

_SO

T323

~D

@

231

PC1791U_0603_10V6K~D

12

PD13

DA2

04U

_SO

T323

~D

@

231

PR18247K_0402_5%~D

@

12

PC17

110

0P_0

402_

50V8

J~D1

2

PR186100_0402_5%~D

1 2

PR196105K_0402_1%~D

12

PR19361.9K_0402_1%~D1 2

PC17

410

0P_0

402_

50V8

J~D

12

PH3100K_0603_1%_TH11-4H104FT

12

PR18910.7K_0402_1%~D

12

PC1781000P_0402_50V7K~D

12

PD16

1SS355_SOD323-2

1 2

PR1856.49K_0402_1%~D

1 2

PR1831K_0402_5%~D

1 2

PU12ALM358ADR_SO8

+3

-2 0 1

P8

G4

PJP22

SUYIN_200275MR009G186ZL

@

1 1

3 34 45 56 6

8 89 9

2 2

7 7

GND11 GND10

PL13SMB3025500YA_2P

1 2

PC1731000P_0402_50V7K~D

12

PR190499K_0402_1%~D

12

PR197150K_0402_1%~D

12

PR19410K_0402_1%~D1 2

PR195150K_0402_1%~D

1 2

PR184

1K_0402_5%~D12

PU12B

LM358ADR_SO8

+ 5

- 607

P8

G4

PC1750.1U_0402_16V7K~D

@

12

PC1720.01U_0402_25V7K~D

12

PC17

70.

01U

_040

2_25

V7K~

D

12

PR192205K_0402_1%~D

12

PR187100_0402_5%~D

1 2

PR191147K_0402_1%~D1 2

PD14

DA2

04U

_SO

T323

~D

@

231

PD12

DA2

04U

_SO

T323

~D

@

231

PR198

1K_0402_5%~D12

Page 45: Compal Confidential...LA-4841P 1.0 Cover Sheet Custom Monday, December 15, 2008 145 2007/1/15 2008/1/15 Schematic Document Cantiga + ICH9 Rev:1.0 Compal Confidential 2008 / 12 / 10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

KFW11 1.0

PW PIR-1Custom

45 45Monday, December 15, 2008

2007/1/15 2008/1/15

Page 1/1Solution Description Rev.Page# Title

Version Change List ( P. I. R. List )Item Issue DescriptionDate

RequestOwner

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3

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6

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8

9

10

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12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

Compal Electronics, Inc.