Motorcycle Control PrototypingUsing an FPGA-Based Embedded Control SystemCARROLL DASE, JEANNIE SULLIVAN FALCON, and BRIAN MACCLEERY

A P P L I C A T I O N S O F C O N T R O L «

OCTOBER 2006 « IEEE CONTROL SYSTEMS MAGAZINE 171066-033X/06/$20.00©2006IEEE

T o develop a research engine control unit (ECU) thatwould be suitable for prototyping engine controlalgorithms as well as sensor and actuator design, we

needed reliable, high-performance hardware and customsoftware. Motorcycles, automobiles, and trucks ship withfactory ECUs designed to maximize performance whileminimizing cost. However, factory ECUs have closed soft-ware and hardware. The control gains, lookup tables, andconstants used in the control algorithms are also calibrat-ed for a particular engine design. The development anduse of a research ECU allow engine researchers to set up acontrol system with baseline performance equal to the fac-tory ECU and then investigate methods for improvingcontrol performance.

Our project involved the development of a researchECU for the 2004 Yamaha YZF-R6 motorcycle. Engine con-trol requires deterministic loop times on the order of mil-liseconds as well as precise fuel and spark timing on theorder of microseconds. In addition, the target engine revs to15,500 r/min. At this speed, there is less than 4 ms percrankshaft rotation, and the system must precisely controlfuel and spark events in the angle domain to less than 1◦.

The chosen approach to this problem depended heavilyon field programmable gate arrays (FPGAs). An FPGA is achip that consists of unconfigured logic gates. Unlike thefixed, vendor-defined functionality of an application-specific integrated circuit (ASIC) chip, an FPGA can be con-figured and reconfigured for different applications. FPGAsare used in applications where the cost of devel-oping and fabricating an ASIC is prohibitive orthe hardware must be reconfigured after beingplaced into service. FPGAs appear in devicessuch as electronic instruments, consumer elec-tronics, automobiles, aircraft, copy machines, andapplication-specific computer hardware.

Because FPGAs can be used to implementcustom algorithms in hardware, they offer bene-fits over processors, such as precise timing andsynchronization, rapid decision making, andsimultaneous execution of parallel tasks. How-ever, floating-point processors have a computa-tional advantage since FPGAs are limited tointeger math. This limitation can be partiallyovercome by using high-level development

tools, code, or IP cores that convert floating- point calcula-tions to integer math. However, a combinedFPGA/processor architecture can be used in control appli-cations to take advantage of the strengths of each device.

Drivven, Inc.’s library [1] includes cores for tracking theangular position of crankshafts from a variety of position-sensing formats and generating precise angle-based fueland spark commands. These tools provide a seamless pathfrom prototype to production for FPGA-based powertraincontrollers. Because this path includes early stages of pro-totyping, where flexibility and computing power are para-mount, we often choose PC-based hardware. For thisproject, which involved engine-control algorithm develop-ment as well as road testing, we chose a National Instru-ments (NI) CompactRIO (Figure 1) embedded controlsystem because of its flexibility, small size, and ruggedform factor. With this system, we can add sensors andactuators while readily visualizing the data. In addition,we can mount the controller in the limited space availablein a super-sport motorcycle. The unique computationalfeature of the CompactRIO system is that it includes both areal-time processor and an FPGA. Both devices are pro-grammable using the LabVIEW graphical developmentenvironment. With this combined architecture, multiplecontrol approaches and algorithms can be quicklydesigned and tested on the motorcycle.

Using the CompactRIO embedded control system, weprototyped a new engine control system for the Yamaha

FIGURE 1. CompactRIO embedded control system (4-slot configuration) fromNational Instruments. The real-time processor in the device controller is connect-ed to an FPGA on the backplane of the chassis through an internal PCI bus. Afully loaded 4-slot CompactRIO system weighs approximately 1.68 kg (3.71 lb)excluding a battery or power supply. The CompactRIO system, without externalconnectors attached, is 17.8 cm × 8.9 cm × 8.9 cm (7.0 in × 3.5 in × 3.5 in).

FPGA on Backplane of Chassis

I/O Modules

Real-Time Processor

18 IEEE CONTROL SYSTEMS MAGAZINE » OCTOBER 2006

YZF-R6 motorcycle. CompactRIO completely replaced theoriginal ECU located under the seat. Figure 2 shows theplacement of the CompactRIO system in the tail of themotorcycle. The factory ECU was originally located under-neath the seat but was removed after initial testing toreverse engineer the software and the calibrations. TheCompactRIO system is larger than the factory ECU and thuscannot be placed under the seat. Once an engine control sys-

tem has been tested with the research ECU, a modified fac-tory ECU can be designed and optimized to meet size andcost constraints.

The modified motorcycle was test driven extensively.Experienced drivers could not detect significant differ-ences between the factory ECU and CompactRIO controlsystem. Thus, the CompactRIO system was shown to be aneffective research ECU for the motorcycle. In the future,

new control algorithms can be designed and testedusing the CompactRIO system.

COMBINED PROCESSORAND FPGA ARCHITECTUREThe NI CompactRIO embedded control system is one ofseveral hardware platforms with combined processorand FPGA technology. NI also provides programmableplug-in FPGA boards for the PXI/cPCI Industrial Com-puter platform as well as for desktop computers.

The shared hardware architecture among the plat-forms is illustrated in Figure 3. The desktop PC andPXI/cPCI Industrial PC can run Windows or Lab-VIEW Real-Time [2] on the main floating-pointprocessor. LabVIEW Real-Time allows LabVIEW dia-grams to run on top of a commercial real-time operat-ing system for multiple types of targets. In both thedesktop and the PXI system, a plug-in FPGA boardcan be connected to the processor through the PCIbus. The boards are available with a combination ofanalog and digital I/O.

The CompactRIO architecture is similar to that ofthe desktop and PXI systems with FPGA plug-inboards. The floating-point processor, programmedwith LabVIEW Real-Time, is connected to the FPGAon the backplane through an internal PCI bus. TheFPGA is, in turn, connected to the analog and digitalI/O modules in a star topology. The CompactRIOmodules contain conversion circuitry (for analog mod-ules), isolation, signal conditioning, and breakoutenabling direct connection to devices such as relays,solenoids, and motors.

Because of the similar hardware architecture, acommon software application architecture can be usedfor all three platforms. This software architectureshown in Figure 4 includes a host program running ona Windows PC, a real-time program running on theprocessor, and an FPGA program running in hard-ware on the FPGA. The processor can run multipleloops at varying priorities including a time-criticalloop for both control and time-critical communicationwith the FPGA. The FPGA can run multiple loops inparallel for control, filtering, monitoring, and safety.

Two traditional methods are available for creatingFPGA designs, namely, the text-based programming lan-guages VHDL and Verilog. These languages, known col-lectively as hardware description languages (HDLs), are

FIGURE 2. The modified 2004 Yamaha YZF-R6 motorcycle. The factoryECU was removed from under the seat and replaced with the NationalInstruments CompactRIO embedded control system in the tail of themotorcycle.

FIGURE 3. Shared hardware architecture diagram for the National Instru-ments FPGA/processor platforms including CompactRIO, PXI/cPCI, andthe desktop PC. All of the platforms can be programmed with LabVIEWReal-Time for the processor and LabVIEW FPGA for the field program-mable gate array. The combined FPGA/processor architecture facilitatesthe design of hierarchical control systems and parallel processing forcontrol, filtering, monitoring, and safety.

Desktop PCLabVIEW (Windows or Real-Time)

NI PCI-78xx FPGA Board

NI PCI-78xx FPGA Board

Signal Conditioning

Signal Conditioning

Signal Conditioning

PXI/CompactPCI Industrial PCLabVIEW (Windows or Real-Time)

CompactRIO Industrial Controller

Real-Time Processor

FPGA (on Backplane)

OCTOBER 2006 « IEEE CONTROL SYSTEMS MAGAZINE 19

analogous to C for microprocessors. HDLs are powerful butrequire high levels of expertise to program. Higher level toolsare available for simplifying this practice. Examples includethe Xilinx System Generator for DSP (includes system model-ing and automatic code generation from Simulink and MAT-LAB) [3], Celoxica’s various C compilers [4], and LabVIEWFPGA [5].

For our project, the NI LabVIEW FPGA DevelopmentModule was used because of the integration with theCompactRIO tool chain. This development module con-tains several high-level blocks for control and signal pro-cessing that approximate floating-point implementationusing the integer math available with the FPGA. Inaddition, NI makes several toolkits that can be used withLabVIEW FPGA, namely, the Digital Filter Design Toolk-it, the SoftMotion Develop-ment Module, and the StateDiagram Toolkit [6].

All of the low-levelFPGA code, or IP cores, arewritten in Verilog andwrapped in a graphical Lab-VIEW FPGA HDL Nodeblock, allowing the underly-ing cores to be used in non-LabVIEW systems such asproduction engine con-trollers. Figure 5 shows thehigh-level LabVIEW FPGAcode used in this research.

The combined softwareand hardware architecturefacilitates the development ofhierarchical-control strate-gies. Some lower level con-trol loops can take placecompletely in the FPGA.Higher level control loopscan be written for the float-ing-point processor in thesystem. In addition, taskssuch as custom startup andshutdown behavior, inlinesignal processing, as well ascustom timing, synchroniza-tion, and digital communica-tion, can be implemented inthe FPGA. Time-critical par-allel tasks such as healthmonitoring and fault detec-tion can be developed on theFPGA as well.

While processors runcomputations in sequence,FPGAs can run computa-

tions in parallel. Although advanced processor architec-tures involve multiple cores, the FPGA is still the bestchoice for parallel computation. If multiple control loopsor tasks are implemented in a processor, the overall looprate decreases. Since multiple control loops and tasksimplemented in an FPGA can execute independently,extremely high loop rates can be achieved. The limitingfactor for FPGAs is the number of gates and the speed ofthe I/O hardware.

CUSTOM I/O MODULE DEVELOPMENTNI has developed a family of analog and digital I/O mod-ules with onboard signal conditioning and breakout con-nectors for the CompactRIO system. Some applications,however, may require specialized modules that are not

FIGURE 4. Shared software application architecture for National Instruments FPGA/processor plat-forms. A host PC communicates with the real-time target. The target contains a floating-point proces-sor and an FPGA. The processor can run multiple loops at varying priorities including a time-criticalloop for both control and time-critical communication with the FPGA. The FPGA can run multiple loopsin parallel for control, filtering, monitoring, and safety.

Windows PC

WindowsHost VI

NetworkCommunication

Normal PriorityVI

InterthreadCommunication

Time-CriticalInterface VI

FPGAInterface

LabVIEWFPGA VI

Enterprise

LabVIEWfor Windows

Data Storage

LabVIEW Real-Time LabVIEW FPGA

ReconfigurableFPGA

CompactRIO System

FIGURE 5. High-level LabVIEW FPGA code for motorcycle engine control using National InstrumentsCompactRIO. The code shows a single-cycle timed loop (similar to a while loop) and hierarchy throughsubprograms. The single-cycle timed loop ensures that all code within the loop executes in a single25-ns clock cycle of the FPGA.

20 IEEE CONTROL SYSTEMS MAGAZINE » OCTOBER 2006

included in the NI product offering. For these cases, NIprovides a CompactRIO module development kit with thesoftware, hardware, and documentation required to createcustom modules.

Drivven created three custom CompactRIO I/O mod-ules. The first module, the A/D combo module, provides22 single-ended, 12-bit analog inputs, two variable reluc-tance (VR) sensor inputs, and two Hall-effect sensorinputs. This module implements lowpass analog filters aswell as over/under voltage protection on all inputs. Thesecond module provides four channels for driving low-impedance port-fuel injectors and four low-side, inductive-load switches for driving general-purpose solenoids. Eachchannel can be diagnosed for open or short circuits anddisabled without CPU intervention. The third module pro-vides eight low-side inductive-style drivers for ignitioncoils. Each module is designed with low-cost circuitry forprototyping a production-oriented control system. As aresult, developers can realize the same I/O behavior inboth prototyping and production stages. These three mod-ules monitor all of the motorcycle sensors and control itsactuators. We have developed additional CompactRIOmodules for powertrain control applications, includingmodules for an electronic throttle driver, oxygen sensorcontroller, and common rail diesel injector driver modules.Drivven is working toward providing a complete selectionof CompactRIO modules for interfacing with all types ofautomotive sensors and actuators.

USER INTERFACE AND WIRELESS COMMUNICATIONLabVIEW provides customizable user interface and visual-ization capability. Figure 6 is a screen shot of the userinterface developed for this project. The interface has theability to adjust all of the calibration values of the engine

control code on the fly. The data communicated betweenthe laptop-based interface application and the Com-pactRIO real-time control application is transportedthrough the Ethernet TCP/IP protocol over a wireless link.A LabVIEW wizard generates LabVIEW code for commu-nicated parameters and tables by TCP/IP. The wirelesslink proved to be beneficial and can be maintained overshort distances (about 300 ft) between a chase vehicle andthe motorcycle during road testing. Breakdowns in thewireless link do not affect the operation of the real-timecontrol application.

MAPPING THE FACTORY ECUThe factory ECU was tested and mapped to reverse engi-neer the software and calibration of the control gains,lookup tables, and constants. Once this was done, baselineengine control performance for the motorcycle was estab-lished. In this phase, we carefully tapped into criticalmotorcycle sensors and actuators using CompactRIO, andlogged their signals and events at 200 Hz to the Com-pactRIO Flash file system. The signals and events includeintake air pressure and temperature, barometric air pres-sure, coolant temperature, throttle position, crank position,cam position, fuel injection start angle and pulse width,and spark advance. Our FPGA-based engine managementcode was used to track the position of the crankshaft (0.3°resolution) and capture the angle-based timing of the fuelinjection and spark events. For this process, the motorcyclewas driven along a straight road with minimal traffic, andthus it was not necessary to remove the engine from themotorcycle and install it on a dynamometer.

We recorded the ECU data to 1 Mb files (up to 20 filesat 1 file per minute) while riding the bike at numerouscombinations of throttle position and engine speed (nearly700 operating points) to fully map the behavior of the fac-tory ECU. The rider carefully drove the motorcycle so as toreduce transient operation as much as possible. An engi-neer in a chase vehicle periodically transferred the datafiles by wireless FTP from the CompactRIO to a laptop andanalyzed them for coverage of operating points. A laptop-based NI LabVIEW application sorted the data intospeed/load operating tables while filtering out transientdata. A mean and standard deviation were calculated fromthe data for each operating point. In two hours, the teamacquired data for 90% of the motorcycle’s operating points,which was ample coverage for understanding the map-ping of the factory ECU. Later, in the lab, engineersprocessed the data with LabVIEW, which provided three-and two-dimensional visualization while graphically mod-ifying the raw data to fill in the missing operating points.

ENGINE CONTROLIn the final phase, we used CompactRIO to prototype aresearch-oriented ECU, achieving performance compara-ble to the factory ECU while providing the ability to carry

FIGURE 6. LabVIEW host program user interface running on Win-dows. This program is used to communicate with the CompactRIOsystem over a wireless Ethernet link.

OCTOBER 2006 « IEEE CONTROL SYSTEMS MAGAZINE 21

out control algorithm research and development, which isnot possible with production-oriented electronics. WithCompactRIO, we implemented several of our engine-management FPGA cores, all of which have configurableLabVIEW FPGA icons placed on the block diagram. Wecan port these same cores directly to production FPGA-based controllers. Using LabVIEW Real-Time, we imple-mented a combination of speed-density and alpha-N enginecontrol strategies commonly found in high-performancerace applications.

A speed-density engine control method monitors theintake-air pressure and temperature to calculate the theo-retical mass of air that enters the combustion chamber oneach cylinder’s cycle. The speed of the engine, however,affects the actual mass of air that enters the chamber dueto restrictions and tuning effects of the air-intake andexhaust tracks. Users can characterize this behavior by aone-dimensional lookup table of volumetric efficiency(Ve) values versus engine speed. Users can then calculatea fuel injection mass based on the fuel’s stoichiometry (forgasoline, about 14.7 parts air to one part fuel). Many pas-senger-car engine controllers use the speed-densitymethod for open-loop control until emissions subsystemsare operational for closed-loop control. When modifyingthe intake or exhaust systems, the speed-density controlrequires that only the Ve table be updated.

In contrast to speed-density control, an alpha-Nengine control method looks up the empirical mass ofair for each throttle angle (alpha) and engine speed (N)operating point. A two-dimensional lookup table of sev-eral hundred points is required. Many high-perfor-mance and race engine controllers rely on this methodsince the intake air pressure does not have enough vari-ability over the entire throttle/load range to effectivelyuse a speed-density method. When users make mechani-cal modifications to these engines, the operating pointsmust be recalibrated.

We used a combination of these control strategies byapplying speed density to low-speed and low-load oper-ating points where intake air pressure had the most vari-ability. An alpha-N method was applied to the rest of theoperating map. After we noted Yamaha’s use of sensorson the production motorcycle, we determined that thefactory ECU was likely implementing a similar strategy.We used the data acquired in the mapping phase to cali-brate these control strategies. Experienced riders couldnot identify significant differences between the factoryECU control and the prototype control. Most important-ly, we achieved this level of control without expensivedynamometer time. We successfully achieved our goal ofprototyping a motorcycle ECU on time and on budget.

CONCLUSIONSIn past projects, we spent at least two man-years andUS$500,000 dollars to develop similar research ECU proto-

typing systems from custom-designed hardware. For thisproject, the equipment costs, including the motorcycle andCompactRIO, were US$15,000 and required about threeman-months of time. Compact RIO, LabVIEW Real-Time,and LabVIEW FPGA delivered the reliability and precisetiming resources required, and the system was ruggedenough to withstand the high temperatures and vibrationsof the operating environment.

The LabVIEW function blocks (VIs) and applicationtemplates for general gasoline and diesel engine controlare available through Drivven. Modifying a four-cylinderapplication to a V-8 application consists of inserting anadditional injector driver module and adding the associatedinterface VI to the FPGA block diagram.

Drivven and NI are jointly sponsoring the Formula SAEteam at Colorado State University. Dr. Rudy Stanglmaier isthe advisor. The team is using a Yamaha R6 engine,National Instruments CompactRIO, and the workdescribed here.

AUTHOR INFORMATIONCarroll Dase is the president of Drivven, Inc., in San Antonio, Texas. He has designed research and productionpowertrain control hardware and software for SouthwestResearch Institute and Motorola. He has also providedpowertrain control consulting services to automotiveOEMs. He has a B.S. in mechanical engineering from theUniversity of Texas.

Jeannie Sullivan Falcon is a senior engineer in controland simulation at National Instruments in Austin, Texas.She has led research in control and mechatronics at the AirForce Research Laboratory, Midé Technology Corporation,and National Instruments. She received a B.S. in physicsfrom Carnegie Mellon and an M.S. and Ph.D. in mechani-cal engineering from MIT.

Brian MacCleery is currently the senior product managerfor industrial control and embedded design at NationalInstruments in Austin, Texas. He has a B.S. and M.S. inelectrical engineering from the Virginia Polytechnic Insti-tute and State University.

REFERENCES[1] Drivven, Inc. homepage, “Driven—Powertrain Rapid Control Prototyp-ing,” [Online]. Available: http://www.drivven.com[2] National Instruments LabVIEW Real-Time Web portal, “LabVIEW Real-Time for measurement and control,” [Online]. Available:http://www.ni.com/realtime[3] Xilinx product page, “System Generator for DSP—the leading-edge mod-eling and implementation tool for high performance DSP systems,” [Online].A v a i l a b l e : h t t p : / / w w w . x i l i n x . c o m / i s e / o p t i o n a l _ p r o d /system_generator.htm[4] Celoxica homepage, “Welcome to Celoxica—the technology leader in Cbased design and synthesis,” [Online] http://www.celoxica.com[5] National Instruments LabVIEW FPGA Web portal, “LabVIEW FPGA—customize your hardware without having to build it,” [Online]. Available:http://www.ni.com/fpga[6] National Instruments LabVIEW Toolkit Web portal, “LabVIEW Toolk-its,” [Online]. Available: http://www.ni.com/toolkits