Comp Sci 251 -- vars & expns 1 Ch. 4 Variables and Expressions.

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Comp Sci 251 -- vars & expns 1 Ch. 4 Variables and Expressions

Transcript of Comp Sci 251 -- vars & expns 1 Ch. 4 Variables and Expressions.

Page 1: Comp Sci 251 -- vars & expns 1 Ch. 4 Variables and Expressions.

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Ch. 4 Variables and Expressions

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Supporting high-level languages

How do we use MIPS assembly language to implement– Variable declaration & initialization?– Assignment statements?– Expression evaluation?

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Program structure

#### File: foo.a#### Brief explanation of program's purpose#### Author: Your name## Date: 10 February 2010##

######################################## Text segment #

#######################################.text.globl __start

__start:

[program instructions...]

li $v0, 10 #exitsyscall

######################################### Data segment #########################################.data

[data definitions...]

## end of file foo.a[blank line]

Note: file extension .a

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syscalls Service Call code Arguments Result

Print_integer 1 $a0 = integer

Print_float 2 $f12 = float

Print_double 3 $f12, $f13 = double

Print_string 4 $a0 = address of string

Read_int 5 $v0 (integer)

Read_float 6 $f0 (float)

Read_double 7 $f0, $f1 (double)

Read_string 8 $a0 = buffer, $a1 = length

Exit 10

Print_char 11 $a0 = char

Read_char 12 $v0 (char)

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Variable declaration

Use assembler directives– Not machine instructions– Reserve memory– Define symbols

Affect data segment of memory

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Variable declaration

High-level

int x;

MIPS assembly

x: .space 4

Symbol name

Data type Reserve

memory

No. of bytes

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Sequence of declarations Problem!!!

char x;

int y;

char z;

.data

x: .space 1

y: .space 4

z: .space 1

0x10000000 x

0x10000001 y

0x10000005 z

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Alignment

Integer variables must be “word-aligned” Use the .align directive Syntax:

.align n Semantics: assembler aligns the next

reserved location on an address divisible by 2n

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Example

.data

x: .space 1

.align 2

y: .space 4

z: .space 1

0x10000000 x

0x10000004 y

0x10000008 z

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Initialization

int x = 5; x: .word 5

initial value

symbol name

size

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.word n

Reserves & initializes a word of memory n can be

– Unsigned number– Signed number– Hexadecimal number

Automatically aligns to word boundary– Unnecessary to use .align directive

before .word

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Byte order

We will use SPIM– MIPS simulator software– Runs on many different platforms

Byte order in SPIM depends on native byte order of platform

Intel: little-endian PowerPC (Mac): big-endian

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Example

x: .word 5

05 x

00

00

00

00 x

00

00

05

Little Endian

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What about character data?

char x = 'a'; x: .byte 'a'

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.byte n

Reserves & initializes a byte of memory n can be

– Unsigned number– Signed number– Hexadecimal number– Character in single quotes ASCII code

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Strings

char s[] = "hello"; s: .asciiz "hello"

Cstring variable

Array of char

(Null-terminated)

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.asciiz s

S is a string in double quotes Sequence of bytes is reserved & initialized One byte per character Final byte contains null character: 0x00 Note: not affected by byte order.

– Leftmost char lowest address– Rightmost char highest address

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Example

x: .asciiz "hello"0x68 x

0x65

0x6c

0x6c

0x6f

0x00See Chapter03/data.a

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Assignment

Store a value in a variable Occurs at runtime, not compile/assemble

time Supported with assembly language

instructions

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Simple assignment

int x;

x = 5;

.text

li $t0, 5 #load immediate

sw $t0, x #store word

.data

x: .space 4

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Load immediate instruction

li reg, value value is loaded into register Value is part of the instruction

– not contained in data segment– not contained in register

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Store word instruction

sw reg, address

register contents are copied into memory address can be a symbol or a number address must be word-aligned

– otherwise exception is raised

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Load/Store architecture

MIPS is a Reduced Instruction Set Computer (RISC)

Philosophy: superior performance through– simple instructions– small instruction set– fast instructions

Some operations require several instructions– assignment requires load & store

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Assignment of char data

char y;

y = 'a';

.text

li $t0, 'a' #MSBs of $t0=0

sb $t0, y #store byte

.data

y: .space 1

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Store byte instruction

sb reg, address

low-order byte of register is copied into memory

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Assignment between variables

int x;

int y = 5;

x = y;

.text

lw $t0, y

sw $t0, x #store word

.data

x: .space 4

y: .word 5

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Load word instruction

lw reg, address

word of memory is copied into register address must be word-aligned

Note: memory memory transfer requires two instructions

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Assignment between char variables

char a;char b = '@';a = b;

.text lbu $t0, b1 #load byte

#unsigned sb $t0, a

.dataa: .space 1b1: .byte '@’ #b assembly

# error

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Load byte unsigned instruction

lbu reg, address

byte of memory is copied into LSB of register MSBs are cleared (= 0)

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Exercise

Write equivalent MIPS code Sketch memory layout

int x = 25;char a = '*';int y;char b;y = x;b = a;

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Arithmetic expressions

High level language feature

How do we evaluate expressions in assembly language?– Single operator– Multiple operators

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Addition

Expression

2 + 3

MIPS code

li $t1, 2

li $t2, 3

add $t0, $t1, $t2

Goal: result in $t0

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Add instruction

add rd, rs, rt All operands must be registers First operand is destination Second and third operands are sources rd rs + rt Register may appear as source and

destination Signed overflow exception is raised

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Maximize register re-use

Expression

2 + 3

MIPS code

li $t0, 2

li $t1, 3

add $t0, $t0, $t1

Goal: result in $t0

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Subtraction

Expression

2 - 3

MIPS code

li $t0, 2

li $t1, 3

sub $t0, $t0, $t1

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Sub instruction

sub rd, rs, rt

All operands must be registers rd rs - rt Signed overflow exception is raised

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Multiplication

Expression

2 * 3

MIPS code

li $t0, 2

li $t1, 3

mul $t0, $t0, $t1

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Mul instruction

mul rd, rs, rt (pseudo instruction) Signed multiplication All operands must be registers rd rs * rt No exception is raised on overflow. Why? Equivalent to

mult rs, rt

mflo rd

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Division

Expression

2 / 3

MIPS code

li $t0, 2

li $t1, 3

div $t0, $t0, $t1

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Div instruction

div rd, rs, rt

Signed division All operands must be registers rd rs / rt Signed overflow exception is raised

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Remainder (% operator)

Expression

2 % 3

MIPS code

li $t0, 2

li $t1, 3

rem $t0, $t0, $t1

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Rem instruction

rem rd, rs, rt

For simplicity, stick to non-negative operands All operands must be registers rd rs % rt

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Multi-operator expressions

(1 + 2) * (3 – 4)

Order of operations depends on– Precedence rules– Associativity– Parentheses

Several orders are possible+ - *- + *

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Left-to-right evaluation method

Read expression left to right Constant or variable lowest unused t-reg Operator

– Wait until both operands in registers– Perform operation– Result left operand register

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Exercise

Apply left-to-right method to

(1 + 2) * (3 – 4)

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Optimization

Sometimes you can do better than l-t-r– Fewer registers– Fewer instructions

Advanced topics– Sethi-Ullman numbering (minimize registers)– Common subexpressions (minimize instructions)

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Optimization exercise

x + y * z – y

L-t-r evaluation code Minimize number of registers Minimize number of instructions