CMX

Collection file for current diagrams

30-Apr-2014

Board Support

FPGA12x

Optic OUT

12x Optic

IN

12x Optic

IN

12x Optic

IN

SFPDAQ

SFPROI

SFPDAQ

SFPROI

TTC Receiver

VME --

TCM

Inputs from All 16x JEM or 14x CPM ProcessorsFrom this crate

(400x single ended2.5V CMOS signals@ 160 Mbps)

2x 12-fiberribbons OUT

Optical outputFrom Base Function

To L1Topoand/or CMX-Topo

(up to 24x @ 6.4 Gbps)

Optical outputDAQ &ROI readout

From Base Function(2x G-Link or S-Link)

CMX Card with Base-CMX functionality only

CTP output From Base Function

(up to 2x33x LVDS pairs

@ up to 160 Mbps)

30-Apr-2014

M U X

LVD

S Tr

ansc

eive

rs

Clock Generator

Base Function

FPGAVirtex-6

LX550T-FF1759

12x Optic OUT

Topo Function

FPGAVirtex-6

LX550T-FF1759

CAN BusMonitoringTemp, V & I

LVD

S Tr

ansc

eive

rs

Test Connector:JTAG, CAN bus

& Access Signals

VME

- - B

us

Tran

scei

vers

SystemACE

CAN Bus

Compact Flash Card

MPT

MPT

LVDS cablesFrom Crate CMXTo System CMX

(up to 3x27x LVDS pairs@ up to 160 Mbps)

Board Support

FPGA12x

Optic OUT

12x Optic

IN

12x Optic

IN

12x Optic

IN

SFPDAQ

SFPROI

SFPDAQ

SFPROI

TTC Receiver

VME --

TCM

2x 12-fiberribbons OUT

3x 12-fiberribbons IN

CMX Card with Base-CMX functionality and TP-CMX capability

30-Apr-2014

M U X

LVD

S Tr

ansc

eive

rs

Clock Generator

Base Function

FPGAVirtex-6

LX550T-FF1759

12x Optic OUT

Topo Function

FPGAVirtex-6

LX550T-FF1759

CAN BusMonitoringTemp, V & I

LVD

S Tr

ansc

eive

rs

VME

- - B

us

Tran

scei

vers

SystemACE

CAN Bus

Compact Flash Card

MPT

MPT

Test Connector:JTAG, CAN bus

& Access Signals

CTP output From Topo Function

(up to 2x33x LVDS pairs

@ up to 160 Mbps)

Inputs from All 16x JEM or 14x CPM ProcessorsFrom this crate

(400x single ended2.5V CMOS signals@ 160 Mbps)

LVDS cablesFrom Crate CMXTo System CMX

(up to 3x27x LVDS pairs@ up to 160 Mbps)

Optical outputDAQ &ROI readout

From Base Function(2x G-Link or S-Link)

Optical outputDAQ &ROI readout

From Topo Function(2x G-Link or S-Link)

Optical outputFrom Base Function

To L1Topoand/or CMX-Topo

(up to 24x @ 6.4 Gbps)

Optical input From up to 12 CMXs

To CMX-Topo (up to 36x @ 6.4 Gbps)

IO Banks available on Virtex6 LX550T

CMX IO Bank Assignment for Processor Inputs(using only Inner Columns and exactly two Regional Clocks per Horizontal Row)

P03P02

P01P00

P15P14

P13P12

P10P11

P08P09

P06P07

P04P05

2

2

2

2

1

1

1

1 1

1

1

1

Number ofRegional Clocks used per IO Bank (2 per row match for MMCM)

ElectronEnergy Jet Tau

CMXBaseFPGA

to CTP

LVDSCables

to CTP to CTP to CTP

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

LVDSCables

LVDSCables

LVDSCables

CrateCMXs

SystemCMXs

- - - - - - - -

CMX emulation of CMM functionality (no TP involved)

21-May-2014

CrateCMX

CrateCMX

CrateCMX

CrateCMX

CrateCMX

CrateCMX

CrateCMX

CrateCMX

ElectronEnergy Jet Tau

CMXBaseFPGA

to CTP

LVDSCables

to CTP to CTP to CTP

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

CMXBaseFPGA

LVDSCables

LVDSCables

LVDSCables

Optical PatchPanel

to CTPL1TopoN x 12

L1topo receives Zero-Suppressed data from all CMXs

Up to 24x 12-fiber ribbons

2x12

2x 1

2-fib

er ri

bbon

CrateCMXs

SystemCMXs

- - - - - - - -

21-May-2014

SystemCMX

SystemCMX

SystemCMX

SystemCMX

Older CMX Diagrams

Historical repositorySome still valid or may need editing

ElectronEnergy Jet Tau

Base-CMXFPGA

to CTP

LVDSCables

to CTP to CTP to CTP

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

LVDSCables

LVDSCables

LVDSCables

CrateCMXs

SystemCMXs

- - - - - - - -

to CTPStandaloneTopologicalProcessor

2. Standalone TP receiving Raw CMX Inputs

12

12 x 12-fiber ribbons

1 x

12-fi

ber r

ibbo

n

ElectronEnergy Jet Tau

Base-CMXFPGA

to CTP

LVDSCables

to CTP to CTP to CTP

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

LVDSCables

LVDSCables

LVDSCables

Optical PatchPanel

TP-CMXFPGA

to CTP

TP-CMXFPGA

to CTP

CrateCMXs

SystemCMXs

- - - - - - - -

4. One (or more) CMX TP receiving Zero-Suppressed Inputs

1 x

12-fi

ber r

ibbo

n

12

12 x 12 fiber ribbons

3 x 12-fiber

ElectronEnergy Jet Tau

Base-CMXFPGA

to CTP

LVDSCables

to CTP to CTP to CTP

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

LVDSCables

LVDSCables

LVDSCables

Optical PatchPanel

TP-CMXFPGA

to CTP

CrateCMXs

SystemCMXs

- - - - - - - -

5. CMX TP & Standalone TP receiving Zero-Suppressed Inputs

2 x

12-fi

ber r

ibbo

n

24

up to 24 x 12-fiber ribbons

3 x 12-fiber

to CTPStandaloneTopologicalProcessorN x 12-fiber ribbons

ElectronEnergy Jet Tau

Base-CMXFPGA

to CTP

LVDSCables

to CTP to CTP to CTP

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

LVDSCables

LVDSCables

LVDSCables

Optical PatchPanel

TP-CMXFPGA

to CTP

CrateCMXs

SystemCMXs

- - - - - - - -

6. CMX TP receiving Zero-Suppressed & Standalone TP raw inputs

2 x

12-fi

ber r

ibbo

n

24

12 x 12-fiber ribbons

3 x 12-fiber

to CTP

StandaloneTopologicalProcessor12 x 12-fiber ribbons

ElectronEnergy Jet Tau

Base-CMXFPGA

to CTP

LVDSCables

to CTP to CTP

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

Base-CMXFPGA

LVDSCables

LVDSCables

Optical PatchPanel

TP-CMXFPGA

to CTP

CrateCMXs

SystemCMXs

- - - - - - - -

7. Example of TP-CMX FPGA in Crate to System communication

1 x 12-fiber ribbon

4 x 12 fiber ribbons

3 x 12 fibers