Chassis PT 90 NEAT Service Manual

P T - 9 0

N E A T

C H A S S I S

Modification reserved

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PT 90 NEAT Service Manual

3

PAGEAssembling/Disassembling

Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

1. Technical Specs. Connectors

and Chassis Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2. Safety Instructions and Warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

4. Supply Voltage Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

5. I-C Bus Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

6. Fault Tracing Diag. for Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

7. Chassis Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

8. Service Menu And Basic Adjustments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

8.1 Option Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

8.2 Geometry Adj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

8.3 G2 Adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

8.4 Video . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

8.5 Tune / IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

8.6 Hotel Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

8.7 System Voltage Adj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

9. DVD Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

9.1 Safety And Handling Precautions . . . . . . . . . . . . . . . . . . . .17

9.2 Mech. And Elec. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

10. Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

TV Chassis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

DVD Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

11. Description Of Ics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

TV Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

DVD Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60

CONTENTS


4

Disassembly procedure is explained as below. Before dis-assembling the TV set please read the safety instructionsand warning parts of the service manual.

• Turn off TV and plug the mains out• Remove screws (6 pieces) to dismount the back cover • Remove 2 connection cables between chassis and back

cover. Front AV and lineout sockets should be discon-nected.

• Cut the tie, which fixes DVD cables together.• Disconnect the following sockets to take the chassis out ;

Loader, IR receiverDeflection cableDegaussing coilSpeaker cablePower cable

• Remove the ground cable localised between tube mod-ule, chassis and mass cable.

• Remove the CRT drive module from picture tube.• Desolder the ground cable of loader from tuner.• Remove anode cable localised on the picture tube.• Slide out the chassis through the guides (no screws,

straps or other fixing).

Please follow the assembly instructionsexplained below;• Be sure that all of the loader cables are free. If necessary

fix the cables firmly to avoid any kind of squeezingwhile inserting the chassis back.

• Before inserting the chassis into guides, check the con-trol buttons in front of the chassis. In case of misplace-ment of control buttons place them into correct position.

• Slide the chassis into guides until the connection cablescould be reached to their sockets.

• Plug in the sockets coming from led PCB, 5P to KL01and 4P to KL02

• Plug in the sockets coming from loader, 4P to SS03, 6Pto SS13 and 12P (blue one pointing to right) to SS18.

• Plug in the power cable socket to AC01.• Plug in the degauss cable socket to KP02.• Plug in the speaker cable socket to HS03.• Place the CRT drive module on picture tube.• Slide the chassis completely on its place. Be careful

about control buttons.• Plug in the deflection cable socket 4P to KD01 and 2P to

SD21.• Place the anode cable to picture tube. Be careful about

high voltage!

CRT drive module must be grounded via masscable.

Grounding must be completed between loader andchassis via soldering cable between tuner and loader.

Front AV must be connected to SS05 and line outshould be connected to SS09 via 9P and 5P sockets,respectively.

• Place the back cover back to its place.(6 screws)• Plug the mains in.• Turn on the TV.

Grounding must be completed between loader andchassis via soldering cable between tuner and loader.

Front AV must be connected to SS05 and line outshould be connected to SS09 via 9P and 5P sockets,respectively.

• Place the back cover back to its place.(6 screws)• Plug the mains in.• Turn on the TV.

ASSEMBLING / DISASSEMBLING PROCEDURE


5

1.2 Connections

Rear Connections

Side Connection

A/LA/R PCM

EURO AV

VIDEO L AUDIO R

1. TECHNICAL SPECIFICATIONS, CONNECTIONS ANDCHASSIS OVERVIEW

1.1. Technical Specifications

1.1.1 Reception

Tuning System : PLLColor Systems : PAL SECAM NTSCSound Systems : B/G D/K L/L’A/V Connections : SCART AND FRONT AVChannel Selections : AIR, CABLE : The entire band via frequency search

IF Frequency : B/G, D/K, L : 38.9 MHZ L’: 33.4 I: 39.5MHZ

Aerial Input : 75 OHM

1.1.2 Miscellaneous

Audio Output (RMS) : 2 x 2.5 WMains Voltage : 220-240 V (± 10 %)Mains Frequency : 50/60 Hz (± 5 %)Ambient Temperature : Maximum Humidity :Power Consumption : 50 WStandby Power Consumption : 4 W


6

2 4 6 8 10 12 14 16 18 20

1 3 5 7 9 11 13 15 17 19 21

EURO SCART

I- Audio output 1. right channel 0.5 VRMS/<l k 02- Audio input 1. right channel 0.5 VRMS (connected to No.6)3- Audio output 2. left channel 0.5 VRMS (connected to No.1)4- GND (audio)5- GND6- Audio input 2. left channel 0.5 VRMS/>10k 07- RGB input, blue (B)8- Switch signal video (status)9- GND

10- Reserved for clock signals (not connected)11- RGB input, green (G)12- Reserved for remote control (not connected)13- GND14- GND switch signal RGB15- RGB input, red (R)16- Switch signal RGB17- GND (video)18- GND19- Video output 1 Vpp/75 ohm20- Video input 1 Vpp/75 ohm21- Shield


7

1- FRONT CABINET 0022- PICTURE TUBE3- PICTURE TUBE SCREW4- SPEAKER5- SPEAKER SCREW 6- DVD DRIVER7- DVD DRIVER SCREW8- EJECT BUTTON9- EJECT BUTTON SCREW 10- MULTIBUTON LEFT11- MULTIBUTON LEFT SCREW12- MULTIBUTON RIGHT13- MULTIBUTON RIGHT SCREW14- ON-OFF BUTON15- ACYRILIC WINDOW 00216- INFRA LED PCB17- INFRA LED PCB SCREW18- REFLECTOR19- REFLECTOR SCREW20- DVD HEAD21- CHASSIS RAIL RIGHT22- CHASSIS RAIL LEFT23- MAIN CHASSIS24- BACKCOVER25- BACKCOVER SCREW26- STYROPHOR27- AVPCB28- AVPCB HOLDER

1- FRONT CABINET 0022- PICTURE TUBE3- PICTURE TUBE SCREW4- SPEAKER5- SPEAKER SCREW 6- DVD DRIVER7- DVD DRIVER SCREW8- EJECT BUTTON 0019- EJECT BUTTON 001 SCREW 10- MULTIBUTON LEFT11- MULTIBUTON LEFT SCREW12- MULTIBUTON RIGHT13- MULTIBUTON RIGHT SCREW14- ON-OFF BUTON15- ACYRILIC WINDOW 00116- INFRA LED PCB17- INFRA LED PCB SCREW18- REFLECTOR19- REFLECTOR SCREW20- DVD HEAD21- CHASSIS RAIL RIGHT22- CHASSIS RAIL LEFT23- MAIN CHASSIS24- BACKCOVER25- BACKCOVER SCREW26- STYROPHOR

14 NEAT CTV 001CHASSIS OVERVIEW

14 NEAT CTV 002


8

SAFETY INSTRUCTIONS FOR SERVICEREPAIRS1. Use only the original spare parts with the same specifi-cations for replacement.2. Only the original fuse value should be used.3. Safety components, indicated by the symbol, shouldbe replaced by components identical to the original ones.4. Main leads and connecting leads should be checked forexternal damage before connection. Insulation must bechecked.5. Parts contributing to the safety of the product must notbe damaged or obviously unsuitable. This is valid especial-ly for insulators and insulating parts.6. Thermally loaded solder pads are to be sucked off andre-soldered.7. Ensure that the ventilation slots are not obstructed.8. Potentials as high as 25 KV are present when thisreceiver is operating. Operation of the receiver outside thecabinet or with back cover removed involve a shock hazardfrom the receiver.9. Servicing should not be attempted by anyone who is notthoroughly familiar with precautions necessary when work-ing on high voltage equipment. Perfectly discharge thehigh potential of the picture tube before handling it. Thepicture tube is highly evacuated and if broken. Glass frag-ments will be violently expelled. Always discharge the pic-ture tube anode to the receiver chassis to keep of theshock hazard before removing the anode cap.10. Keep wire away from the high voltage or high tempera-ture components.11. When replacing a wattage resistor, keep the resistor10mm away from the circuit board.12. Fast heating up (e.g. by bringing the Combi from a coldplace into warm and humid room) can result in moisturecondensing on the pickup lens of the DVD Module, thusinfluencing the playability for a certain time. Before check-ing the performance, the DVD Loader should be stabilizedfor at least 4 hours.13. Never try to repair DVD module when it is ON. The

laser beam is highly dangerous and it may cause perma-nent damages.

HANDLING THE MOS CHIP COMPONENTSMOS circuit requires special attention with regard to staticcharges. Static charges may occur with any highly insulat-ed plastics and can be transferred to persons wearingclothes and shoes made of synthetic materials. Protectivecircuits on the inputs and outputs of MOS circuits give pro-tection to a limited extend only due to time of reaction.Please observe the following instructions to protect thecomponents against ESD.1. Keep MOS components in conductive package until theyare used. Most components must never be stored in styro-por materials or plastic magazines.2. Personnel must not touch the MOS components to avoidelectrostatic discharging.3. Hold the component by the body touching the terminals.4. Use only grounded instruments for testing and process-ing purposes.5. Remove or connect MOS Ics when operating voltage isdisconnected.6. Personnel in charge must make sure that they are con-nected with the same potential as the mass of the set by awristband with resistance.

X-RAY RADIATION PRECAUTION1. Excessive high voltage can produce potentially haz-ardous X-RAY radiation. To avoid such hazard, the highvoltage must not be above the specified limit. The nominalvalue of the high voltage of this receiver is 25KV at zerobeam current (minimum brightness) under 220 V AC powersource. The high voltage must not under any circumstance,exceed 30KV. It is recommended the reading of the highvoltage to be recorded as a part of the service record. It isimportant to use an accurate and reliable high voltagemeter.2. The primary source of X-RAY radiation in the TV receiv-er is the picture tube. For continued X-RAY radiation pro-tection, the replacement tube must be exactly the sametype tube as specified in the part list.

KEYBOARD

All the keys on the keyboard are used same as the relevant keys on the RC. But navigation in menus is quite differ-ent. In order to open Main Menu from keyboard V+ and V- keys must be pressed together. After displaying themenus P+ and P- keys will be used as Navigation Up and Navigation Down keys. There is no enter key on the key-board so V+ or V- will be used as Menu Right key if a submenu item is highlighted on the menu. These two keys willalso be used as Navigation Left and Navigation Right keys in order to change any highlighted options right sidevalue. To return previous menu V+ and V- keys should be pressed together.

2. SAFETY INSTRUCTIONS AND WARNINGS


9

A2 VIDEO PEOCESSOR

A7 -CONTROLLER

A8 AUDIO AMPLIFIER

A3 SCART

A11

KEYBOARD

A5 POWER SUPPLY

A6 HORIZONTAL

A10 AV INTERFACE

CONN.

A9 VERTICAL

A1 TUNER

-5

-4

-1

CL A4-2/A2-2

SD-1/A2-3

11

10 5 4 1

STV2246/47/

AUDOUT A8-1

HEATER A6-1/A7-7

SDA A7-1/A4-1/A1-3

SCL A7-2/A1-2/A4-2

HOUT A-2

VERT -1

CVBSOUT A7-6

V_AMP A-2

FB_OSD A7-10

R_OSD A-3

G_OSD A7-4

B_OSD A7-5

BCL A6-3

L/L

-8

IF1 A-5/A1-5

AV

STATUS A3-1

IF2 -4

AGC -1

SC_IN -2

CVBS A-3

CVBSEXT A3-4

B -8

G -7

R -6

FBEXT A-5

6

IF1 A-5/A1-5

2 7 8 11

14

13

20

25

26

27

28

155

52

51

49

48

47

46

44

42

37

36 35

34

ICV1

CVBSOUT

A2-6

HEATER A2-7/A6-1

ST92195/921

V_OSD A-1

FB_OSD

A7-5/A2-10

CLI -1

L/L

-8

GOSD A2-4

TV/DVD A8-2

BOSD A2-5

ROSD A2-3

FB_OSD

A2-10/A7-5

SDA

A2-1/A4-1/A1-1

SCL

A2-2/A4-2/A1-2

12

MUTE_DVD

A8-10/A8-1/A10-1

11

13

15

16

17

18

19

25

8 KEYB -1

56

DVD SB

42

VOL -1

43

41

40 33

34

IC01

IA01

TDA7057

IA03

MN405

3B

18

VOL -1

1AUDOUT A2-1

I060

LM358

3 12 1

2

MUTE_DVD

A8-10/A10-1/A7-1

2LDVD A10-2

7

6

R_DVD

A10

-3

SCART1

SS01

2

3

45

67

89

10

11

12

1314

1516

17

18

1920

21

AV_STATUS

A2-1

SC_I A2-2

B A-8

CLI A-1

G A2-7

R A2-6

CVBS A2-3

FBEXT A2-5 A4

24C08

IC02

5 6

SDA

A7-1/A2-1/A1-1

SCL

A1-2/A2-2/A7-2

KEYB A7-1

TDA16846

IP01

110

16 5 5

12V

8

WP0

AC IN

3

14

2

11

FBT

24 V

12 V

BCL A2-3

HOUT A2-2

HEATER

1 9

8 4 3

ID41 TDA177

23

4

VERT A2-1

V_OSD A7-1

V_AMP A2-2

SS08

1214

15

16

18

CVBS_DVD

A8-5

DOUT

A8-4

MUTE

_DVD A7-

1/A8-1

LDVD

A8-2

RDVD

A8-3

3. BLOCK DIAGRAM


10

TUN

ERL

T01

RT

01

5V

7 1

VID

EO

PR

OC

.ST

V22

46/4

7/48

LV

01

LV

03

12

17

5V

LV

01

LV

01

5V

8V

1 2

8V

SA

02

LV

07

53 45

RT

033

5V

RV

06

TV

01 RV

03

19

8V

SS

05

A4

EE

PR

OM

5V

1

8

C0

11

FB

T

1 2

110V

16V

24

V

12

V

8V

RD

15R

D12

348

+12

V

TO

R

A10

IA0

3M

N4

05

38

V

RA

11

RS

58

16 11

A9

TD

A1

771

24

V8

V9 8

RD

45

RD

44R

D56

7 4

RD

28R

D40

12

V1

A10

RV

54D

V10

12

14

TV

058V5

V

SS

08

ST

9219

5/92

185

T00

3

R0

11

5V

2 3

R00

2

R00

8

R05

7

5V 5V

R05

2R

028

RA

09

T00

1

5V

5VA

5VA

5VA

R0

10

R0

07

R0

32

R0

12

R0

13

12 13 14 19 20

5VD

5VA

5V

56

55

54

43

39

34

33

31

21 25 26

33

V

9

DV

23

DV

22

DV

21

DV

20

25

26 27

28

8V

TO

S

S05

/4

RV

57

5V

D0

02

D0

01

5VD

VD

R08

1

R08

0

40

4145

46

D0

04

5V

D0

05

A6

A3

A1

A7

A8

A2

8V

12V

DV

D

A5 POWER SUPPLY

4. SUPPLY VOLTAGE DIAGRAM


11

A1

RT

RT

5 4

TU

NE

R

SDA

SC

L

A2

VID

EO

PR

OC

.

51

52

RV

33

RV

34

A4

SDA

SC

L

EE

PR

OM

6 5

R04

8

R04

9

SDA

SC

L

A7

u-C

ON

TR

OL

LE

R

20

19

R01

2

SDA

R01

3

SC

L

+5V

SDA

SC

L

5. I2 BUS INTERCONNECTION DIAGRAM


12

FuseF1 defective

Voltage at drain

TP 01

Voltage atIP01

PIN 11< 1V

Start-up voltage(6)

PIN 14< 8V

Start-up voltagevaries ca. 8V

IP 01

Measure

+115Vadjustable with

VAP 01

Control range ofswitched-modepower supply

DP01 - 04CP01 - 04

CP06, TP01

RP 07, RP 05open and

short circuit

RP 06

RP 11, DP 07

TP 01

VAP 1, RP 03

YES

NO

YES

YES

NO

NO

NO

Switched mode powersupply defective, +110V

is missing or level is wrong

NO

YES

YES

YES

NO

6. FAULT TRACING DIAGRAM-POWER SUPPLY


13

PLL TUNERTDA 7057

STV224X

ST92195

24C08

BU

508D

R G

BT

DA

1771

DVDBOARD

RC IR

DVDLOADER

SC

AR

T

FRONT AV

POWER

+5V

+110V

+12V

+16V

2 X 2W

H.YOKE

V.YOKE

AU

DIO

CV

BS

7. CHASSIS DIAGRAM


14

8. SERVICE MENU AND BASIC ADJUSTMENTSSERVICE MODE IS ACTIVED BY PRESSING THE DIGIT 1923 AT FEATURES MENU

8.1 OPTION BYTES

OPTION 1: MODEL CONFIGURATIONb0: 1: L Avaialable 0: not available b1: 1: APR ON 0: APR OFFb2: 1: no Pin 8 16:9 switching mode 0: Pin 8 16:9 switching modeb3: 1: Turn on with AV button 0: not usedb4: 1: Keyboard with menu 0: Keyboard without menu b5: 1: Brightness half range available 0: Brightness full range availableb6:7 Main Tuner

00 : Samsung01 : Temic 10 : Philips UV131611 : Thomson/Orega

OPTION 2: FEATURE CONFIGURATIONb0: 1: AV2 mode available 0: not availableb1: 1: SVHS mode available 0: not available b2: 1: Volume linear 0: Volume Logaritmicb3 1: Search mono audio ident available 0: not availableb4: 1: DVD picture in SVHS mode 0: DVD picture in RGB modeb5: 1: Headphone available 0: not available b6: 1: No Subwoofer 0: Subwoofer available b7: 1: 4/3 Picture tube 0: 16/9 Picture tube

OPTION 3: VIDEO/AUDIO FEATURE CONFIGURATIONb0: 1: One Crystal application (4.43 Mhz) 0:Two cystal application (for NTSC playback)b1: 1: Intercarrier application 0: QSS application b2: 1: STV2248E 0: Normal video ICb3: 1: OSD contrast control ON 0: OSD contrast control OFFb4: 1: Blue screen enable 0: disable b5: 1: AVC Automatic Volume Correction (MSP Stereo) AVL(Mono 22XX)

0: not availableb6: 1: DVD available 0: not availableb7: 1: Standby after power on 0: No Standby after power on

Reserved bits must be set to 0

You will need following equipments to carry out the adjustment procedures;

a- PLL Pattern generator for Secam L'b- PLL Pattern generator PAL BG c- Patern generator for white patternd- Color Analyzer (CA100)


15

8.2 GEOMETRY ADJUSTMENTa. V.S 4/3 50Hb. V.S 16/9 50Hc. V.S 4/3 60Hd. V.S 16/9 60He. V.Pf. H.P

• Enter service menu and select the GEOMETRY settings• Standart geometrical adjustments carried out by V.S, V.P and H.P settings. V.S 16/9 50h setting have to be carried

out until 3 cm distance between upper and lower parts of the screen.• Same adjustments for 60H for 16/9 and 4/3.• Press menu button to leave service menuMenu button to leave service menu.

8.3 G2 ADJUST> : <

increase normal decrease

Enter the G2 menu in the service modeTurn the G2 potentiometer on FBT until you reach the : sign< indicator means to decrease> indicator means to increase

8.4 VIDEO1 RED2 GREEN3 BLUE4 RED COFF5 GREEN COFF

• Apply Dark gray pattern (at 10 IRE)• Contrast 70%, brightness middle, color saturation middle.• By changing the R COF and G COF Adjust to obtain the necessary values for x and y.• Apply white pattern (at 100 IRE)• Set the contrast to 70%, brightness and color saturation to middle.• Place the color analyzer.• (R,G,B), it is possible to modify the peak white.• Adjust to obtain the necessary values for x and y.

Remark: It may be necessary after low light alignment to check and to re-align the high light and to repeat severaltimes the procedure to obtain good alignment for both low and high light.


16

8.5 TUNER/ IF1. AGC2. P C3. P F4. P C.L’5. P F.L’

PPIIFF aaddjjuussttmmeenntt ffoorr BBGG//DDKK//LL ssyysstteemmss::• 38.9 MHz PAL BG signal applied Tuner via tuner output (IF output). • Leave the channel settings menu and enter service menu. Enter TUNER IF menu in the service mode. Choose the PIF COARSE and PIF FINE item and adjust the setting until the : indicator (displayed as > : <)turns in red color by pressing < and > on remote control. • Press Menu button to leave service menu.

PPIIFF aaddjjuussttmmeenntt ffoorr LL'' ssyysstteemm::• 33.9 MHz SECAM L' signal applied Tuner via tuner output. • Leave the channel settings menu and enter service menu. Enter TUNE IF menu in the service mode. Choose the PIF COARSE L’ and PIF FINE L’ item and adjust the setting until the: indicator (displayed as > : < ) turns in red color by pressing < and > on remote control. • Press Menu button to leave service menu.

8.6 HOTEL MODE Installation and Child Lock Menus are omitted in Hotel Mode. You can not search any channel when the Hotel Mode is activated.Volume level cannot be increased higher then certain level in Hotel Mode. The volume limiting level is a pre-defined value in service menu.Hotel mode activated from service menu.

8.7 SYSTEM VOLTAGE ADJUSTMENT• Switch the TV in AV mode by pressing AV button on remote control unit. (Minimum beam current condition)• Adjust the VAP2 potentiometer until 110Vdc measured on cathode pin of DP08 diode.


17

DDiisscc TTyyppee DDeessccrriippttiioonn

DVD-5 (Single Layer)DVD-9 (Double Layer) IS09660DVD-10 (Single Layer Double Side) UDEDVD-18 (Double Layer Double Side) DVD BOOK

IS09660RED BOOK (CD-DA)WHITE BOOK (Video-CD)

CD BLUE BOOK (CD Extra)YELLOW BOOK (CD-ROM)ORANGE BOOK (CD-RW, R)

DVD-5 4.70 GBDVD-9 8.54 GBDVD-10 9.40 GBDVD-18 17.0 GBCD 656 MB (Mode 1)

748 MB (Mode 2)Disc Diameter DVD/CD 12 cm/8 cmDisc Thickness 1.2 mmDisc centerAperture 15 mmTrack Gap 1.6 µm, CD 0.74 µm, DVD

AApppplliiccaabbllee DDiissccss FFoorrmmaatt

Disc Format

DDiisscc CCaappaacciittyy

9. DVD MODULE

9.1 SAFETY AND HANDLING PRECAUTIONS

1. DO NOT use and store the Loader in dusty, high temperature or high humidity environments.2. To avoid damage to the Loader by electrostatic dischargers, measuring equipment and operators should be

grounded during handling. The user of this unit takes all necessary precautions to avoid ESD (Electro-StaticDischarge) failures during handling and assembly of this unit into the end product.

3. Contamination of the PCB might influence the performance. Avoid fingerprints and stains on the PCB andhandle the Loader in a clean environment.

4. The mechanism of the Loader has been adjusted carefully during manufacturing. High shocks on this unitmay damage and should be avoided.

5. Fast heating (e.g. by bringing the Loader unit from a cold place into a warm and humid room) can result inmoisture condensing on the pickup lens, thus influencing the playability for a certain time. Before checkingthe performance the Loader unit should be stabilized for at least 4 hours.

6. DO NOT disamble the loader to avoid ESD failures and to prevent from contamination.

AACC SSoouurrccee SSuuppppllyy::The Voltage Fluctuation : 110/220 V ± 10% toleranceThe Impulse Noise : 110/220 V ± 10% tolerance


18

FFuunnccttiioonnss Data Transfer Rate:

DVD 2600kB/sec (max)CD 870kB/sec (max)

Data Buffer Capacity 256KB (DVD/CD)

Error Rate10e -15 MAX (DVD), 10e -12 MAX (CD)

Reading TimeStarting procedure (Less than 15seconds)Stopping procedure (Less than 2 Seconds)

LLaasseerr SSppeecciiffiiccaattiioonnss

DDVVDD CCDD

Laser wavelength 650-665nm 790+20nmLaser power 0.5mW 0.7mWObject Lens Non-spherical lenslens Length of Ray

Coil 0.6mm 0.47mmMoving Range 1.71mm 1.35mm

Focus AstigmatismSearching Phase difference detection Three spot tracking

Disc Loading ModeMotor- driven front-loading tray

Disc Fixing Beam magnetic fixation

Reliability Mean Time Between Failure (MTBF): Not less than 2,000 hours Mean Time To Repair (MTTR): 0.5 hours

WWoorrkkiinngg EEnnvviirroonnmmeenntt Temperature and Humidity

Operating temperature 5 – to 45 –Storage temperature - 20 – to 60 – Operating temperature varying 11–/hour(max)Storage temperature varying 20–/hour(max)Operating humidity 10% to 70%Storage humidity 5% to 80%

VibrationReading data state 0.2g 10-30Hz sine wavePlaying CD audio state 0.15g 10-30Hz randomStandby 2.4g 10-30Hz random

StrikingStandby state 100kg 6ms half sine-wave (in X,Y and Z directions)

NoiseNot more than 45dB in one meter away


19

9.2 MECHANICAL AND ELECTRICAL

1. CONNECTORS

Integrated Connectors1. DC power jack2. IDE interface3. Master/slave mode jumper set (not applicable as the loader configured for player)4. Analog audio output (not applicable as the loader configured for player)5. Digital Audio output (not applicable as the loader configured for player)

ITEM PIN NO. DESCRIPTION

1 +12V

2 GND

DC Power Jack 3 GND

4 +5V

SSiiggnnaall PPiinn NNoo.. PPiinn TTyyppee DDeessccrriippttiioonn

CSIEX- 37 I Driver Chip Select 0

CS3EX- 38 I Driver Chip Select 1

DA0 35 I Driver Address Bus-Bit 0


PPiinn DDeeffiinniittiioonnssPower Jack

ATAPI Interface


20


DASP- 39 I /O Driver Activity/Driver I Present

DD0 17 I /O Driver Data Bus-bit 0
















DIOR 25 I Driver I/O Read

DIOW- 23 I Driver I/O Write

DMACK- 29 I DMA Acknowledge

DMARQ- 21 O Driver Request

INTRQ 31 O Driver 16Bit I/O

IOCS16 32 O Driver Interrupt

IORDY 27 O I/O Channel Ready

PDIAG- 34 I/ O Passed Diagnostics

RESET- 1 I Driver Reset

CSEL 28 Cable Select

KEYPIN 20 Keying Pin on Interface Connector


21

IItteemmss MMooddeell NNoo.. MMaakkeerr LLooccaattiioonnSpindle Motor CCM03-042R1-2 MORETECH ChinaLoading Motor FC8A30T28_4A DM2429A SANKO TRICORE China TaiwanSled Motor FC8A30T18_2 DM2428 SANKO TRICORE China TaiwanLaser Pick-up PVR-520T-HR-0101 MISTSUMI JapanActuator Drive BA5954FP Rohm JapanLoading Motor Drive BA6287F Rohm JapanRF Amp. SP3721A TI U.S.AServo DSP M5705 ALI Taiwan

2. KEY COMPONENTS

3. MECHANICAL DIMENSIONS


22

TV CHASSIS

A 1 TUNER

10- BLOCK DIAGRAMS


D2

D1

D5

D4

D3

A 2 VIDEO PROCESSOR


24

A 4 EEPROM

A 3 SCART


25

E1

A 5 POWER SUPPLY


26

F2

F1

A 6 HORIZONTAL


27

G2

G1

A 7 MICRO CONTROLLER


28

A 8 AUDIO AMPLIFIER


29

H1

H2

A 9 VERTICAL

A10 AV INTERFACE CONNECTOR


30

A 12 FRONT AV

A 11 KEYBOARD


31

A13 LINE OUT

A14 TUBE MODULE


32

A 15 IR MODULE


33

R234

C208

AWRC47K

10K

Default

47K0.1U

R207

RR

ALI

M57

05 (

176

PIN

) D

VD

/CD

DE

CO

DE

R

DE

CO

DE

R.S

CH

Titl

e

RD

[0..1

5]

XH

D[0

..15]

RA

[0..9

]

MA

[00.

.15]

MD

[0..7

]

RF

O

RA3RA2RA1RA0RA4RA5RA6

MD0MD1

RA7

MD2MD3MD4MD5

RA8

MD6MD7

MA9MA8MA7MA6MA5MA4MA3MA2MA1MA0

RD11

RD

0

XH

D9

XH

D5

XH

D13

RD

3

XH

D8

XH

D15

XH

D12

XH

D1

XH

D6

RD9

RD

1

XH

D7

XH

D2

RD

2

XH

D0

RD

14

RD5

XH

D11

RD7

RD

15

3.3V

XH

D10

RD

12

RD8

RD

13

XH

D4

XH

D14

XH

D3

RD10RD4

RD6

TR

AC

KS

LEG

FO

CU

S

DF

CT

XS

CS

JX

SC

LK

XS

FG

INX

SP

DO

N

MA10

3.3V

VC

2

VC2

MA13MA14MA15

MA11

3.3V

EJE

CT

1

MA12

OU

TS

W

SS

BA

D

SA

EI

SA

EI

SS

BA

DD

FC

T

XS

DA

TA

XS

CLK

XS

CS

J

XS

DA

TA

SLE

G

SS

BA

D

XS

PD

ON

XS

FG

IN

FO

CU

S

LED

1PLCKSLRF

INS

W

XS

FG

IN

FLA

G1

FLA

G3

CO

UN

TE

R

PLC

K

FLA

G0

SLR

F

RF

O

TR

AC

K

DF

CT

MO

TOR

MO

TOR

FLA

G2

FLA

G2

FLA

G0

FLA

G3

FLA

G1

TR

AY

_CN

TL

RA9

RF

O2

MD

[0..7

]5

MA

[0..1

5]5

RD

[0..1

5]7

RO

EJ

7R

CA

SJ

7R

RA

SJ

7R

WE

J7

XH

D[0

..15]

6

IOR

DY

6

HC

S16

J6

HP

DIA

GJ

6

HD

AS

PJ

6

HD

RQ

6IO

WJ

6

HA

16

HD

AC

KJ

6

HA

06

HC

S1J

6

HIN

TJ

6

IOR

J6

HA

26

HC

S3J

6

EF

GC

2 SM

OTO

R4

TEXI

2SF

OC

US

4S

TR

AC

K4

TEI

2F

EI

2

MF

SC

SJ

5

SA

E2

MIR

R2

SS

LEG

4

SB

AD

2 SD

FC

T2

SC

SJ

2S

CLK

2S

DA

TA

2 SS

PD

ON

4S

FG

IN4

LDO

N2

CR

ST

J4,

5

IDE

RS

T6

MV

RE

F2

2,4

MV

RE

F2

2,4

EJE

CT

15

INS

W4

LED

15

MP

SE

NJ

5

RF

RP

2

OU

TS

W4

PI_

SIG

O2

MW

RJ

5

TR

AY

_CN

TL

4

BIT

16

MP

1_

A16

J5

RA

[0..9

]6,

7

RFGND

RFGND

PLL

VC

C

3.3V

3.3V

RF

VC

C

RFGND

PLL

GN

D

PLL

VC

C

3.3V

PLL

GN

D

RFGND

RFGND

3.3V

3.3V

3.3V

3.3V

3.3V

RFGND

RFGND

RFGND

RF

VC

CR

FV

CC

RF

VC

C

PLL

GN

D

VC

C

PLL

GN

D

PLL

GN

D

RF

OTP

R20

951

K

CO

UN

TE

RTP

R20

747

K

D21

1N41

481

2

R22

05K

1

J21

RS

232

1 2 3 4

VC

CTX R

XG

ND

R20

610

K

PLC

KTP

DF

CT

TPSLR

FTP

R22

133

BC

28

0.1U

C22

1

0.1U

R22

80

C21

910

00P

SS

BA

DTP

R21

33K

3

R22

233

BC

23

0.1U

FLA

G0

TP

R22

333

Y21

33.8

688M

Hz

R21

83K

3R

219

4K7

BC

21

0.1U

BC

27

0.1U

C21

6

1000

PC

217

0.1U

C20

80.

1U

R21

60

RX

DTP

C21

80.

1U

C20

50.

1U

C22

512

P

FLA

G1

TPXS

FG

INTP

R21

03K

3

R22

9

100K

R21

7R

R21

410

K

C21

3

0.04

7U

C21

0 C

FO

CU

STP

TR

AC

KTP

C20

910

00P

R22

610

FLA

G2

TP

L21

L

BC

26

0.1U

U21

ALi

M57

05

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

4546474849505152535455565758596061626364656667686970717273747576777879808182838485868788

8990919293949596979899100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176

AV

SS

_DS

XS

RF

INX

SIP

INA

VD

D5-

DS

XS

DS

SLV

XS

RS

LIN

TV

DD-

3.3

XS

AW

RC

XS

RF

GC

XS

EF

GC

XS

FO

CU

SX

ST

RA

CK

XS

SLE

GA

VD

D5-

DA

XS

MO

TO

RA

VS

S-

DA

XS

RF

RP

LPX

ST

ELP

XS

VR

EF

2X

SR

FR

PX

ST

EX

IA

VS

S-

AD

XS

TE

IX

SF

EI

XS

AE

IA

VD

D5_

AD

XS

SB

AD

GN

DX

SD

FC

TX

SC

SJ

XS

CLK

XS

DA

TA

XS

LDC

XS

FG

INX

SS

PD

ON

XS

FLA

G3

XS

FLA

G2

XS

FLA

G1

XS

FLA

G0

XM

P1_

7X

MP

1_6

GN

DX

MP

1_5

XM

P1_

4

XMP1_3XMFSCSJXMP1_2XGPIO2XMP1_1XHRSTJXGPIO1XGPIO0XCRSTJXMPSENJVDD_3.3XMALEXMP1_0VDD_3.3XOSC1XOCS2GNDXMD0XMD1XMD2XMD3XMD4XMD5XMD6XMD7XMCSJXMRDJXMWRJXMINT1JXMA11XMA10VDD_3.3XMA9XMA8XMA7XMA6XMA5XMA4XMA3XMA2XMA1XMA0XMA12GND

XM

A13

XM

A14

XM

A15

XH

DA

SP

JX

HC

S3J

XH

CS

1JX

HA

2X

HA

0X

HP

DIA

GJ

XH

A1

XH

CS

16J

XH

INT

JX

HD

AC

KJ

XH

IOR

DY

JX

HIO

RJ

XH

IOW

JX

HD

RQ

JX

HD

15X

HD

0X

HD

14X

HD

1G

ND

XH

D13

XH

D2

XH

D12

XH

D3

VD

D_3

.3X

HD

11X

HD

4X

HD

10X

HD

5X

HD

9X

HD

6X

HD

8X

HD

7X

RD

15X

RD

0X

RD

14X

RD

1X

RD

13X

RD

2G

ND

XR

D12

XR

D3

XRD11XRD4

XRD10XRD5XRD9GND

XRD6XRD8XRD7

XRWEJXRSDCLK

XRRASJXRCASJVDD_3.3

XROEJXRA9XRA8

VDD_3.3XRA11XRA10

XRA7GND

XRA6XRA5XRA4XRA0XRA1XRA2XRA3

VDD_3.3XTPLCKXTSLRF

GNDXSPDIREFXSFDIREFAVDD5_PL

XSPLLFTR2AVSS_PL

XSFDOXSFTROPIXSVR_PLL

XSPDOFTR1XSVREFO

XSAWRCVCO

C22

312

P

R22

7R

R21

13K

3

C22

4C

SLE

GTP

MO

TOR

TP

R23

0R

C20

318

P

BC

25

0.1U

C21

4

470P

C20

20.

01U

FLA

G3

TP

C20

70.

1U

R20

44K

7B

C24

0.1U

TXD

TP

C20

647

P

R23

70

TC

2247

U/1

6VR

205

5K1

R21

547

K

R23

1R

RN

21

SR

N33

1 3 5 78642

C20

10.

1U

C21

2

0.47

U

R23

5R

R20

8

20K

R23

6

R

C22

010

00P

TC

2122

0U/1

6VR

203

51K

C21

5

470P

C20

40.

1U

C21

1

6800

P

R21

23K

3

R23

4R

R20

1

100K

BC

22

0.1U

DVD MODULE


34

Vref R132R133

2.1V 1.5K 8.2K

2.5V

0R

R134R135

0MVREF2=MVREF25

RR 0

MVREF2!=MVREF25

ALI

HO

P10

00P

RE

-AM

PC

IRC

UIT

PR

EA

MP

.SC

HT

itle

CD

LDO

ME

I-

CD

LD

PU

HR

F

MV

RE

F25

FE

I

ME

I-

D

PI

DV

DLD

OF

ME

VO

E MV

RE

F25

DV

DLD

DV

DM

DI

DV

DLD

OC

DM

DI

CD

LDO

A

MV

RE

F2

MV

RE

F2

TR

AC

K-

TR

AC

K+

FO

CU

S-

FO

CU

S+

DV

DM

DI

DV

DLD

CD

LD

CD

MD

I

PU

HR

FC B A D F E

MV

RE

F25

C B

MV

RE

F25

ME

VO

PI

RF

O3

TEI

3

MIR

R3

LDO

N3

SD

FC

T3

SA

E3

SC

SJ

3S

DA

TA

3S

CLK

3

TEXI

3

EF

GC

3

TR

AC

K-

4T

RA

CK

+4

FO

CU

S-

4F

OC

US

+4

FE

I3

SB

AD

3

MV

RE

F2

3,4

RF

RP

3

RFGND

RFGND

RFGND

RFGND

RFGND

RFGND

RFGND

RFGND

RFGND

RFGND

RFGND

RF

VC

C

RF

VC

C

RF

VC

C

RF

VC

C RF

VC

C

RFGND

RFGND

RFGND

RFGND

RF

VC

C

RFGND

RFGND

RFGND

RFGND

C11

868

0P

C12

547

00P

R11

856

K

C13

1

33P

R10

110

C12

2C

R10

510

C11

910

0P

C12

9

0.1U

R10

71K

2

U12

TL3

472

1 2 3 45678

AO

A-

A+

V-

B+B-

BOV+

L12

10U

H

L11

10U

H

C12

610

00P

C12

8

0.1U

C11

033

P

C12

7

0.1U

R13

610

K

C12

315

0P

R10

81K

2R

109

10K

U11

SP

3721

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

17181920212223242526272829303132

64636261605958575655545352515049

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

DV

DF

RP

DV

DR

FN

PD

1P

D2

A2

B2

C2

D2

CP

CN

D C B A F E

CDTEVC12NCVNBDVDPDDVDLDCDPDCDLDLDONVCVCIVPBMIRRMPMBFDCHG

CDRFDCCDRFATOPATON

AINAIP

VPASIGOBYPRXDINDIP

FNPFNNVNA

HOLD1

SD

EN

SD

AT

AS

CLK

LCP

LCN

CE

FE TE ME

IM

EV

TP

HD

FT PI

MIN

ME

VO

MLP

F

TC

14

100U

/16V

C10

30.

1UC

105

0.1U

C10

20.

1UC

104

0.1U

TC

15

100U

/16V

R11

2R

BC

11

0.1U

C10

968

0P

C10

13.

3P

TC

16

100U

/16V

R10

34K

7

R11

30

C12

010

00P

C12

10.

1U

BC

13

0.1U

R11

4R

R13

40

R13

2

1K5

R12

3

100

R12

210

0

C13

0

0.1U

C11

133

P

TC

11

220U

/16V

C12

4

1000

P

R10

2

5K1

C11

468

0PC

115

680P

TC

13

100U

/16V

C11

2

0.1U

C13

4

0.47

U

BC

120.

1U

CN

11

HO

P-1

000

JP24

-05M

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

TR

-T

R+

FO

-F

O+

PD

(MO

NIT

OR

)V

CC

VR

GN

DLD

(DV

D)

LD(C

D)

VR

GN

D(N

C)

PD

GN

DR

FO

UT C B A D F E

VC

CV

S(V

CC

)G

ND

R11

0

10K

Q11

SO

T89

EB

C 2

SB

1132

E

B

C

Q12

SO

T89

EB

C 2

SB

1132

E

B

C

D11

1N41

4812

TC

12

100U

/16V R

106

1K

D12

1N41

48

12

R13

3

8K2

R10

4

8K2

C11

768

0P

C10

6

1000

P

C11

333

P

R11

547

0K

C10

70.

1U

C11

60.

047U

R13

5R

ALI HOP-1000

PRE-AMP.


35

RFGND

PAGND

PAGND

PAGND

RF

VC

C

RF

VC

CM

VC

C

12V

PLL

VC

C

PLL

VC

C

VC

C

12V

5V

5V3.

3V

3.3V

RF

GN

DM

GN

DP

LLG

ND

GN

D

PLL

GN

D

+12V

MV

CC

M5V

5V

PAGND

5V PAGND

MV

CC

R70

1

3.3

080

5

D71

1N40

02

12

C70

4

0.1U

Q72

SO

T22

3 A

S11

17

32

1

INO

UT

GND

L77

FB

-1

12

TC

76

100U

/16V

PLL

VC

CTP

L71

FB

-1

RF

GN

DTP

MG

ND

TPG

ND

TPP

LLG

ND

TP

TC

73

100U

/16V

C70

1

0.1U

L74

FB

-11

2

L78

FB

-1

TC

71

220U

/16V

D72

1N40

02

12

L72

FB

-11

2

C70

9

0.1U

Q73

(BA

05 T

O25

2AA

)

1

2

3

TC

72

220U

/16V

C70

2

0.1U

C71

0

0.1U

C70

7

0.1U

TC

75

220U

/16V

C70

6

0.1U

C70

3

0.1U

C70

8

0.1U

RF

VC

CTP

MV

CC

TP3.

3V TP

ALI HOP-1000

POWER


36

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

53545556

57585960616263646566676869707172737475767778798081828384858687888990

9192

93 9495

96979899

100101102103104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208

LCS1#

LOE#

LD0VSS

LCS3#LCS2#

AUX[0]

LA21

LA20

RESE

T# VEE

TSD3

HIOC

S16#

/CAM

CLK/

AUX3

[4]

HA1/

AUX4

[3]

VSS

HA0/

AUX4

[2]

HWR#

/DCI

_CLK

/AUX

4[5]

HRD#

/DCI

_ACK

#/AU

X4[6

]

HD4/

DCI4

/AUX

1[4]

HD5/

DCI5

/AUX

1[5]

HD6/

DCI6

/AUX

1[6]

/VFD

_DOU

T

HD2/

DCI2

/AUX

1[2]

HD3/

DCI3

/AUX

1[3]

VEE

VCC

DB8

VCC

DB5

DB9

DCS0#

VCC

VSS

TSD0

/SEL

_PLL

0

TSD1

/SEL

_PLL

1

TDM

FSTD

MCL

KTD

MDR

TDM

TSC#

TWS/

SEL_

PLL2VE

ELA

4LA

5LA

6LA

7LA

8LA

9VS

SVC

CLA

10LA

11LA

12LA

13LA

14LA

15LA

16VS

SVE

ELA

17LA

18LA

19

TDM

DX/R

SEL VS

S

TSD2

SPDI

F/PL

L3 NC VSS

MCL

KTB

CK

VEE

VEE

VSS

VSS

DQM

RSD

RWS

RBCK NC XI

NXO

UTAV

EE

DSCK

VSS

DB15

DB13

DB11

DB1

VSS

DMBS1

DRAS#

DOE#/DSCK_EN

VEE

DMA9

DMA7

VSS

DMA5

DMA3

VEE

DCS1#

DB14

DB12

DB10

DB0

VEE

DMBS0

DWE#

DCAS#

VSS

DMA8

DMA6

VEE

DMA4

DMA2

VSS

DB7DB6VSS

DB4DB3DB2

DMA11DMA10

DMA1DMA0

HCS3

FX#/

AUX3

[6]

HCS1

FX#/

AUX3

[7]

VSS

HIOR

DY/A

UX3[

3]

VSS

HD13

/AUX

2[5]

/SP

HD12

/AUX

2[4]

/C2P

OHD

11/A

UX2[

3]//I

RQHD

10/A

UX2[

2]/S

QSK

HD9/

AUX2

[1]/S

QSO

HD8/

DCI_

FDS#

/AUX

2[0]

/VFD

_CLk

VSS

HIRQ

/DCI

_ERR

#/AU

X4[7

]HR

ST#/

AUX3

[5]

HRRQ

#/AU

X4[0

]HW

RQ#/

DCI_

REQ#

/AUX

4[1]

HD15

/AUX

2[7]

/IRHD

14/A

UX2[

6]/S

QSI

VCC

HD7/

DCI7

/AUX

1[7]

/VFD

_DIN

HD1/

DCI1

/AUX

1[1]

HD0/

DCI0

/AUX

1[0]

VCC

VSS

HSYN

C#/C

AMIN

7/AU

X3[0

]

PCLK

2XSC

N/CA

MIN

4YU

V7/C

AMIN

3YU

V6/V

DAC

PCLK

QSCN

/CAM

IN5/

AUX3

[2]

VSYN

C#/C

AMIN

6/AU

X3[1

]

YUV5

/YDA

CVS

SAD

VEE

YUV4

/RSE

TYU

V3/C

OMP

YUV2

/CDA

CYU

V1/V

REF

YUV0

/CAM

IN2/

UDAC

DCLK

VEE

AUX[7]AUX[6]

VEE

LD1LD2

LA3

LD12VEE

HA2 /AUX4[4]VEE

VEE

LD3

LD5

LD9

LD13

LWRHL#

CAMIN1

AUX[1]

AUX[3]/IOR#

LD4

LD6

LD10

LD14

VSS

LA0

AUX[2]/IOW#

AUX[4]

VEE

LD7

LD11

LD15

VEE

LA1

VSS

AUX[5]

VSS

LD8

VSS

LWRLL#

CAMIN0

LA2

VSSVCC

LCS0#

VSS

208-Pin PQFP Package

ES6008/18/28/38

MPEG BoardMPEG Decoder


37

11- DESCRIPTION OF INTEGRATED CIRCUITS-TV PART-


38

SIFIN1

SIFIN2

AGCSIFCAP

VREFIF

AGCPIFCAP

PIFIN1

PIFIN2

TUNERAGCOUT

IFPLL

GND IF

AM /FMOUT/SC

VCCIF

INTCVBSOUT

EXTAUDIOIN

PIFLC1

PIFLC2

VCC2

CVBSIN1

GND2

CVBSIN2

BS

Y/CVBSIN3

CHR

APR

BEXT/Cb

GEXT/Y

REXT/Cr

FBEXT

FMCAP

AUDIOOUT

GNDD

VCCD

SDA

SCL

SLPF

LFB/SSC

HOUT

VERT

BCL/SAF

VCC1

CVBSOUT2

GND1

X1/VAMP/CHROUT

CLPF

XTAL1

XTAL2

XTAL3/BTUN

ROSD

GOSD

BOSD

ICATH

ROUT

GOUT

BOUT

NTBC/CVBSOUT1

FBOSD/HC

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

STV224X pos: ICV1Multi Standard TV Processor

STV224X is a fully bus controlled IC for TV including PIF, SIF , Luminance , Chrominance and deflection processing. It is abus controlled PAL / SECAM / NTSC single chip TV Processor. For details of STV224X features please refer to theSTV224X datasheet. 110° , 4:3 or 16:9 CRT applications. It integrates both vertical deflection and E-W correction circuitnecessary for design of 110° chassis it allows designing a PAL/NTSC(BGDKIMN) set with very few external componentsand no manual adjustment.


39

1.2 PIN DESCRIPTION

Table 1. Pin Configuration

Pin N°Symbol DescriptionSTV224XC/8XC STV223XD

SDIP56 TQFP64

1 8 SIFIN1 SIF Input

2 9 SIFIN2 SIF Input

3 10 AG CSIFCAP AG C SIF Capacitor

4 11 VREFIF Voltage Reference Filtering

5 12 AGCPIFCAP AGC PIF Capacitor

6 13 PIFIN1 PIF Input

7 14 PIFIN2 PIF Input

8 16 TUNERAGCOUT AGC Tuner Output

9 17 IFPLL IF PLL Filter

10 18 GND IF IF Ground

11 19 AM/FMOUT/SC AM/FM Mono Sound or Stereo Carriers Output

12 20 VCCIF 5 V IF Supply

13 21 INTCVBSOUT Internal CVBS Output

14 22 EXTAUDIOIN External Audio Input

15 23 PIFLC1 LC Input

16 24 PIFLC2 LC Input

17 25 VCC2 Video/Luma Supply Voltage (8 V)

18 26 CVBSIN1 Internal Video Input

19 27 GND2 Video/Luma Ground

20 28 CVBSIN2 External Video Input

21 29 BS Black Stretch Capacitor

22 34 Y/CVBSIN3 Y(SVHS) or CVBS3 External Input

23 35 CHR Chroma (SVHS) Input

- 37 UIN B-Y Input

- 38 VIN R-Y Input

- 39 YIN Y Input

- 40 YOUT Y Output

- 41 VO UT R-Y Output

- 42 UO UT B-Y Output

30 43 BOUT Blue Output

31 44 GOUT Green Output

32 45 ROUT Red Output

33 46 ICATH Cathode Current Measurement Input

34 47 BOSD OSD Blue Input

35 48 GOSD OSD Green Input

36 49 ROSD OSD Red Input

37 50 FBOSD/HC O SD Fast BlankingInput / Half Contrast onSDIP56 package

38 52 XTAL3/BTUN 3.5X M Hz CrystalorCloche FilterTuningCapacitor

39 53 XTAL2 3.5X MHz Crystal

40 54 XTAL1 4.43/3.5X MHz Crystal

41 55 CLPF Chroma PLL Filter

42 56 X1/VAMP/CHROUTXTAL1 Control Pin, Vertical Amplitude DAC OutputChroma Reference Signal Output

STV224X


40

43 57 GND1 Chroma/Scanning Ground

- 58 CVBSOUT1 Main Video Switch Output

45 59 VCC1 Chroma/Scanning Power Supply (8 V)

46 61 BCL/SAFBeam Current Limiter Control Voltage and Safety (XRAY)

47 62 VERT Vertical Output Pulse

48 63 HOUT Horizontal Output Pulse

49 64 LFB/SSC Line Flyback Input and Super-Sandcastle Output

50 1 SLPF Scanning PLL Filter

51 2 SCL I C Bus Clock Input

52 3 SDA I C Bus Data Input

53 4 VCCD Digital Supply Voltage (5 V)

54 5 GNDD Digital Ground

55 6 AUDIOOUT Main Audio Output

56 7 FM CAP FM Dem odulation Capacitor

Pin N °Symbol DescriptionSTV224XC/8XC STV223XD

SDIP56 TQFP64


41

STV2248

APR

BCL/SAF

RGB

CONTRAST

BRIGHT.

DRIVE

CUTOGG

BLANKING

LUMA DL

PEAKING

& CORING

ACC & ACC

OVERLOAD

BANDPASS

FILTER

Sound

Subcarrier

W/B SPOT

INVERTER

PLL Reference

Carrier

XTAL3/BTUN

ROSD

FBOSD/HC

GOSD

BOSD

BCL/SAF

I CATH

ROUT

GOUT

BOUT

VERT

HOUT

3

LFB/SSC

SLPF

X1/VAMP/CHROUT

CLPF

XTAL1

XTAL2

AM/FMOUT/SC

EXTAUDIOIN

AUDIOOUT

BLACK

STRETCH

CHROMA

TRAP

FILTER

TUNING

CLOCHE

TUNING

SAT./CONT

MATRIX

YUV

SWITCH

DEEMP. FM

Mono

AM

Mono

49

Mute

SOUND BP

FM DEMOD

AGC

AGC

TUNER AGC

PLL

AFC

HORIZONTAL

2nd LOOP

HORIZONTAL

1st LOOP

AUTO IDENT.

KILLER

PAL/SECAM/NTSC

DEMODULATOR

VERTICAL

SCANNING

SYNC.

SEP

CHROMA

DL

VAMP DC

CONTROL

IC BUS

DECODER

AUDIO

REF 4 VREF

SCL

SDA

52

51

53

VCCD

54

GNDD

VCCIF

10

GND

IF

54

45

VCC1

43

GND1

VCC2

19

GND2

17

56FMCAP

23CHR

22Y/CVBSIN3

20CVBSIN2

18CVBSIN1

44CVBSOUT2

13INTCVBSOUT

29NTBC/CVBSOUT1

15PIFLC1

16PIFLC2

7PIFIN2

6PIFIN1

HALF

CONTRAST

VOLUME

21BS

28FBEXT

27REXT/Cr

26GEXT/Y

25BEXT/Cb

IFPLL 9

1SIFIN1

2SIFIN2

5AGCPIFCAP

8TUNERAGCOUT

3AGCSIFCAP

RGB

TO YUV

LIMITER

I CATH SENSE

AVL

37

36

35

34

24

APR

46

33

32

31

30

47

48

50

Mute

42

41

38

11

14

55

CLOCHE

FILTER

RGB

SWITCH


42

MAIN FEATURESl I-C bus control (read and write modes),l PIF PLL demodulator, Bus controlled VCO alignment,l IF positive and negative modulation,l Digital AFC,l Tuner delayed AGC output,l White and Black spot cancellation,l SIF with QSS or intercarrier structure,l Built in sound bandpass,l Multistandard PLL FM demodulator (4.5, 5.5,

6.0,6.5MHz),l AM demodulator for France,l FM sound carriers output for Stereo chassis,l Audio switch for external audio input, Mono chassis,l Digital volume control,l Audio Mute,l Video switch, 3 CVBS inputs, 1 CVBS output which can

be used to drive teletext decoder,l SVHS switch, Y input is combined with CVBS3 input,l OSD RGB analog inputs, fast blanking detection on OSD

fast blanking pin, contrast control capability,oversizeblanking capability on OSD fast blanking input,

l External analog RGB inputs with contrast and saturationcontrol (external RGB matrixed in YUV).

l Integrated chroma filters (trap, bandpass, cloche) withautomatic alignment,

l Integrated luminance delay line,l Adjustable peaking on the luminance signal with coring

function,l Black strech circuit,l PAL / SECAM / NTSC color decoder with automatic iden-

tification of standards,l Integrated chroma delay line,l Full integrated SECAM decoder,l Hue control, two selectable matrixes in NTSC mode,l Automatic flesh control circuit with two selectable charac-

teristics (normal and wide),l ACC overload circuit,l Chroma subcarrier output, which could be used to drive

comb filter circuit,l Automatic RGB peak regulation (APR).l Automatic digital cut-off current loop with warm-up detec-

tion circuit,l White point and cut-off point adjustments,l Beam current limiter control stage,l High performance synchronization pulses separator,l Horizontal synchronization with two phase locked loops,l Integrated VCO, auto-calibration using the chroma crystal

reference frequency,l Automatic time constant selection for the first PLL, 3

selectable time constants,

l Video identification circuit (independent from PLL1),l Noise detector circuit,l Vertical countdown circuit,l Automatic 50/60Hz selection circuit,l Blanking and inserted cut-off pulses position adapted to

standard (50 or 60Hz),l Long blanking mode capability in 60Hz (same blanking as

50Hz standard),l Possibility to insert cut-off pulses after a vertical oversize

blanking signal,l De-interlace capability,l Horizontal starting circuit with soft-start capability,l Horizontal and vertical position adjustments, vertical

amplitude control voltage (combined with chroma subcar-rier output),

l 4/3, 16/9 selection voltage.


43

ELECTRICAL CHAR ACTERISTICS

ABSO LUTE MA XIMUM RA TING S

THERM AL DA TA

SUPPLY

(Supplies at Typical Values, Tamb = 25° C, IC bus register at power-on reset value, autommode, unless otherwise specified).

Symbol Parameter Value Unit

VCC _8V 8 V Supply Voltage 10 V

VCC _5V 5 V Supply Voltage 7 V

VESD Capacitor 100 pF discharged via 1.5 k serial resistance (Human Body Model)±2 kV

Toper Operating Temperature 0, +70 °CTstg Storage Temperature -55, +150°C

Symbol ParameterTypicalValue

Unit

Rth (j-a)Junction-ambient Thermal Resistance (measured at PD = 1 W)SDIP56 40 °C/WTQFP64 50 °C/W

Symbol Parameter Test Conditions Min. Typ Max. Unit

VCCIF IF Circuit Supply Voltage 4.75 5 5.25

VCCD Bus & Digital Supply Voltage 4.75 5 5.25

VCC1 Chroma, Scanning Supply Voltage 7.6 8 8.4 V

VCC2 Video Supply Voltage 7.6 8 8.4 V

ICCIF VCCIF Current Consumption VCCIF = 5 V. No-load at RGB outputs. 58 m

ICC5F VCC5F Current Consumption VCCD = 5 V. No-load at RGB outputs. 48 m

ICCI VCCICurrent Consumption VCCI= 8 V. No-load at RGB outputs. 40 m

ICC2 VCC2 Current Consumption VCC2 = 8 V. No-load at RGB outputs. 56 m

PD TotalPower Dissipation

VCCI = VCC2 = 8 V,

VCCIF =VCC5V = 5 V

No-load at RGB outputs.

1300 mW


44

• Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes

• 0°C to +70°C Operating Temperature Range available

• Up to 24 MHz Operation @ 5V±10%

• Minimum instruction cycle time: 165nS at 24MHz.

• 48, 56, 64, 84 or 64K Bytes ROM

• 256 Bytes RAM of Register file (accumulators or indexregisters)

• 256 to 512 Bytes of on-chip static RAM

• 2 or 8 Kbytes of TDSRAM (Teletext and Display StorageRAM)

• 28 fully programmable I/O pins

• Serial Peripheral Interface

• Flexible Clock controller for OSD, Data Slicer and Coreclocks running from a single low frequency external crystal.

• Enhanced Display Controller with 26 rows of 40/80 char-acters– 2 sets of 512 characters– Serial and Parallel attributes – 10x10 dot Matrix, definable by user – 4/3 and 16/9 supported in 50/60HZ and 100/120 Hzmode– Rounding, fringe, double width, double height,scrolling, cursor, full Background color, half-intensitycolor, translucency and half-tone modes

• Teletext unit, including Data slicer, Acquisition Unit andup to 8K Bytes RAM for Data Storage

• VPS and Wide Screen Signalling slicer

• Integrated Sync Extractor and Sync Controller

• 14-bit Voltage Synthesis for tuning reference voltage

• Up to 6 External Interrupts plus one non-maskable inter-rupt

• 8 x 8-bit programmable PWM outputs with 5V open-drainor push-pull capability

• 16-bit Watchdog timer with 8-bit prescaler

• 1 or 2 16-bit standard timer(s) with 8-bit prescaler

• I–C Master/Slave (on some devices)

• 4-channel A/D converter; 5-bit guaranteed

• Rich instruction set and 14-Addressing modes

• Versatile development tools, including Assembler, Linker,

C-Compiler, Archiver, Source Level Debugger and hard-ware emulators with Real-Time Operating System avail-able from third parties

• Pin Compatible EPROM and OTP devices available.Microcontroller+OSD+(Teletext decoder)+VPS/PDC/WSdecoder are embedded in one chip, where there are twotypes with the major difference; ST92185 No-teletext ST92195 With teletext

The ST92195 microcontroller is developed and manufac-tured by STMicroelectronics using a pro-prietary n-wellHCMOS process. Its performance derives from the use ofa flexible 256-register pro-gramming model for ultra-fastcontext switching and real-time event response. The intelli-gent on-chip peripherals offload the ST9 core from I/O anddata management processing tasks allowing critical appli-cation tasks to get the maximum use of core resources.The ST92195 MCU supports low power consumption andlow voltage operation for power-efficient and low-costembedded systems. The advanced ST9+ Core consists of the Central Process-ing Unit (CPU), the Register File and the Interrupt con-troller. The general-purpose registers can be used as accu-mulators, index registers, or address pointers. Adjacentregister pairs make up 16-bit registers for addressing or16-bit processing. Although the ST9 has an 8-bit ALU, thechip handles 16-bit operations, including arithmetic,loads/stores, and memory/register and memory/memoryexchanges. Two basic addressable spaces are available:the Memory space and the Register File, which includesthe control and status registers of the on-chip peripherals.Power consumption of the device can be reduced by morethan 95% (Low power WFI). Up to 28 I/O lines are dedicated to digital Input/Output.These lines are grouped into up to five I/O Ports and canbe configured on a bit basis under software control to pro-vide timing, status signals, timer and output, analogueinputs, external interrupts and serial or parallel I/O. A setof on-chip peripherals form a complete system for TV setand VCR applications: – Voltage Synthesis – VPS/WSS Slicer – Teletext Slicer – Teletext Display RAM – OSD

ST92195C/D pos: IC01

48-96 KB ROM HCMOS MCU WITH ON-SCREEN DISPLAY ANDTELETEXT DATA SLICER

General Features:


45

MEMORY BUS

I/OPORT 0

REGISTER BUS

IC 2)

PWMD/A CON-VERTER

SPI

I/OPORT 4

I/OPORT 5

Up to 96Kbytes ROM

DATASLICER& ACQUI-SITIONUNIT

SYNC.EXTRAC-TION

Up to 8KbytesTDSRAM

TRI

256 or 512bytes RAM

STANDARDTIMER 1)

TIMING ANDCLOCK CTRL

16-BITTIMER/

WATCHDOG

VPS/WSSDATASLICER

I/OPORT 2

ADC

CVBS1

I/OPORT 3

SYNCCONTROL

VSYNCHSYNC/CSYNC

ONSCREENDISPLAY

FREQ.MULTIP.

PXFM

NMIINT[7:4]

INT2

256 bytesRegister File

ST9+ CORE

8/16-bitCPU

InterruptManagement

RCCU

OSCINOSCOUTRESET

RESETO

P0[7:0]

WSCRWSCFCVBS2

R/G/B/FB

PWM[7:0]

SDO/SDISCK

INT0

STOUT0

MMU

MCFM

TXCF

TSLU

AIN[4:1]EXTRG

P2[5:0]

P4[7:0]

P5[1:0]

P3[7:4]

CSO

HT

All alternate functions(Italic characters) are mapped on Ports 0, 2, 3, 4 and 5

2

8

4

6

8

VOLTAGESYNTHESIS

VSO[2:1]

SDA1/SCL1SDA2/SCL2

Note 1: One standard timer on ST92195C devices, two standard timers on ST92195D devicNote 2: IC available on ST92195D devices only

BLOCKDIAGRAM


46

PIN DESCRIPTION (Cont’d)

Figure 3. 56-Pin Package Pin-Out

RESET Reset (input, active low). The ST9+ is ini-tialised by the Reset signal. With the deactivationof RESET, program execution begins from theProgram memory location pointed to by the vectorcontained in program memory locations 00h and01h.

R/G/B Red/Green/Blue. Video color analog DACoutputs.

FB Fast Blanking. Video analog DAC output.VDD Main power supply voltage (5V±10%, digital)

WSCF, WSCR Analog pins for the VPS/WSS slic-er . These pins must be tied to ground or not con-nected.

VPP: On EPROM/OTP devices, the WSCR pin isreplaced by VPP which is the programming voltagepin. VPP should be tied to GND in user mode.

MCFM Analog pin for the display pixel frequencymultiplier.

OSCIN, OSCOUT Oscillator (input and output).These pins connect a parallel-resonant crystal(24MHz maximum), or an external source to theon-chip clock oscillator and buffer. OSCIN is theinput of the oscillator inverter and internal clockgenerator; OSCOUT is the output of the oscillatorinverter.

VSYNC Vertical Sync. Vertical video synchrotion input to OSD. Positive or negative

HSYNC/CSYNC Horizontal/Composite sync. Hori-zontal or composite video synchronisatioOSD. Positive or negative polarity.

PXFM Analog pin for the Display Pixel FMultiplier

AVDD3 Analog VDD of PLL. This pin must be tto VDD externally.

GND Digital circuit ground.AGND Analog circuit ground (must be tinally to digital GND).

CVBS1 Composite video input signal for ttext slicer and sync extraction.

CVBS2 Composite video input signal for tWSS slicer. Pin AC coupled.

AVDD1, AVDD2 Analog power supplies (musttied externally to AVDD3).

TXCF Analog pin for the Teletext slicer

CVBSO, JTDO, JTCK Test pins: leave float

TEST0 Test pins: must be tied to AVDD2.

JTRST0 Test pin: must be tied to GND.

INT7/P2.0RESET

P0.7P0.6P0.5P0.4P0.3

AIN4/P0.2P0.1P0.0

CSO/RESET0 /P3.7P3.6P3.5P3.4

BGRFB

SDA1/SDI/SDO/P5.1SCL1/SCK/INT2/P5.0

VDDJTDOWSCF

VPP/WSCRAVDD3TEST0MCFMJTCK

P2.1/INT5/AIN1P2.2/INT0/AIN2P2.3/INT6/VS01P2.4/NMIP2.5/AIN3/INT4/VS02OSCINOSCOUTP4.7/PWM7/EXTRG/STOUT0P4.6/PWM6P4.5/PWM5/SDA2P4.4/PWM4/SCL2P4.3/PWM3/TSLU/HTP4.2/PWM2P4.1/PWM1P4.0/PWM0VSYNCHSYNC/CSYNCAVDD1PXFMJTRSTOGNDAGNDCVBS1CVBS2JTMSAVDD2CVBSOTXCF

12345678910111213141516171819202122232425262728

56555453525150494847464544434241403938373635343332313029


47

PPiinn NNoo.. PPiinn NNaammee II//OO FFuunnccttiioonn1 INT7/P2.0 IR INT. IN3 P0.7 DVDDATAOUT4 P0.6 STOP5 P0.5 N.C.6 P0.4 N.C.7 P0.3 N.C.8 AIN4 AV.STATUS9 P0.1 N.C.10 P0.0 N.C.11 CSO/RESET0/P3.7 MUTE_DVD12 P3.6 L/L'13 P3.5 TV/DVD14 P3.4 STDBY28 JTCK N.C.30 CVBSO N.C.32 JTMS N.C.42 P4.0/PWMO DVD_STD_BY43 P4.1/PWM1 VOL44 P4.2/PWM2 N.C.45 P4.3/PWM3 DVD POWER +5V46 P4.4/PWM4 DVD POWER +12V47 P4.5/PWM5 N.C.48 P4.6/PWM6 N.C.49 P4.7/PWM7/EXTRG/STOUT N.C.53 P2.4/NMI N.C.54 P2.3/INT6/VS01 LED CONTROL55 P2.2/INT0/AIN2 DVDDATAIN56 P2.1/INT5/AIN1 KEYBOARD INPUT

PIN ASSIGNMENT


48

Symbol Parameter Test Condition Min Max Unit

ILI Input Leakage Current 0V≤ VIN≤ VCC ±2 µA

ILO Output Leakage Current0V ≤ VOUT ≤ VCCSDA in Hi-Z

±2 µA

ICCSupply Current (ST24 series)

VCC = 5V, fC = 100kHz(Rise/Fall time < 10ns)

2 mA

Supply Current (ST25 series) VCC = 2.5V, fC = 100kHz 1 mA

ICC1Supply Current (Standby)(ST24 series)

VIN = VSS or VCC ,VCC = 5V

100 µ A

VIN = VSS or VCC ,VCC = 5V, fC = 100kHz

300 µ A

ICC2Supply Current (Standby)(ST25 series)

VIN = VSS or VCC ,VCC = 2.5V

5 µA

VIN = VSS or VCC ,VCC = 2.5V, fC = 100kHz

50 µA

ICC3Supply Current (Standby)(ST24C08R)


20 µA


60 µA

ICC4Supply Current (Standby)(ST24C08R)


10 µA


20 µA

VIL Input Low Voltage (SCL, SDA) –0.3 0.3 VCC V

VIH Input High Voltage (SCL, SDA) 0.7 VCC VCC + 1 V

VILInput Low Voltage(E, PRE, MODE,WC)

–0.3 0.5 V

VIHInput High Voltage(E, PRE, MODE,WC)

VCC – 0.5 VCC + 1 V

VOL

Output Low Voltage (ST24 series) IOL = 3mA, VCC = 5V 0.4 V

Output Low Voltage (ST25 series) IOL = 2.1mA, VCC = 2.5V 0.4 V

Output Low Voltage(ST24C08R)

IOL = 1mA, VCC = 1.8V 0.3 V

(TA = 0 to 70°C, –20 to 85°C or –40 to 85°C; VCC = 3V to 5.5V, 2.5V to 5.5V or 1.8V to 5.5V

24C08 pos: IC02Non-Volatile Memory

These I_C-compatible electrically erasable programmable memory (E_PROM) is organized as 1024 x 8 bit and operatewith a power supply of 5 V. The memory behaves as a slave device in the I_C protocol, with all memory operations syn-chronized by the serial clock. Read and Write operations are initiated by a START condition, generated by the bus master. The START condition is followed by a Device Select Code and RW bit terminatedby an acknowledge bit.

DC Characteristics


49

SIP10(Plastic Package)

ORDER CODE : TDA1771

10

9

8

7

6

5

4

3

2

1 POWER OUTPUT

OUTPUT STAGE V S

TRIGGER INPUT

HEIGHT ADJUSTMENT

GROUND

RAMP GENERATOR

BUFFER OUTPUT

INVERTING INPUT

VS

FLYBACK GENERATOR

1771-01.EPS

PIN CONNECTIONS (top view)

.RAMP GENERATOR.INDEPENDENT AMPLITUDE ADJUSTEMENT.BUFFER STAGE.POWER AMPLIFIER.FLYBACK GENERATOR.INTERNAL REFERENCE VOLTAGE.THERMAL PROTECTION

ESCRIPTION

he TDA1771 is a monolithic integrated circuit inIP10 package.

t is a full performance and very efficient verticaleflection circuit intended for direct drive of a TVicture tube in Color and B & W television as wells in Monitor and Data displays.

FLYBACKGENERATOR

THERMALPROTECTION

RAMPGENERATOR

BUFFERSTAGE

VOLTAGEREGULATOR

POWERAMP.

10

2

1

9

3

4 6 7 8 5

R3

CLOCK

PULSE

TRIGGER IN

-02.EPS

LOCK DIAGRAM

TDA1771 pos: ID41VERTICAL DEFLECTION CIRCUIT

DESCRIPTIONThe TDA1771 is a monolithic integrated circuit in SIP10 package.It is a full performance and very efficient vertical deflection circuit intended for direct drive of a TV picture tube in Color andB & W television as well as in Monitor and Data displays.


50

ABSOLUTE MAXIMUM RATINGS


VS Supply Voltage 30 V

V1 , V2 Flyback Peak Voltage 65 V

V3 Trigger Input Voltage 20 V

V8 Amplifier Input Voltage GND to VS V

I0 Output Peak to Peak Current (non repetitive t = 2ms) 6

I0 Output Peak to Peak Current t > 10µs 4 A

I10 Pin 10 DC Current at V1 < V9 100 mA

I10 Pin 10 Peak to Peak Current @ tfly < 1.5ms 3 A

Ptot Total Power Dissipation @ Ttab = 60°C 9 W

TS, TJ Storage and Junction Temperature – 40, + 150°C

1771-01.TBL

THERMAL DATA


Rth (j-tab)Thermal Resistance Junction-tab Max. 10 °C/WRth (j-a) Thermal Resistance Junction-ambient Max. 70 °C/W

1771-02.TBL

ELECTRICAL CHARACTERISTICS (Tamb = 25°C unless otherwise specified)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

DC (VS = 30V)

I2 Pin 2 Quiescent Current I1 = 0, I10 = 0 16 36 mA

I9 Pin 9 Quiescent Current I1 = 0, I10 = 0 15 30 mA

– I6 Ramp Generator Bias Current V6 = 0 0.5 µA– I6 Ramp Generator Current V6 = 0, – I4 = 20µA 18.5 20 21.5 µAdI6/I6 Ramp Gener. Linearity V6 = 0 to 15V, – I4 = 20µA 0.2 1 %

V1 Quiescent Output Voltage Ra = 30kΩ, Rb = 10kΩ, VS = 30V 17.0 17.8 18.6 V

Ra = 6.8kΩ, Rb = 10kΩ, VS = 15V 7.2 7.5 7.8 V

V1L Out Saturation Voltage to GND I1 = 0.5A 0.5 1 V

I1 = 1.2A 1 1.4 V

V1H Out Saturation Voltage to VS – I1 = 0.5A 1.1 1.6 V

– I1 = 1.2A 1.6 2.2 V

V4 Reference Voltage – I4 = 20µA 6.3 6.6 6.9 V

dV4/VS Reference Voltage Drift Versus VS VS = 10V to 30V 1 2 mV/V

dV4/dI 4 Reference Voltage Drift Versus I4 I4 = 10µA to 30µA 1.5 2 mV/µAVr Internal Ref. Voltage 4.26 4.40 4.54 V

Gv Ouput Stage Open Loop Gain f = 100Hz 60 dB

Vfs V9 – 10 Saturation Voltage – I10 = 1.2A 1.5 2.5 V

V10 Pin 10 Scanning Voltage I10 = 20mA 1.7 3 V

V3 Trigger Input Threshold (see note 1) 2.6 3.0 3.4

I3 Trigger Input Bias Current VIN = V3 – 0.2V 30 µAt3 Trigger Input Width (see note 2) 20 60 thµS

Notes : 1. The trigger input circuit can accept, with a metal option, positive and negative going input pulses.

2. th= 1.2⋅ tSVPP

where tS is the vertical period and VPP is ramp amplitude at Pin 6

1171-03.TBL


51

ELECTRICAL CHARACTERISTICS (Tamb = 25°C unless otherwise specified) (continued)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

DC (VS = 24V)

VS Operating Supply Voltage Range 10 30 V

I1 Peak-to-peak Operating Current Range 0.4 2.5

IS Supply Current IY = 2.4App 315 mA

V1 Flyback Voltage IY = 2.4App 51 V

V7 Sawtooh Pedestall Voltage 1.85 V

TJS Junction Temp. for Thermal Shutdown 145 °C

1771-04.TBL

FLYBACKGENERATOR

THERMALPROTECTION

RAMPGENERATOR

BUFFERSTAGE

VOLTAGEREGULATOR

POWERAMP.

10

2

1

9

3

4 6 7 8 5

R3

CLOCK

PULSE

YOKE

1500µF

TRIGGER IN

+VS

1N4001

35V

47nF

220kΩ

330Ω

2.2Ω

0.1µF 470µF

0.22µF

180kΩ

2.4kΩ

100µF

1kΩ

22µF

1.2kΩ

1.2Ω

Ry = 9.6ΩLy = 24.6mHIy = 1.2App

1771-03.EPS

APPLICATION CIRCUIT


52

Features• Line Current Consumption with PFC• Low Power Consumption• Stable and Adjustable Standby Frequency• Very Low Start-up Current• Soft-Start for Quiet Start-up• Free usable Fault Comparators• Synchronization and Fixed Frequency Facility• Over- and Undervoltage Lockout• Switch Off at Mains Undervoltage• Temporary high power circuit (only TDA 16847)• Mains Voltage Dependent Fold Back Point Correction• Continuous Frequency Reduction with Decreasing

Load• Adjustable and Voltage Dependent Ringing Suppres-

sion Time

DescriptionThe TDA 16846 is optimised to control free running orfixed frequency flyback converters with or without PowerFactor Correction (Current Pump). To provide low powerconsumption at light loads, this device reduces theswitching frequency continuously with load, towards anadjustable minimum (e. g. 20 kHz in standby mode).Additionally, the start up current is very low. To avoidswitching stresses of the power devices, the power tran-sistor is always switched on at minimum voltage. A spe-cial circuit is implemented to avoid jitter. The device hasseveral protection functions: V CC over- and undervolt-age, mains undervoltage, current limiting and 2 freeusable fault comparators. Regulation can be done byusing the internal error amplifier or an opto coupler feed-back (additional input). The output driver is ideally suitedfor driving a power MOSFET, but it can also be used fora bipolar transistor. Fixed frequency and synchronizedoperation are also possible. The TDA 16846 is suited forTV-, VCR- sets and SAT receivers. It also can be goodused in PC monitors. The TDA 16847 is identical withTDA 16846 but has an additional power measurementoutput (pin 8) which can be used for a Temporary HighPower Circuit.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

DTC

PCS

RZI

SRC

OCI

FC2

SYN

U

Pin Configuration (top view)

VCC

OUT

GND

PVC

FC1

REF

N.C./PMO

Pin Symbol Function

1 OTC Off Time Circuit

2 PCS Primary Current Simulation

3 RZI Regulation and Zero Crossing Input

4 SRC Soft-Start and Regulation Capacitor

5 OCI Opto Coupler Input

6 FC2 Fault Comparator 2

7 SYN Synchronization Input

8 N.C./PMO Not Connected (TDA16846)

9 REF Reference Voltage and Current

10 FC1 Fault Comparator 1

11 PVC Primary Voltage Check

12 GND Ground

13 OUT Output

14 VCC Supply Voltage

Pin Definitions and Functions

TDA 16846 pos: IP01Controller for Switch Mode Power Supplies Supporting Low PowerStandby and Power Factor Correction


53

Short Description of the Pin Functions

Pin Functions

1 A parallel RC-circuit between this pin and ground determines the ringing suppression time and the standby-frequency.

2 A capacitor between this pin and ground and a resistor between this pin and the positive terminal of the primary elcap quantifies the max. possible output power of the SMPS.

3 This is the input of the error amplifier and the zero crossing input. The output of a voltage divider between the control winding and ground is connected to this input. If the pulses at pin 3 exceed a 5 V threshold, the control voltage at pin 4 is lowered.

4 This is the pin for the control voltage. A capacitor has to be connected between this pin and ground. The value of this capacitor determines the duration of the softstart and the speed of the control.

5 If an opto coupler for the control is used, it's output has to be connected between this pin and ground. The voltage divider at pin 3 has then to be changed, so that the pulses at pin 3 are below 5 V.

6 Fault comparator 2: If a voltage > 1.2 V is applied to this pin, the SMPS stops.

7 If fixed frequency mode is wanted, a parallel RC circuit has to be connected between this pin and ground. The RC-value determines the frequency. If synchronized mode is wanted,sync pulses have to be fed into this pin.

8 Not connected (TDA16846). / This is the power measurement output of the Temporary High Power Circuit. A capacitor and a RC-circuit has to be connected between this pin and ground.

9 Output for reference voltage (5 V). With a resistor between this pin and ground the fault comparator 2 (pin 6) is enabled.

10 Fault comparator i: If a voltage > 1 V is applied to this pin, the SMPS stops.

11 This is the input of the primary voltage check. The voltage at the anode of the primary elcap has to be fed to this pin via a voltage divider. If the voltage of this pin falls below 1 V, the SMPS is switched off. A second function of this pin is the primary voltage depen-dent fold back point correction (only active in free running mode).

12 Common ground.

13 Output signal. This pin has to be connected across a serial resistor with the gate of the power transistor.

14 Connection for supply voltage and startup capacitor. After startup the supply voltage is produced by the control winding of the transformer and rectified by an external diode.


54

-+

+

-+

+-

++

-

-+

+-

+-

+-

+- -

TDA16846 Block Diagrams

SYN

R7

R3

D4

KSY

R4

R6 D5

1V

9REF

N.C.

FC2

8

6

VCC

PVC

11

PrimaryVoltageCheck

3.5V

1.2V

G4

FC2

1

PVA

1.5V

G1

ED2

Error-Flipflop

1

S

RQ

R6x1/3

Fold Back Point Correction

5V

5V

5V3.5V

1

3

4

5

2

14

12

CS1

R2D2

D3

∞

30kΩ

15kΩControl Voltage

Limit

RSTC/RSTF

Off TimeComparator

ErorAmplifier

Buffer forControl Voltage

On TimeComparator

R8

75kΩ

OTC

RZI

OCI

PCS

VCC

GND

SRC

∞

∞

R1

20kΩ

5V

1.5V

16V 15.8V

1) The input with the lower voltage becomes operative

<25mV

ED1

D1StartupDiode

I1

&

∞

OvervoltageComparator

∞

∞

∞ ∞

∞

∞

∞

+

+

–

–

S

RG2

Zero CrossingSignal

Q

Supply VoltageComparator

G3

1V

10

FC1

OutputDriver

&OUT

13


55

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VP supply voltage 4.5 – 18 VPout output power Vp = 12 V; RL = 16 Ω 3.0 3.5 – W

Vp = 12 V; RL = 8Ω – 5.3 – WGv voltage gain 39.5 40.5 41.5 dB

GC gain control 68.0 73.5 – dBIq(tot) total quiescent current Vp = 12 V; RL = ∞ – 22 25 mATHD total harmonic current Pout=0.5w w – 0.3 1 %

TYPE PACKAGE

NUMBER NAME DESCRIPTION VERSION

TDA7057AQ DBS13P Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6

1

2

3

4

5

6

7

vc1

n.c.

VI(1)

VP

VI(2)

SGND

VC2

U

8OUT2

9PGND2

10OUT2–

11OUT1-

12PGND1

13OUT1+

TDA7057AQ

Pin Configuration

SYMBOL PIN DESCRIPTION

VC1 1 DC volume contol 1

n.c. 2 not connectedVI (1) 3 voltage input 1VP 4 positive supply voltageVI (2) 5 voltage input 2SGND 6 signal groundVC2 7 DC volume contol 2OUT2+ 8 positeve output 2PGND2 9 power ground 2OUT2- 10 negative output 2OUT1- 11 negative output 1PGND1 12 powwer ground 1OUT1+ 13 positive output 1

QUICK REFERENCE DATA

TDA7057AQ2 x5 W stereo BTL Audio Output Amplifier with DC Volume Control

FEATURES• DC volume control• Few external components• Mute mode• Thermal protection• Short-circuit proof• No switch-on and switch-off clicks• Good overall stability• Low power consumption• Low HF radiation• ESD protected on all pins.

GENERAL DESCRIPTIONThe TDA7057AQ is astereo BTL output amplifier with DCvolume control. The device is designed for use in TV andmonitors, but are also suitable for battery-fed portablerecorders and radios.

Missing Current Limiter (MCL)A MCL protection circuit is built-in. The MCL circuit isactivated when the difference in current between theoutput terminal of each amplifier exceeds 100 mA (typical300 mA). This level of 100 mA allows for headphoneapplications (single-ended).


56

FUNCTIONAL DESCRIPTIONThe TDA7057AQ is a stereo output amplifiers with twoDC volume control stages. The device is designed for TVand monitors, but also suitable for battery-fed portable re-corders and radios.In conventional DC volume control circuits the control orinput stage is AC coupled to the output stage via externalcapacitors to keep the offset voltage low.In the TDA7057AQ the two DC volume control stages areintegrated into the input stages so that no coupling capa-citors are required and a low offset voltage is still mainta-ined. The minimum supply voltage also remains low.The BTL principle offers the following advantages:• Lower peak value of the supply current• The frequency of the ripple on the supply voltage is twi-ce the signal frequency.Consequently, a reduced power supply with smaller capa

citors can be used which results in cost reductions.

For portable applications there is a trend to decrease thesupply voltage, resulting in a reduction of output power atconventional output stages. Using the BTL principle incre-ases the output power.

The maximum gain of the amplifier is fixed at 40.5 dB.The DC volume control stages have a logarithmic controlcharacteristic. Therefore, the total gain can be controlledfrom +40.5 dB to -33 dB. If the DC volume control voltagefalls below 0.4 V, the device will switch to the mute mode.

The amplifier is short-circuit protected to ground, Vp andacross the load. A thermal protection circuit is also imple-mented. If the crystal temperature rises above 150 oC thegain will be reduced, thereby reducing the output power.

Special attention is given to switch-on and switch-off

clicks, low HF radiation and a good overall stability.

(1) This capacitor can be omitted if the 220µF electrolytic capacitor is connected close to pin 5.(2) RL = 16Ω.

handbook, full pagewidth

13

11

TEMPERATUREMCL

PROTECTIONSTABILIZER

10

8

9 126

220µF100 nF

4

(1)

(2)

(2)

VP = 12 V

5

7

Rs = 5 kΩ

Rs = 5 kΩ

DC-volume

signalground

powerground

470 nF

470 nF

input 1

input 2

TDA7053AQ

3

1

I− 1

I+ 1

I+ 1

I− 1


57

74HC4053B pos:IA03Analog Multiplexer/Demultiplexer

Inhibit A or Bor C

0 0 ax or bx or cx

0 1 ay or by or cy

1 X None

FUNCTIONAL DIAGRAMS AND TRUTH TABLES (continued)

4053

X = Don’ t care.

.QUIESCE NT CURREN T SPECIFIED TO 20VFOR HCC DEVICE.LOW ” ON” RESISTANCE : 125Ω (typ.) OVER15V p.p. SIGNAL-INPUT RANGE FOR VDD-VEE = 15V.HIGH ” OFF” RESISTANCE : CHANNEL LEAK-AGE ± 100pA (typ.) VDD – VEE = 18V.BINARY ADDRESSDECODING ON CHIP.VERY LOW QUIESCENT POWER DISSIPA-TION UNDER ALL DIGITAL CONTROL INPUTAND SUPPLY CONDITIONS : 0.2 µW (typ.),VDD – VSS = VDD – VEE = 10V.MATCHED SWITCH CHARACTERISTICS :RON = 5Ω (typ.)for VDD – VEE = 15V.WIDE RANGEOF DIGITALAND ANALOG SIG-NAL LEVELS : DIGITAL3 TO 20V, ANALOG TO20V p.p..5V, 10V, AND 15V PARAMETRIC RATINGS.INPUT CURRENT OF 100mA AT 18V AND25ϒC FOR HCC DEVICE.100% TESTEDFOR QUIESCENT CURRENT.MEETSALLREQUIREMENTSOFJEDECTEN-TATIVE STANDARD N o 13A, ” STANDARDSPECIFICATIONS FOR DESCRIPTION OF ” B”SERIES CMOS DEVICES”

TheHCC 4051B, 4052B and4053B(extendedtem-perature range) andHCF4051B, 4052B and4053B(intermediate temperature range) are monolithtegrated circuits, available in 16-lead duaplastic or ceramic package and plastic micropage. HCC/HCF4051B, HCC/HCF4052B, andHCC/HCF4053B analog multiplexers/demultplexers are digitally controlled analog switcing low ON impedance and very low OFF leakage

EY(Plastic Package)

F(CeramicFritSeal Package)

M1(Micro Package)

C1(Plastic Chip Carrier)

ORDER CODES :HCC40XXBF HCF40XXBM1HCF40XXBEY HCF40XXBC1

DESCRIPTION

4053B


58

GENERAL DESCRIPTIONThe LM117 series of adjustable 3-terminal positive vol-tage regulators is capable of supplying in excess of 1.5Aover a 1.2V to 37V output range. They are exceptionallyeasy to use and require only two external resistors to setthe output voltage. Further, both line and load regulati-on are better than standard fixed regulators. Also, theLM117 is packaged in standard transistor packageswhich are easily mounted and handled.In addition to higher performance than fixed regulators,the LM117 series offers full overload protection availab-le only in IC’s. Included on the chip are current limit,thermal overload protection and safe area protection. Alloverload protection circuitry remains fully functionaleven if the adjustment termi-nal is disconnected.Normally, no capacitors are needed unless the device issitu-ated more than 6 inches from the input filter capaci-tors in which case an input bypass is needed. An opti-onal output capacitor can be added to improve transientresponse. The adjustment terminal can be bypassed toachieve very high ripple rejection ratios which are diffi-cult to achieve with stan-dard 3-terminal regulators.Besides replacing fixed regulators, the LM117 is usefulin a wide variety of other applications. Since the regula-tor is “floating” and sees only the input-to-output diffe-rential voltage, supplies of several hundred volts canbe regulated as long as the maximum input to output dif-ferential is not ex-ceeded, i.e., avoid short-circuiting theoutput. Also, it makes an especially simple adjustableswitching regulator, a programmable output regulator,or by connecting a fixed resistor between the adjust-ment pin and output, the LM117 can be used as a pre-cision current regulator. Sup-plies with electronic shut-down can be achieved by clamping the adjustment ter-minal to ground which programs the out-put to 1.2Vwhere most loads draw little current. For applications re-quiring greater output current, see LM150 series (3A)and LM138 series (5A) data sheets. For the negativecomplement, see LM137 series data sheet.

FEATURESl Guaranteed 1% output voltage tolerance (LM317A)l Guaranteed max. 0.01%/V line regulation (LM317A)l Guaranteed max. 0.3% load regulation (LM117)l Guaranteed 1.5A output currentl Adjustable output down to 1.2Vl Current limit constant with temperaturel P + Product Enhancement testedl 80 dB ripple rejectionl Output is short-circuit protected

LM317 pos: IP021.2V TO 37V Voltage Regulator


59

Features• Output Current up to 1A• Output Voltage of 5,6,8,9,10,12,15,18,24 V• Thermal Overload Protection• Short Circuit Protection• Output Transistor Safe Operating Area Protection

DescriptionThe MC78XX/LM78XX/MC78XXA series of three termi-nal positive regulators are available in the TO-220/D-PAK package and with several fixed output voltages,making them useful in a wide range of applications.Each type employs internal current limiting, thermalshutdown and safe operating are protection, making itessentially indestructible. If adequate heat sinking isprovided, they can deliver over 1 A output current.Although designed primarily as fixed voltage regulators,these devices can be used with external components toobtain adjustable voltages and currents.

FEATURES• INTERNALLY FREQUENCY COMPENSATED• LARGE DC VOLTAGE GAIN : 100dB• WIDE BANDWIDTH (unity gain) : 1.1MHz (temperature

compen sated)• VERY LOW SUPPLY CURRENT/OP (500mA) –ESSEN-

TIALLY INDEPENDENT OF SUPPLY VOLTAGE• LOW INPUT BIAS CURRENT : 20nA (temperature com-

pensated)• LOW INPUT OFFSET VOLTAGE : 2mV• LOW INPUT OFFSET CURRENT : 2nA• INPUT COMMON-MODE VOLTAGE RANGE INCLUDES

GROUND• DIFFERENTIAL INPUT VOLTAGE RANGE EQUAL TO

THE POWER SUPPLY VOLTAGE • LARGE OUTPUT VOLTAGE SWING 0V TO (VCC –

1.5V)

DESCRIPTIONThese circuits consist of two independent, high gain, inter-nally frequency compensated which were designed specifi-cally to operate from a single power supply over a widerange of voltages. The low power supply drain is indepen-dent of the magnitude of the power supply voltage. Appli-cation areas include transducer amplifiers, dc gain blocks

and all the conventional op-amp circuits, which now can bemore easily implemented in single power supply systems.For example, these circuits can be directly supplied withthe standard + 5V, which is used in logic systems and willeasily, provide the required interface electronics withoutrequiring any additional power supply. In the linear modethe input common-mode voltage range includes groundand the output voltage can also swing to ground, even

1

2

3

-

+

1 - Output 12 - Inverting input 13 - Non-inverting input 14 - VCC

-

5 - Non-inverting input 26 - Inverting input 27 - Ouput 28 - VCC

+

PIN CONNECTIONS

LM358 pos: I060 Dual Operational Amplifier

LM7805 pos: IP03

3-Terminal 1A Positive Voltage Regulator


60

DESCRIPTIONBuilt on ESS’s proprietary and flexible Programmable Multi-media Processor architecture, the Vibratto TM series ofDVD processors combine audio/video stream data process-ing, system control and housekeeping functions, video post-processing, and display format encoding, enabling variousDVD-based multimedia electronics to be built with minimalexternal components. The Vibratto series includes new fea-tures for DVD-Audio support, progressive scan video out-put, and built-in TV encoder and video DACs.All of the Vibratto DVD processors each include two parallelprocessing units, a RISC processor, a vector engine, andsupplemental hardware resources for implementing special-ized encoding and decoding tasks in the device architec-tures. All of these resources are interconnected with twoseparate data buses, each with its own DMA unit and inter-face to external memory. The processing units enablesimultaneous parallel execution of system commands anddata processing.Both the RISC processor and vector engine are indepen-dently programmable. Each has its own on-chip cachememory. The RISC processor and its associated hardwareunits perform bit stream parsing, control audio data output,transfer video and audio data to the vector engine and ser-vice system control and housekeeping functions. The vectorengine and associated hardware units perform audio andvideo microcode processing required by A/V standards suchas Dolby Digital TM, DTS TM, MPEG and JPEG. Theseprocessing tasks include audio DSP, video motion compen-sation and estimation, loop filtering, discrete cosine trans-forms (DCT) and inverse DCT, quantization and inversequantization.The Vibratto DVD processors support both JPEG/MP3audio playback and the Kodak PictureCD JPEG display for-mat. These new features allow Picture CDs created withimages and voiceovers from digital cameras to be enjoyedin a DVD player or Home Theater System. All of the Vibrat-to DVD processors support both parallel and serial DVDloader interfaces for system MPEG A/V data stream input,industry standard-I 2 S bus for audio data input and output,direct system EPROM and SDRAM access for high-speedcommand fetching and audio/video data buffering and pro-cessing. The Vibratto DVD processors are available in 208-pin Plastic Quad Flat Pack (PQFP) device packages.

FEATURES

• Dedicated core and I/O power supplies for low-poweroperation; integrated 32-bit RISC processor for systemhost, eliminating requirements of an external host CPU

• Supports DVD-Video, DVD-Audio, VideoCD 1.1, 2.0, and3.0, Super VideoCD (SVCD), CD-DA, MP3, and Kodak

Picture-CD• Supports parallel and serial interfaces to ATAPI, Compact

Flash, DCI, IDE and UDF DVD loaders• Direct interface of 8- or 16-bit SDRAM of up to 128-Mb

capacity at a variety of speed grades• Direct interface of up to 4 banks of 8- or 16-bit EPROM or

Flash EPROM; automatic firmware updating of FlashEPROM through DVD loader

Video• Built-in NTSC/PAL encoder includes field-adaptive de

interlacing for progressive scan video output for clearerand more stable display (ES6028 and ES6038 Only)

• Macrovision 7.1 and Macrovision AGC 1.03 compliantvideo outputs for 480-pixel progressive scan and forNTSC/PAL interlaced video

• Four built-in 10-bit Video DACs provide simultaneousvideo outputs of composite and S-video, or composite andYUV; supports selectable 8-bit CCIR 601 4:2:2 YUV out-puts

• 8-bit On-Screen Display (OSD) controller with 3-bit blend-ing provides display with 256 colors in 8 degrees of trans-parency

• On-chip Subpicture Unit (SPU) decoder supports karaokelyric, subtitles, and EIA-608 compliant Line 21 Captioning

• Video error concealment, motion zoom and pan andNTSC to PAL and PAL to NTSC conversion supported

Audio• Dolby Digital (AC-3), DVD-Audio, Pro Logic, DTS, MPEG-

1 layer 2 and 3 Audio (MP3), and High-Definition Compat-ible Digital.... (HDCD) decoding

• On-chip Dolby Digital (AC-3) and DTS 5.1 channel decod-ing and output (ES6018/28/38 Only)

• Dolby Digital and DTS S/PDIF digital audio output.• Dolby Digital Class A, DTS, and HDCD certified• Meridian Lossless Packing.... (MLP) decoding and Linear

PCM for DVD-Audio (ES6038 Only)

ES6018 DVD PROCESSOR SOLUTION

DESCRIPTION OF INTEGRATED CIRCUITS-DVD PART-


61

SYSTEM BLOCK DIAGRAM

Vibratto8 MB

SDRAM

DVD drive

ROM/Flash

VFDDriver

5.1 AudioDAC

TV

Speakers or

VFD Panel

Video

Audio

EEPROM

ATAPICompact FlashDCI

TVMUDEVSTEM

S/PDIF Outor DTS

Audio A/V Receiver

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

53545556

57585960616263646566676869707172737475767778798081828384858687888990

9192

93 9495

96979899

100101102103104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208

LCS1#

LOE#

LD0VSS

LCS3#LCS2#

AUX[0]

LA21

LA20

RESE

T# VEE

TSD3

HIOC

S16#

/CAM

CLK/

AUX3

[4]

HA1/

AUX4

[3]

VSS

HA0/

AUX4

[2]

HWR#

/DCI

_CLK

/AUX

4[5]

HRD#

/DCI

_ACK

#/AU

X4[6

]

HD4/

DCI4

/AUX

1[4]

HD5/

DCI5

/AUX

1[5]

HD6/

DCI6

/AUX

1[6]

/VFD

_DOU

T

HD2/

DCI2

/AUX

1[2]

HD3/

DCI3

/AUX

1[3]

VEE

VCC

DB8

VCC

DB5

DB9

DCS0#

VCC

VSS

TSD0

/SEL

_PLL

0

TSD1

/SEL

_PLL

1

TDM

FSTD

MCL

KTD

MDR

TDM

TSC#

TWS/

SEL_

PLL2VE

ELA

4LA

5LA

6LA

7LA

8LA

9VS

SVC

CLA

10LA

11LA

12LA

13LA

14LA

15LA

16VS

SVE

ELA

17LA

18LA

19

TDM

DX/R

SEL VS

S

TSD2

SPDI

F/PL

L3 NC VSS

MCL

KTB

CK

VEE

VEE

VSS

VSS

DQM

RSD

RWS

RBCK NC XI

NXO

UTAV

EE

DSCK

VSS

DB15

DB13

DB11

DB1

VSS

DMBS1

DRAS#

DOE#/DSCK_EN

VEE

DMA9

DMA7

VSS

DMA5

DMA3

VEE

DCS1#

DB14

DB12

DB10

DB0

VEE

DMBS0

DWE#

DCAS#

VSS

DMA8

DMA6

VEE

DMA4

DMA2

VSS

DB7DB6VSS

DB4DB3DB2

DMA11DMA10

DMA1DMA0

HCS3

FX#/

AUX3

[6]

HCS1

FX#/

AUX3

[7]

VSS

HIOR

DY/A

UX3[

3]

VSS

HD13

/AUX

2[5]

/SP

HD12

/AUX

2[4]

/C2P

OHD

11/A

UX2[

3]//I

RQHD

10/A

UX2[

2]/S

QSK

HD9/

AUX2

[1]/S

QSO

HD8/

DCI_

FDS#

/AUX

2[0]

/VFD

_CLk

VSS

HIRQ

/DCI

_ERR

#/AU

X4[7

]HR

ST#/

AUX3

[5]

HRRQ

#/AU

X4[0

]HW

RQ#/

DCI_

REQ#

/AUX

4[1]

HD15

/AUX

2[7]

/IRHD

14/A

UX2[

6]/S

QSI

VCC

HD7/

DCI7

/AUX

1[7]

/VFD

_DIN

HD1/

DCI1

/AUX

1[1]

HD0/

DCI0

/AUX

1[0]

VCC

VSS

HSYN

C#/C

AMIN

7/AU

X3[0

]

PCLK

2XSC

N/CA

MIN

4YU

V7/C

AMIN

3YU

V6/V

DAC

PCLK

QSCN

/CAM

IN5/

AUX3

[2]

VSYN

C#/C

AMIN

6/AU

X3[1

]

YUV5

/YDA

CVS

SAD

VEE

YUV4

/RSE

TYU

V3/C

OMP

YUV2

/CDA

CYU

V1/V

REF

YUV0

/CAM

IN2/

UDAC

DCLK

VEE

AUX[7]AUX[6]

VEE

LD1LD2

LA3

LD12VEE

HA2 /AUX4[4]VEE

VEE

LD3

LD5

LD9

LD13

LWRHL#

CAMIN1

AUX[1]

AUX[3]/IOR#

LD4

LD6

LD10

LD14

VSS

LA0

AUX[2]/IOW#

AUX[4]

VEE

LD7

LD11

LD15

VEE

LA1

VSS

AUX[5]

VSS

LD8

VSS

LWRLL#

CAMIN0

LA2

VSSVCC

LCS0#

VSS

208-Pin PQFP Package

ES6008/18/28/38


62

ES60X8 PIN DESCRIPTION

Table 1 ES60x8 Pin Description

Name Number I/O Definition

VEE 1,18, 27, 59, 68,75, 92, 99, 104,130, 148, 157,159, 164, 183,

193, 201

I I/O power supply.

VSS 8, 17, 26, 34, 43,52, 60, 67, 76,84, 91, 98, 103,112, 120, 129,138, 147, 156,163, 171, 177,184, 192, 200,

208

I Ground.

LA[21:0] 23:19, 16:10,7:2, 207:204

O Device address output.

VCC 9, 35, 44, 83,121, 139, 172

I Core power supply.

RESET# 24 I Reset input, active low.

TDMDX

25

O TDM transmit data.

RSEL I ROM Select.

TDMDR 28 I TDM receive data.

TDMCLK 29 I TDM clock input.

TDMFS 30 I TDM frame sync.

TDMTSC# 31 O TDM output enable.

TWS

32

O Audio transmit frame sync.

SEL_PLL2 I System and DSCK output clock frequency selection is made at theRESET#. The matrix below lists the available clock frequencies anPLL bit settings.

TSD033

O Audio transmit serial data port 0.

SEL_PLL0 I Refer to the description and matrix for SEL_PLL2 pin 32.

TSD136

O Audio transmit serial data port 1.

SEL_PLL1 I Refer to the description and matrix for SEL_PLL2 pin 32.

TSD[2] 37 O Audio transmit serial data output 2.

TSD[3] 38 O Audio transmit serial data output 3.

RSEL Selection0 16-bit ROM

1 8-bit ROM

SEL_PLL2 SEL_PLL1 SEL_PLL0 Clock Type0 0 0 VCO off.

0 0 1 DCLK

0 1 0 Bypass mode

0 1 1 DCLK x 2

1 0 0 DCLK x 4.5

1 0 1 DCLK x 3

1 1 0 DCLK x 3.5z

1 1 1 DCLK x 4


63


MCLK 39 I/O Audio master clock for audio DAC.

TBCK 40 O Audio transmit bit clock.

SPDIF

41

O S/PDIF output.

SEL_PLL3 I Clock source select.

NC 42, 48 No connect pins. Leave open.

RSD 45 I Audio receive serial data.

RWS 46 I Audio receive frame sync.

RBCK 47 I Audio receive bit clock.

XIN 49 I Crystal input.

XOUT 50 O Crystal output.

AVEE 51 I Analog power for PLL.

DMA[11:0] 66:61, 58:53 O DRAM address bus [11:0].

DCAS# 69 O DRAM column address strobe.

DOE# 70 O DRAM output enable.

DSCK_EN O DRAM clock enable.

DWE# 71 O DRAM write enable.

DRAS# 72 O DRAM row address strobe.

DMBS0 73 O SDRAM bank select 0.

DMBS1 74 O SDRAM bank select 1.

DB[15:0] 96:93, 90:85,82:77

I/O DRAM data bus [15:0].

DCS[1:0]# 97,100 O SDRAM chip select [1:0].

DQM 101 O Data input/output mask.

DSCK 102 O Output clock to SDRAM.

DCLK 105 I 27 MHz clock input to PLL.

YUV0

106

O YUV0 pixel output data.

CAMIN2 I Camera input 2.

UDAC O Video DAC output.

Y: Luma component for YUV and Y/C processing.C: Chrominance signal for Y/C processing.U: Chrominance component signal for YUV mode.V: Chrominance component signal for YUV mode.

Table 1 ES60x8 Pin Description (Continued)

SEL_PLL3 Clock Source0 Crystal oscillator

1 DCLK input

Mode YDAC UDAC VDAC CDACA Y C Composite C

B Y Composite Composite C

C Y U Composite V

D Y U C V


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YUV1 107 O YUV1 pixel output data.

VREF I Internal voltage reference to video DAC. Bypass to ground with ∝ F capacitor.YUV2

108O YUV2 pixel output data.

CDAC O Video DAC output. Refer to description and matrix for UDAC pin 1


COMP I Compensation input. Bypass to ADVEE with 0.1∝ F capacitor.YUV4 110 O YUV4 pixel output data.

RSET I DAC current adjustment resistor input.

ADVEE 111 I Analog power for video DAC.


YDAC O Video DAC output. Refer to description and matrix for UDAC pin 1


VDAC O Video DAC output. Refer to description and matrix for UDAC pin 1


CAMIN3 I Camera YUV 3.

PCLK2XSCN 116 I/O 27-MHz video output pixel clock.


PCLKQSCN 117 O 13.5-MHz video output pixel clock.


VSYNC# 118 I/O Vertical sync, active low.


HSYNC# 119 I/O Horizontal sync, active low.


HD[5:0]127:122

I/O Host data I/O [5:0].

DCI[5:0] I/O DVD channel data I/O [5:0].

AUX1[5:0] I/O Aux1 data I/O [5:0].

HD[6]

128

I/O Host data I/O [6].

DCI[6] I/O DVD channel data I/O [6].

AUX1[6] I/O Aux1 data I/O [6].

VFD_DOUT I VFD data output.

HD[7]

131

I/O Host data I/O [7].

DCI[7] I/O DVD channel data I/O [7].

AUX1[7] I/O Aux1 data I/O [7:0].

VFD_DIN I VFD data input.

HD[8]

132

I/O Host data bus 8.

DCI_FDS# I/O DVD input sector start.

AUX2[0] I/O Aux2 data I/O 0.

VFD_CLK I VFD clock input.

HD[9]133

I/O Host data bus line 9.

AUX2[1] I/O Aux2 data I/O [1] when selected.

SQSQ I Subcode-Q data.

HD[10]134

I/O Host data bus line10.

AUX2[2] I/O Aux2 data I/O [2] when selected.

SQSK I Subcode-Q clock.

Table 1 ES60x8 Pin Description (Continued)

Chassis PT 90 NEAT Service Manual

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