Chapter 7 Section 7.1 Serial Communications-UART

8/19/2019 Chapter 7 Section 7.1 Serial Communications-UART

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7.17.1 Universal AsynchronousUniversal Asynchronous

Receiver Transmitter (UART)Receiver Transmitter (UART)

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UARTUART

• Both the transmitting and receiving ends need to beBoth the transmitting and receiving ends need to berunning clocks at therunning clocks at the same ratesame rate..• The data line has a default high level.The data line has a default high level.• Transmissions start ith a start bit ith logic level !.Transmissions start ith a start bit ith logic level !.• Then the 7"#" or $ bits of data folloThen the 7"#" or $ bits of data follo

• Then an o%tional %arity bit is added (1 if the total numberThen an o%tional %arity bit is added (1 if the total numberof 1&s in the data are odd).of 1&s in the data are odd).• 'inally" one" or to sto% bits follo (sto% bits have a value'inally" one" or to sto% bits follo (sto% bits have a value

of 1).of 1).• Both sides must agree on the baud rate" the number ofBoth sides must agree on the baud rate" the number of

bits" the number of sto% bits and hether to use a %aritybits" the number of sto% bits and hether to use a %aritybit.bit.

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R* +oltage ,evelsR* +oltage ,evels

• -hat voltage level re%resents 1&s and !&s-hat voltage level re%resents 1&s and !&s – !+" and /+ (TT, levels) ere not ell established at the creation of this!+" and /+ (TT, levels) ere not ell established at the creation of this

standard" %lus they ould result in 0 level being %resent on the linestandard" %lus they ould result in 0 level being %resent on the line

– ,ogical 1 is re%resented by a negative voltage beteen 2*+ and 2/+ (21/+ being,ogical 1 is re%resented by a negative voltage beteen 2*+ and 2/+ (21/+ being

common)common)

– ,ogical ! is re%resented by a %ositive voltage beteen *+ and /+ (1/+ being,ogical ! is re%resented by a %ositive voltage beteen *+ and /+ (1/+ being

common)common)

• As microcontrollers usually out%ut !+ for 3!4 and *.*2/+ for 314"As microcontrollers usually out%ut !+ for 3!4 and *.*2/+ for 314"e5ternal voltage level converters are needed. This re6uires u%e5ternal voltage level converters are needed. This re6uires u%

conversion. A8* is the most common conversion circuit.conversion. A8* is the most common conversion circuit.


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9:1# UART29 ommunication9:1# UART29 ommunication

• This e5am%le illustrates the use of the 9:1#&s ;UART module.This e5am%le illustrates the use of the 9:1#&s ;UART module.


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UART Asynchronous odeUART Asynchronous ode

• 'ull20u%le5'ull20u%le5

• The o%eration of the UART module isThe o%eration of the UART module is

controlled by five registers)Baud Rate ontrol (BAU0=>)

– 9BR?@


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Baud RateBaud Rate

• Baud Rate< the rate at hich serialBaud Rate< the rate at hich serialsymbol is transferred over a channel.symbol is transferred over a channel.

• ommon Baud rates include< 1!!ommon Baud rates include< 1!!

Baud" !! Baud" #!! Baud" $!!Baud" !! Baud" #!! Baud" $!!Baud" 1$!! Baud" *#!! Baud CBaud" 1$!! Baud" *#!! Baud C

11/!! Baud.11/!! Baud.

• 'or binary T8DR8" baud rate is'or binary T8DR8" baud rate ise6uivalent to the bit rate.e6uivalent to the bit rate.

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Baud Rate ?enerator (BR?)Baud Rate ?enerator (BR?)

• BR? determines the baud rate of the T8DR8BR? determines the baud rate of the T8DR8• BR? can o%erate in #2bit or 12bit modesBR? can o%erate in #2bit or 12bit modes• The baud rate can be calculated using theThe baud rate can be calculated using the

folloing e6uations


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9:1# UART Transmitter< :ntroduction9:1# UART Transmitter< :ntroduction

•The %rogram loads a byte to be transmitted intoThe %rogram loads a byte to be transmitted intoT8R;?.T8R;?.

• :f TR is em%ty this same byte ill be loaded into TR.:f TR is em%ty this same byte ill be loaded into TR.• After loading the byte to TR" this byte ill be sent outAfter loading the byte to TR" this byte ill be sent out

starting from the ne5t BR? shift clock cycle.starting from the ne5t BR? shift clock cycle.

• T8:' (T8R;? em%ty flag) and TRT (TR em%ty flag)T8:' (T8R;? em%ty flag) and TRT (TR em%ty flag)flags are used to indicate different %hases in theflags are used to indicate different %hases in thetransmission.transmission.

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UART T8 in more detailUART T8 in more detail

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UART T8 in more detailUART T8 in more detail

1.1. Before transmission" three bits must be s%ecified


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etting u% Asynchronous T8etting u% Asynchronous T8

ain< movl bH!!1!!1!!Hmovf T8TAmovl bH1!!1!!!!Hmovf RTAmovl /movf 9BR?

movl IA&call %uthar bra J

%uthar< btfss T8TA" TRTbra %uthar movf T8R;?return

K T8;> E 1" G> E !" BR?@ E 1

K 9;> E 1

K et Baud rate for $!!

K ait until the last T8 finishesK TRT E 1 if T8 finishesK 9ut IA& into T8R;?

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9:1# UART Rece%tion9:1# UART Rece%tion

• Receiver must kno the transmissionReceiver must kno the transmissionbaud rate in order to sam%le correctly.baud rate in order to sam%le correctly.

• :f the sto% bit of 1 is not detected":f the sto% bit of 1 is not detected"framing error framing error occurs.occurs.

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9:1# UART Rece%tion< ;rror Tolerance9:1# UART Rece%tion< ;rror Tolerance

• The value loaded to the 9BR? register(s) is constrainedThe value loaded to the 9BR? register(s) is constrainedto be an integer numberto be an integer number Baud rate may deviate fromBaud rate may deviate fromdesired fre6uency.desired fre6uency.

• 're6uency drift of L!./ bit can be tolerated in the s%ace of're6uency drift of L!./ bit can be tolerated in the s%ace of1! bits (# bits M startDsto% bits).1! bits (# bits M startDsto% bits).

• Receiver and transmitter local sam%le clocks must beReceiver and transmitter local sam%le clocks must be

ithin L/N.ithin L/N.

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• UART %eri%heral needs to be enabled (RTA.9;>)UART %eri%heral needs to be enabled (RTA.9;>)• Receiving on UART needs to be enabled (RTA.R;>)Receiving on UART needs to be enabled (RTA.R;>)• The 9:R1.R:' flag ill be raised by the microcontrollerThe 9:R1.R:' flag ill be raised by the microcontroller

after it received a valid byte.after it received a valid byte.• The user needs to co%y the received byte out of RR;?.The user needs to co%y the received byte out of RR;?.

This ill automatically reset R:'.This ill automatically reset R:'.

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ain< clrf TR:0

movl bH!!1!!1!!Hmovf T8TAmovl bH1!!1!!!!H

movf RTAmovl /movf 9BR?

ain,oo%< btfss 9:R1" R:'bra ain,oo%

movff RR;?" 9=RT0bra ain,oo%

K set 9=RT0 as out%ut

K 9;> E 1" G> E !" BR?@ E 1

K 9;> E 1" R;> E 1

K et Baud rate for $!!

K ait until receiving a com%lete byte

K move the received byte to 9=RT0

This example receives bytes and output to PORTD


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Rece%tion =verflo ;rror (=;RR)Rece%tion =verflo ;rror (=;RR)

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2-deep RR!" pipeline


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-hat is =verflo ;rror-hat is =verflo ;rror

• >ormally" once a com%lete byte is>ormally" once a com%lete byte isreceived" it ould be read from RR;?received" it ould be read from RR;?

to another register.to another register.

• :f a third byte arrives before the:f a third byte arrives before the%revious to bytes are read 2O no room%revious to bytes are read 2O no room

to store the third byte 2O =verflo ;rrorto store the third byte 2O =verflo ;rror

occursoccurs

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=verflo ;rror< A 0etailed ,ook=verflo ;rror< A 0etailed ,ook

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=verflo ;rror< A 0etailed ,ook=verflo ;rror< A 0etailed ,ook

1.1. Received -ord 1" hich occu%ies theReceived -ord 1" hich occu%ies theloer RR;? buffer. R:' is set.loer RR;? buffer. R:' is set.

.. Received -ord " hich occu%ies theReceived -ord " hich occu%ies theu%%er RR;? buffer.u%%er RR;? buffer.

*.*. **rdrd byte arrives. RR;? is full. =;RR isbyte arrives. RR;? is full. =;RR isset. *set. *rdrd byte is lost.byte is lost.

.. -ord 1 is read. -ord moves to the loer-ord 1 is read. -ord moves to the loerRR;? buffer. R:' remains set.RR;? buffer. R:' remains set.

/./. -ord is read. R:' is cleared.-ord is read. R:' is cleared.

.. =;RR must be reset by clearing R;>=;RR must be reset by clearing R;>and then setting it again.and then setting it again. No further bytesNo further byteswill be received until OERR is cleared.will be received until OERR is cleared.

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Gou should be able to .... Gou should be able to ....

1.1. ;5%lain hy voltage conversion using;5%lain hy voltage conversion usingA8* is needed.A8* is needed.

.. ;5%lain the o%eration of the 9:1#;5%lain the o%eration of the 9:1#

UART module.UART module.

*.*. ;5%lain overflo error in UART;5%lain overflo error in UART

rece%tion.rece%tion.

.. 9rogram the UART module to %erform9rogram the UART module to %erformdata transmission and rece%tion.data transmission and rece%tion.

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Chapter 7 Section 7.1 Serial Communications-UART

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Transcript of Chapter 7 Section 7.1 Serial Communications-UART