Chapter 3Instruction Set ArchitecturesInstruction Set ArchitectureISA Includes the information needed to interact with the microprocessor.Does not include information as to how microprocessor is designed or implementedIncludes microprocessor instruction set, which would be the set of all assembly languages instructions.Also includes the complete set of accessible registers.3.1 Levels of Programming LanguagesProgramming languages are divided into three categories.High level languages hide the details of the computer and operating system.Are also referred to as platform-independent. Examples include C++, Java, and Fortran 3.1 Levels of Programming Languages (contd)Assembly language is an example of a lower level language. Each microprocessor has its own assembly languageA program written in the assembly language of one microprocessor cannot be run on a different microprocessor3.1 Levels of Programming Languages (contd)Backward compatibility used in order to have old programs that ran on a old microprocessor, can run on a newer model.Assembly language can manipulate the data stored in a microprocessor.Assembly language are not platform independent3.1 Levels of Programming Languages (contd)Lowest level of languages are machine language.Contains binary values to cause microprocessor to perform operations.Microprocessor understands the machine language, and thus it is in this state that it executes a instruction set.High level language and assembly language are converted to machine language.3.1.2 Compiling and Assembling ProgramsHigh-level language programs are compiledAssembly languages are assembled.

3.1.2 CompilersCompiler checks statement in a program is valid.If every instruction is syntactically correct, then the compiler generates a object code.Linker combines object code as an executable file.Executable file copied into memory, and microprocessor then runs the machine code contained in that file3.1.2 Compilers (contd)A high-level language statement is usually converted to a sequence of several machine code instructions.Every high-level language statement might have more then one valid conversion of a statement.

3.1.2 AssemblersEvery statement in assembly language however corresponds to one unique machine code instruction.The assembler converts source code to object code, and then the linking, and the loading of procedures occur.

Compiler vs AssemblerCompiler for PentiumWindows PcPentiumObject codeOtherPentiumObject filesPentium LinkerPentiumExecutable fileWindowsPentium PCAssembly languageProgram for processor XAssembler for Processor XProcessor XObject codeProcess XlinkerOther processor XObject filesProcessor XExecutable fileComputer withProcessor X3.2 A closer look at Assembly LanguageAssembly language is very important part of a instruction set architecture.Assembly instructions can be grouped together based on their functions.

3.2.1.1 Data Transfer InstructionsRelated with moving data from one place to another.Not be mistaken as the idea that data is literally moved, instead it is copied from one location to another.This particular type of instruction set does not modify data.3.2.1.1 Data Transfer Instructions (contd)Instructions related with this category perform the following transfers:Load data from memory into microprocessor.Store data from the microprocessor into memory.Move data within the microprocessor.Input data to the microprocessor.Output data from the microprocessor.

3.2.1.2 Data Operation InstructionsData operation instructions modify their data values.They require one or two operands, and then they store the resultArithmetic instructions make up a large part of the data operation instructions.Logic instructions perform basic logical operations on data.Shift instructions shift bits of data values in a register.

3.2.1.3 Program Control InstructionsFor Assembly languages, the jump or branch instruction is commonly used to go to another part of the program.An assembly language instruction set may include instructions to call and return from subroutines.Microprocessor can also be designed to accept interrupts, which basically causes a microprocessor to stop its current process, and execute another set of instructions. 3.2.2 Data TypesNumeric data can be represented as integers:Unsigned integers of n-bit values can range from 0 to 2^n-1.Signed n-bit integers can have values between 2^n-1 to 2^n-1-13.2.2 Data Types (contd)Other types include:Float: Microprocessor may have special registers only for floating point data, and its corresponding instruction set.Boolean: Instructions can perform logical operations on these values.Characters: Stored as binary values. Operations include concatenation, replacing characters, or character string manipulation.

3.2.3 Addressing ModesMicroprocessor needs memory address to access data from the memory.Assembly language may use several addressing modes to accomplish this task.

3.2.3 Addressing Modes (contd)3.2.3.1 Direct ModeInstruction includes memory access.CPU accesses that location in memory.Example:LDAC 5Reads the data from memory location 5, andstores the data in the CPUs accumulator.3.2.3 Addressing Modes (contd)3.2.3.2 Indirect ModeAddress specified in instruction contains address where the operand resides. Example:LDAC @5 or LDAC (5)Retrieves contents of location 5, uses it to access memory addrss

3.2.3. Addressing Modes (contd)3.2.3.3 Register Direct and Register Indirect ModesDoes not specify a memory address. Instead specifies a register.Example:LDAC R Where R is a register containing the value 5.The instruction copies the value 5 from register and into the CPUs accumulator.

3.2.3 Addressing Modes (contd)3.2.3.4 Immediate ModeThe operand specified in this mode is the actual data it self.Example:LDAC #5Moves the value 5 into the accumulator.

3.2.3 Addressing Modes (contd)3.2.3.5 Implicit ModeDoes not exactly specify an operand. Instruction implicitly specifies the operand because it always applies to a specific register.Example:CLAC Clears the accumulator, and sets value to zero. No operands needed.

3.2.3 Addressing Modes (contd)3.2.3.6 Relative ModeOperand supplied is an offset, not the actual address. Added to the contents of the CPUs program counter register to generate the required address.Example:LDAC $5 is located at memory location 10, and it takes up two blocks of memory. Thus the value retrieved for this instruction will be 12 + 5, and will be stored in the accumulator

3.2.3 Addressing Modes (contd)3.2.3.7 Index Mode and Base Address ModeAddress supplied by the instruction is added to the contents of an index register.Base address mode is similar except, the index register is replaced by a base address register.Example:LDAC 5(X) where X = 10 Reads data from location (5 + 10) = 15 and stores it in the accumulator.

3.2.3 Addressing Modes (contd)Summarya)0: LDAC 5 (instruction gets data from location 5)

5: 10 stores value in CPU0: LDAC @5 (instruction gets address from location 5)

5: 10 (then gets data from location 10)

10: 20 stores value in CPUc)0: LDAC R instruction gets address from register RR: 5 stores value in CPUd) 0: LDAC R instruction gets address from register R: 5 then gets data from location 5 5: 10 stores value in CPUe)0: LDAC # 5 stores value from instruction in CPUf)0: LDAC (implicit) instruction gets value from stack stack stores value in CPUg)0: LDAC $51: instruction adds address of next instruction (1) to5: offset (5) to get address (6) 6: 12 stores value in CPU

h) 0: LDAC 5(X) instruction gets value from index register X: 10 then adds contents of X(10) to offset (5) to get to get address (15) 15: 30 stores value in CPU3.2.4 Instruction FormatsAssembly language in machine language is represented as binary value called instruction code.Binary value for each instruction is in different format.Representation of operation to be performed is called opcode.

3.2.4 Instruction Formats (contd)ExamplesADD = 1010A = 00MOVE = 1000B = 01LOAD = 0000C = 10STORE = 0001D = 11PUSH = 0100POP = 11003.2.4 Instruction Formats Examples (contd)4 bitsopcode2 bitsOperand #12 bitsOperand #22 bitsOperand #34 bitsopcode2 bitsOperand #12 bitsOperand #24 bitsopcode2 bitsOperand4 bitsOperand A) ADD A,B,C (A=B+C) 1010 00 01 10

B) MOVE A,B (A = B) 1000 00 01 ADD A,C (A = A + C) 1010 00 10C) LOAD B (Acc = B) 0000 01 ADD C (Acc = Acc + C) 1010 10 STORE A (A = Acc) 0001 00D) PUSH B (Stack = B) 0101 PUSH C (Stack = C,B) 0110 ADD (Stack = B + C) 1010 POP A (A = stack) 1100Fewer bits requires less hardware, but more instructions. Fewer bits allows faster execution.

3.3 Instruction Set Architecture DesignTo design a optimal microprocessor, the following questions and issues have to be addressed in order to come up with an optimized instruction set architecture for the CPU:Completeness; does the instruction set have all of the instructions a program needs to perform its required task.Issue of orthogonality, the concept of two instructions not overlapping, and thus not performing the same function.The amount of registers to be added. More registers enables a CPU to run faster, since it can access and store data on registers, instead of the memory, which in turn enables a CPU to run faster. Having too many registers adds unnecessary hardware.Does this processor have to be backward compatible with other microprocessors.What types and sizes of data will the microprocessor deal with?Are interrupts needed?Are conditional instructions needed?3.4 Creating a simple Instruction SetDesigning a simple microprocessor fit formaybe a microwave will involve integratingthe following models:Memory modelRegister modelInstruction set3.4.1 Memory ModelMicroprocessor can access 64 K or 2^16 byes of memoryEach byte has 8 bits or 64K x 8 of memory.I/O is treated as memory access, thus requires same instruction to access I/O as it does to access memory

3.4.2 RegistersThree registers in this microprocessorFirst register is 8-bit accumulator where the result is stored. Also provides one of the operands for instructions requiring two operands.Second register R is a 8-bit register that provides the second operands, and also stores in result so that the accumulator can gain access to it.Third register is a Z register which is 1 bit. It is either 0 or 1. If a result of a instruction is 0 then the register is set to 1 otherwise it is set to 0.

3.4.3 Instruction Set16 instructions, 8-bit each:AC=AC,If(AC=0) Then Z=1 Else Z=00000 1111NOTAC=ACR,If(ACR=0) Then Z=1 Else Z=00000 1110XORAC=ACR, If(ACR=0) Then Z=1 Else Z=00000 1101ORAC=ACR, If(AC R=0) Then Z=1 Else Z=00000 1100ANDAC = 0, Z =10000 1011CLACAC=AC+1,If(AC+1=0) Then Z=1 Else Z = 00000 1010INACAC-AC-R,If(AC-R=0) Then Z=1 Else Z = 00000 1001SUB AC=AC+R,If (AC+R=0) Then Z=1 Else Z = 00000 1000ADDIF (Z = 0) THEN GOTO 0000 0111 JPNZIF (Z = 1) THEN GOTO 0000 0110 JMPZGOTO 0000 0101 JUMPAC = R0000 0100MOVRR = AC0000 0011MVACM[] = AC0000 0010 STACAC = M[]0000 0001 LDACNo Operation0000 0000NOPOperationInstruction CodeInstruction3.4.3 Instruction Set (contd)Note: LDAC uses direct addressing mode. MOVR uses the implicit addressing mode. JUMP uses immediate addressing mode.

3.4.4 Implementation1 + 2 + + n, orTotal = 0For I = 1 TO N do (Total = Total + I);Break Down:1: Total = 0, I = 02: I = I + 13: Total = Total + I4: If I n THEN GOTO 2

3.4.4 Implementation (contd)CLACClear AccumulatorSTAC totalStore value 0 to address totalSTAC iStore value 0 to address iLoop:LDAC iLoad contents of address i into accumulatorINAC Add 1 to the accumulator STAC iStore result from accumulator back to address iMVACMove result from accumulator into Register RLDAC totalLoad Total into accumulatorADDAdd contents of Register R and accumulator and store it in accumulatorSTAC totalStore Total back to address total LDAC n Load n into accumulatorSUBSubtract R (R = i) from AC (AC = n)JPNZ LoopIf result is not zero then jump back to loop:3.4.4 Implementation (contd)NO JUMPJUMPJUMPJUMPJUMPJPNZ LoopAC = 0, Z = 1AC = 1, Z = 0AC = 2, Z = 0AC = 3, Z = 0AC = 4, Z = 0SUBAC = 5AC = 5AC = 5AC = 5AC = 5LDAC nTotal = 15Total = 10Total = 6Total = 3Total = 1STAC totalAC = 15AC = 10AC = 6AC = 3AC = 1ADDAC = 10AC = 6AC = 3AC = 1AC = 0LDAC totalR = 5R = 4R = 3R = 2R = 1MVACI = 5I = 4I = 3I = 2I = 1STAC IAC = 5AC = 4AC = 3AC = 2AC = 1INACAC = 4AC = 3AC = 2AC = 1AC = 0LDAC II = 0STAC ITotal = 0STAC totalAC = 0CLAC5th Loop4th Loop3rd Loop2nd Loop1st LoopInstruction3.4.5 Analysis of Instruction Set, and ImplementationCannot have value greater then 255, therefore n has to be less then or equal to 22Is it complete? For simple hardware, maybe. Not enough to be implemented in a PC.Fairly orthogonal; however by eliminating OR and implementing by AND and NOT, we can reduce the amount of hardware used.Not enough registers.

3.5 8085 Microprocessor Instruction Set ArchtectureProcessor has practical applications. Examples include the Sojourner robot.Contains several registers including the accumulator register, A.Other registers include B,C,D,E,H,L. Some are accessed as pairs. Pairs are not arbitrary. B and C, D and E, H and L.SP is a 16 bit stack pointer register pointing to the top of the stack. 3.5 8085 Microprocessor Instruction Set ArchtectureContains five flags known as flag registers:Sign flag, S indicates sign of a valueZero flag, Z, tells if a arithmetic or logical instruction produced 0 for a result.Parity flag, P, is set to 1 if result contains even number of 1sCarry flag, CY, is set when an arithmetic operation generates a carry out. 3.5 8085 Microprocessor Instruction Set ArchtectureAuxiliary carry flag, generates a carry out from a lower half of a result to a upper half. Example: 0000 1111 + 0000 1000 = 0001 0111IM register used for enable and disable interrupts, and to check pending interrupts. 3.5.2 8085 Microprocessor Instruction SetContains a total of 74 instructions.8 bit registers representing A, B, C, D, E, H or LR, R1, R2 Indicates memory locationMIndicates register pair such as BC, DE, HL, SPRP16 bit address representing address or data value.8-bit address or data value stored in memory immediately after the opcodenCondition for conditional instructions. NZ (Z = 0), Z (Z = 1),P (S = 0), N (S = 1), PO (P = 0), PE (P = 1), NC (CY = 0), C (CY=1)Cond3.5.2 Data movemement instruction for the 80855 microprocessor

Output port n = AOUT n A = input port nIN nSP = HLSPHLHL StackXTHLA, flag register = StackPOP PSWrp = Stack (rp SP) POP rp Stack = A, flag registerPUSH PSWStack = rp (rp SP)PUSH rpDE HLXCHGM[rp] = A (rp = BC, DE)STAX rpA = M[rp] (rp = BC, DE)LDAX rpM[], M[ + 1] = HLSHLD HL = M[], M[ + 1]LHLD M[] = ASTA A = M[]LDA rp = LXI rp, M[HL] = nMVI M, nr = nMVI r, nM[HL] = rMOV M, rr1 = M[HL]MOV r, Mr1 = r2MOV r1, r2No operationNOPOperationInstruction3.5.2 Data operation instruction for the 80855 microprocessor

AllA = A M[HL]ANA MAllA = A rANA rAllDecimal adjust DAACYHL = HL + rpDAD rp Nonerp = rp - 1DCX rpNonerp = rp + 1INX rp Not CYM[HL] = M[HL] - 1 DCR MNot CYr = r - 1 DCR rNot CYM[HL] = M[HL] + 1INR MNot CYr = r + 1INR rAllA = A - n - CYSBI nAllA = A - M[HL] - CYSBB MAllA = A - r - CYSBB rAllA = A - nSUI nAllA = A - M[HL]SUB MAllA = A - rSUB rAllA = A + n + CYACI nAllA = A + M[HL] + CYADC MAllA = A + r + CYADC rAllA = A + nADI n AllA = A + M[HL]ADD MAllA = A + rADD rFlagsOperationInstruction3.5.2 Data operation instruction for the 80855 microprocessor

CYCY = 1STCCYCY = CYCMCNoneA = ACMACYA, CY = CY, ARARCYCY, A = A, CYRALCYCY = A0, A = A0, A(7-1)RRCCYCY = A7, A = A(6-0), A7RLCAllCompare A and nCPI nAllCompare A and M[HL]CMP MAllCompare A and rCMP rAllA = A nXRI nAllA = A M[HL]XRA MAllA = A rXRA rAllA = A n ORI nAllA = A M[HL]ORA MAllA = A rORA rAllA = A nANI nFlagsOperationInstruction3.5.2 Program control instruction

Halt the CPUHLTEnable interruptsEI Disable interruptsDI IM = ASIM A = IMRIMCall subroutine at 8*n (n = 5.5, 6.5, 7.5)RST n If condition is true then return from subroutineR condReturn from subroutineRETIf condition is true then call subroutine at C cond Call subroutine at CALL GOTO address HLPCHLIf condition is true then GOTO J cond GOTO JUMP OperationInstruction3.5.3. A Simple 8085 Program1: i = n, sum = 02: sum = sum + i, i = i - 13: IF i 0 then GOTO 24: total = sum

3.5.3 A Simple 8085 Program (contd)LDA nMOV B, AXRA ALoop:ADD BDCR BJNZ LoopSTA total

i = nsum = A A = 0sum = sum + i i = i - 1 IF i 0 THEN GOTO Loop total = sum3.5.3 Execution tracetotal = 15STA totalNO JUMPJUMPJUMPJUMPJUMPJNZ LoopB = 0,Z = 1B = 1,Z = 0B = 2,Z = 0B = 3,Z = 0B = 4,Z = 0DCR BA = 15A = 14A = 12 A = 9A = 5ADD BA = 0XRA AB = 5LDA nMOV B, A5th Loop4th Loop3rd Loop2nd Loop1st LoopInstruction3.5.4Analyzing the 8085 ISAInstruction set more complete then the simple CPU, however not sufficient enough for a PC.Able to use subroutines, and interruptsIt is fairly orthogonal.Has sufficient number of registers