CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES,...

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16 CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey 2.1 Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input variables, with no storage involved, the resulting circuits is called combinational logic. In combinational logic the output variable are the all times dependent on the combination of input variables. A combinational circuit consists of input variables, logic gates and output variables the logic gates accept signals generate output signals. This process transforms binary information from the given input data to the required output [8]. The combinational circuits accept in input binary and generate output variables depending on the logical combination. Logic minimization uses a variety of techniques to obtain the simplest gate- level implementation of a logic function. The heart of digital logic design is the Boolean algebra (Boole, 1954). A few decades later C.E.Shannon showed how the Boolean algebra can be used in the design of digital circuits (Shannon, 1938). Using Boolean laws it is possible to minimize digital logic circuits (Huntington, 1904). Since minimization with the use of Boolean laws is neither systematic nor suitable for computer implementation, a number of algorithms were proposed in order to overcome the implementation issue [47][48]. Karnaugh proposed a technique for simplifying Boolean expressions using an elegant visual technique, which is actually a modified truth table intended to allow minimal sum-of products (SOP) and

Transcript of CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES,...

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CHAPTER-2

STRUCTURE OF BOOLEAN FUNCTION USING GATES,

K-Map and Quine-McCluskey

2.1 Introduction

Logic gates are connected together to produce a specified output for certain

specified combinations of input variables, with no storage involved, the resulting

circuits is called combinational logic. In combinational logic the output variable are

the all times dependent on the combination of input variables. A combinational circuit

consists of input variables, logic gates and output variables the logic gates accept

signals generate output signals. This process transforms binary information from the

given input data to the required output [8]. The combinational circuits accept in input

binary and generate output variables depending on the logical combination.

Logic minimization uses a variety of techniques to obtain the simplest gate-

level implementation of a logic function. The heart of digital logic design is the

Boolean algebra (Boole, 1954). A few decades later C.E.Shannon showed how the

Boolean algebra can be used in the design of digital circuits (Shannon, 1938). Using

Boolean laws it is possible to minimize digital logic circuits (Huntington, 1904).

Since minimization with the use of Boolean laws is neither systematic nor suitable for

computer implementation, a number of algorithms were proposed in order to

overcome the implementation issue [47][48]. Karnaugh proposed a technique for

simplifying Boolean expressions using an elegant visual technique, which is

actually a modified truth table intended to allow minimal sum-of products (SOP) and

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product-of-sums (POS) expressions to be obtained (Karnaugh, 1953). The Karnaugh

Map (K-Map) based technique breaks down beyond six variables. The Quine-

McCluskey (Q M) method is a computer-based technique for simplification and the

modified Quine-McCluskey (M Q-M) method is a very simple and systematic

technique for minimizing Boolean functions. To minimize a Boolean expression by

simplifying the logic function, we can reduce the original number of digital

components (gates) required to implement digital circuits. Therefore by reducing the

number of gates, the chip size and the cost will be reduced, and the speed will be

increased.

Boolean algebra is constructed by connecting the Boolean constants and

variables with the Boolean operations. These Boolean expressions are also known as

Boolean formulas and we use Boolean expression to describe Boolean function. If the

Boolean expression (A + B') C is used to describe the function f, then it is written as

f (A, B, C) = (A + B') C or f = (A + B') C

Based on the structure of Boolean expression it can be categorized in different

formulas. One such categorization is the normal formulas. Let us consider the four

variable Boolean functions.

f (A, B, C, D) = A + B'C + ACD'

In this Boolean function the variables are appeared either in a complemented

or an uncomplemented form. Each occurrence of variables in either a complement or

an uncomplimentary form is called a literal. Thus the above function consists of six

literals they appear in the product of the terms. A product term is defined as either a

literal or a product of literals three product terns namely AB'C and ACD' function.

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f (A, B, C, D) = (B +D')(A + B' + C)(A'+ C)

The above Boolean function consists of seven literals here they appear in the

sum terms. A sum term is defined as either a literal a sum of literals. Three sum terms

namely (B + D'), (A+ B'+C) and (A'+ C) the literals can be arranged in two ways

Sum of product form (SOP) and

Product of sum form (POS)

2.2 Sum of product forms

The word sum and product are derived from the symbolic representation of the

OR and AND function by + and. But we realize that these are not arithmetic

operation in the usual sense. A product term is any group of literals that are AND

together for example ABC, XY and so on. A sum term is any group of literals that are

OR together. Such as A+B+C, X+Y and so on.

1. f (A, B, C) = ABC + A B'C'

2. f (P, Q, R, S) = P'Q + Q R +R S

Each of these sums of products expressions consists of two or more product

terms (AND) that are OR together each product tern consists of one or more literals

appearing in either complemented or uncomplemented form. For example in the sum

of products expression ABC + A B'C' the first product term contains literals A B and

C in their uncomplemented form. The second product term contains literals B and C

in their complemented form. The sum of product form is also known as disjunctive

normal form or disjunctive normal formula.

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2.3 Product of Sum forms

A product of sums is any groups of sum terms AND together some examples

of this form are:

1. f (A, B, C) = (A+ B) (B'+ C)

2. f (P, Q, R, S) = (P + Q). (R + S'). (P+ S)

Each of the product sums expression consists of two or more sum terms (OR)

that are ANDed together each sum term consists of one or more literals appearing in

either complemented or uncomplemented form. The product of sum form is also

known as conjunctive normal form or conjunctive normal formula.

2.4. Standard sop form or minterm canonical forms

We can realize that in the sop from all the individual terms do not involve al

literals. For example in expression AB +ABC' the first product terms do not contain

literals C. If each term in SOP form contains all the literals then the sop form known

as standard or canonical sop form. In the expression ABC' + ABC+ A'BC + AB'C, all

the literals are present in each product terms in other words we can say that a sum of

products is a standard sum of products if every product term involves every literals or

its complement. One standard sum of products expression is:

f (A, B, C) = AB'C+ ABC + A'BC'

2.4.1 Standard pos form or maxterm canonical forms

If each term in pos form contains all the literals then the pos form is known as

standard or canonical pos form. Each individual term in the standard pos is called

maxterm. Therefore canonical pos form is also known as maxterm canonical form. In

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other words we can say that a product of sums is a standard or canonical product of

sums if every sum term involves every literals or its complement. One standard

product of sums expression is

f (A, B, C) = (A+B+C) + (A+B'+C)

2.5 Converting expressions in to standard sop or pos forms

Sum of products form can be converted to standard sum of products by

ANDing the terms in the expression with terms formed by ORing the literal and its

complement which are not present in that term. For example for a three literal

expressions with literals A, B and C, if there is a term AB, and C is missing, then we

form term (C+C) and AND it with AB therefore we get AB (C+C') = ABC + ABC'

Steps to convert sop to standard SOP form:

Step 1: finding the missing literal in each product term.

Step 2: AND each product term having missing literals with term form by

ORing the literals and its complement.

Step 3: Expanding the term by applying distributive law and reorder the

literals the literals in the product terms.

Step 4: Reduce the expression by omitting repeated product terms if any

because A + A = A

Illustration:

Converting the given expression in standard sop form:

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f (A, B, C) = AC + AB + BC

Literals A is missing

Literals C is missing

Literals B is missing

AND product term with missing literals + its complement

f (A, B, C) = AC(B+B') + AB(C+ C') +BC(A+ A')

Expand: f (A, B, C) =ACB + ACB' + ABC + ABC'+ BCA + BCA'

RECORDER: f (A, B, C) = ABC + AB'C + ABC+ ABC'+ABC + A'BC

2.6 M- Notations (Minterms and Maxterms)

Each individual term in standard SOP form is called minterm and each

individual term in standard POS form is called maxterm the concept of minterms and

maxterms allows us to introduce a very convenient shorthand notation to express

logical function it gives the minterm and maxterm for a three literals variable logical

function. Where the number of minterm as well as maxterms is 8. In general, for an n

- variables logical function there are n minterm and an equal number of maxterm.

As shown in Table 2.1 each minterm is represented by mi and each maxterm is

represented as Mi , where the subscript i is the decimal number equivalent of the

natural binary number. With these shorthand notations logical function can be

represented as follows:

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1. f (A, B, C) = A'B'C'+A'B'C+A'BC+ABC'

= mo + m1 + m3 + m6

= m (0, 1, 3, 6)

Variables

A B CMinterm(mi) Maxterm(Mi)

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

A' B' C' = mo

A' B' C = m1

A' B C' = m2

A' B C = m3

A B' C' = m4

A B' C = m5

A B C' = m6

A B C = m7

A + B + C = M0

A + B + C' = M1

A + B' + C = M2

A + B' + C' = M3

A' + B + C = M4

A' + B + C' = M5

A' + B' + C = M6

A' + B' + C' = M7

Table 2.1 Minterms and Maxterms for three variables

2. f (A, B, C) = (A + B + C') (A + B'+ C') (A' + B' + C)

= M1 + M3 + M6

= M (1, 3, 6,)

The logical expression can be represented in the truth table form. To write

logic expression in standard SOP or POS form corresponding to a given truth table.

The logic expression corresponding to a given truth table can be written in a standard

sum of products form by writing one product term for each input combination that

produces an output of 1. These product terms are together to create the standard sum

of products [23][24]. The product terms are expressed by writing complement of a

variable when it appears as an input 0, and the variable itself appears as an input 1.

Considering, the following truth table 2.2. The product corresponding to input

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combination 010 is A'BC', the product corresponding to input combination 011 is

A'BC, and product corresponding to input combination 110 is ABC’. Thus the

standard sum of product form is

F (A, B, C) = A'BC' + A'BC+ABC'

= m2+m3+m6

A B C Y

0

0

0

0

1

1

1

1

0

0

1

1

0

0

1

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

0

Table No.2.2. Minterms and Maxterms for three variables (m2,m3 and m6)

A B C Y

0

0

0

0

1

1

1

1

0

0

1

1

0

0

1

1

0

1

0

1

0

1

0

1

1

1

0

1

1

0

1

1

Table No.2.3 Minterms and Maxterms for three variables (M2 and M5)

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The logic expression corresponding to a truth table can be also written in a

standard product of sums form by writing one sum term output is “0”. The sum terms

are expressed by writing complement of a variable when it appears as an input “1”

and the variables itself when it appears as an input is “0” as shown in table 2.3.

The sum corresponding to input combination 010 is A+ B'+C thus the standard

product of sums corresponding to input 101 is A'+B+C'. Thus the standard product of

sums form is as follows,

f (A, B, C) = (A+B'+C) (A'+B+C')

= M2 + M5

2.7 Karnaugh Map minimization

The simplification or minimization of any digital circuit is an important

activity in digital circuit design. To simplify the circuit, the designer tries to find

another circuit that produces the same output as the original but with less number of

gates. The main objective of this process is to keep the number of digital gates as

minimum as possible and thus to get minimal cost solution. There are various

methods of simplification such as Boolean algebra, Karnaugh maps, Tabulation

method, Computer Aided Design etc. All these methods use the simplification of

Boolean function that represents the digital logic. Another important point is that the

K-Map simplification is manual technique and simplification process is heavily

depends on the human abilities. To meet this requirement, W. V. Quine and E.J.

McCluskey developed an exact tabular method to simplify the Boolean expressions.

This method is called the Quine-McCluskey or tabular method.

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Maurice Karnaugh developed the Karnaugh map in 1953. This technique is

quite easy and fast in comparison with Boolean algebra. Karnaugh maps work well

for up to six input variables. A Karnaugh map consists of many arrays of rectangles or

boxes arranged in rows and columns. The size of the Karnaugh map with n Boolean

variables is equal to 2n. The size for maps of 2 variables is a 2x2 map (four boxes),

for 3 variables it is a 2x4 map, and for 4 variables it is a 4x4 map and so on. The

Boolean variables are arranged in an order according to the principles of gray code

where only one variable changes in adjacent squares. Each square represents a

minterm (sometimes a maxterm) corresponding to the truth table. A minterm is a

Boolean expression consisting of a product term of variables (or their complimented

form). The minterms are identified by associating numbers to them like m0, m1,

…….mn.

For simplifying an input expression, the adjacent minterms are identified and a

group of 2 (Pair), 4 (Quad) or 8 (Octet) adjacent minterms are formed. The minterms

can only form a group if they are adjacent horizontally and vertically and not

diagonally. The groups should be as large as possible and overlapping of any minterm

on two or more groups is allowed. Similarly the wrap around minterms is also

allowed for forming a group. If a term and its compliment both appear in a group,

delete both from the resultant product term. Finally the Boolean expression of the

remaining terms can be obtained.

For simplification of Boolean expression by Boolean algebra we need better

understanding of Boolean laws, rules and theorems and during the process of

simplification we have to predict each successive step. Boolean algebra alone is the

simplest possible expression on the other hand the map method gives us a systematic

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approach for simplifying a Boolean expression and the map method first proposed by

veitch and modified by karnaugh hence it is known as the veitch diagram or the

karnaugh map[48].

Product terms are assigned to the cells of a karnaugh map by labeling each

row and each column of the map with a variable and its complement or with a

combination of variables and complement. The product term corresponding to a given

cell is then the product of all variables in the row and column, where the cells is

located to label the rows and columns of a 1, 2, 3 and 4 variable map and the product

terms corresponding to each cell.

B' B B'C' B'C BC BC'

A' A' A' A'B' A'B A' A'B'C' A'B'C A'BC A'BC'

A A A AB' AB A AB'C' AB'C ABC ABC'

C'D' C'D CD CD'

A'B' A'B'C'D' A'B'C'D A'B'CD A'B'CD'

A'B A'BC'D' A'BC'D A'BCD A'BCD'

AB ABC'D' ABC'D ABCD ABCD'

AB' AB'C'D' AB'C'D AB'CD AB'CD'

Fig. 2.1 Outlines of 1, 2, 3 and 4 variable maps with product terms

3- Variable map

(8 Cells)

2- Variable map

(4 Cells)

1- Variable map

(2 Cells)

4- Variable

map

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From the above Fig 2.1, when we move from one cell to next along any row or

from one cell to the next along any column only one variable in the product term

changes. The only change that occurs in moving along the bottom row from AB to

AB' is the change from B to B'. Similarly the only change that occurs in moving down

the right columns along each row and column to the single change rule. The gray code

has same properties; hence gray code is used to label the rows and columns of K-Map.

2.8 Grouping cells for simplification

In the last section we have discussed representation of Boolean function on the

karnaugh map. We have also seen that minterms are marked by 1’s and maxterms are

marked by 0’s. Once the Boolean function is plot on the karnaugh map we have to use

grouping technique to simplify the Boolean function. The grouping is nothing but

combining terms in adjacent cells. Two cells are said to be adjacent if they conform

the single change rule. The simplification is achieved by grouping adjacent 1’s or 0’s

in grouping of 2I where I = 1 ,2….n and n is the number of variables.

2.9 Grouping two adjacent ones (pair)

The karnaugh map contains a pair of 1’s that are horizontal adjacent to each

other. The equation shown below, the first term represents A' B' C and the second

term represents A' B C. In these two terms only the B variable appears in both normal

and complemented from. Thus these two terms can be combined to give a result that

eliminates the B variable since it appears in both uncomplemented and complemented

form. This can be proved as follows.

Y = A'B'C + A'B C

= A' C (B' + B)

= A' C

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This same principle holds true for any pair of vertically or horizontal adjacent

1’s shows an example of two vertically adjacent 1’s. These two can be combined to

eliminate a variable since it appears in both its uncomplemented and complemented

forms. This gives the result,

Y= A'B C + A B C = B C

0 0

0 0 0 0

Fig. 2.2 (a) Horizontal Adjacent 1's A'C

0 0 0

0 0 0 0

Fig. 2.2 (b) Vertically Adjacent BC

Fig. 2.2 (c) Adjacent Corners AC'

0 0 0

1 0 0 1

A

BC

B'C'

00

B'C

01

BC

11

BC'

10

A'0 1 1A'C

A 1

BC

BC

11

BC'

10

B'C'

00

B'C

01A

A' 0 1BC

A 1

BC'

10

BC

11

B'C

01

B'C'

00

BC

A' 0

1A 1 1

AAC'

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In a Karnaugh map the leftmost column and rightmost column are considered

to be adjacent. Thus, the two 1’s in these columns with a common row can be

combined to eliminate one variable. This is illustrated in Fig 2.2. Here variable B has

appeared in both its complemented and uncomplemented forms and hence eliminated

as follows. The another illustration here two 1’s from top row and bottom row of

some column are combined to eliminate variables A , since in a K-Map the top row

and bottom row are considered to be adjacent.

Y = A B' C' + A B C'

= A C'(B' + B)

= A C'

C'D' 00

C'D 01

CD 11

CD' 10

A'B'

00

0 0 0

A'B

01

0 0 0 0

AB

11

0 0 0 0

AB'

100 0 0

Fig. 2.3 1’s Group B'C'D

AB

CD

1

B'C'D

1

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Y = A' B' C' D + A B' C'D

= B' C' D (A' + A)

= B' C' D

Fig. 2.4 1’s Group of A'C& BC

Y = A' B' C + A'B C + A B C

= A' B' C + A' B C + A' B C + A B C

= A' C (B' + B) + B C (A' + A)

= A' C + B C

Karnaugh map has two over lapping pairs of 1’s in the map. Fig 2.4 shows that

we can share one term between two pairs.

Where three groups of pairs can be formed but only two pairs are enough to

include all 1’s present the K-Map in such case third pair is not required.

Grouping four adjacent ones (Q quad)

0 0

0 0 0 0

Group 1 ! A' C

BC'

10

BC

11

B'C

01

B'C'

00

BC

A'0 1 11

1A 1

A

Group 2 ! BC

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In a K-Map we can group four adjacent 1’s, the resultant group is called quad.

Shows the four 1’s are horizontal adjacent vertically adjacent.

A K-Map contains four 1’s in a square and they are considered adjacent to

each other, also adjacent because as mentioned earlier the top and bottom rows are

considered to be adjacent to each other and the leftmost and rightmost columns are

also adjacent to each other. From the above K-Map we can notice that when a quad is

combined two variables are eliminated thereby we have following terms with 4

variables. Thus overlapping groups as mentioned earlier one term can be shared

between two or more groups.

2.10 Simplification of sum of product expression (minimal sums)

We have discussed how combination of pair’s quads and octets on a K-Map

can be used to obtain a simplified expression. A pair of 1s eliminate one variable a

quad of 1’s eliminate two variables and an octets of 1’s eliminates two variables three

variables in general. When a variable appears in both complemented and

uncomplemented from within a group that variables is eliminated from the resultant

expression variables that are same in all with the group must appear in both final

expression each group gives us a product term and summation of all product term

implies the function and hence is an implicate of the function all the implicates of a

function determined using a K-Map are the prime implicants. From the above

discussion we can outline generalized procedure to simplify Boolean expression as

follows.

1. Plot the K-Map and place 1’s adjacent in those cells corresponding to the 1’s

in the truth table or sum of product expression place 0’s in other cells.

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2. Check the K-Map for adjacent 1’s and encircles those 1’s which are not

adjacent to any other 1’s these are called isolated 1’s.

3. Check for those 1’s which are adjacent to only 1 and which are encircle such

pairs.

4. Check for quads and octets of adjacent 1’s even if it contain some 1s that have

already been encircled while doing this make sure that there are minimum

number of groups.

5. Combine any pairs necessary to include any 1s that have not yet been grouped.

6. Form the simplified expression by summation product terms of all groups.

To verify the procedure, we consider the following expression.

Minimize the expression Y = AB'C + A'B'C + A'BC + AB'C' + A'B'C'

The following is the method:

Step 1: K-Map to three variables and it is plotted according to the given

expression.

Step 2: There are no isolated 1’s

Fig. 2.5 K-Map for three variables

1 1 1 0

1 1 0 0

BC'

10

BC

11

B'C'

00

B'C

01A

BC

A' 0

A 1

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Step3: 1 in the cell 3 is adjacent to 1 in the cell 1. Fig 2.6 pair is combined and

referred to as group 1.

Step 4: There are no octets but there is a quad cell 0, 1, 4 and 5 from a quad this quad

is combined and referred to as group 2.

1 0 0

1 1 0 0

Fig. 2.6 Group 2

Step 5: All 1s have already been grouped.

Step 6: Each group generates a term in the expression for Y in group 1 B variable is

eliminated A and C are eliminated and we get,

Fig. 2.7 Group Formation

Y=A' C+B'

0 0

0 0 0 0

BC

B'C

01

B'C'

00

BC'

10

BC

11A

A' 0 1 1

A 1 A' C

A'C

B'C'

00A

BCBC'

10

B'C

01

BC

11

1A' 0

11 1

B'

A 1

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2.11 Essential prime implicants

After grouping the cell the sum terms which appear in the k amp are called

prime implicate group it is observe that some cells may appear in only one prime

implicate group while other cells may appear in more than one prime implicant group

these group cells 1, 4, 9, 10 appear in only one prime implant group these cells are

grouped these calls are called essential cells and corresponding prime implicate are

called essential prime implicant.

2.12 Simplification of product of sums expression

In the above discussion we have considered the Boolean expression in sum of

products from and grouped 2, 4, and 8 adjacent ones to get the simplified Boolean

expression in the in the same form in practice the designer should examine both the

sum of products and product of sums reduction to assertion which is more simplified

we have already seen the representation of products of sums on the k amp once the

expression is plotted on K-Map once the expression is plotted on the K-Map of zero

each of zero result a sum term and it is nothing but the prime implicate. The technique

for using maps for POS reduction is simple step by step process.

1. Plot the ka map and place 0’s in those cells corresponding to the 0’s in the

truth table or maxterm in the products of sum expression.

2. Checking the

3. K-Map for adjacent 0’s and encircle 0’s which are not adjacent to any other

0’s these are called isolated 0’s.

4. Check for those 0’s which are adjacent to 0’s to only other “0” and encircle

such pairs. Checking for quad and octets of adjacent 0’s even if it contains

some 0’s that have already been encircled while doing this make sure there are

minimum number of groups.

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5. Combine any pairs necessary to include any 0’s that have not yet been

grouped

6. Form the simplified SOP expression for F by summing product terms of all the

groups.

(NOTE: The simplified expression is in the complemented form because we

have grouped 0’s to simplify the expression)

7. Use De Morgan’s theorem on F to produce the simplified expression in POS

form.

To get familiar with these steps we will illustrate through the following

example.

Minimize the expression

Y = (A + B + C') (A + B' + C') ( A'+ B'+ C') (A' + B + C) (A+B+C)

Solution: (A + B + C') = M1, ( A + B' + C') = M3 ( A' + B' + C') =M7

(A' + B + C) =M4 , (A + B + C) =M0

Step 1: Fig. 2.8 (a) shows the K-Map for three variables and it is plotted according to

given maxterms.

Fig. 2.8 (a) K-Map for three variables

0 0 0

0 0

B'C'

00

B'C

01

BC

11

BC'

10A'

BC

A' 0

A 1

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Step 2: There are no isolated 0’s.

Step 3: “0” in the cell 4 is adjacent only to “0” and “0” in the cell 7 is adjacent only to

“0” in the cell 3. These two pairs are combined and referred to as group 1 and group 2

respectively shown in fig. 2.8(b).

Step 4: There are no quads and octets.

Fig. 2.8 (b) Group ‘1’ and Group ‘2’

Step 5: The “0” in the cell 1 can be combined with “0” in the cell 3 to Form a pair.

This pair is referred to as group 3.

Step 6: In group 1 and in group 2, A is eliminated, where as in

Group 3 variable B is eliminated shown in fig. 2.8(c) and we get

Y = BC +BC + AC

Fig. 2.8 (c) Group 3 variable

0 0 0

0 0

0 0 0

0 0

B'C'

00

B'C

01

BC

11

BC'

10

BC

0

0

A' 00

0A 1

A

BC

11

B'C'

00

B'C

01

BC'

10A

BC

0

0

A' 0 0 00

0

A'C

A 1 BC

B'C'

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37

Step 7: Y' = (B'C' +BC + A'C)'

= (B'C')' (BC)' (A'C)'

= (B' + C'') (B' + C') (A''+ C')

= (B + C) (B' + C') (A + C')

To directly write the expression for Y by using De Morgan’s theorem for each

minterm as follows:

Y' = B'C' + BC +A'C Y= (B + C) (B' + C') (A + C')

2.13 Don’t Care Conditions

In some logic circuits, certain input conditions never occur, therefore the

corresponding outputs never appears. In such cases the output level is not defined, it

can be either HIGH or LOW. These output levels are indicated by ‘X’ or‘d’ in the

truth table 2.4 and are called don’t care outputs or don’t care conditions or

incompletely specified functions. Let us see the output levels in the truth table are

defined for input conditions from 0 0 0 to 1 0 1. For remaining two conditions of

input, output is not defined, hence these are called don’t care conditions shown in this

truth table 2.4.

A circuit designer is free to make the output for any “don’t care” condition

either a ‘0’ or a ‘1’ in order to produce the simplest output expression.

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A B C Y

0

0

0

0

1

1

1

1

0

0

1

1

0

0

1

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

X

X

Table 2.4 Don’t Care Conditions

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2.13.1 Describing Incomplete Boolean Function

We describe the Boolean function using either a minterm canonical formula or

a maxterm canonical formula. In order to obtain similar type expressions for

incomplete Boolean functions we use additional term to specify don’t care conditions

in the original expression. This is illustrated in the following examples.

In expression,

f (A, B, C) = " # M (0, 2, 4) + d (1, 5)

minterms are 0, 2and 4. The additional term d (1, 5) is introduced to specify the don’t

care conditions. These terms specifies that outputs for minterms 1 and 5 are not

specified and hence these are don’t care conditions. Letter d is used to indicate don’t

care conditions in the expression.

The above expression indicates how to represent don’t care conditions in the

minterm canonical formula. For example,

f (A, B, C) = " # M (2, 5, 7) + d (1, 3)

2.13.2 Don’t Care Conditions in Logic Design

In this section, we see the incompletely specified Boolean function. Let us see

the logic circuit for an even parity generator for 4-bit BCD number. The Table 2.5

shows the truth table for even-parity generator. The truth table shows that the output

for last six input conditions cannot be specified, because such input conditions do not

occur when input is in the BCD form.

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A B C D P

0 0 0 1 1

0 0 1 0 1

0 0 1 1 0

0 1 0 0 1

0 1 0 1 0

0 1 1 0 0

0 1 1 1 1

1 0 0 0 1

1 0 0 1 0

1 0 1 0 -

1 0 1 1 -

1 1 0 0 -

1 1 0 1 -

1 1 1 0 -

1 1 1 1 -

Table 2.5 Don’t Care Conditions in Logic Design

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2.14 Limitations of Karnaugh Map

The map method of simplification is convenient as long as the number of

variables does not exceed five to six. As the number of variables it is difficult to make

judgments about which combinations form the minimum expression. In case of

complex problem with 7, 8, of even 10 variables it is almost an impossible task to

simplify expression by mapping method.

2.15 Five Variable K-Map

A 5-Variable K-Map requires 25 = 32 Cells, but adjacent cells are difficult to

identify on a single 32-cell map. Therefore, two 16-cell K- maps are generally used. If

the variables are A, B, C, D and E two identical 16-cell maps containing B, C, D and

E can be constructed. One map is then used for A and the other for B as shown in Fig.

2.9(a) and Fig. 2.9(b) respectively. It is important to note that in order to identify the

adjacent grouping in the five variable map, we must imagine the two maps

superimposed on one another; not “hinged” or “mirror imaged”. Every cell in one

map is adjacent to the corresponding cell in the other map, because only one variable

changes between such corresponding cells. Thus, every row on one map is adjacent to

the corresponding columns. Also, the rightmost and leftmost columns within each 16-

cell map are adjacent, just as they are in any 16 cell map, as are the top and bottom

rows.

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C'D' C'D CD CD'

A'B'

A'B

AB

AB'

Fig. 2.9 (a) 16-Cells Map

C'D' C'D CD CD'

A'B'

A'B

AB

AB'

Fig. 2.9 (b) 32 Cells Map

0 1 3 2

4 5 7 6

12 13 15 14

8 9 11 10

DE

BC

16 17 19 18

20 21 23 22

28 29 31 30

24 25 27 26

DE

BC

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2.16 Conclusion

The digital circuits can be represented and analyzed using the Boolean

functions. K-Map in fact a visual diagram of representing all possible ways a Boolean

function may be expressed. Logic minimization uses a variety of techniques to obtain

the simplest gate-level implementation of a logic function. The heart of digital logic

design is the Boolean algebra and how the Boolean algebra can be used in the design

of digital circuits.