Chapter 1 System Software

System Software and Machine Architecture

Book: L. Beck and Manjula

System Software

n System software consists of a variety of programs that support the operation of a computer, e.g. q Text editor, compiler, loader or linker, debugger,

macro processors, operating system, database management systems, software engineering tools, ….

PeopleApplication Program Utility Program (Library)

Debugging Aids Macro Processor Text EditorCompiler Assembler Loader and Linker

OS Memory Processor Device Information Management and Process Management Management Management

Bare Machine (Computer)

System Software & Architecture

n System software differs from application software in machine dependencyq System programs are intended to support the

operation and use of the computer itself, rather than any particular application.

n Simplified Instructional Computer (SIC)q SIC is a hypothetical computer that includes the

hardware features most often found on real machines, while avoiding unusual or irrelevant complexities

Simplified Instructional Computer

n Like many other products, SIC comes in two versionsq The standard model q An XE versionn “extra equipments”, “extra expensive”

n The two versions have been designed to be upward compatible

SIC Machine Architecture

n Memoryq Memory consists of 8-bit bytes, 15-bit addressesq Any 3 consecutive bytes form a word (24 bits)q Total of 32768 (215) bytes in the computer memory

n Registersq Five registers, each is 24 bits in length

Mnemonic Number Special useA 0 Accumulator

X 1 Index register

L 2 Linkage register

PC 8 Program counter

SW 9 Status word

n Data formatsq 24-bit integer representation in 2’s complement q 8-bit ASCII code for characters q No floating-point on standard version of SIC

n Instruction formatsq Standard version of SIC

q The flag bit x is used to indicate indexed-addressing mode


8 1 15opcode x address


n Addressing modesq Two addressing modes n Indicated by the x bit in the instruction

Mode Indication Target address calculation

Direct x=0 TA=address

Indexed x=1 TA=address+(X)

(X): the contents of register X


Instruction set:n Load/store registers: LDA, LDX, STA, STXn Integer arithmetic: ADD, SUB, MUL, DIVq All involve register A and a word in memory, result

stored in register An COMPq Compare value in register A with a word in

memoryq Set a condition code CC (<, =, or >)

n Conditional jump instructionsq JMP, JLT, JEQ, JGT: test CC and jump

Source: (Appendix A, Page 495)


n Subroutine linkageq JSUB, RSUB: return address in register L

n Input and outputq Performed by transferring 1 byte at a time to or

from the rightmost 8 bits of register Aq Each device is assigned a unique 8-bit code, as an

operand of I/O instructionsq Test Device (TD): < (ready), = (not ready)q Read Data (RD), Write Data (WD)

SIC Programming Example

n Data movement

LDA FIVE load 5 into ASTA ALPHA store in ALPHALDCH CHARZ load ‘Z’ into ASTCH C1 store in C1...

ALPHA RESW 1 reserve one word spaceFIVE WORD 5 one word holding 5CHARZ BYTE C’Z’ one-byte constantC1 RESB 1 one-byte variable


n Arithmetic operations: BETA = ALPHA+INCR-1

LDA ALPHAADD INCRSUB ONESTA BETALDA GAMMAADD INCRSUB ONESTA DELTA...

ONE WORD 1 one-word constantALPHA RESW 1 one-word variablesBETA RESW 1GAMMA RESW 1DELTA RESW 1INCR RESW 1


n Looping and indexing: copy one string to another

LDX ZERO initialize index register to 0MOVECH LDCH STR1,X load char from STR1 to reg A

STCH STR2,XTIX ELEVEN add 1 to index, compare to 11JLT MOVECH loop if “less than”...

STR1 BYTE C’TEST STRING’STR2 RESB 11ZERO WORD 0ELEVEN WORD 11

SIC Programming ExampleLDA ZERO initialize index value to 0STA INDEX

ADDLP LDX INDEX load index value to reg XLDA ALPHA,X load word from ALPHA into reg AADD BETA,XSTA GAMMA,X store the result in a word in GAMMALDA INDEXADD THREE add 3 to index valueSTA INDEXCOMP K300 compare new index value to 300JLT ADDLP loop if less than 300......

INDEX RESW 1ALPHA RESW 100 array variables—100 words eachBETA RESW 100GAMMA RESW 100ZERO WORD 0 one-word constantsTHREE WORD 3K300 WORD 300


n Input and output

INLOOP TD INDEV test input deviceJEQ INLOOP loop until device is readyRD INDEV read one byte into register ASTCH DATA..

OUTLP TD OUTDEV test output deviceJEQ OUTLP loop until device is readyLDCH DATAWD OUTDEV write one byte to output device..

INDEV BYTE X’F1’ input device numberOUTDEV BYTE X’05’ output device numberDATA RESB 1

SIC/XE Machine Architecture

n Memoryq Maximum memory available on a SIC/XE system is

1 megabyte (220 bytes)q An address (20 bits) cannot be fitted into a 15-bit

field as in SIC Standardq Must change instruction formats and addressing

modes


n Registersq Additional registers are provided by SIC/XE

Mnemonic Number Special use

B 3 Base register

S 4 General working registerT 5 General working registerF 6 Floating-point accumulator (48 bits)


1 11 36

s exponent fraction

f*2(e-1024)

n There is a 48-bit floating-point data typeq fraction is a value between 0 and 1q exponent is an unsigned binary number between 0

and 2047q The binary point is immediately before the high

order bit which must be 1

Floating Point (cont) SIC/XE

n Suppose the exponent is e and the fraction is fn The number is f * 2 (e+1024)

n 0 sign is positiven 1 is negative

Data Formats Example

n Integer5 = 000000000000000000000101-5 = 111111111111111111111011

n CharacterA 01000001


n Float4.89 = .1001110001111010111000010100011110

10111000010100 * 23 (1027)

=0 10000000011 100111000111101011100001010001111010


n Float-.000489 = 100000000011000000

111100000001111110 * 2-10 (1014)

=1 01111110110 100000000011000000111100000001111110


n Instruction formats8

op

8 4 4

op r1 r2

Format 1 (1 byte)

Format 2 (2 bytes)

Formats 1 and 2 do not reference memory at allBit e (0: use format 3 and 1: use format 4)

6 1 1 1 1 1 1 12

op n i x b p e dispFormat 3 (3 bytes)

6 1 1 1 1 1 1 20

op n i x b p e addressFormat 4 (4 bytes)


n Base Relative Addressing Mode

n Program-Counter Relative Addressing Mode

n i x b p e

opcode 1 0 disp

b=1, p=0, TA=(B)+disp (0≤disp ≤4095)

n i x b p e

opcode 0 1 disp

b=0, p=1, TA=(PC)+disp (-2048≤disp ≤2047)


n Direct Addressing Moden i x b p e

opcode 0 0 disp

b=0, p=0, TA=disp (0≤disp ≤4095)

n i x b p e

opcode 1 0 0 disp

b=0, p=0, TA=(X)+disp (with index addressing mode)


n Immediate Addressing Mode

n Indirect Addressing Mode

n i x b p e

opcode 0 1 0 disp

n=0, i=1, x=0, operand=disp (no memory reference)

n i x b p e

opcode 1 0 0 disp

n=1, i=0, x=0, TA=(disp)


n Simple Addressing Moden i x b p e

opcode 0 0 disp

i=0, n=0, TA= location of operand (SIC standard)

n i x b p e

opcode 1 1 disp

i=1, n=1, TA= location of operand (SIC/XE standard)

SIC/XE Machine Architecturen Addressing Modes Summary Assembler decides

which format to use


Example Instruction Format

(PC) + disp(B) + disp + (X)((PC) + disp)dispb/p/e + dispaddr


n Instruction set:q load and store the new registers: LDB, STB, etc.q Floating-point arithmetic operationsn ADDF, SUBF, MULF, DIVF

q Register move: RMOq Register-to-register arithmetic operationsn ADDR, SUBR, MULR, DIVR

q Supervisor call: SVCn Input and output:q I/O channels to perform I/O while CPU is executing

other instructions: SIO, TIO, HIO

SIC/XE Programming Example

LDA #5STA ALPHALDCH #90STCH C1...

ALPHA RESW 1C1 RESB 1

LDA FIVESTA ALPHALDCH CHARZSTCH C1...

ALPHA RESW 1FIVE WORD 5CHARZ BYTE C’Z’C1 RESB 1

SIC version SIC/XE version


LDS INCRLDA ALPHA BETA=ALPHA+INCR-1ADDR S,ASUB #1STA BETALDA GAMMA DELTA=GAMMA+INCR-1ADDR S,ASUB #1STA DELTA......

ALPHA RESW 1 one-word variablesBETA RESW 1GAMMA RESW 1DELTA RESW 1INCR RESW 1


n Looping and indexing: copy one string to another

LDT #11 initialize register T to 11LDX #0 initialize index register to 0

MOVECH LDCH STR1,X load char from STR1 to reg ASTCH STR2,X store char into STR2TIXR T add 1 to index, compare to 11JLT MOVECH loop if “less than” 11...

STR1 BYTE C’TEST STRING’STR2 RESB 11


LDS #3LDT #300LDX #0

ADDLP LDA ALPHA,X load from ALPHA to reg AADD BETA,XSTA GAMMA,X store in a word in GAMMAADDR S,X add 3 to index valueCOMPR X,T compare to 300JLT ADDLP loop if less than 300......

ALPHA RESW 100 array variables—100 words eachBETA RESW 100GAMMA RESW 100

Chapter 1 System Software

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