CBM-MUCH Front-End and Readout Electronics Suggestions for India´s Involvement in Electronics for...
-
Upload
tamsyn-howard -
Category
Documents
-
view
215 -
download
2
Transcript of CBM-MUCH Front-End and Readout Electronics Suggestions for India´s Involvement in Electronics for...
CBM-MUCH
Front-End and Readout Electronics
Suggestions for India´s
Involvement in Electronics
for CBM
Christian J. Schmidt,
GSI Darmstadt
Discussion Meeting on "Indian Participation in FAIR: Science and Technology"
April 18-19, 2009, Hyderabad
FAIR India Meeting, April 18 – 19, 2009
CBM – Muon Configuration CBM – Muon Configuration
Dipolemagnet
ResistivePlate Chambers(TOF)
Tracking Detector
Muondetection System
Projectile SpectatorDetector(Calorimeter)
SiliconTrackingSystem
Micro VertexDetector
FAIR India Meeting, April 18 – 19, 2009
R&D challenge: high rate (2 MHz/cmR&D challenge: high rate (2 MHz/cm22) – high granularity (4 mm) – high granularity (4 mm22 pad)pad)
Muon ID – The Muon ID – The MuMuon on ChChambers (MUCH)ambers (MUCH)
low-mass vector mesonlow-mass vector mesonmeasurementsmeasurements
≡ 7.5 λII
≡ 13.5 λI
Fe
20 20 2
0 30
35 1
00 cm
shieldingshielding
Total # Total # channels:channels:
480 768480 768
Total # Total # channels:channels:
480 768480 768
J/J/measurementsmeasurements
pads: 4-20 mm2
< 5% occupancy for
central Au+Au
25 AGeV,w/o shielding
FAIR India Meeting, April 18 – 19, 2009
System Integration Challenges, Example ALICE TRD
FAIR India Meeting, April 18 – 19, 2009
Data Linkage and Preprocessing belongs to Detector Electronics, System Manufacturing, Example ALICE TRD
FAIR India Meeting, April 18 – 19, 2009
Mechanical Infrastructure, Electronic System Management
System Cooling
Power Distribution
Slow control
System Interconnect
System Diagnostics and System Management Sensors
Routines
Partial system testing procedures and QA
Work-arounds
Partial shut-downs
FAIR India Meeting, April 18 – 19, 2009
Assembly and Manufacturing Challenges
Various diseparate technologies involved, interfacing: Silicon Chip Technology
Bonding Technology Wire bonding, bump bonding, stud bonding
PCB-Technology
Interconnect
System testing, structured quality assurance
Stepwise, meaningful testability and diagnostics in assembly and partial operation
Secure, reliable interconnect
FAIR India Meeting, April 18 – 19, 2009
n-XYTER FEB: Chip integration at the limits of PCB-technology
Chip-In-Board solution avoids space eating vias
allows pitch adaptation: 50,7 µm on chip to
PCB side 101,4 µm on two levels
Interference point of several technologies,
each imposing limiting boundary conditions,
no single platform modelling available!
A simple hybrid PCB with signal fan-in, ADC and interconnect to SysCore DAQ chain
ongoing prototyping
at GSI
FAIR India Meeting, April 18 – 19, 2009
CBM-XYTER FEE-Family Planning, Platform ASIC Solution
Few application specific front-end solutions family planning
Complex analogue/digital interface to handle stochastic data flow
(this is common to all XYTER applications) sparcifying
derandomizing
high throughput serial link
read out everything as fast as possible
purely data driven architecture comes out to be quite generic for several detector applications (even beyond CBM within FAIR)
FAIR India Meeting, April 18 – 19, 2009
CBM Readout and DAQ ArchitectureCBM Readout and DAQ Architecture
Detector
FEE buffer
Readoutbuffer
Switch
Processorfarm
Storage
L1trigger
HLT
conventionalsystem
CBM
L1
Self-triggered Front-endall hits shipped to DAQ.Data push architecture
High-throughputEvent building
First event selectiondone in processor farm.
Readout buffer outside radiation area. Many Gbyte
storage easily possible. Allows L1 decision times of 10-100
ms
Fast links
FAIR India Meeting, April 18 – 19, 2009
Collection of Tracking Detector Specifications
CBM STS
CBM TRD
CBM RI CH
CBM MUCH
PANDA MVD
PANDA GEM
PANDA TPC NUSTAR? Version A Version B
#channels/chip 128 8-16? 64 128 or 6464 - 256, def.:128 32-128 32-128 128 64 to 128
power limit/channel 10mW?? 10mW 10mW 10mW low 10mW
noise limit 800e- 900e at 25pF~1500 electrons
(sigma)
800 enc at 10pF and 1100 enc at
25pF 500e- at 5pF 500 e- at 5 pF 800enc at 35pF500enc at 5pF, 900enc at 25pF
max. rad. dose 5MRad 100 krad ? 1 MRad 100krad
avg. detector cap. 35pF 25pF 10 pF 10pF 7pF
max. detector cap. 50 pF 50pF 2/150pF 7pF 50pF 50/150 pFmax. hit-rate/channel 150kHz 300 kHz 250kHz? 250kHz 40kHz 4..11/200kHz 200kHz 150 kHz 250 kHz
average signal ampl. ~ 25 ke 125 ke 150-300 kе 25 ke 94 ke 25 ke 25 kesignal distribution Landau exp. exp.?
mix Landau and Exp. Landau Landau
measured quality spat. res. spat. res. hit/no hit spat. res. spat. res + dE/dx spat. res.spat. res &
hit time
signal shape dep. on det. type rect. 30-40 ns
max. possible signal100ke =
average *41000ke =
average * 82000-4000 ke =
average *10169ke =
average *7200ke =
average * 2750ke =
average * 30 200 kedual range
1000ke, 3000 ke
ADC res./amplitude5 bit for
average signal 8-9 bit linear7 -8 bit/ 4ke at low
signal
8 bit of dynamic range for low
signals or 5 bit for average 7 bit, 5ke
4- 5 bit for average signal ( ~1 ke) 8-9 bit, 4ke
Time resolution 2ns 20ns 10ns/hit 4ns/hit 2ns 4 ns
special tasks both pol
baseline rest., forced neigbor
readout? spark prot. both pol sparc prot.spark prot.,
baseline rest.switchable noise boost
dual range 1000ke, 3000ke,
sparc protection, baseline
restauration,
extreme valuesextreme values
FAIR India Meeting, April 18 – 19, 2009
Silicon- and Gas-XYTER Specification-Distillates
Silicon XYTER Gas XYTER#channels/ chip 128 64 to 128
power limit/ channel low 10mW
noise limit 800enc at 35pF 500enc at 5pF, 900enc at 25pF
max. rad. dose 5 MRad 100 kRad
range detector cap. 10 to 50pF 7 to 150 pF
max. hit-rate/ channel 150 kHz 250 kHz
average signal ampl. 25 ke above 25 ke
max. possible signal 170 ke dual range 1000ke, 3000 ke
ADC res./ amplitude4- 5 bit for average signal (~ 1 ke)
not linear over dynamic range 8-9 bit linear, 4keTime resolution 2ns 4ns
special tasks
switchable noise/ bandwidth boost, both polarities,
allow for DC couppling
dual range 1000ke, 3000ke, sparc protection,
baseline restauration, forced neighbor readout
FAIR India Meeting, April 18 – 19, 2009
Generic XYTER ASIC development lines
GAS-XYTER (TRD, MUCH, PANDA applications): P. Fischer et al, ZITI Heidelberg
engineering contributions and team complements invited
Silicon-XYTER (STS, PANDA-MVD):R. Szczygiel, AGH Krakow
Essential for these endeavors: Active involvement of detector representativeCBM-India should name link-up personbetween XYTER chip development and
MUCH detector application
FAIR India Meeting, April 18 – 19, 2009
India Contribution to CBM MUCH Electronics
India could supply complete detector system with electronics!
XYTER integration for 105 detector channels: two
chips to one hybrid FEE pcb (estimated 2000 boards)
FPGA-based readout controller (ROC)
adaptation and assembly ( ~500 boards needed)
ASICs: The challenge is in the engineering, need platform tools,
a good team, a lot of communication and a lot of patience!
The very first decision is the one on a production process
immediately fixes industrial partner company for production (UMC 0.180)!
Chip production is not the cost factor ( ~ Euro 10 /chip ), ... it is the integration!
FAIR India Meeting, April 18 – 19, 2009
CBM Radiation EnvironmentCBM Radiation Environment
Neutron fluence in CBM cave
UrQMD + FLUKA simulation, 25 GeV Au beam on Au target
STS STS – station #8a.u.
Neutron fluence through Silicon Tracking System
MUCHaperture
1-MeV neq /cm2/year
beam
Hottest part of Silicon tracker: 6 years up to 1015 neq/cm2 in STS radiation hardness regime of LHC/SuperLHC experiments
Radiation hardness for the system is a severe issue also for the MUCH!
FAIR India Meeting, April 18 – 19, 2009
Chances and Challenges on the Meta-Level
MUCH specific adaptation needed (engineering, also conceptual)
Interplay of high technologies essential in system engineering, assembly and
manufacturing:
Communication needs in engineering quality control and testing suggest:
One system in one country
Get industry in India involved on all technological levels
Good share on specific core development needs for
scientific research groups in India
FAIR India Meeting, April 18 – 19, 2009
CBM Electronics Integration: MUCH and STS Systems
MUCH system has similar as well as very differing electronics
integration challenges as in CBM STS
Vivid and fruitful collaborative and very interactive interplay
between MUCH and STS teams in sight
MUCH detector system integration could be realized all in
India, while there is the partner endeavor for technical co-
guidance.
FAIR India Meeting, April 18 – 19, 2009
New Detector Lab Facilities at GSI
Supply on-site bridge head for detector system assembly
600 m2 of climatized cleanroom space with relative humidity down to 20%
cleanroom class 10000 in general and better locally
dedicated bonding labs forseen
Additional 600 m2 available for detector testing, storage and other activities
Additional 100 m2 of high clearance (10m headroom), dedicated device setup space (detector integration and tests)
Construction of the new GSI Detector Lab has commenced! Located between GSI UNILAC and the CBM Offices (C27)
FAIR India Meeting, April 18 – 19, 2009
First visible FAIR construction activity:the future Detector Lab
FAIR India Meeting, April 18 – 19, 2009
R3B-NeuLand Detector, a NUSTAR Engagement
GSI Detectorlab is engaged in RPC development collaboration:
Saha Institute of Nuclear Physics and GSI
Ushasi Datta Pramaik, Konstanze Boretzki (spokesperson)
prototyping activities ongoing with Saha technicians at GSI detectorlab
150 m2 active area, 50% to be produced in India
Electronics system integration imposes very similar challenges and tasks as with CBM MUCH
see Ushasi´s talk tomorrow
India could come out as the electronics integration heavy weight in FAIR!
FAIR India Meeting, April 18 – 19, 2009