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    CBGA Surface Mount Assembly and Rework

    Users Guide

    May 23, 2002

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    Copyright and Disclaimer

    Copyright International Business Machines Corporation 2002.

    All Rights Reserved

    Printed in the United States of America May 23, 2002.

    The following are trademarks of International Business Machines Corporation in the United States, or other countries, or

    both:

    IBM

    IBM Logo

    Other company, product and service names may be trademarks or service marks of others.

    All information contained in this document is subject to change without notice. The products described in this document

    are NOT intended for use in implantation or other life support, space, nuclear, or military applications where malfunction

    may result in injury or death to persons. The information contained in this document does not affect or change IBM

    product specifications or warranties. Nothing in this document shall operate as an express or implied license or indemnity

    under the intellectual property rights of IBM or third parties. All information contained in this document was obtained in

    specific environments, and is presented as an illustration. The results obtained in other operating environments may vary.

    THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN AS IS BASIS. In no event will IBM be

    liable for damages arising directly or indirectly from any use of the information contained in this document.

    IBM Microelectronics Division

    1580 Route 52, Bldg. 504

    Hopewell Junction, NY 12533-6351

    The IBM home page can be found at

    http://www.ibm.com

    The IBM Microelectronics Division home page

    can be found at http://www.chips.ibm.com

    CBGA Surface Mount Assembly and Rework Users Guide

    May 23, 2002

    http://www.ibm.com/http://www.chips.ibm.com/http://www.chips.ibm.com/http://www.chips.ibm.com/http://www.ibm.com/
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    CBGA Surface Mount Assembly and Rework Users Guide

    Contents

    Page 3

    Contents

    Figures .......................................................................................................................................... 7

    1. Introduction .............................................................................................................................. 9

    2. Assembly ................................................................................................................................ 11

    2.1 Package Description ....................................................................................................................... 11

    2.2 Card Considerations ....................................................................................................................... 122.2.1 Card Pad Design ................................................................................................................... 12

    2.2.2 Card Warping ........................................................................................................................ 13

    2.2.3 Other Card Considerations .................................................................................................... 14

    2.2.3.1 Component Compatibility ............................................................................................... 14

    2.2.3.2 Tented Vias .................................................................................................................... 14

    2.2.3.3 Card Quality ................................................................................................................... 14

    2.3 General SMT Process ..................................................................................................................... 15

    2.4 Solder-Paste Screening .................................................................................................................. 172.4.1 Paste ..................................................................................................................................... 17

    2.4.2 Print Requirements ................................................................................................................ 17

    2.4.2.1 1.27 mm Pitch CBGA ..................................................................................................... 17

    2.4.2.2 1.00 mm Pitch CBGA ..................................................................................................... 18

    2.4.3 Process Controls ................................................................................................................... 18

    2.4.4 Stencils .................................................................................................................................. 18

    2.5 Print Inspection ............................................................................................................................... 19

    2.6 Placement ....................................................................................................................................... 202.6.1 Accuracy ................................................................................................................................ 20

    2.6.2 Placement Force ................................................................................................................... 22

    2.6.3 Placement Techniques .......................................................................................................... 222.6.3.1 Body Recognition ........................................................................................................... 22

    2.6.3.2 Mechanical Alignment .................................................................................................... 22

    2.6.3.3 Visual Recognition .......................................................................................................... 23

    2.6.3.4 Placement Accuracy ....................................................................................................... 23

    2.7 Solder Reflow .................................................................................................................................. 242.7.1 Reflow Requirements ............................................................................................................ 24

    2.7.2 Thermal Profil ing ................................................................................................................... 25

    2.7.3 Reflow Techniques ................................................................................................................ 26

    2.8 Cleaning .......................................................................................................................................... 28

    2.9 Wave Solder .................................................................................................................................... 282.9.1 Secondary Reflow ................................................................................................................. 28

    2.9.2 Card Warping ........................................................................................................................ 282.10 Fixtures ......................................................................................................................................... 29

    2.11 Assembly Inspection ..................................................................................................................... 30

    2.12 Joint Reliability .............................................................................................................................. 302.12.1 Solder Fatigue ..................................................................................................................... 30

    2.12.2 Design Variations ................................................................................................................ 33

    2.12.2.1 Finite Element Model .................................................................................................... 33

    2.12.2.2 Joint Standoff ............................................................................................................... 33

    2.12.2.3 1.27 mm Pitch CBGA ................................................................................................... 34

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    2.12.2.4 High-Performance Glass Ceramic ................................................................................ 41

    2.12.2.5 1.00 mm Pitch CBGA ................................................................................................... 41

    2.12.2.6 Double-Side CBGA ....................................................................................................... 43

    2.12.2.7 Stress Database (DLA, 25 mm CBGA, 1.0 mm Pitch) ................................................. 44

    2.13 Voids ............................................................................................................................................. 492.14 Assembly Summary ...................................................................................................................... 50

    3. Rework .................................................................................................................................... 51

    3.1 Process Flow ................................................................................................................................... 51

    3.2 Material Sets ................................................................................................................................... 52

    3.3 Tooling Requirements ..................................................................................................................... 523.3.1 PCB Preheater ....................................................................................................................... 53

    3.3.2 Nozzle Design ........................................................................................................................ 53

    3.3.3 Thermal Profiling .................................................................................................................... 54

    3.3.3.1 Method One .................................................................................................................... 54

    3.3.3.2 Method Two .................................................................................................................... 55

    3.3.3.3 Method Three ................................................................................................................. 553.3.4 Module Removal .................................................................................................................... 55

    3.3.5 Site Dress .............................................................................................................................. 56

    3.3.6 Solder Vacuum ...................................................................................................................... 56

    3.3.7 Clean ...................................................................................................................................... 57

    3.3.8 Solder Application .................................................................................................................. 58

    3.3.8.1 Module Screening ........................................................................................................... 58

    3.3.8.2 Site Screening ................................................................................................................ 60

    3.3.8.3 Solder Preforms .............................................................................................................. 60

    3.3.8.4 Solder Paste Dispense ................................................................................................... 61

    3.3.9 Module Placement ................................................................................................................. 61

    3.4 Module Reflow ................................................................................................................................. 62

    3.5 Rework Inspection ........................................................................................................................... 643.6 1.00 mm Pitch CBGA Rework ......................................................................................................... 64

    3.7 Forced Rework ................................................................................................................................ 653.7.1 NiAu Card Rework ................................................................................................................. 65

    3.7.2 Double-Side Module Rework ................................................................................................. 65

    3.7.3 Close-Proximity Module Rework ............................................................................................ 65

    3.8 Summary ......................................................................................................................................... 66

    4. Revision Log .......................................................................................................................... 67

    Appendix A. References ........................................................................................................... 69

    Appendix B. Glossary ............................................................................................................... 71

    Appendix C. Test Vehicles ........................................................................................................ 73

    Appendix D. Coffin-Manson Acceleration Factor ................................................................... 75

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    Contents

    Page 5

    Appendix E. Solder Reflow ....................................................................................................... 77

    E.1 Alpha 1208 Paste ........................................................................................................................... 77

    E.2 Kester R244 No-Clean Reflow Profile ............................................................................................ 77

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    Figures

    Page 7

    Figures

    Figure 2-1. CBGA Cross Section .................................................................................................................. 12

    Figure 2-2. Card Pad with Dogbone ............................................................................................................. 13

    Figure 2-3. Rework Tooling Forbidden Zone .............................................................................................14

    Figure 2-4. CBGA Process Flow .................................................................................................................. 15

    Figure 2-5. Double-Sided CBGA Process Flow ............................................................................................16

    Figure 2-6. Hybrid CBGA Process Flow .......................................................................................................16

    Figure 2-7. Printed Solder-Paste Volume versus Aspect Ratio ....................................................................19

    Figure 2-8. Typical BGA Print .......................................................................................................................20

    Figure 2-9. Placement Tolerances ............................................................................................................... 21

    Figure 2-10. Tilted Module Experiment ........................................................................................................22

    Figure 2-11. Mechanical Alignment Nests .................................................................................................... 23

    Figure 2-12. Placement Accuracy ................................................................................................................ 24Figure 2-13. Convection Oven Reflow and Thermal Mass Effects ............................................................... 25

    Figure 2-14. 25 mm CBGA Thermal Profile in Convection Oven .................................................................26

    Figure 2-15. 25 mm CBGA Thermal Profile in IR Oven ................................................................................27

    Figure 2-16. Vapor-Phase Reflow Oven Thermal Profile ............................................................................. 27

    Figure 2-17. 25 mm CBGA Aqueous Clean Profile ...................................................................................... 29

    Figure 2-18. Outer Row Solder-Joint Visual Inspection (1.00 mm Pitch) .....................................................30

    Figure 2-19. 25 mm CBGA Deformation at 100C ....................................................................................... 31

    Figure 2-20. 32.5 mm CBGA Moire Interferometry Pattern .........................................................................31

    Figure 2-21. Joint After 3000 Cycles 0 to 100C. ........................................................................................ 32

    Figure 2-22. 25 mm CBGA Corner Joint Stress Distribution at 100C .........................................................33

    Figure 2-23. Number of Cycles to Failure for Eutectic and 10/90 Sn/Pb Solder Balls ..................................34

    Figure 2-24. 32.5 mm ATC and SIR Test Vehicle Card Layout .................................................................... 35

    Figure 2-25. 32.5 mm CBGA Module Site on Test Vehicle with DNP Rings ................................................ 35

    Figure 2-26. Coffin-Manson Relationship Verified Using Two Test Conditions ............................................36

    Figure 2-27. 32.5 mm CBGA Cycles-to-Fail for Various DNPs ....................................................................38

    Figure 2-28. 32.5 mm CBGA Cycles-to-Fail for Various Pad Sizes ............................................................. 38

    Figure 2-29. 32.5 mm CBGA Cycles-to-Fail for Various Solder Volumes .................................................... 39

    Figure 2-30. N50 and N5 for Solder-Paste Volume and Pad Size with Fixed DNP ......................................39

    Figure 2-31. Small Fillet and Optimized Fillet ...............................................................................................40Figure 2-32. Simulated Cycles-to-Fail ..........................................................................................................40

    Figure 2-33. Test Card Layout ......................................................................................................................41

    Figure 2-34. 1.00 mm Daisy Chain Ring Pattern Showing the Module and Card Wiring .............................42

    Figure 2-35. Front and Back Solder Joint Structure ..................................................................................... 44

    Figure 2-36. Direct Lid Attach CBGA ............................................................................................................45

    Figure 2-37. Twelve-Zone Convection Furnace Reflow (Profile A) .............................................................. 47

    .

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    Figures

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    Figure 2-38. Ten-Zone Convection Furnace Reflow (Profile B) ....................................................................48

    Figure 2-39. Z-Axis Cross Section of Voids in Eutectic Solder .....................................................................50

    Figure 3-1. CBGA Rework Process Flow ......................................................................................................51

    Figure 3-2. PCB Preheater for CBGA Rework ..............................................................................................53

    Figure 3-3. Hot-Gas Rework Nozzle .............................................................................................................54

    Figure 3-4. CBGA Solder Joints Simultaneously Reflowed at Removal .......................................................55

    Figure 3-5. CBGA Balls Remaining on the PCB after Module Removal .......................................................56

    Figure 3-6. CBGA Site-after-Site Dress Process ..........................................................................................57

    Figure 3-7. CBGA Clamshell Screening Fixture ...........................................................................................58

    Figure 3-8. Solder Paste Print onto CBGA Balls in a Clamshell Fixture .......................................................59

    Figure 3-9. Schematic of Placement Tool Picking CBGA out of Screening Fixture ......................................61

    Figure 3-10. Thermal Profile for 32.5 mm CBGA Rework Hot-Gas Reflow ..................................................63

    Figure 3-11. Reworked CBGA Solder Joint Cross-Section ...........................................................................63

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    CBGA Surface Mount Assembly and Rework Users Guide

    Introduction

    Page 9

    1. Introduction

    Ceramic ball grid array (CBGA) modules are high density, high-performance surface mount (SMT) packages.

    These packages differ from standard SMT packages, which use peripheral leads that are easy to inspect and

    touch-up.

    The use of a full or partial array of interconnections under the CBGA package body presents some design

    and process considerations. Because the ball array cannot be inspected, the design and assembly process

    must be understood and controlled to obtain the high yields and reliability characteristics that make CBGA

    packages attractive. All CBGA packages described in this users guide are IBM packages.

    The card assembly and rework process is an integral part of the evolution of package requirements. The

    objectives of the assembly and rework process are:

    Ensure that design and process requirements are compatible with standard SMT equipment

    Ensure that the design and process requirements are compatible with total assembly requirements, as

    driven by other product components

    Determine critical joint assembly requirements

    Determine critical assembly yield parameters

    Establish reliability database for second-level assembly

    Develop the rework process to help ensure high yields and reliability

    Document specifications for the assembly and rework processes as determined by the activities listed

    above

    The CBGA card assembly design and process factors that influence reliability and yields are summarized in

    this users guide, along with specific information related to successfully completing each process step. Usingthe process outlined here produces the required product reliability along with very high yields, typically 13

    parts per million (ppm) per lead.

    CBGA reliability projections for specific applications are provided by IBM as part of the overall module design.

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    Assembly

    Page 11

    2. Assembly

    2.1 Package Description

    IBM CBGA packages are very robust. Some of their characteristics are listed below:

    Lidless and direct lid attach (DLA) CBGA packages are not moisture sensitive; lidded CBGA packages

    are typically qualified to the JEDEC level 2 or 3 moisture-sensitivity specifications.

    CBGA package have a very long shelf life, while maintaining the solder balls ability to wet the surface to

    which it will be attached (wettability).

    The solder balls are not easily damaged, and as a result, are not overly sensitive to handling.

    The CBGA module is a multi layer ceramic product, and is available with or as:

    White and dark ceramic

    No lid (bare chips), DLA (a flat lid joined directly to the back side of the chip), or standard lid (a custom lid

    solution with a thermal compound inside)

    Ceramic thicknesses ranging from 1.4 mm to 4.2 mm

    Body sizes up to 33 mm

    Coplanarity: 0.15 mm (The distance from the worst-case ball to the coplanarity reference plane.)

    JEDEC-registered package [reference 1]

    Flip-chip C4 devices

    Multi-chip modules (MCMs), with discrete components as needed

    Custom ball grid array (BGA) depopulation

    1.27 mm and 1.00 mm pitch grid array

    The interconnection is a high-melt 10/90 tin/lead (Sn/Pb) solder ball that is 0.89 mm (0.035 inches) in diam-

    eter for 1.27 mm pitch packages, or 0.80 mm (0.031 inches) in diameter for 1.00 mm pitch packages. The

    high-melt ball does not melt during card assembly, creating a predetermined standoff height of 0.89 mm or

    0.80 mm for 1.27 mm pitch or 1.00 mm pitch packages, respectively. See Figure 2-1 on page 12.

    The interconnection is joined to the ceramic with eutectic solder. The package is mounted to the printed

    circuit board (PCB) with eutectic solder paste.

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    2.2 Card Considerations

    CBGA packages are qualified for PCBs that have a coefficient of thermal expansion (CTE) less than or equal

    to 22 ppm/C. A typical PCB has a CTE of 1620 ppm/C.

    2.2.1 Card Pad Design

    A CBGA module is mounted to a card using a dogbone pad design [reference 2]. Note the following design

    considerations:

    The solder dam between the landing pad and the via is required to prevent loss of solder paste to the via.

    The solder mask opening is larger than the copper pad. This prevents creation of a high-stress point in

    the eutectic solder due to solder-mask interference. The eutectic can make a smooth fillet to the high-

    melting point ball without any interference.

    The nominal pad diameter is at the top of the pad:

    For the 1.27 mm pitch CBGA, the nominal pad diameter is 0.72 mm (0.0285 inches). See Figure 2-2on page 13. This parameter is critical for joint reliability. See Critical Reliability Parameterson page

    36.

    For the 1.00 mm pitch CBGA, the nominal pad diameter is 0.68 mm (0.0275 inches). See Figure 2-2on page 13. Reliability tests were performed on cards with pad sizes ranging from 0.025690.02746

    inches.

    For the 1.27 mm pitch high-performance glass ceramic (HPGC) BGA, the optimum nominal pad

    diameter is 0.81 mm (0.032 inches) with a solder mask opening of 0.91 mm (0.036 inches).

    If the BGA array is depopulated, vias can be eliminated in the card, and the escape wiring can be optimized toreduce the number of signal layers required. However, if the vias are removed, consider wires entering the

    landing pads as potential high-stress points. To prevent these areas from becoming high-stress points, flare

    the lines under the procoat to mimic the dogbone lines, 0.30 mm (0.012 inches), as they join the landing

    pads.

    Figure 2-1. CBGA Cross Section

    18 ppm/C

    Chip

    CeramicSubstrate

    63/37 Sn/Pb Fillet

    Card/Board

    6/5 ppm/C

    10/90 Sn/Pb Ball

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    Assembly

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    2.2.2 Card Warping

    PCB warping is a major contributor to SMT package z-axis tolerances, including quad flat packages (QFPs)

    as well as all BGA packages. In general, card-warping issues can be overcome by good paste print and

    inherent solder-ball movement during reflow. However, weigh the following design considerations to help

    prevent the local warping that can occur during assembly and rework processes:

    Use symmetrical card cross sections (especially important during reflow processes).

    Avoid using adjacent components that anchor the PCB, such as large pin-in-hole (PIH) connectors.

    Maximize assembly thermal-mass uniformity across the PCB.

    Consider card form factors; large, thin cards warp more readily than smaller, thicker cards, and might

    require fixtures. See Fixtureson page 29.

    Utilize a reliable PCB supplier to help ensure card flatness [reference 2]

    The card site for a 32.5 mm CBGA package has a typical flatness of 0.0250.076 mm (0.0010.003 inches),

    for example.

    Figure 2-2. Card Pad with Dogbone

    All dimensions are in mm unless otherwise specified.

    Notes:

    1. Functional surface

    2. Nominal diameter at copper/FR4 interface with typical IBM manufacturing etch angle.

    Solder mask window(diameter a)

    Mounting pad(diameter b)2

    Via solder mask window(diameter d)

    Via(diameter e)

    Land(diameter f)

    g typical

    45 typical

    3 mm line

    hA

    A

    b diameter2

    c diameter

    Solderablesurface1

    Section AA

    Feature 1.27 mm Pitch 1.00 mm Pitch

    a 0.851 mm 0.8 mm

    b 0.749 mm 0.68 mm

    c 0.72 mm 0.68 mm

    d 0.483 mm 0.38 mm

    e 0.305 mm 0.20 mm

    f 0.56 mm 0.46 mm

    g 0.635 mm 0.50 mm

    h 0.635 mm 0.50 mm

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    2.2.3 Other Card Considerations

    2.2.3.1 Component Compatibility

    Cards should be designed to be compatible with all the components that will be placed on the cards. Forexample, if a fine-pitch component and a CBGA are placed next to each other, is there a clearance area for a

    step-down stencil (reduction in thickness)? A 5.08 mm (0.200 inches) clearance around the BGA for rework

    tooling is required [reference 2], with the exception of discrete components. Discrete components require only

    a 2.54 mm (0.100 inches) spacing, assuming they can be manually replaced. See Figure 2-3.

    2.2.3.2 Tented Vias

    Tented or plugged vias that are filled or capped with solder-mask material can be used to help ensure that

    there is no solder loss from the landing pad to the via. However, there are several potential disadvantages to

    using tented vias:

    If only one side of the via is covered, it is more difficult to prevent flux materials and contaminants from

    being trapped in the via.

    If the back-side vias are covered, the modules cannot be tested through the back-side vias. However, cre-

    ating a back-side dogbone pattern, in which the landing pad is used solely for test purposes, can circum-vent this drawback. IBM does not use via tenting in the dogbone design.

    2.2.3.3 Card Quality

    Monitor card quality, especially with respect to pad-solder wettability. When the pad solder does not properly

    wet the surface, creating a non-wet (solder open), rework is required. CBGA packages can be mounted to

    cards with organic, hot-air solder leveling (HASL), and nickel-gold (NiAu) coatings. Wettability issues can

    occur when surfaces are oxidized, when HASL surfaces are not uniform, or when low-quality NiAu is used.

    Higher card-pad quality can help increase process yields.

    Note: IBM generally uses Entek Cu-56 surfaces. Most of the IBM reliability testing has been performed on

    assemblies with Entek-coated copper pads.

    Figure 2-3. Rework Tooling Forbidden Zone

    5.08 mm min

    0.2006.35 mm reference gridgrid

    0.250

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    2.3 General SMT Process

    CBGA packages are mounted to PCBs using standard SMT tools and processes [reference 4]. The process

    flow is shown in Figure 2-4.

    CBGA packages are compatible with both double-sided and hybrid circuits in which PIH componentsrequiring wave solder are used. These two process flows are depicted in Figure 2-5on page 16 and Figure 2-

    6on page 16. A module should be tested, and reworked if necessary, prior to attaching a heat sink whenever

    possible.

    CBGA packages are placed on the top and bottom, front and back of a PCB using the process flow shown in

    Figure 2-5on page 16. However, the screening fixture and the weight of the module must be taken into

    account to perform secondary reflow in an inverted position in the process. The maximum weight per lead for

    backside modules in reflow was experimentally determined to be 0.08 grams/lead.

    Although the solder-joint structure of back-side versus top-side modules is similar, reliability is reduced when

    modules are placed directly back-to-back with shared vias. See Double-Side CBGA on page 43.

    Figure 2-4. CBGA Process Flow

    Process Step

    Apply solderpaste

    Placecomponent

    Reflow solderClean flux

    Test cardReworkcomponent

    Attachheatsink

    Description

    Raw Card

    Water-soluble orno-clean eutecticSn/Pb solderpaste

    CapMLCEutectic Sn/Pb10/90 Sn/Pb Ball

    All eutecticreflows

    Heatsink

    Heatsinkadhesive

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    Figure 2-5. Double-Sided CBGA Process Flow

    Figure 2-6. Hybrid CBGA Process Flow

    Place Components(BGA, SMT, and PIH connectors)

    Cards and Components

    Backside Solder-Paste Application

    Solder-Paste Verification

    Component Placement(BGA, SMT)

    Reflow

    Clean(if required)

    Topside Solder-Paste Application

    Clean

    Inspect

    Place Components and

    Cards and Components

    Topside Solder-Paste Application

    Solder-Paste Verification

    Component Placement(BGA, SMT)

    Reflow

    Clean(if required)

    Backside Adhesive Dispense

    Wave Solder

    Clean

    PIH Connectors

    Inspect

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    2.4 Solder-Paste Screening

    Solder-paste deposition is the most critical process with respect to CBGA reliability. Attention to material,

    stencil, and print properties will help ensure a reliable package.

    2.4.1 Paste

    CBGA packages do not require a special paste. However, when choosing a solder paste, consider the

    following points:

    The thermal mass must meet the recommended vendor profile.

    The paste must be suitable for all components; for example, a type 4 paste might be needed for fine-pitch

    components.

    Consistency between paste lots, and the way in which the paste prints is important, because CBGA reli-

    ability is dependant on proper solder deposition.

    Pastes more prone to fluxed-induced voids in the reflowed solder should be avoided, although small voidsare not considered a reliability exposure. See Voidson page 49.

    A typical paste is eutectic solder (63/37 Sn/Pb), and 90% solder by weight, 50% solder by volume. IBM

    uses both type 3 and type 4 particle sizes. IBM has qualified no-clean and water-soluble pastes. Both

    pastes are used in high-volume CBGA production.

    2.4.2 Print Requirements

    2.4.2.1 1.27 mm Pitch CBGA

    IBM specifies the following solder-paste print characteristics for 1.27 mm pitch CBGA packages:

    A minimum paste volume of 0.089 cubic mm (4800 cubic mils). This reliability criteria is discussed in

    more detail in Critical Reliability Parameterson page 36.

    A maximum volume of 0.16 cubic mm (10,000 cubic mils). At this point, bridging occurs, because solder

    balls will float in the large area of molten solder and touch one another. The bridging does not occur along

    the card, only between the solder balls.

    A minimum print height of 0.018 mm (0.007 inches). This criteria is a z-axis requirement to prevent opens

    and facilitate higher yields. See Assembly Summaryon page 50. The minimum becomes more critical as

    the package size increases. While a 21 mm package might be able to tolerate a slightly shorter print

    height, a 32.5 mm package is more susceptible to opens if this minimum requirement is violated.

    A print registration of 0.10 mm (0.004 inches), determined by tolerance analysis, including ball radialposition and placement accuracy.

    An optimal solder-paste volume of 0.100.12 cubic mm (65007500 cubic mils) is recommended to help

    ensure reliability and to provide an optimal operating point. Typically, the solder-paste volume has standard

    deviation of approximately 710% in a good print.

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    2.4.2.2 1.00 mm Pitch CBGA

    IBM specifies the following solder-paste print characteristics for 1.00 mm pitch CBGA packages:

    A minimum solder-paste volume of 0.038 cubic mm (2500 cubic mils). This reliability criteria is discussed

    in more detail in Critical Reliability Parameterson page 36.

    A maximum solder-paste volume of 0.07 cubic mm (4600 cubic mils). Solder bridging can occur at vol-

    umes greater than 4600 cubic mils when large quantities of cards are assembled, because there is a

    greater variability in paste-print quality and the card pad diameter. At lower quantities, which do not have

    this variability, a maximum solder-paste volume of 5500 cubic mils has been used with no occurrences of

    solder bridging.

    A minimum print height of 0.018 mm (0.007 inches). This criteria is a z-axis requirement to prevent opens

    and facilitate higher yields (see Assembly Summaryon page 50). The minimum becomes more critical as

    the package size increases, as discussed in 1.27 mm Pitch CBGA on page 17.

    A print registration of 0.10 mm (0.004 inches), determined by tolerance analysis, including ball radial

    position and placement accuracy.

    An optimal solder-paste volume of 0.050.07 cubic mm (30004500 cubic mils) is recommended to help

    ensure reliability and to provide an optimal operating point.

    2.4.3 Process Controls

    Implementing good process controls helps ensure robust CBGA yields and improve print quality for all SMT

    components. When CBGAs are included in an SMT line, stencil design and print monitoring are key consider-

    ations.

    2.4.4 Stencils

    Good, repeatable printing using stainless-steel stencils with either chemical etch and electropolishing, or

    laser-cut fabrication. Typical stencil parameters are shown in Table 2-1.

    A stencil thickness of at least 0.007 inches is recommended to produce a 0.007 inch print height. This print

    height compensates for the z-tolerance total, consisting of module and card site coplanarity.

    Stencil step-downs (thickness reductions) are usually required to accommodate fine-pitch component

    requirements. The possible exception is for small CBGA packages where the z-axis tolerance might not be as

    severe, and a 0.150.18 mm (0.0060.007 inch) print height is acceptable. However, the solder-paste volume

    Table 2-1. Stencil Design

    Ball PitchStencil Thickness Stencil Aper ture

    mm inch mm inch

    1.27 mm0.20 0.008 0.86 0.035

    0.075 0.036

    1.00 mm0.20 0.008 0.027

    0.075 0.028

    Note: BGA apertures are circular, with a 0.001-inch taper from

    top to bottom to facilitate paste release.

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    requirements still apply, and the aperture must be adjusted on the order of 0.91 mm (0.036 inches) for a 0.15

    mm (0.006 inches) stencil. In cases like this, the print requirements are more critical in preventing bridging to

    vias.

    Stencil designs, driven by solder-paste volume requirements, result in screen printing on the solder mask to

    some extent. This has caused a small amount of solder balling in the materials IBM uses, because the

    overlap of the print on the procoat is only a few mils. In water-soluble processes, any solder balls are washed

    away anyway.

    The stencil aspect ratio (aperture/thickness) is an important design parameter. An aspect ratio of 4 produces

    an easy-to-print design. Aspect ratios of 3 or less result in printed solder-paste volumes significantly below

    the ideal. Tapered designs are recommended.

    Figure 2-7depicts the percent of ideal volume as a function of aspect ratio for several different BGA stencils

    (none have tapered apertures). The ideal volume is defined as the volume filling the stencil aperture. Paste

    volume was measured automatically by the tool used. Note that the large aspect ratio provides volumes

    above the ideal; this is because the print is taller (0.025 mm typical) than the stencil.

    2.5 Print Inspection

    IBM strongly recommends 100% visual inspection for gross defects, such as print misregistration and

    clogged stencil openings. Any defective print should be stripped, because these gross flaws can result in

    defects and rework.

    Solder-paste volume measurements should be implemented. Cost-effective measurement techniques are

    specific to each manufacturing line. Commercially available automated paste-measurement tools can high-

    light specific deposit defects based on height, area, or volume criteria. In addition, paste measurement tools

    are fast, can be used on a sampling basis or a total site, and provide statistical results that are vital to statis-

    tical process control (SPC) [reference 6].

    Figure 2-7. Printed Solder-Paste Volume versus Aspect Ratio

    120

    100

    80

    60

    2 3 4 5 6Aspect Ratio

    PercentPerfectVolume

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    Manual methods, using z-axis scopes or manual laser-scanning microscopes, are a lower capital investment,

    but introduce the potential for more operator error. However, these manual methods have been acceptable in

    conjunction with SPC control techniques.

    SPC should account for the average solder volume and the standard deviation in print volume. The standard

    deviation indicates the likelihood of a poor print. Even though the average volume is good, a large standard

    deviation indicates poor process control and a potential for low reliability and yields.

    2.6 Placement

    2.6.1 Accuracy

    CBGA modules are very forgiving during placement. As long as the solder balls can touch solder paste, they

    will self align during reflow. The eutectic solder at both the module and card will reflow. This allows the high-

    melt solder ball to float, move up and down, rotate, and reach an equilibrium between the module and card

    pads, as driven by the surface tension of the molten solder.

    The CBGA modules self-aligning capability allows a placement specification for the center of the ball to be

    0.28 mm (0.011 inches) from the center of the pad. This specification considers the tolerance of the paste

    print and ensures the balls are touching paste on the appropriate pad [reference 7]. See Figure 2-9on page

    21.

    Figure 2-8. Typical BGA Print

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    Because of the closer proximity of the adjacent pads on a 1.00 mm CGBA module, there is a higher risk ofsolder bridging or actual module jumping to the next row when off-placement occurs. After testing the self-

    alignment capability of 1.00 mm pitch CBGA packages by placing solder balls 0.30 mm (0.012 inches) off the

    card-pad center, IBM determined that the best results are achieved when CBGA balls had 60% of the ball

    alignment on the card pad or in the solder-paste print. This can be observed by visual inspection after place-

    ment.

    Another IBM evaluation considered the solder-ball misregistration with respect to the module pad. In this

    study, the modules were purposely selected for the worst-case tilt, or misalignment on the module pad. The

    modules were deliberately misplaced using a split-optics tool, and then processed through solder reflow.

    Even using modules that grossly violated the radial-error specification, the module tendency to self-align was

    pronounced, and supported the placement specification criteria.

    Limited accelerated thermal cycling (ATC) testing on these modules, using crack propagation as the defectcriteria, indicates that there is no difference between the highly-tilted versus no-tilt modules with respect to

    alignment after reflow. See Figure 2-10on page 22.

    Figure 2-9. Placement Tolerances

    Note: Pad diameter is 28 mil; paste diameter is 30 mil, ball diameter is 35 mil, registration requirement is 11 mil.

    Solder Ball

    3 mil5 mil

    17.5 mil

    22 mil

    3 mil

    Pad

    Paste

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    2.6.2 Placement Force

    Several independent IBM experiments concluded that placement force is not a significant variable with

    respect to package performance. For the range of placement forces studied (0.55.4 pounds for 32 mm

    modules), paste displacement due to solder balls is independent of the placement force. Typical placement

    force is 1.04.0 pounds. Based on these experiments, placement force at the first pass and rework process

    steps is not a critical process control.

    2.6.3 Placement Techniques

    Proper tooling does not need to be expensive to ensure reliable and repeatable placement. The placement

    techniques described in the following paragraphs can be used to meet the specified placement accuracy.

    2.6.3.1 Body Recognition

    For small packages, the centroid of the package can be defined from the body outline. This body recognition

    technique is similar to the plastic-leaded chip carrier (PLCC) recognition method. The body recognition tech-

    nique is limited to the maximum field-of-view of the tools camera and registration of the ball array to the

    package outline. However, for small packages, this technique is adequate despite these limitations.

    2.6.3.2 Mechanical Alignment

    A second placement technique is mechanical alignment to the solder-ball array. This technique calculates the

    centroid of the package using the array instead of the package body to accurately place the part. Global or

    local reference points are commonly used to define the module site on the PCB. The mechanical alignment

    technique is very repeatable and independent of ceramic type (white or dark).

    Figure 2-10. Tilted Module Experiment

    Tilted Ball

    Tilt

    Nominal Ball

    Placement

    With Against

    Final

    Positive Negative

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    The mechanical alignment is generally a two-step placement technique. Modules are picked from the tray

    feeder or stacker and placed in the mechanical alignment nest [reference 11]. The part is adjusted within the

    nest and then picked and placed on the card. Mechanical nest examples are shown in Figure 2-11.

    2.6.3.3 Visual Recognition

    Visual recognition provides the fastest placement of the three techniques described here. This technique

    uses a camera to view the solder balls directly. One of the advantages of using this technique is that the

    placement tool can reject any parts that do not meet the component definition (for example, a missing solder

    ball). However, the lighting contrast between the solder and white ceramic can be difficult to tune, and the

    placement tool might fail to recognize packages and reject them erroneously. The visual recognition tech-

    nique can be sensitive to lot-to-lot product variations, including ceramic color and solder ball versus solder

    column parts.

    2.6.3.4 Placement Accuracy

    Placement accuracy can be verified by placing double-sided stick tape on the card surface, seating the

    modules, inspecting peripheral rows, and then adjusting the tool-placement program until the modules are

    properly seated. This process is dependent on tool accuracy and component specifications.

    An experiment was conducted in which the card solder balls were inked and modules were then placed on

    the card. A comparator was used to measure the distance from the pad center to the ink dot. These studies

    used reasonable sample sizes as well as glass modules. Placement accuracy for one mechanical nest is

    illustrated in Figure 2-12on page 24 [reference 5].

    Figure 2-11. Mechanical Alignment Nests

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    2.7.2 Thermal Profiling

    Thorough thermal profiling is required to establish proper reflow under the module (no cold solder joints) and

    to ensure that all solder joints meet profile specifications. The most accurate thermal profiling is achieved by

    placing the thermocouple directly in the solder-ball joint. Thermocouples can be placed in the solder-ball joint

    in the following ways:

    Drill from the back-side of the card to the ball joint and plug the hole with thermal epoxy.

    Place the thermocouple in the solder paste prior to module placement.

    Allowing the thermocouple to float next to the solder ball generates readings 23C too high for the first-pass

    assembly. This discrepancy can be larger in rework process steps, where local, not global, heating is used,

    depending on the thermal mass of the assembly.

    Strategic thermocouple placement can help ensure that the entire card assembly meets reflow specifications.

    Cards should be fully populated to reflect true thermal mass. Recommended placement considerations

    include the following factors:

    Center of module(s)

    Corner of module(s)

    Modules in high thermal-mass area, or brick-walled pattern

    PCB surface in sparce SMT area

    Card leading edge versus trailing edge

    Any moisture-sensitive component(s) with body-temperature limits

    CBGA reflow is very dependent on card cross-section, module design (ceramic thickness, color, lidless or

    capped, body size), oven type, and proximity to other components. Whenever possible, thermal profilesshould be verified for each card part number, especially if there is a significant design variation; one profile

    does not fit all designs. Figure 2-13shows a profile established for a 25 mm CBGA, and then used for

    different SMT components. The effect of thermal mass is very obvious.

    Figure 2-13. Convection Oven Reflow and Thermal Mass Effects

    155

    225

    96

    208

    87

    195

    68

    193

    Dwell Peak

    SOJ2B25 mm SBC

    32.5 mm SBC44 mm SCC

    250

    200

    150

    100

    50

    200

    150

    100

    50

    0

    Dwell>138C(seconds)

    PeakTemp

    erature(C)

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    2.7.3 Reflow Techniques

    Solder reflow can be accomplished in convection, vapor-phase, and infrared (IR) ovens. Convection ovens

    are the type most widely used within IBM, and provide very uniform temperatures across a module. The

    temperature delta is typically 35C from the center to the edge of a 32.5 mm module with uniform ramp

    rates.

    IR ovens often provide less uniform heating, and are affected more by package emissivity and areas of large

    thermal mass. As a result, the module temperature from the center to the edge of the module is less uniform.

    For example, on one card design in which 50 CBGA modules created a very high thermal mass, the unpopu-

    lated area of the card had to be shielded in the IR oven to prevent laminate overheating. However, this does

    not preclude using IR ovens with CBGA modules; simply use caution to ensure that all assembly joints are

    within the appropriate reflow specification.

    Thermal profiles for 25 mm CBGA module in a convection and IR oven are shown in Figure 2-14and Figure

    2-15on page 27, respectively. The profiles shown were established using the same high thermal-mass profile

    card. The peak profile trace is the card surface, and the other traces are for different CBGA module joints.

    Note that the IR profile is less uniform and has a longer dwell time above reflow for this particular card.

    Figure 2-14. 25 mm CBGA Thermal Profile in Convection Oven

    15

    99

    183

    267

    Te

    mperature(C)

    -->Sample 1 = 45

    Sample 2 = 339

    Sample 3 = 367

    1 2 3 4

    Sample 4 = 480

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    The IR profile shown in Figure 2-15includes an additional trace for the thermal grease under the CBGA cap.

    In this case, the peak temperature for the thermal grease is 152C.

    A study determined that the use of anodized aluminum caps increases heating rates in IR reflow ovens, and

    significantly improves module-temperature uniformity. Using the anodized aluminum caps is an example of

    package emissivity improving heating characteristics [reference 14]. Although anodized caps are not required

    in any application, understanding this concept could be beneficial in future packages. Similar results were

    observed with workboard holders (board fixtures) designed specifically to facilitate IR oven heat transfer.

    Vapor-phase ovens were used in early development work. In another study, a solder-joint reliability compar-

    ison using IR and vapor-phase reflow ovens found no ATC performance difference [reference 8]. A typical

    vapor-phase oven thermal profile is shown in Figure 2-16.

    Note that IBMs 32.5 mm CBGA package technology qualification used a convection reflow oven.

    IBM typically uses nitrogen atmospheres to facilitate good solder wetting and proper fillet formation. Choosing

    air or nitrogen atmospheres is specific to manufacturing philosophy, paste and solder mask choices, and so

    on.

    Figure 2-15. 25 mm CBGA Thermal Profile in IR Oven

    Figure 2-16. Vapor-Phase Reflow Oven Thermal Profile

    Temperature(C)

    13

    97

    181

    265

    -->

    Sample 1 = 45 Sample 2 = 339Sample 3 = 367

    1 2 3 4

    Sample 4 = 480

    Time (seconds)

    250

    200

    150

    100

    50

    0

    Temperature(C)

    0 50 100 150 200 250

    Centach VPSFully-populated DSDP

    TC on SOT padConveyor = 30 fpmPH = 575F

    Preheat = 120C

    Peak = 218C

    Rampdown = 0.70C/second

    Dwell at 183C = 74 seconds

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    2.8 Cleaning

    IBM uses the Electrovert DI cleaner to clean under the 32 mm CBGA packages. Cleaning is strongly depen-

    dent on the flux materials to be removed. Cleanliness was verified by surface-insulation resistance (SIR) test

    results in which there where no fails [references 13 and 14]. See Figure 2-17on page 29 for a typical clean

    profile through IBMs assembly process development (APD) line Electrovert DI cleaner.

    Drying temperatures have been increased to 175C (350F) for CBGA products in APDs lab without detri-

    mental effects on other SMT components.

    Optimizing cleaning and drying parameters are manufacturer-specific. Assume that some fine tuning is

    required, and that standard SMT parameters might not be sufficient.

    2.9 Wave Solder

    CBGA modules are often used in conjunction with PIH components requiring wave solder. The following

    paragraphs describe some wave-solder considerations.

    2.9.1 Secondary Reflow

    If vias are not tented, the wave-solder molten solder can rise through the vias, transferring heat to BGA sites.

    The wave solder rarely fills all vias or causes the BGA sites to reach a molten state (secondary reflow). It is

    important to profile cards in the wave solder to determine if secondary reflow is occurring, especially when

    using thin cards or very thin modules.

    This secondary reflow can cause joint cracks. The reflow can be prevented by taping the back of the vias with

    polyimide tape or by using other shielding methods.

    BGA reflow during wave solder is not a concern in most card designs, and special precautions are unneces-

    sary. The 25 mm and 32 mm CBGA packages were both qualified on test vehicles that incorporated func-tional card features, and did not require any wave-solder protection.

    2.9.2 Card Warping

    Certain card designs might require fixtures or support to prevent severe warping as the card passes over the

    wave solder. Severe card warping can cause joint cracks.

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    Severe warping seldom occurs, but can be influenced by several factors, including card thickness, card size,

    and module location relative to PIH components. PIH components can stabilize areas of the card and create

    severe local warping. However, most card designs are unaffected by warping during wave solder and do not

    require any special precautions.

    2.10 Fixtures

    In general, CBGA assemblies do not require special fixtures through the assembly process. However, fixtures

    might be required in the following circumstances:

    To nest back-side modules while the front side of the card is being screened in a double-side process.

    To prevent severe warping across the wave solder (see Card Warpingon page 13), and to protect back-

    side BGA modules, if required.

    To prevent handling damage as parts proceed through the line if the cards are thin and prone to bending,

    especially when being removed from reflow ovens.

    As a manufacturing preference to standardize panel sizes with workboard holders.

    Fixtures typically consist of a simple frame with several support bars across the bottom of the frame. Fixtures

    can also be designed to enhance thermal characteristics, as described in Reflow Requirementson page 24.

    Note: Card assemblies are tested using torque testing at 0.024/mm (0.6/inch) for 25 cycles to ensure that

    all components can tolerate typical handling through card assembly, test, and next-level assembly. If the

    cards cannot withstand this torque testing, fixtures are recommended.

    Figure 2-17. 25 mm CBGA Aqueous Clean Profile

    Temperature(C)

    120

    100

    80

    60

    40

    20

    0

    PW SMT1 SMT2 PRR FR DIRD1 DIRD2

    Time (seconds)

    0 100 200 300 400 500

    Panel Leading Edge

    max = 106.9C

    SOIC Lead

    max = 102.3C

    SBC Edge

    max = 77.2C

    Panel Back Sidemax = 112.2C

    Panel Trailing Edgemax = 100.6C

    Water temp = 160 5CConveyor speed = 5.0 fpmDryer heaters = 375 4C

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    2.11 Assembly Inspection

    Visual inspection of all BGA joints is impossible for area-array products. However, a well-controlled SMT

    manufacturing line has such a low level of CBGA assembly defects that even if a 100% visual inspection were

    possible, it is likely that only a sampling inspection plan would be used.

    Outer-row inspection can be used to check for solder wetting, fillet size, and self-aligning. Proper oven

    profiling and solder paste control help ensure good joint formation under the module.

    An ideal CBGA solder joint is characterized by a smooth transition between the CBGA ball and the edge of

    the solder, indicating positive solder wetting. The solder is smooth and shiny, filling the area under the ball

    completely. See Figure 2-18.

    Transmission X-ray can be used to identify solder bridges (an extremely low-level defect) or to track product

    through line ramp-up. X-ray laminography is more sophisticated, and can also be used to detect opens [refer-

    ence 6]. However, both techniques are expensive, and are not necessary for high-volume CBGA manufac-

    turing. These techniques are often used on a sampling or maverick lot basis, such as a card solderability

    problem.

    Electrical or in-circuit test can be used to detect assembly defects as well as module fails.

    In summary, good process control is required to achieve high product yield and reliability in the absence of

    100% visual inspection.

    2.12 Joint Reliability

    2.12.1 Solder Fatigue

    The reliability of solder-ball connections is driven by the CTE mismatch between the ceramic (67 ppm/C)

    and the epoxy-glass PCB (1721 ppm/C) [reference 19]. The stresses in the solder joints are highest at the

    corners of the ceramic, or at the greatest distance from the neutral point (DNP), and decrease towards the

    neutral point (typically, the module center), where the stresses are essentially zero. See Figure 2-19on page

    31, which shows displacement modeling for a quadrant of a 25 mm CBGA package. The strain increase is

    depicted in Figure 2-20on page 31.

    Figure 2-18. Outer Row Solder-Joint Visual Inspection (1.00 mm Pitch)

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    In Figure 2-20, Moire interferometry is used to measure the displacement of the CBGA joints as the product

    goes through a thermal cycle. A reference pattern is placed on the module, and the displacement of this

    pattern is measured during heating. Note that the pattern at the center of the module is essentially undis-

    turbed while the displacement increases dramatically further from the center, and reaches a maximum at the

    corner joints. The displacement can be used to calculate strain in the joints.

    Solder joints from a 32.5 mm module, cycled over 3,000 cycles, are shown in Figure 2-21 on page 32. The

    two joints are from the same module; the highly-fatigued joint is located at the highest DNP (corner), while the

    unaffected joint is from the center of the module, where the stresses are extremely low.

    Figure 2-19. 25 mm CBGA Deformation at 100C

    Figure 2-20. 32.5 mm CBGA Moire Interferometry Pattern

    0.40.30.20.10. 0

    0.4

    0.3

    0. 2

    0.10.0

    0.4

    0.3

    0.2

    0.1

    0.0Netsheardisplacement(MI)

    Ydim.from

    centroid(in)

    Xdim.fromcentroid(in)

    U Displacement Field

    V Displacement Field

    -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9

    Solder Ball Index, n

    U Displacement Field

    V Displacement Field

    -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9Solder Ball Index, n

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    Because CBGA solder-joint reliability is dependent on the solder ball location within the array, the failure rate

    of any specific design is a function of the I/O assignment within the array. In most cases, for large-body pack-

    ages, redundant power pins are relegated to the corner pins. Module layout should be completed in conjunc-

    tion with IBM so that joint reliability is considered along with module performance.

    Thermal-cycle fatigue under accelerated testing (0 to 100C ATC) occurs through the eutectic fillets at the

    module and card joints. Highest strains occur on the outboard side of the module-side joint, and on the

    inboard side of the card-side joint. The first failure is usually on the card-side fillet. See Figure 2-21 and

    Figure 2-22on page 33. The card-side joint should be optimized to maximize product reliability. High first-

    pass yields are a beneficial by-product of the higher reliability.

    Figure 2-21. Joint After 3000 Cycles 0 to 100C. (Top image shows corner joint. Bottom image shows neutral pointjoint.)

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    Solder fatigue is also a function of application conditions. Product-life predictions vary with application envi-

    ronments, and are provided by IBM. CBGA products have been qualified for a wide range of application

    conditions.

    2.12.2 Design Variations

    2.12.2.1 Finite Element Model

    The finite element model (FEM) was exercised to examine both geometry and material properties to promote

    sound package design. This model predicts the high strains at the corner joints, which in turn is verified by

    Moire interferometry measurements and ATC empirical data. The data from these three techniques can be

    used to develop a very robust design, one that can be easily evaluated for deviations; for example, changes

    in material or pad diameter.

    The FEM was used to evaluate alternate paste compositions, which could potentially change joint stiffness.

    The study concluded that the 10/90 Sn/Pb high-melt ball with eutectic solder joining the module and cardprovided the most robust design.

    2.12.2.2 Joint Standoff

    CTE mismatch must be accommodated by the CBGA interconnection. Modeling shows that the higher the

    joint standoff, the greater the ability to accommodate the CTE mismatch. The 0.89 mm (0.035 inches) high-

    melt ball creates a standoff suitable for high reliability, while preventing the likelihood of shorting between the

    solder balls.

    Figure 2-22. 25 mm CBGA Corner Joint Stress Distribution at 100C

    Critical Region: Outboard at ceramic

    Critical Region: Inboard at cardCritical Region: Inboard at card

    Critical Region: Outboard at ceramic

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    Plastic ball grid array (PBGA) packages use eutectic solder, which provides a collapsible joint, similar to a C4.

    Studies [reference 9] have shown that the all-eutectic joint on the ceramic material have markedly less reli-

    able performance than the IBM-qualified high-melt ball. The lack of a standoff when the eutectic ball collapses

    makes it difficult to accommodate CTE mismatch. When an artificial standoff is used to stretch the eutectic

    solder (preventing collapse and fixing the joints at 0.89 mm), the eutectic-joint reliability is very similar to high-melt solder ball reliability. See Figure 2-23.

    Reducing the standoff height is not recommended. However, an increase in standoff height could be benefi-

    cial with respect to reliability. Ceramic column grid array (CCGA) packages provide a solution. A tall, flexible,

    high-melt solder column is used instead of a solder ball in these packages, and can increase solder-joint reli-

    ability by 10x. These packages allow ceramic packages to be used for larger package-body sizes and in more

    aggressive application conditions. More information on CCGA assembly is available in the IBM Ceramic

    Column Grid Array Assembly and Rework Users Guide.

    2.12.2.3 1.27 mm Pitch CBGA

    Test Vehicle Design

    Test hardware used for card-assembly development and reliability testing incorporates information from

    modeling and known product applications. Continuity rings are stitched in concentric circles at various DNP

    levels to collect test data as a function of location. Most CBGA reliability data was collected from test-card

    thicknesses of 1.4 mm (0.054 inches), 1.8 mm (0.072 inches), and 2.3 mm (0.090 inches). Although four-

    point readouts are available on some designs, most test vehicles are designed from both ATC and SIR

    testing. The process flows used include double-side surface mount with BGAs on the top side, double-side

    with CBGA on both sides, and a hybrid in which the BGA used must be compatible with wave-solder

    processing.

    One of the most widely-used CBGA test vehicles in IBM is the 32.5 mm CBGA test vehicle. See Figure 2-24

    on page 35 and Figure 2-25on page 35. This test vehicle includes:

    Six 32 mm CBGA modules. Each module has 625 I/Os (25 x 25 array on a 1.27 mm pitch).

    Twenty DNP stitch rings per module.

    ATC and SIR testing.

    Figure 2-23. Number of Cycles to Failure for Eutectic and 10/90 Sn/Pb Solder Balls

    Ball

    100

    80

    60

    40

    20

    00 200 400 600 800 1000 1200 1400

    CumulativeFail(%)

    Group I3/97 Sn/Pb Ball

    Group II10/90 Sn/Pb Ball

    Cycles

    Test 0 to 100C, 3 cycles/hour

    34/24 pad ratio4-point data

    Eutectic without standoff

    Eutectic with standoff

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    A standard 1.8 mm card thickness.

    A 6S4P cross section.

    PIH connectors.

    SMT dummy components on both sides of the cards.

    For a listing of other available test vehicles, see Appendix C. Test Vehicleson page 73.

    Figure 2-24. 32.5 mm ATC and SIR Test Vehicle Card Layout

    Figure 2-25. 32.5 mm CBGA Module Site on Test Vehicle with DNP Rings

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    Stress Database

    The 1.27 mm pitch CBGA reliability databases include the information described in the following paragraphs.

    ATC (1.27 mm Pitch CBGA)

    Accelerated thermal cycling (0 to 100C and 20 to 80C) has been used for the majority of CBGA stressing

    [references 13 and 14]; two cycles/hour is typical. The cycle extremes were chosen to ensure that the failure

    mechanism occurring is the same as that occurring under field conditions. Because this is the case, the

    cycles-to-fail data can predict field life using the Coffin-Manson relationship. This relationship was verified by

    comparing the predicted acceleration factor to that obtained empirically between two test conditions. See

    Figure 2-26. The data shown in the figure fits a lognormal distribution characterized by the parameters mu

    and sigma ( and ).

    Coffin-Manson predicts a 3.2x acceleration factor between cycles-to-fail for the two test conditions; this

    prediction is supported by the empirical data using a 25 mm CBGA (see Appendix D. Coffin-Manson Acceler-

    ation Factoron page 75).

    A standard ship shock of 40 to 60C for 10 cycles is used to precondition all test hardware. CBGAs on the

    test vehicles are purposely cycled until they fail to obtain the data necessary for extrapolation using the

    Coffin-Manson relationship. These failures do not indicate low reliability; in fact, the ATC fatigue failures occur

    in a very predictable and repeatable manner, correlating to product design and the assembly process. This

    correlation indicates that assembly process controls help ensure highly reliable and predictable product.

    SIR (1.27 mm Pitch CBGA)

    Assemblies from both water-soluble and no-clean processes are routinely tested at 50C, 80% relative

    humidity (RH), and 15 V for at least 300 hours. No fails have occurred for the qualified materials (paste,

    solder mask) and cleaning processes.

    Critical Reliability Parameters

    As described in Finite Element Modelon page 33, the FEM was used to evaluate variations in product design.

    The model predicts that pad size can significantly affect reliability.

    Figure 2-26. Coffin-Manson Relationship Verified Using Two Test Conditions

    32 ppm

    2.0 2.5 3.0 3.5 4.0

    0.14%

    2.3%

    15.9%

    50%

    84.1%

    2

    1

    0

    (1)

    (2)

    (3)

    (4)

    3.6x

    2.86x

    Log Cycles

    0 to 100C data, 80 modules 20 to 80C data, 40 modules

    CumulativeModuleFails

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    To verify this prediction, a 25 mm CBGA evaluation included pad sizes ranging from 0.610.71 mm (0.024

    0.028 inches). The evaluation concluded that pad sizes less than 0.66 mm (0.026 inches) produced unsatis-

    factory product reliability.

    The study also included two solder-paste volumes, controlled by the stencil design and monitored by total

    paste weight. Although determining the solder-paste volume using these techniques is not as accurate as

    using solder-paste volume measurement tools (which were not available at the time of the study), there was

    an obvious relationship between solder volume and reliability. For example, a lower solder-paste volume

    reduces the number of cycles to failure (increases the cycle-to-fail sigma), which in turn increases the proba-

    bility of early failures.

    A thorough evaluation of the solder-paste volume and pad sizes using a 32.5 mm ATC test vehicle [reference

    11] was conducted. Earlier studies indicated that for small pad sizes, pad size was a more significant impact

    on reliability than solder-paste volume, but the evaluation for larger pad sizes was incomplete.

    The objectives of the evaluation for the larger pad sizes were to:

    Verify critical parameters, solder-paste volume, and pad size for the card joint

    Establish a predictive model for cycles-to-fail based on the critical parameter distributions

    Optimize the critical parameters within manufacturing-line constraints

    The evaluation design matrix is shown in Table 2-2on page 37. Note that because it was difficult to obtain the

    entire range of solder-paste volumes on one stencil without using a step-down stencil, two stencils were

    used.

    The first stencil, used for the lower solder-paste volumes, was 0.20 mm (0.008 inches) thick. The second

    stencil, used for the higher solder-paste volumes, was 0.25 mm (0.010 inches) thick. The apertures in both

    stencils were 0.34 mm (0.025 inches), 0.76 mm (0.030 inches), and 0.89 mm (0.035 inches) in diameter to

    achieve the desired solder-paste volumes.

    The parts were cycled from 0 to 100C at 1.5 cycles/hour until enough failures occurred to make the analysis

    statistically valid. After cycling, the cycles-to-fail data for each DNP ring was fit to a lognormal distribution

    using the multiple-censored maximum likelihood analysis method. Typical lognormal probability plots are

    shown in Figure 2-27on page 38 through Figure 2-29on page 39. These plots also illustrate the relative

    effects of DNP, pad size, and solder-paste volume.

    Table 2-2. Critical Parameters Matrix

    ModulePad Diameter (mm)

    Printer Solder Volume (cubic mm)

    Stencil One Stencil Two

    Target Actual Target Actual Target Actual

    1 0.79 0.760.047

    0.049

    20.69

    0.67 0.050

    3 0.660.078

    0.0750.110

    0.102

    40.79 0.76

    0.072 0.100

    50.110

    0.1000.140

    0.166

    6 0.69 0.66 0.110 0.141

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    Regression analysis was performed on the lognormal mu and sigma parameters. Models for the number ofcycles to 50% fail (N50) and the number of cycles to 5% fail (N5) were derived using solder-paste volume,

    pad size, and DNP as independent variables. Figure 2-30on page 39 shows three-dimensional surface plots

    predicting N50 and N5 for pad size and solder-paste volume at a fixed DNP. These plots illustrate that solder-

    paste volume is the most critical parameter.

    Figure 2-27. 32.5 mm CBGA Cycles-to-Fail for Various DNPs

    Figure 2-28. 32.5 mm CBGA Cycles-to-Fail for Various Pad Sizes

    DNP = 21.6 mmDNP = 16.3 mmDNP = 15.5 mm

    100 1000 10000

    99

    95

    9075

    50

    25

    105

    1

    0.1

    0.01

    ATC Cycles to Fail

    CumulativeFails(%)

    Small Pad (0.660 mm)Large Pad (0.762 mm)

    ATC Cycles to Fail

    Cumulative

    Fails(%)

    100 1000 10000

    99

    9590

    75

    50

    25

    105

    1

    0.1

    0.01

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    Increasing solder-paste volume increases reliability, but only to a point. When the paste volume passes 0.16

    cubic mm (10,000 cubic mils), reliability no longer increases because the solder paste has filled the area

    between the ball and the card. Additional solder paste moves up the ball toward the module, making the ball

    look like a column.

    When the fillet dimension at the card surface is maximized, so is the reliability. See Figure 2-31 on page 40,

    in which small and maximized solder fillets are illustrated. The minimum fillet diameter specification is 0.61

    mm (0.024 inches). This specification is met with a 56 sigma repeatability when the specified pad diameterand solder-paste volumes are used. Note that if the pad diameter increases, the required solder volume

    increases to prevent neck-down of the fillet as the solder wets the larger pad.

    The 0.16 mm solder-paste volume corresponds to the volume at which solder bridging can occur. See Print

    Requirementson page 17.

    Figure 2-29. 32.5 mm CBGA Cycles-to-Fail for Various Solder Volumes

    Figure 2-30. N50 and N5 for Solder-Paste Volume and Pad Size with Fixed DNP

    N50 Surface Plot N5 Surface Plot

    Low Solder VolumeMedium Solder VolumeHigh Solder Volume

    ATC Cycles to Fail

    CumulativeFails(%)

    100 1000 10000

    99

    95

    9075

    50

    25

    105

    1

    0.1

    0.01

    3000

    2500

    2000

    1500

    1000

    500

    .66.71

    .76.81

    (26)(28)

    (30)(32)

    LowMedium

    High

    SolderVolume

    Pad Sizein mm (mils)

    AttachedCycles-to-Failure

    3000

    2500

    2000

    1500

    1000

    500

    .66.71

    .76.81

    (26)(28)

    (30)(32)

    LowMedium

    High

    SolderVolume

    AttachedCycles-to-Failure

    Pad Sizein mm (mils)

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    The second-order polynomial regression models described on page 38 were constructed using average

    solder-paste volumes and pad diameters. These parameters vary in actual product. To reflect this variability

    in the N50 and N5 models, a Monte Carlo simulation was developed to predict ATC cycles-to-fail given solder

    volume distribution, pad diameter distribution, and DNP.

    Figure 2-32shows a sample output in which the pad-size distribution is the same for all three curves, but the

    solder-paste volume distribution is changed by altering the standard deviation of the distribution. A low

    solder-paste volume was used for demonstration. Note that a very high standard deviation, indicating poor

    print control, increases the probability of early fails.

    Figure 2-31. Small Fillet and Optimized Fillet(Top image shows a small fillet. Bottom image shows an optimizedfillet.)

    Figure 2-32. Simulated Cycles-to-Fail

    Low Solder-Paste Volume

    Medium Solder-Paste Volume

    High Solder-Paste Volume

    10 100 1000ATC Cycles-to-Fail

    Cumulative%Fail

    99.99

    98.99

    99

    95

    90

    75

    50

    25

    10

    5

    10.1

    0.01

    0.001

    0.0001

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    2.12.2.4 High-Performance Glass Ceramic

    High-performance glass ceramic (HPGC) CBGA substrate material has a low dielectric constant and CTE

    match of the package to the device which allow for packaging large, high-power devices. Recently, HPGC

    has been assembled with standard CBGA assembly parameters and tested in the 32.5 mm package size.

    Testing of the package assembled on two card pad sizes, 28.5 mm and 32.0 mm, at 0/100C ATC, resulted

    in a higher fatigue life (N50) for the larger pad size:

    2.12.2.5 1.00 mm Pitch CBGA

    Test Vehicle Design

    A white ceramic 32.5 mm CBGA test vehicle with a 31 x 31 ball array pattern (937 I/Os) was developed to test

    the structure and processes for a 1.00 mm pitch CBGA package. Each of the four corners was depopulated

    by six balls, similar to the 1.00 mm pitch CCGA. The substrate thickness is 2.4 mm.

    IBM chose to use a 0.8 mm diameter solder ball for improved reliability over the 0.7 mm diameter solder ball

    that is specified by JEDEC in MO-156 and MO-157. Other physical dimensions contained in the JEDEC

    outline specifications are followed.

    The PCB ground rules and dogbone pad dimensions for this test card were the same as those optimized for

    the 1.00 mm pitch CCGA. (See Figure 2-2on page 13.) The 6S4P (9 x 11 inches) test card included:

    Five sites for 1.00 mm pitch 32.5 mm CBGAs One control 1.27 mm pitch CBGA site

    See Figure 2-33.

    Table 2-3. Fatigue Life Test for TV738 CBGA

    Card Pad N50

    28.5 mm 480

    32.0 mm 710

    Figure 2-33. Test Card Layout

    1.00 mmU3

    1.00 mmU2

    1.00 mmU1

    1.00 mmU4

    1.00 mmU6

    1.27 mm

    U5

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    Nine daisy chain rings were wired to connect the pairs of I/Os on the package with pairs of I/Os on this card.

    The outermost ring contained the I/Os on the diagonal of each corner. The other rings were design concentri-

    cally with similar DNP in each ring. See Figure 2-34.

    Stress Database

    The 1.00 mm pitch CBGA reliability databases include the information described in the following paragraphs.

    ATC

    Initial testing indicated that solder-paste volume affected fatigue life, so a qualification matrix was defined to

    further evaluate the effect of card-side solder-paste volume and to compare the 0.8 mm and 0.7 mm diameter

    assemblies. See Table 2-4on page 43.

    Table 2-5on page 43 shows the results of the 55 to 110C, 1 cycle-per-hour cell with lidded 0.8 mm diam-eter assemblies. The high solder-paste volume cell is statistically better than the medium solder-paste

    volume cell; however the higher solder-paste volume produced some solder bridging.

    Figure 2-34. 1.00 mm Daisy Chain Ring Pattern Showing the Module and Card Wiring

    A01

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    SIR

    No IR fails were generated by the qualification matrix testing. Results are shown in Table 2-6.

    2.12.2.6 Double-Side CBGA

    Tests performed on CBGA modules placed on the front and back of PCBs included the following parameters:

    32.5 mm CBGA placed on the front and back of a circuit test card, spaced apart

    32.5 mm CBGA placed on the front and back of a circuit test card, directly back-to-back with shared vias

    119 I/O SRAM CBGA placed on the front and back of a circuit test card, back-to-back with shared vias.

    Table 2-4. Assembly Card-Side Solder-Paste Volume Comparison (0.8 mm and 0.7 mm Diameter)

    Solder-Side Pad/Ball Diameter 0.8 mm/0.8 mm 0.7 mm/0.7 mm

    Lid Yes No Yes

    Shock and Vibration Preconditioning Yes No Yes No

    Ball Attach Process Prime Rework Prime

    Card Attach Process Prime Rework Prime

    Solder-paste Volume 5500 cubic mils max 4500 cubic mils max 4000 cubic mils max

    Thermal Cycle Stress Conditions0 to 100C,

    2 cycles/hour55 to 110C,

    1 cycle/hour0 to 100C

    Total Quantity 140 35 40

    Table 2-5. Thermal Cycle Stress Results (32.5 mm, 55 to 110C)

    Cell Quantity First Fail (Cycles) N50 (Cycles) Sigma1.27 mm Controls 7 200 260 0.18

    1.0 mm, Medium Solder-Paste Volume 10 150 220 0.13

    1.0 mm, High Solder-Paste Volume 25 150 260 0.18

    Table 2-6. Cycles-to-Fail Data, N50/Sigma

    Solder-Side Pad/Diameter 0.8 mm/0.8 mm

    Lid Yes

    Shock and VibrationPreconditioning

    No

    Ball Attach Process Prime Rework

    Card Attach Process Prime

    Solder-Paste Volume 5500 cubic mils max

    Temperature Humidity BiasStress Conditions

    50C, 80% RH, 15 V bias

    Duration 600 hours

    Total Quantity 30

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    The results of 32.5 mm CBGA stress testing are shown in Table 2-7. The calculated N50 for the shared-via

    module is lower than the N50 for the module without a module directly behind it. However, the modules that

    are spaced apart show little significant difference in cycles-to-fail to the modules placed front-to-back. In

    Figure 2-35, the front and back solder joints show little difference with respect to standoff, joint structure, and

    lead dissolution.

    The same trend was observed in smaller SRAM CBGA modules. IBM believes that the presence of a CBGA

    module directly opposite another on the other side of the card creates higher solder-joint stress during ATC

    cycling, and as a result, the number of cycles-to-fail is lower. Consequently, do not assume that modules

    placed back-to-back on a PCB will match the single-sided CBGA reliability.

    2.12.2.7 Stres