Expt. No. 4

CASCADE AMPLIFIER

Objective: The aim of the experiment is to study the operation of cascade amplifier and obtain the frequency response and bandwidth

Components and equipments required:

1. Oscilloscope (Scope/CRO).2. Function Generators (FG).3. DC power supply.4. Project Breadboard. 5. Resistors.6. Capacitors. 7. SL100 BJTs8. Connection Wires. 9. Oscilloscope Probes.

Circuit diagram:

Fig. 1

Theory:

A single stage of amplification is not enough for a particular application. The overall gain

can be increased by using more than one stage, so when two amplifiers are connected in such a

way that the output signal of the first serves as the input signal to the second, the amplifiers are

said to be connected in cascade. The most common cascade arrangement is the common-emitter

RC coupled cascade amplifier. Common-emitter amplifier exhibit high voltage, high current, and

high power gains, so they are very familiar than other configurations.

Multistage amplifiers can be used either to increase the overall small signal voltage gain,

or to provide an overall voltage gain greater than 1, with a very low output resistance. Figure 1

shows an RC-coupled cascaded amplifier. Capacitors C1 and C2 couple the signal into Q1 and Q2,

respectively. C3 is used for coupling the signal from Q2 to its load. If the operation of coupled

amplifiers is considered, a complicating factor appears. The addition of a second stage may alter

the characteristics of the first stage and thus affect the level of signal fed to the second stage.

To compute the overall gain of the amplifier, it is easier to calculate unloaded voltage

gain for each stage, then including the loading effect by computing voltage dividers for the

output resistance and input resistance of the following stage. This idea is illustrated in figure 2.

Each transistor is drawn as an amplifier consisting of an input resistance R in , an output

resistance, Rout along with its unloaded gain, AV(NL).

Fig. 2

Then, the overall loaded gain , of this amplifier can be found by:

Av=Av 1 Av 2( R¿ 2

Ro1+R¿2)( RLRL+Ro2

)For the RC Coupled (CE - CE) multistage amplifier with CE:

R¿ 1=R1∨|R2|∨βr e1

R¿ 2=R3∨|R4|∨βre 2

Ro1=RC 1∨¿ R¿2 and Ro2=RC 2∨¿ RL

Note that if a load resistor was added across the output, an additional voltage divider consisting

of the output resistance of the second stage and the added load resistor is used to compute the

new gain.

If R¿ 2≫Ro1 and RL≫Ro2

Av=Av 1 Av 2

DC Analysis: For 1st stage amplifier:

IB1=V th 1−V BE1

Rth 1+(1+β ) RE1

Where, V th 1=V R 2=V B1=V CC R2

R1+R2 and

Rth 1=RB 1=R1∨¿R2

V CE 1=V CC−IC 1(RC 1+RE1)

IE1=V B1−V BE1

RE1

Stability factor S=1+RB1

RE1

For 2nd stage amplifier the analysis is same.

AC Analysis: For 1st stage amplifier:

Voltage gain, Av1=−gmRo1

Input resistance, R¿ 1=RB1∨¿ rπ

Output resistance, Ro1=RC 1∨¿ R¿2

For 2nd stage amplifier:Voltage gain, Av2=−gmRo2

Input resistance, R¿ 2=RB2∨¿ rπ

Output resistance, Ro2=RC 2∨¿ RL

Design:

Given that

V CC=15V , IC 1=1mA , IC 2=3mA , RL=100k Ω, Av1=20dB , Av 2=25dB , lower 3dB frequency f L=100Hz ,Stability factor S=10

For 2nd stage amplifier:

gm=?

RC 2=? (Use a 100k pot in series with RC2 to get required gain with less distortion at

output)

RE2=?

R3=?

R4=?

From the above design find Ro2=? , R¿2=?

For 1st stage amplifier:

gm=?

RC 1=? (Use a 100k pot in series with RC1 to get required gain with less distortion at

output)

RE1=?

R1=?

R2=?

From the above design find R¿ 1=? and Ro1=?

For capacitors:

ωL=1

C1 rπ 1

,ωL=1

C2(Ro1+R¿2),ωL=

1C3(Ro+RL)

,ωL=1

CE1' r π1

,ωL=1

CE2' r π2

Where CE=(β+1)CE'

Pre-lab Assignments:

1. Find the Q-point of each stage of the circuit shown in fig.1, where R1 = R3 = 20kΩ, R2

= R4 = 10kΩ, RE1=RE2= 1kΩ, RC1=4kΩ, RC2=1kΩ VCC = 15V, VCE1= VCE2=0.2V, VBE1= VBE2=0.6V

2. Re-design the components of the circuit shown in fig. 1 for fL=1kHz3. Define Power gain, Voltage gain and Current gain. How it represent in dB?4. What is transition frequency of transistor? Give the typical value for the given

transistor. 5. Simulate the circuit given in experiment using SPICE. Compare designed and

simulated dc biasing conditions, show input and its corresponding output wave forms, plot frequency response and compare it with designed values.

Model Waveforms:Input Wave form:

Output Waveforms (1st stage and 2nd stage):

Tabular Column:

For Single Stage Amplifier:

v¿=1mV pp

Input Signal Frequency, f (Hz)

Output Voltage, vo

(vpp)Voltage Gain, Av Av in dB

For Two Stage Amplifier:

v¿=5 μV pp

Input Signal Frequency, f (Hz)

Output Voltage, vo

(vpp)Voltage Gain, Av Av in dB

Simulated Results:

First Stage

Mid band gain = 21.9dB

Lower cutoff frequency fL = 192Hz

Upper cutoff frequency fH = 4.3MHz

Bandwidth = 4.3MHz

Multi stage

Mid band gain = 46.3dB

Lower cutoff frequency fL = 257Hz

Upper cutoff frequency fH = 4.15MHz

Bandwidth = 4.15MHz

Viva Questions:

1. What are the requirements of biasing and coupling circuits in BJT amplifiers?2. What is the use of CE in RC coupled amplifier and give its influence in frequency

response?3. Give the advantages and disadvantages of cascade amplifier.4. What is half-power frequency?5. In amplifiers, why mid frequency gain is independent to frequency?6. What is bode-plot?7. What is the method to increase the output voltage swing of an amplifier?8. How load resistances influence the gain of BJT amplifiers?9. What is SPICE?