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19. Digital Controller Digital controllers are implemented in microprocessors or digital signal processors. This technology platform has

some impact on the possible frequency responses. However there is little difference in what can be achieved with

a digital controller and an analogue controller so long as good design care is taken.

Effectively a digital controller is simply a way to implement the required frequency response to perform loop

shaping design.

Figure 37 Schematic of Digital Control - The power converter is the DAC

How to choose the number of bits for the ADC

As always the number of ADC bits needs to be as high as possible. ADCs come in 8, 10, 12, 14, and 16 bit variants.

Which one is the right choice? Well the answer to this is that it is a trade-off between cost and precision.

Generally more cost gives more bits which means there will be smaller quantization across the across the signal

range.

It could be that the ADC choice is out of your hands. The processor that you are using may well come with twelve

bits. This has been the standard for power electronics orientated microprocessors for a long time. The C2000 Ti

series and the dsPIC have 12 bit ADCs. A number of ARM Cortex M3 aimed at power control also have 12 bit ADCS.

Generally 12 bits is enough. It may also be the case that your budget limits you to 12 bits or even 10 bits.

How to choose the dynamic range for the ADC

Given that you have a certain number of bits arranging them across the signal levels can be a difficult choice. If the

output voltage of the power converter is 12V and the precision requirement for the output is 2mV then spreading

the number of bits across the 12V means that the quantisation level is 12V/2mV which is 6000 steps across 12V.

The ADC needs at least 13 bits. Given that a number of bits may be lost to noise then 14 bits might suit.

Alternatively 16 bits could be used in which case the quantization is 183 micro volts.

It is unlikely that the power supply needs the 2mV accuracy when working through a transient so if the output is

only 5V then the precision is perhaps wasted.

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There is also a requirement to deal with voltage higher than 12V. Possibly the highest voltage on the output may

be 17V. In this case achieving the required precision of 2mV at 12V means that the number of steps is 8500. To

achieve this 13 bits is no longer enough.

In the case of current control this dynamic range issue can be very difficult as the short circuit current can be

significantly larger than the normal operating current.

Extending the precision of the ADC is possible by using two ADC channels. By using a high pass filter with a low

frequency cutoff and gain on one ADC analogue input a higher precision digital signal is now available. The other

channel with the full dynamic range is low pass filtered. Internal to the controller the high passed signal is added

to the low pass signal creating a significantly higher precision signal.

How to choose the ADC

ADCs have a sample and hold which has a capacitor. They also have a time when the sample and hold shuts and

charges the capacitor. Then the sample and hold opens again. This is the aperture time and is a key ADC

parameter. It determines how much current has to flow into the capacitor. The transient response of the

analogue electronics driving the ADC sample and hold can appear in the digital representation of the signals.

Other things to note are that ADCs have internal clocks. As an example an SAR ADC is effectively self-clocking. This

clock rate is typically not controlled. This can lead to clock edges being simultaneous with power converter

switching. This is often the cause of single sample noise.

How to choose the signal conditioning

A low pass filter is required to prevent aliasing. Typically this is first order. The key thing to look for is the phase

shift in the control band. As the power converter is a low pass filter to the switching the anti-aliasing filter need

not be overly aggressive. In fact converter instability in digital control is often down to poor anti-aliasing filter

design.

Choosing the Op-amp in the signal conditioning

The key characteristic of the op-amp driving the ADC is the settling time. This is the time during which the current

into the sample and hold disturbs the op amp output voltage .

What if I cannot have an Op-amp

This situation is fairly common. The cost of an op-amp can be a show stopper . To deal with this treat the signal

conditioning as an impedance match to the ADC sample and hold. As the signal is in a power converter it is likely

that there is the possibility to have the driving impedance of the ADC low even if there is no op-amp. This means

make the resistors in the output voltage divider as low as possible. The resistors in a CT circuit will probably be

low.

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Choosing the processor – how much power? How many MIPS?

In order to determine how much power we need we first need to look at the control bandwidth required.

As a rule for a given cutoff frequency the total processing time for the control loop must not exceed a 10 degree

phase delay at the cutoff frequency.

What this means will become clear after we look at delay and how to do the processing.

Timer Precision – why it does not matter too much

The precision of PWM and Variable period oscillators is an area where it is entirely possible to achieve significant

benefit for minimal investment of processor time.

Consider a control system like that in Figure 37. For a variable frequency converter the power converter control

block is implemented as a timer that counts to the control value and then resets. The precision of the output

frequency depends on the timer clock and the target frequency.

As an example consider a 20MHz clock. The target output frequency range is 270kHz to 600kHz.

Output frequency Divide by for 40Mhz clock

270kHz 148

600kHz 66

This gives a range of 81counts in the divider or 6.35 bits of precision. Considering that the ADC had possibly 12 bits

and the internals of the processor could be 32 bits there is a loss of possibly up to 25 bits of precision. This is not

good.

The system to keep as much precision as possible is to keep the discarded bits that were not used and accumulate

them. When the accumulated sum of the unused bits overflows then the input to the variable period oscillator is

increased by 1 bit. This is called precision extension in a digital modulator. It is very useful when the timer

precision is lower than the control processing precision.

For those of you thinking about spectra - this systems is an auto dither or a whitening (actually pink) of the

spectrum. For in band noise reduction in the like of telco supplies where weighted noise is an issue this precision

extension modulation technique is very useful.

Precision extension is useful in any situation where there is the possible loss of bits.

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How it works.

Figure 38 Precision Extension for PWM and NCOs and VPOs

Figure 39 Extended precision PWM or VPO. By accumulating the lost bits the total precision is retained.

The Unit Circle and Pole Zero Plots

The unit circle is the imaginary axis of the s plane warped to take account of the frequency effect of sampling. As

such it is the stability boundary for the z-plane.

The unit circle is the stability boundary for z-plane.

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Useful pole zero combinations and frequency responses

By looking at some frequency responses and their pole zero z-plane equivalents we will build up a library of

frequency responses. Then these can be used to do loop shaping.

Integrator

Figure 40 Integrator frequency response

Figure 41 Integrator Poles and zeros