Nuclear Instruments and Methods m Physics Research A326 (1993) 228-233North-Holland

Calculation of the geometrical capacitance of silicon microstripstructures using a variational approachG. Hall, D. Vit& and R . WheadonBlackett Laboratory, Imperial College, London SW7 213Z, UK

A lower limit to the capacitance of strip-like detectors, for example microstrips, is set by the geometrical capacitance of theelectrodes . It is important to estimate this accurately so that proper account can be taken of additional effects such as surfacecharge layers m the device . We present a method for the calculation of multi-strip structure capacitances based on a variationaltechnique which avoids the need to solve Poisson's equation numerically m two dimensions for the structure m question . Instead,the solution is achieved starting from an approximate charge distribution function . This method is both simple to implement andefficient to run.

Experimental results from two types of test device are presented and compared with the calculations. Firstly, microstripstructures were produced, varying both width and pitch. Secondly, 5 mm square diodes with their surfaces divided into connectedstrips have been produced with a range of different strip pitches .

1. Introduction

With the growing emphasis on detectors in particlephysics moving towards high speed and high radiationtolerance, the capacitance of silicon microstrip detec-tors, both before and after irradiation, is an importantquantity which is a major limiting factor to the noise offast systems. Careful design of the geometry of thestrips will be necessary to ensure that good deviceperformance can be maintained throughout a longperiod of operation m a high radiation environment .There is also some uncertainty on the contribution tostrip detector capacitance from nongeometrical sources,such as surface charge layers, which can only be iso-lated if the geometrical value is well established .We have applied a variational technique used for

the calculation of simple microstrip transmission lineimpedances to the case of multistrip structures such asmicrostrip detectors . This technique is useful if thedominant contribution to the detector capacitance isgeometrical since it does not take into account thesemiconducting nature of the substrate.

2. The variational technique

The calculation method is based on variational de-termination of the line capacitance in the Fourier-transformed domain, using the charge density distribu-tion as the trial function [1] . The accuracy of thecalculated values is dependent on how closely the trialfunction approximates to the correct physicaldistribu-

I a+Q= /2f(x) dx .

ü1Z

0168-9002/93/$06.00 © 1993 - Elsevier Science Publishers B V. All rights reserved

tion . One major advantage of this method is that thecorrect value is an extremum of the calculated valuesand so, in this case, the calculated capacitance willalways be less than the correct value. It can also beeasily adapted to a wide range of detector configura-tions.

The general result from ref. [l] for a single stripseparated from an infinite conducting plane by a thick-ness h of dielectric with relative permittivity E,* is

C = ( ,7 QzE U»

-i~~(F(ß»zG(ß)H(ß) dß>

where F(/3) is the Fourier transform of the chargedistribution f(x) and G(/3) is given by

G(ß)=[Ißl{1+e* coth(Ißlh)) ]-' .

NUCLEARINSTRUMENTS&METHODSIN PHYSICSRESEARCH

Section A

The function H(ß) defines the contribution due to thethickness of the strip but, for the calculations in thispaper, the strips were assumed to be infinitely thinwhich results in H(/3) = I .Q provides the normalisation, and for a single strip

of width a is defined by

3. Application of the technique to microstrips

The method can be extended to multistrip struc-tures simply by choosing a suitable form of f(x) .Distributions of polynomial order from zero to four

were

investigated

(i.e .

f(x) a I x In

for

I x I < a/2,where a is the strip width), with the first order distri-bution proving to be consistently better than the othersfor all geometries tried . Fig. la shows the distributiongraphically for three strips on a pitch p. The transformof the charge distribution is

F(P) _ ~[2T cos(Pp) - 1]

x[~ (1 -cos(

ßa~) -a sin{

ßa~j*

To obtain the best estimate of the capacitance for achosen distribution, the value of C was maximised(using the program MINUIT [2]) by varying the chargefraction on each strip and evaluating the integral nu-merically over a suitably large range of ß . The valuecalculated is the capacitance of the central strip to allother conductors (i .e . the full strip capacitance) . Thefinal charge fractions on each strip allow the calcula-tion of the partial capacitances of the centre strip to itsneighbours, and the partial capacitance of the centrestrip to the backplane can be inferred by requiringcharge neutrality . In performing the minimisation, carewas taken to exclude unphysical solutions.

4. Reducing the capacitance of large area devices

Dividing the front surface of a large area diode intoconnected strips will lead to a reduction in devicecapacitance which, if large enough, could improve theresponse of detectors whose capacitance limits thereadout speed (although other factors such as in-creased charge collection time and increased bias volt-age required for full depletion should not be over-looked). This technique can be applied to such cases bynoting that the charge is shared uniformly between allthe strips . Fig. 16 shows the simplest case of M stripson a pitch p, for which the transform of the chargedistribution can be shown to be

2Q

( ßa ) f sin(M6p/2)

MPasin

2

sin(Pp/2)

5. Trenched structures

There has been some interest in so-called trenchedstructures where grooves are etched between mi-crostrips in order to reduce the interstrip capacitanceof the strips (this technique has also been used toreduce inter-element capacitances in microelectroniccircuits). By writing the boundary conditions in a peri-odic form it can be shown, with the aid of the Fourierconvolution theorem and in the limit of a large number

G. Hall et al. / Geometrical capacitance of Sc microstrip structures

(a) Mrcrostrips (order 1)

Yt

f(x) -TgIx+pl gl lxl -TgIx-pl

h

(c) Trenched devices

Eeff - I + (Er- I)a/p.

(b) Reduced-capacitance devices (order 0)

Yi

f(x)

q/Ma

q/Ma

q/Ma

q/Ma

q/Ma

q/Ma

(M strips)

Yt

p

a p _

Fig . 1 . Trial functions for the variational calculations .

of strips, that a trenched dielectric layer (fig . lc) be-haves formally like a layer with dielectric constant

This result can then be combined with the microstripcharge distribution functions to calculate the geometri-cal capacitance of such structures .

6. Results from microstrip calculations

h

--- - ---ih2

hl

229

Fig. 2 shows the most important characteristics ofthe variational calculation of microstrip capacitancesusing the first order charge distribution function (fur-ther details of this calculation technique and its resultscan be found in ref. [3]) . Graph 1 demonstrates that anintegration limit of 12 ,;r is sufficient for most cases,with 24-rr being completely certain . Graph 2 shows theeffect of increasing the number of strips (including thecentral one) considered in the calculation, for the caseof strips on a pitch of 50 Wm. In general it can be saidthat only the nearest and second-nearest neighbours,along with the backplane, contribute significantly tothe local capacitance . Graph 3 shows, again for stripson a pitch of 50 wm, that the total capacitance of astrip is only slightly dependent on the actual thicknessof the detector (even though the partial capacitances

V . SI MICROSTRIP

230

7. Experimental results

G. Hall et al. / Geometrical capacitance of Si mecrostrip structures

Integration limit / n

(N)

change much more). Finally, graph 4 shows that, for awide range of geometries, the strip capacitance can besimply parametrised in terms of the ratio of strip widthto strip pitch.

Initial tests of the calculations were made usingstrip patterns defined on a 30 cm long printed circuitboard. The strips were of various widths from 0.25 mmup to 1 mm, the board thickness being 1.5 mm and therelative permittivity 5.1 ± 0.1 (measured using an off-cut of the same board before etching) . The capacitancewas measured at fixed frequency of 100 kHz using aKeithley 590 CV analyzer . All connections to the PCBstructures were made using a probe station in order toavoid problems from unknown stray capacitance. Re-sults proved to be in full agreement with values pre-dicted, errors being at the level of a few percent anddominated by board etching tolerances .

In order to investigate the capacitance of actualsilicon microstrlps, several test structures were in-

pitch 50Nrn, h=300Iun,N=12

I-o- Width/pitch = 01--0 - Width/pitch =05-e- Width/ pitch = 0 7

2 4 6 8 10 12 14

Number of strips

(d)

Width/pitch

eluded on a detector production run at the Scnter forIndustriforskning in Oslo (table I lists the geometrieschosen). These structures each have nine DC-coupledp+strips, the outer two being joined by a narrow diffu-sion line at each end to form a guard structure.Probe/bond pads were placed outside the guard forthe 27 and 47 p,m strips (fig. 3) . For the smallest pitch

Table 1Mlcrostrip geometries tested

Fig 2. Variational capacitance calculations . (a) Function intergration, (b) number of strips, (c) detector thickness, (d) stripwidth/pitch .

25- etch 50Iun, 7 strips,N=24

V 20-wR.

e A-A

v15-

GR 10 -VR !; 0 0

U 05- -o- Width/pitch = 01

l-a- Width/pitch =05

00-n- Width/pitch = 0 7

I100 200 300 400 500

(C) Thickness (Itm)

175 strips, h=300Inn, width/pitch=0 5 25-

E 16-V V 20-rzR. 15-

wa.

15-

c14- 10

V .VRS1 .

Û13 --~ 50ttm pitch

R.05

-e- 100ttm pitch U-o- 2501tm pitch

12 I 1 000 5 10 15 20 25 30 0

Strip width [p m] Strip pitch [pml Strip length [cm]

27 40 3.827 80 3.827 120 3.827 160 3.847 100 3.847 140 3 847 180 3.8107 120 1 .45107 160 1 .45147 160 1 .45147 200 1 .45

P-type

G . Hall et al. / Geometrical capacitance of Si microstrip structures

z

7771-7171-11-777

(b) Measurement of mterstrip capacitance

Metallisation

Fig. 3 . Microstrip structure for capacitance measurements .

structure (27 p rn width, 40 win pitch), the three stripson either side of the central one were also connectedin common by a narrow metallisation line at each endwhich meant that the individual interstrip contribu-tions could be not be measured separately .

(a) Measurement of capacitance to backplane

ElectrometerBias Supply

Output~---- ----CV

input Analyser

Fig . 4. Measurement of microstrip capacitances . (a) Measurement of capacitance to backplane. (b) Measurement of inter-

strip capacitance .

û._P.0

a_mVr3Q.n

a.

ch

8. Microstrip measurements

In order to measure the total capacitance of realmicrostrip structures, it is simplest to measure thepartial capacitances individually and then to sum them .Once again, the capacitance was measured at the fixedfrequency of 100 kHz using the Keithley 590 CV anal-yser . It is not expected, at least before irradiation, thatthe capacitance will vary significantly over the fre-quency range of interest .

Fig. 4 shows the measurement configurations . Inorder to measure the capacitance to the backplane (fig .

30

25-

20 -J

to-

Strip width 27pm, pitch 80pmj- Total strip capacitance

Capacitance to backplane---- Capacitance to nearest neighbours-- Capacitance to second-nearest neighbours- Capacitance to third-nearest neighbours

Strip width/strip pitch

231

-

I

I0 20 40 6o so loo

Bias (Volts)

Fig. 5 . Variation of strip capacitance with bias .

Linear ht to 27pm and 47pm data1 00 + 1 32' (Width/Pitch)

Fig . 6. Comparison of microstrip capacitance with calcula-tions .

V. SI MICROSTRIP

05 - o 27pm stnp, Mmcap 27pm47pm stops - Mmcap 47y-

c 107pm str~ps -- Mmcap 107p-147ym str:p - Mmcap 1474m

00 I I I I I00 02 04 06 08

232

4a), the bias is applied to the front surface, through theCV analyser output for the central strip and directlyfor all the others. The backplane is connected to theinput of the CV analyser . The bias is supplied by aKeithley 617 electrometer/bias supply with the wholesystem under IEEE488 control from a Macintosh IIcomputer . All measurements were again made on aprobe station . For interstrip capacitances (fig . 4b), thecapacitance is measured between the centre strip andpairs of neighbouring strips whilst the bias is applieddirectly to the backplane. The CV output is connectedto the central strip, the CV input to the pair of stripsunder investigation, and all other strips are connecteddirectly to ground .

9. Microstrip results

Fig. 5 shows the variation of capacitance with biasfor one of the structures (it should be noted that the

a2

'Vro4.wvVr._ro

. VroaroU

C0

rou.vV

Vro

Û

(a)

Pitch (gm)

08

Ob

0 .4

02

00

G. Hall et al. / Geometrical capacitance of'St mtcrostrnp structures

120 140 160 180 200

Pitch (iim)

bias voltage for the centre strip to the backplane wasactually negative) . At very low bias the depletion depthis small and so the total capacitance is dominated bythe centre strip to backplane capacitance . As the biasrises, and the depletion depth increases, the interstripcapacitance starts to become more significant . It canalso be seen from fig . 5 that the interstrip capacitancecontinues to fall steadily beyond full depletion butsince, for these measurements, the bias range waslimited to ±100 V it is better to compare values undersimilar conditions and so all capacitances are quoted atfull depletion .

Fig. 6 compares the measurement of the total ca-pacitance from one wafer with the calculated values(the structures from two wafers have been evaluatedand the results are in total agreement within the mea-surement errors). Although there is an offset betweenthe data and the predictions, this offset is reasonablyconstant, and the variation with strip gap is modelledwell . The results clearly show that the strip capacitance

160 180 200 220

Pitch (gm)

Fig. 7. Comparison of capacitance fractions with calculations . (a) 27 pm strips, (b) 47 pm strips, (c) 107 wm strips, (d) 147 wmstrips .

is dominantly geometric. The linear fit to the 27 and 47l.Lm strip data is to give a simple "rule of thumb" .

The offset is likely to be due to a number of factors,although it is difficult to ascertain the relative magni-tudes of the contributions . Firstly, it is clear that thecharge distribution function is not exact. Secondly, thethickness of the strips has not been taken into account.Thirdly, there will be some contribution due to thebond pads (with hindsight, it would have been muchbetter to place these within the guard wherever possi-ble) . Finally, there will be some effect on the stripcapacitance due to the accumulation layer of electronsbeneath the oxide. It is this which is expected to beresponsible for the continuing decrease of interstripcapacitance beyond full depletion.

The partial capacitances, when normalised to thetotal sum, can also be compared to the predictedcharge fractions from the calculations and the resultsare shown in fig . 7. Here the agreement is generallyvery good (the fact that the backplane ratios for the 27and 47 win strips are higher than predicted may be dueto the contribution from the bond pads, which are notpresent for the wider strips).

10 . Reduced-capacitance large area diode results

Also on the same wafers as the microstrip structureswere a number of 5 X 5 mm2 diodes, each with itssurface divided into a different number of 26 win wide

v-a

C

âÛ

15

5-

0

G. Hall et al. / Geometrical capacitance of Si microstrip structures

00

0

o Diode capacitance (includes offse0ICalculated capacitance (nooffset)

00

0

I0

140 80 720

Strip gap (pin)

I160

Fig. 8 . Measurement and calculations for reduced-capacitancedevices .

strips. These devices have guard rings (in order toisolate them from edge currents) which cannot easilybe included in the calculations . Because of this, thecapacitance was measured between the active area andthe back surface only, leaving the guard floating . Al-though this results in the measured values being sys-tematically higher than the calculated ones, the calcu-lations again predict the trend of the data well (fig . 8),showing that a reduction of 20% or so is possible (atthe expense of requiring a significantly higher biasvoltage to achieve full depletion due to the large gapsinvolved).

11. Conclusions

The variational calculation technique provides anaccurate prediction of the capacitance of simple geo-metric microstrip structures, without requiring substan-tial computing resources. The results presented hereshow that, although there are some additional factors,the capacitance of real silicon microstrips is domi-nantly geometrical (at least before irradiation) andtherefore a good estimate of detector capacitance canbe obtained .

Additionally, it has been shown that some reductionin the capacitance of large area silicon detectors can beachieved by subdividing their surface into strips butthat this reduction is not dramatic and is inevitablycoupled with a substantial increase in the bias voltagerequired to operate them .

Acknowledgements

We thank the Senter for Industriforskning, Oslo fortheir work in fabricating the test structures . In addi-tion, R. Wheadon is grateful to the UK Science andEngineering Research Council for their financial sup-port of his work through an SERC fellowship .

References

233

[1] E. Yamashita, Variational method for the analysis ofmicrostrip-like transmission lines, IEEE Trans. MicrowaveTheory and Techniques MTT-16 8 (1968) 529.

[2] MINUIT- CERN computing library .[3] D. Vit&, Thesis, University of Turin (November 1991) .

V. SI MICROSTRIP