C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35...

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5 5 4 4 3 3 2 2 1 1 D D C C B B A A PAGE NO. SCHEMATIC PAGE Cover CONTENT Revision History Rev 1.0 SchematicS are for reference only. Variscite LTD provides no warranty for the use of these schematics. Schematics are subject to change without notice. Disclaimer: Initial Block Diagram 01. COVER Document 1.0 Carrier Description 1 2 3 4 5 6 7 8 9 Rev 1.1 Add D25 R106 C108 for external ETH phy reset delay 1.1 1.2 Rev 1.1A R47 add to BOM 0ohm/0402 D21 R84 Q3 - remove from BOM RX1 add manual 10K pull down on uart debug TX line 1.3 Rev 1.1A Add VAR-SOM-6UL & VAR-SOM-SOLO/DUAL Symbols 1st Release 10 Title Size Document Number Rev Date: Sheet of Approved By: Designer: Project 1.1A_R1.3 01. Cover A3 1 9 Tuesday, July 02, 2019 Oded A. Concerto-Board Concerto-Board Title Size Document Number Rev Date: Sheet of Approved By: Designer: Project 1.1A_R1.3 01. Cover A3 1 9 Tuesday, July 02, 2019 Oded A. Concerto-Board Concerto-Board Title Size Document Number Rev Date: Sheet of Approved By: Designer: Project 1.1A_R1.3 01. Cover A3 1 9 Tuesday, July 02, 2019 Oded A. Concerto-Board Concerto-Board

Transcript of C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35...

Page 1: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

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PAGE NO. SCHEMATIC PAGE

Cover

CONTENT

Revision History

Rev 1.0

SchematicS are for reference only.Variscite LTD provides no warranty for the use ofthese schematics.Schematics are subject to change without notice.

Disclaimer:

Initial

Block Diagram

01. COVER

SOM TOP LEVEL

ETH, AUDIO, CAN

SD, USB, mPCIe, SATA

MIPI-CSI, HDMI

BOOT, Buttons, LEDs

Power, RTC, BoardID, Reset, Debug

Document

1.0

Carrier Description

1

2

3

4

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8

9

Display,Touch, Headers

Rev 1.1 Add D25 R106 C108 for external ETH phy reset delay1.1

1.2 Rev 1.1A R47 add to BOM 0ohm/0402D21 R84 Q3 - remove from BOM RX1 add manual 10K pull down on uart debug TX line

1.3 Rev 1.1A Add VAR-SOM-6UL & VAR-SOM-SOLO/DUAL Symbols1st Release

SOM Connector With PINMUX

10

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

01. Cover

A3

1 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

01. Cover

A3

1 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

01. Cover

A3

1 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Page 2: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

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02. VAR-SOM-SOLO/DUAL Block Diagram

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project

1.1A_R1.3

02. VAR-SOM-SOLO Block Diagram

A3

2 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project

1.1A_R1.3

02. VAR-SOM-SOLO Block Diagram

A3

2 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project

1.1A_R1.3

02. VAR-SOM-SOLO Block Diagram

A3

2 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

Page 3: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

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For cross probing between SOM symbol and the specific SOM Connector used,set the "Implemetation" property value in SOM port symbolto one of the following:

1. VAR-SOM-6UL2. VAR-SOM-SOLO

VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).* Pins floating on custom meant to avoid powering old pinouts with GND on above pins.* Customers whom aim to new pinout & require higher power need to connect pins 31 33 35 directly to VCC_SOM.

Isolation Resistors for 6UL Only!

Resistor for isolating stubs & minimizing emc radiation.Signal shared on SOM-6UL ENET1* bus.

Resistor for isolating stubs & minimizing emc radiation.Signal LCDIF* shared on SOM-6UL

03.SOM

See Note[1]

See Note[2]

OFF Page connector index:1. Function# - Interface common to SOM-6UL & SOM-SOLO2. J1.xxx-Function: Interface for several SOMs3. J1.xxx - No common interface

See Note[1]

See Note[1]

See Note[1]

See Note[2]

See Note[1]

See Note[1]

Note[1]

Note[2]

Compatibility list:Describes the ALT per SOM for compatibility. Order of names: SOM-6UL/VAR-SOM

See Note[1]

VCC_SOM

VCC_SOM

GND

GND

GND

GND GND

VCC_GND_SOM_31_33_35

SOM_3V3_PER

BASE_PER_3V3

VCC_SOM

AGND

GND

BASE_PER_3V3

USB#A_HOST_VBUS

USB#B_OTG_VBUS

GPLED

USDHC#A_CLKUSDHC#A_DAT0USDHC#A_CMD

USDHC#A_CD_B

UART#DBG_RX

UART#DBG_TX

OTG_ID_2

POR_B#_3V3

SAI#A_RXDSAI#A_RXFSSAI#A_TXC

CLK_OUT#A

SAI#A_RXCSAI#A_TXFS

SAI#A_TXD

ENET2_RX_ER

ENET2_TX_CLKENET2_TD1ENET2_TX_EN

UART#BT_RTSUART#BT_RXD

UART#C_CTSUART#C_RTS

USDHC#A_DAT2USDHC#A_DAT1USDHC#A_DAT3

ENET_MDIO

J1.40

ENET2_RD1ENET2_RD0

ENET2_RX_ENENET2_TD0

UART#BT_CTSUART#BT_TXD

BOOT_SEL#ACAN#A_TXCAN#A_RX

PWM#CSW_BACKMIPI_CSI_BUF_OE_BJ1.75

J1.77J1.79PCIE_RST_B

UART#B_RTSUART#B_RX

UART#A_CTSMIPI-CSI_D0_PMIPI-CSI_D0_NMIPI-CSI_D1_NMIPI-CSI_D1_PMIPI-CSI_D2_PMIPI-CSI_D2_NMIPI-CSI_D3_NMIPI-CSI_D3_PMIPI-CSI_CK_PMIPI-CSI_CK_N

MIPI-DSI_D0_NMIPI-DSI_D0_PMIPI-DSI_D1_NMIPI-DSI_D1_P

J1.82

UART#B_CTS

UART#A_TX

HDMI_TX_HPD

I2C#A_SDA

MX6-SATA_RX_NMX6-SATA_RX_P

MX6-SATA_TX_PMX6-SATA_TX_N

J1.70

HDMI_TX_D2_PHDMI_TX_D2_NHDMI_TX_D0_PHDMI_TX_D0_N

LVDS#A_TX0_NLVDS#A_TX0_PLVDS_TX3_NLVDS_TX3_P

UART#B_TXUART#A_RTSUART#A_RXSW_WAKEUP

LVDS_DISP2_D3_PLVDS_DISP2_D3_N

TP#_X_NEGTP#_X_POSTP#_Y_POSTP#_Y_NEG

AC#LINE_IN_LAC#LINE_IN_R

UART#C_RXUART#C_TX

OTG_ID_1

ENET_MDC

UART#DBG_RTSUART#DBG_CTS

I2C#A_SCL

PCIE_REF_CLK_NPCIE_REF_CLK_P

USB#A_HOST_D_NUSB#A_HOST_D_P

USB#B_OTG_D_NUSB#B_OTG_D_P

ETH_RST_B/I2C_BASE_EN_BCAP_TOUCH_INT_B

PCIE_TX_NPCIE_TX_P

PCIE_RX_PPCIE_RX_N

MIPI-DSI_CK_PMIPI-DSI_CK_N

HDMI_TX_D1_PHDMI_TX_D1_NHDMI_TX_CK_NHDMI_TX_CK_P

HDMI_TX_DDC_CEC

LVDS#A_TX1_NLVDS#A_TX1_PLVDS#A_TX2_NLVDS#A_TX2_PLVDS#A_CLK_NLVDS#A_CLK_P

LVDS_DISP2_CK_NLVDS_DISP2_CK_PLVDS_DISP2_D0_NLVDS_DISP2_D0_PLVDS_DISP2_D1_NLVDS_DISP2_D1_PLVDS_DISP2_D2_NLVDS_DISP2_D2_P

AC#HP_FB

AC#HP_OUT_LAC#HP_OUT_R

PWM#B

ETH#A_MDI_A_PETH#A_MDI_A_N

ETH#A_MDI_B_PETH#A_MDI_B_N

ETH#A_LED_ACTPWM#A

ETH#A_MDI_D_P

ETH#A_MDI_C_P

DMIC_CLK

ETH#A_MDI_C_N

ETH#A_MDI_D_N

ETH#A_LED_SPD

DMIC_DATA

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

03A. VAR-SOM-6UL_CONN

C

3 9Tuesday, July 02, 2019Oded A.

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Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

03A. VAR-SOM-6UL_CONN

C

3 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

03A. VAR-SOM-6UL_CONN

C

3 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

TP30

RN6-3 33RRN6-2 33R

R40R

RN5-233R

RN6-4 33R

R34.7KNC

RN7-333R

C9710uF

R230R

RN5-133R

R79

4.7K

RN4-433R

R9433R

RN5-333R

RN4-333R

RN7-433R

RN6-1 33R

R92 33R

RN4-233RRN4-133R

RN1-133R

RN3-433R

SOMImplementation = VAR-SOM-SOLO

GNDETH#A_MDI_C_PETH#A_MDI_C_NGNDETH#A_MDI_D_PETH#A_MDI_D_NGNDETH#A_LED_SPDJ1.18-DMIC_CLKJ1.20-DMIC_DATASAI#A_RXCSAI#A_TXFSSAI#A_TXDGNDJ1.30-ENET_MDIOVCC_SOMVCC_SOMJ1.36-VCC_SOM/LICELLVCC_SOMJ1.40

BOOT_SEL#ACAN#A_TXCAN#A_RXJ1.48UART#BT_CTSUART#BT_TXDUART#C_RXUART#C_TXJ1.58USDHC#A_CLKUSDHC#A_DAT0USDHC#A_CMDGNDPWM#BJ1.70J1.72J1.74-ENET_MDCGNDGNDUSDHC#A_CD_BJ1.82UART#DBG_RTSUART#DBG_CTSI2C#A_SCLI2C#C_SDAI2C#C_SCLJ1.94J1.96POR_B#_3V3J1.100-REFCLK100M_NJ1.102-REFCLK100M_PUSB#A_HOST_VBUSUSB#B_OTG_VBUSUSB#A_HOST_DNUSB#A_HOST_DPGNDUSB#B_OTG_DNUSB#B_OTG_DPGNDJ1.120J1.122UART#A_TXGNDJ1.128-PCIE_TX_NJ1.130-PCIE_TX_PGNDJ1.134-PCIE_RX_PJ1.136-PCIE_RX_NGNDJ1.140-MIPI-DSI_CLK_PJ1.142-MIPI-DSI_CLK_NGNDJ1.146-HDMI_D1_PJ1.148-HDMI_D1_NJ1.150-HDMI_CLK_NJ1.152-HDMI_CLK_PJ1.154-HDMI_HPDJ1.156-HDMI_DDC_CECGNDLVDS#A_TX1_NLVDS#A_TX1_PLVDS#A_TX2_NLVDS#A_TX2_PLVDS#A_CLK_NLVDS#A_CLK_PGNDI2C#B_SCLI2C#B_SDAGNDJ1.180-LVDS_DISP_CLK_NJ1.182-LVDS_DISP_CLK_PJ1.184-LVDS_DISP_TX0_NJ1.186-LVDS_DISP_TX0_PJ1.188-LVDS_DISP_TX1_NJ1.190-LVDS_DISP_TX1_PJ1.192-LVDS_DISP_TX2_NJ1.194-LVDS_DISP_TX2_PAC#HP_FBAC#HP_OUT_LAC#HP_OUT_R

J1.1ETH#A_MDI_A_P

GNDETH#A_MDI_A_N

ETH#A_LED_ACT

ETH#A_MDI_B_NETH#A_MDI_B_P

GND

SAI#A_RXFSSAI#A_TXC

GND

GND

PWM#A

SAI#A_RXD

SPI#A_SDO

UART#BT_RTS

SPI#A_SS

UART#BT_RXD

SPI#A_SDI

UART#C_RTS

31_33_35_PWR

USDHC#A_DAT1

SPI#A_SCK

UART#C_CTS

31_33_35_PWR

SOM_3V3GND

USDHC#A_DAT2GND

GND

J1.119-MIPI-CSI_D0_P

VCC_SOM

J1.77

J1.125-MIPI-CSI_D1_P

VCC_SOM

UART#DBG_RX

J1.71

VCC_SOM

UART#DBG_TX

J1.73

VCC_SOM

J1.117

GND

GND

J1.127-MIPI-CSI_D2_P

GND

J1.75

J1.113

VCC_SOM

I2C#A_SDA

USDHC#A_DAT3

GNDJ1.99

J1.81J1.79

J1.97

UART#B_RX

J1.93

J1.123-MIPI-CSI_D1_NJ1.121-MIPI-CSI_D0_N

J1.91

PWM#C

J1.183-LVDS_DISP_TX3_N

J1.173

J1.141-MIPI-DSI_D0_N

AC#LINE_IN_R

TP#_X_POS

GND

J1.147-MIPI-DSI_D1_P

J1.135-MIPI-CSI_CK_P

UART#B_TX

GND

J1.137-MIPI-CSI_CK_N

UART#A_RX

J1.181-LVDS_DISP_TX3_P

J1.153-HDMI_TX_D2_N

J1.131-MIPI-CSI_D3_N

TP#_Y_POS

AC#LINE_IN_L

GND

GND

J1.195-AGND

J1.177

LVDS#A_TX3_P

J1.151-HDMI_TX_D2_P

J1.129-MIPI-CSI_D2_N

LVDS#A_TX3_NLVDS#A_TX0_P

J1.145-MIPI-DSI_D1_NJ1.143-MIPI-DSI_D0_P

LVDS#A_TX0_N

GND

J1.157-HDMI_TX_D0_N

TP#_X_NEGGND

J1.155-HDMI_TX_D0_P

TP#_Y_NEG

J1.133-MIPI-CSI_D3_P

31_33_35_PWRCLK_OUT#A

RN1-233RRN1-333R

RN7-133R

RN3-333RRN3-233R

RN1-433R

R91 33R

RN7-233R

R220R NC

RN3-133R

C2047uF/16V

12

RN5-433R

R20R

RN2-333R

C17

47uF/16V

12

R10R

RN2-233RRN2-133R

RN2-433R

R93 33R

R80

4.7K

/GETH_TR2P ETH_RXDP/GETH_TR0P/GETH_TR2N ETH_RXDN/GETH_TR0N

/GETH_TR3P ETH_TXDP/GETH_TR1P/GETH_TR3N ETH_TXDN/GETH_TR1N

ETH_LED1/ETH_LED1 ETH_LED2/ETH_LED2/DMIC_CLK PWM4_OUT/PWM2_OUT/DMIC_DATASAI1_RX_BCLK/AUD4_RXC SAI1_RX_D/AUD4_RXDSAI1_TX_SYNC/AUD4_TXFS SAI1_RX_SYNC/AUD4_RXFSSAI1_TX_D/AUD4_TXD SAI1_TX_BCLK/AUD4_TXC

GPT2_CLK/CCM_CLKO2

GPIO1_25/GPIO4_10

SD1_CLK/SD2_CLKSD1_DATA0/SD2_D0SD1_CMD/SD2_CMD

GPIO1_28/GPIO3_21GPIO1_31/GPIO3_22

GPIO1_0/GPIO4_14 GPIO1_29/GPIO3_30GPIO5_7/GPIO5_19UART1_RX/UART1_RXUART1_TX/UART1_TX

I2C1_SCL/I2C1_SCL

GPIO1_24/GPIO1_4

POR_B/POR_B

CCM_CLK1_N/LVDS1_CLK_NCCM_CLK1_P/LVDS1_CLK_P

ECSPI4_SS0/ECSPI1_SS0

ECSPI4_MISO/ECSPI1_MISOECSPI4_SCLK/ECSPI1_SCLKECSPI4_MOSI/ECSPI1_MOSI

UART2_RTS_B/UART2_RTS_BUART2_RX/UART2_RXUART5_CTS_B/UART3_CTS_BUART5_RTS_B/UART3_RTS_B

SD1_DATA2/SD2_D2SD1_DATA1/SD2_D1SD1_DATA3/SD2_D3

ENET1_MDIO/

I2C3_SDA/I2C3_SDAI2C3_SCL/I2C3_SCL

I2C4_SCL/I2C2_SCLI2C4_SDA/I2C2_SDA

UART2_CTS_B/UART2_CTS_BUART2_TX/UART2_TX

BOOT_SEL0/SRC_BOOT_CFG07CAN1_TX/FLEXCAN1_TXCAN1_RX/FLEXCAN1_RX

PWM1_OUT/PWM3_OUTGPIO4_14/GPIO1_02GPIO5_1/GPIO2_11

113 UART7_RTS_B/UART5_RTS_BUART7_RX/UART5_RX

117 UART8_CTS_B/UART4_CTS_B119121123125127129131133135137

141143145147

GPIO3_16/GPIO4_15 82

UART7_CTS_B/UART5_CTS_B 96

UART8_TX/UART4_TX 124

I2C1_SDA/I2C1_SDA

151153155157

LVDS_TX0_N/LVDS0_D0_NLVDS_TX0_P/LVDS0_D0_P

165167

UART7_TX/UART5_TX_DUART8_RTS_B/UART4_RTS_B

175 UART8_RX/UART4_RXGPIO5_8/GPIO5_18

181183

ADC IN3/TS_X-ADC IN4/TS_X+ADC IN2/TS_Y+ADC IN1/TS_Y-

LINEIN_LP/LINEIN_LPLINEIN_RP/LINEIN_RP

UART5_RX/UART3_RXUART5_TX/UART3_TX

GPIO5_3/GPIO1_IO1ENET1_MDC/

UART1_RTS_B/UART1_RTS_BUART1_CTS_B/UART1_CTS_B

USB_OTG2_DN/USB_H1_DNUSB_OTG2_DP/USB_H1_DP

USB_OTG1_DN/USB_OTG_DNUSB_OTG1_DP/USB_OTG_DP

GPIO5_5/GPIO5_21GPIO5_9/GPIO5_20

146148150152

LVDS_TX1_N/LVDS0_D1_NLVDS_TX1_P/LVDS0_D1_PLVDS_TX2_N/LVDS0_D2_NLVDS_TX2_P/LVDS0_D2_PLVDS_CLK_N/LVDS0_CLK_NLVDS_CLK_P/LVDS0_CLK_P

AGND/AGNDHPLOUT/HPLOUTHPROUT/HPROUT

PWM2_OUT/PWM1_OUT

USB_OTG1_VBUS/USB_OTG_VBUS_5VUSB_OTG2_VBUS/USB_H1_VBUS_5V

Page 4: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

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C C

B B

A A

04. VAR-SOM-SOLO/DUAL Connector

GND

ETH#A_MDI_C_PETH#A_MDI_C_N

GND

ETH#A_MDI_D_PETH#A_MDI_D_N

GND

ETH#A_LED_SPDJ1.18-DMIC_CLKJ1.20-DMIC_DATA

SAI#A_RXCSAI#A_TXFSSAI#A_TXD

GND

J1.30-ENET_MDIOVCC_SOMVCC_SOM

J1.36-VCC_SOM/LICELL

VCC_SOMJ1.40

BOOT_SEL#ACAN#A_TXCAN#A_RX

J1.48UART#BT_CTSUART#BT_TXDUART#C_RXUART#C_TXJ1.58USDHC#A_CLKUSDHC#A_DAT0USDHC#A_CMD

GND

PWM#BJ1.70J1.72J1.74-ENET_MDC

GNDGND

USDHC#A_CD_BJ1.82UART#DBG_RTS

I2C#A_SCLI2C#C_SDAI2C#C_SCLJ1.94J1.96POR_B#_3V3

J1.100-REFCLK100M_NJ1.102-REFCLK100M_P

USB#A_HOST_VBUSUSB#B_OTG_VBUSUSB#A_HOST_DNUSB#A_HOST_DP

GND

USB#B_OTG_DNUSB#B_OTG_DP

GND

J1.120J1.122

UART#A_TXGND

J1.128-PCIE_TX_NJ1.130-PCIE_TX_P

GND

J1.134-PCIE_RX_PJ1.136-PCIE_RX_N

GND

J1.140-MIPI-DSI_CLK_PJ1.142-MIPI-DSI_CLK_N

GND

J1.146-HDMI_D1_PJ1.148-HDMI_D1_NJ1.150-HDMI_CLK_NJ1.152-HDMI_CLK_PJ1.154-HDMI_HPD

GND

LVDS#A_TX1_NLVDS#A_TX1_PLVDS#A_TX2_NLVDS#A_TX2_PLVDS#A_CLK_NLVDS#A_CLK_P

GND

I2C#B_SCLI2C#B_SDA

GND

J1.180-LVDS_DISP_CLK_NJ1.182-LVDS_DISP_CLK_PJ1.184-LVDS_DISP_TX0_NJ1.186-LVDS_DISP_TX0_PJ1.188-LVDS_DISP_TX1_NJ1.190-LVDS_DISP_TX1_PJ1.192-LVDS_DISP_TX2_NJ1.194-LVDS_DISP_TX2_P

AC#HP_FBAC#HP_OUT_LAC#HP_OUT_R

J1.1ETH#A_MDI_A_PETH#A_MDI_A_N

GND

ETH#A_MDI_B_PETH#A_MDI_B_N

GND

ETH#A_LED_ACTPWM#A

GND

SAI#A_RXDSAI#A_RXFSSAI#A_TXC

GND

CLK_OUT#A31_33_35_PWR31_33_35_PWR31_33_35_PWRGND

SPI#A_SS

SPI#A_SDISPI#A_SCKSPI#A_SDO

GND

SOM_3V3UART#BT_RTSUART#BT_RXD

UART#C_CTSUART#C_RTS

GND

USDHC#A_DAT2USDHC#A_DAT1USDHC#A_DAT3

GND

PWM#CJ1.71J1.73J1.75J1.77J1.79J1.81UART#DBG_RXUART#DBG_TXI2C#A_SDA

GND

J1.91J1.93

GND

J1.97J1.99

GNDVCC_SOMVCC_SOMVCC_SOMVCC_SOMVCC_SOM

J1.113UART#B_RXJ1.117J1.119-MIPI-CSI_D0_PJ1.121-MIPI-CSI_D0_NJ1.123-MIPI-CSI_D1_NJ1.125-MIPI-CSI_D1_PJ1.127-MIPI-CSI_D2_PJ1.129-MIPI-CSI_D2_NJ1.131-MIPI-CSI_D3_NJ1.133-MIPI-CSI_D3_PJ1.135-MIPI-CSI_CK_PJ1.137-MIPI-CSI_CK_N

GND

J1.141-MIPI-DSI_D0_NJ1.143-MIPI-DSI_D0_PJ1.145-MIPI-DSI_D1_NJ1.147-MIPI-DSI_D1_P

GND

J1.151-HDMI_TX_D2_PJ1.153-HDMI_TX_D2_NJ1.155-HDMI_TX_D0_PJ1.157-HDMI_TX_D0_N

GND

LVDS#A_TX0_NLVDS#A_TX0_PLVDS#A_TX3_NLVDS#A_TX3_P

GND

UART#B_TXJ1.173UART#A_RXJ1.177

GND

J1.181-LVDS_DISP_TX3_PJ1.183-LVDS_DISP_TX3_N

GND

TP#_X_NEGTP#_X_POSTP#_Y_POSTP#_Y_NEG

J1.195-AGNDAC#LINE_IN_LAC#LINE_IN_R

UART#DBG_CTS

J1.156-HDMI_DDC_CEC

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

04. VAR-SOM-SOLO Connector

A2

4 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

04. VAR-SOM-SOLO Connector

A2

4 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

04. VAR-SOM-SOLO Connector

A2

4 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

VAR-SOM-SOLO

J1

GND2

NC/*/MDI_C_P4

NC/*/MDI_C_N6

GND8

NC/*/MDI_D_P10

NC/*/MDI_D_N12

GND14

ENET_TX_EN/ENET_TX_EN//ESAI_TX3_RX2/////GPIO1_IO28/////////I2C4_SCL/*/GETH_LED116

NC/*/DMIC_CLK18

NC/*/DMIC_DATA20

IPU1_DISP0_D19/LCD_D19//ECSPI2_SCLK///AUD5_RXD////AUD4_RXC/////GPIO5_IO13///////EIM_CS322

IPU1_DISP0_D22/LCD_D22//ECSPI1_MISO///AUD4_TXFS/////GPIO5_IO1624

IPU1_DISP0_D21/LCD_D21//ECSPI1_MOSI///AUD4_TXD/////GPIO5_IO1526

GND28

NC30

3V3_SOM32

3V3_SOM34

3V3_SOM36

3V3_SOM38

EIM_AD05/IPU1_DISP1_D04//IPU1_CSI1_D04/////GPIO3_IO05///////SRC_BOOT_CFG05////////EPDC_SDCE140

EIM_AD07/IPU1_DISP1_D02//IPU1_CSI1_D02/////GPIO3_IO07///////SRC_BOOT_CFG07////////EPDC_SDCE342

ESAI_TX4_RX1//EPIT1_OUT///FLEXCAN1_TX////UART2_TXD/////GPIO1_IO07//////SPDIF_LOCK///////USB_OTG_HOST_MODE////////I2C4_SCL44

ESAI_TX5_RX0/XTALOSC_REF_CLK_32K//EPIT2_OUT///FLEXCAN1_RX////UART2_RXD/////GPIO1_IO08//////SPDIF_SR_CLK///////USB_OTG_PWR_CTL_WAKE////////I2C4_SDA46

ECSPI1_SS1/ENET_RXD2//FLEXCAN1_TX///KPP_KEY_COL2////ENET_MDC/////GPIO4_IO10//////USB_H1_PWR_CTL_WAKE48

EIM_D28/I2C1_SDA//ECSPI4_MOSI///IPU1_CSI1_D12////UART2_CTS_B/////GPIO3_IO28//////IPU1_EXT_TRIG///////IPU1_DI0_PIN13////////EPDC_PWR_CTRL350

EIM_D26/IPU1_DI1_PIN11//IPU1_CSI0_D01///IPU1_CSI1_D14////UART2_TXD/////GPIO3_IO26//////IPU1_SISG2///////IPU1_DISP1_D22////////EPDC_SDOED52

EIM_D25/ECSPI4_SS3//UART3_RXD///ECSPI1_SS3////ECSPI2_SS3/////GPIO3_IO25//////AUD5_RXC///////UART1_DSR_B////////EPDC_SDCE854

EIM_D24/ECSPI4_SS2//UART3_TXD///ECSPI1_SS2////ECSPI2_SS2/////GPIO3_IO24//////AUD5_RXFS///////UART1_DTR_B////////EPDC_SDCE756

EIM_EB2/ECSPI1_SS0///IPU1_CSI1_D19////HDMI_TXDDC_SCL/////GPIO2_IO30//////I2C2_SCL///////SRC_BOOT_CFG30////////EPDC_D0558

SD2_CLK//KPP_KEY_COL5///AUD4_RXFS/////GPIO1_IO1060

SD2_D0///AUD4_RXD////KPP_KEY_ROW7/////GPIO1_IO15//////DCIC2_OUT62

SD2_CMD//KPP_KEY_ROW5///AUD4_RXC/////GPIO1_IO1164

GND66

ESAI_RX_FS/WDOG1_B//KPP_KEY_COL6///CCM_REF_EN_B////PWM1_OUT/////GPIO1_IO09//////SD1_WP68

JTAG_TRSTB70

ESAI_RX_CLK/WDOG2_B//KPP_KEY_ROW5///USB_OTG_ID////PWM2_OUT/////GPIO1_IO01//////SD1_CD_B72

ONOFF74

GND76

GND78

FLEXCAN2_TX/IPU1_SISG4//USB_OTG_OC///KPP_KEY_COL4////UART5_RTS_B/////GPIO4_IO1480

FLEXCAN2_RX/IPU1_SISG5//USB_OTG_PWR///KPP_KEY_ROW4////UART5_CTS_B/////GPIO4_IO1582

EIM_D20/ECSPI4_SS0//IPU1_DI0_PIN16///IPU1_CSI1_D15////UART1_RTS_B/////GPIO3_IO20//////EPIT2_OUT84

EIM_D19/ECSPI1_SS1//IPU1_DI0_PIN08///IPU1_CSI1_D16////UART1_CTS_B/////GPIO3_IO19//////EPIT1_OUT////////EPDC_D1286

IPU1_CSI0_D09/EIM_D07//ECSPI2_MOSI///KPP_KEY_ROW7////I2C1_SCL/////GPIO5_IO2788

ESAI_TX3_RX2/ENET_1588_EVENT2_IN//ENET_REF_CLK///SD1_LCTL////SPDIF_IN/////GPIO7_IO11//////I2C3_SDA///////JTAG_DE_B90

ESAI_TX2_RX3//KPP_KEY_ROW7///CCM_CLKO1/////GPIO1_IO05//////I2C3_SCL92

ESAI_TX_HF_CLK//KPP_KEY_COL7/////GPIO1_IO04//////SD2_CD_B94

IPU1_CSI0_D19/EIM_D15///UART5_CTS_B/////GPIO6_IO0596

POR_B98

CLK1_N100

CLK1_P102

USB_H1_VBUS_5V104

USB_OTG_VBUS_5V106

USB_H1_DN108

USB_H1_DP110

GND112

USB_OTG_DN114

USB_OTG_DP116

GND118

IPU1_CSI0_VSYNC/EIM_D01/////GPIO5_IO21120

IPU1_CSI0_D_EN/EIM_D00/////GPIO5_IO20122

IPU1_CSI0_D12/EIM_D08///UART4_TXD/////GPIO5_IO30124

GND126

PCIE_TX_N128

PCIE_TX_P130

GND132

PCIE_RX_P134

PCIE_RX_N136

GND138

DSI_CLK0_P140

DSI_CLK0_N142

GND144

HDMI_TXD1_P146

HDMI_TXD1_N148

HDMI_TX_CLK_N150

HDMI_TX_CLK_P152

HDMI_TX_HPD154

HDMI_TXDDC_CEC156

GND158

LVDS0_D1_N160

LVDS0_D1_P162

LVDS0_D2_N164

LVDS0_D2_P166

LVDS0_CLK_N168

LVDS0_CLK_P170

GND172

ECSPI1_SS3/ENET_CRS//HDMI_TXDDC_SCL///KPP_KEY_COL3////I2C2_SCL/////GPIO4_IO12//////SPDIF_IN174

KEY_ROW3/ASRC_EXT_CLK//HDMI_TXDDC_SDA///KPP_KEY_ROW3////I2C2_SDA/////GPIO4_IO13//////SD1_VSELECT176

GND178

LVDS1_CLK_N180

LVDS1_CLK_P182

LVDS1_D0_N184

LVDS1_D0_P186

LVDS1_D1_P188

LVDS1_D1_N190

LVDS1_D2_N192

LVDS1_D2_P194

AGND/*/AGND196

NC/*/HPLOUT198

NC/*/HPROUT200

GND1

NC/*/MDI_A_P3

NC/*/MDI_A_N5

GND7

NC/*/MDI_B_P9

NC/*/MDI_B_N11

GND13

NC/*/GETH_LED215

IPU1_DISP0_D09/LCD_D09//PWM2_OUT///WDOG2_B/////GPIO4_IO3017

GND19

IPU1_DISP0_D23/LCD_D23//ECSPI1_SS0///AUD4_RXD/////GPIO5_IO1721

IPU1_DISP0_D18/LCD_D18//ECSPI2_SS0///AUD5_TXFS////AUD4_RXFS/////GPIO5_IO12///////EIM_CS223

IPU1_DISP0_D20/LCD_D20//ECSPI1_SCLK///AUD4_TXC/////GPIO5_IO1425

GND27

ESAI_RX_HF_CLK//I2C3_SCL///XTALOSC_REF_CLK_24M////CCM_CLKO2/////GPIO1_IO03//////USB_H1_OC///////MLB_CLK29

GND31

GND33

GND35

GND37

ECSPI1_SS0/ENET_COL//AUD5_RXD///KPP_KEY_ROW1////UART5_RXD/////GPIO4_IO09//////SD2_VSELECT39

ECSPI1_MISO/ENET_MDIO//AUD5_TXFS///KPP_KEY_COL1////UART5_TXD/////GPIO4_IO08//////SD1_VSELECT41

ECSPI1_SCLK/ENET_RXD3//AUD5_TXC///KPP_KEY_COL0////UART4_TXD/////GPIO4_IO06//////DCIC1_OUT43

ECSPI1_MOSI/ENET_TXD3//AUD5_TXD///KPP_KEY_ROW0////UART4_RXD/////GPIO4_IO07//////DCIC2_OUT45

GND47

SOM_3V3_PER49

EIM_D29/IPU1_DI1_PIN15//ECSPI4_SS0////UART2_RTS_B/////GPIO3_IO29//////IPU1_CSI1_VSYNC///////IPU1_DI0_PIN14////////EPDC_PWR_WAKE51

EIM_D27/IPU1_DI1_PIN13//IPU1_CSI0_D00///IPU1_CSI1_D13////UART2_RXD/////GPIO3_IO27//////IPU1_SISG3///////IPU1_DISP1_D23////////EPDC_SDOE53

EIM_D23/IPU1_DI0_D0_CS//UART3_CTS_B///UART1_DCD_B////IPU1_CSI1_D_EN/////GPIO3_IO23//////IPU1_DI1_PIN02///////IPU1_DI1_PIN14////////EPDC_D1155

EIM_EB3/ECSPI4_RDY//UART3_RTS_B///UART1_RI_B////IPU1_CSI1_HSYNC/////GPIO2_IO31//////IPU1_DI1_PIN03///////SRC_BOOT_CFG31////////EPDC_SDCE0/////////EIM_ACLK_FREERUN57

GND59

SD2_D2//EIM_CS3///AUD4_TXD////KPP_KEY_ROW6/////GPIO1_IO1361

SD2_D1//EIM_CS2///AUD4_TXFS////KPP_KEY_COL7/////GPIO1_IO1463

SD2_D3//KPP_KEY_COL6///AUD4_TXC/////GPIO1_IO1265

GND67

SD4_D1/SD4_D1//PWM3_OUT/////GPIO2_IO0969

ESAI_TX_FS//KPP_KEY_ROW6/////GPIO1_IO02//////SD2_WP///////MLB_D71

SD4_D3/SD4_D3/////GPIO2_IO1173

EIM_D21/ECSPI4_SCLK//IPU1_DI0_PIN17///IPU1_CSI1_D11////USB_OTG_OC/////GPIO3_IO21//////I2C1_SCL///////SPDIF_IN75

EIM_D22/ECSPI4_MISO//IPU1_DI0_PIN01///IPU1_CSI1_D10////USB_OTG_PWR/////GPIO3_IO22//////SPDIF_OUT////////EPDC_SDCE677

EIM_D30/IPU1_DISP1_D21//IPU1_DI0_PIN11///IPU1_CSI0_D03////UART3_CTS_B/////GPIO3_IO30//////USB_H1_OC////////EPDC_SDOEZ79

IPU1_CSI0_HSYNC///CCM_CLKO1/////GPIO5_IO1981

IPU1_CSI0_D11/AUD3_RXFS//ECSPI2_SS0///UART1_RXD/////GPIO5_IO2983

IPU1_CSI0_D10/AUD3_RXC//ECSPI2_MISO///UART1_TXD/////GPIO5_IO2885

IPU1_CSI0_D08/EIM_D06//ECSPI2_SCLK///KPP_KEY_COL7////I2C1_SDA/////GPIO5_IO2687

GND89

JTAG_TDI91

JTAG_TDO93

GND95

JTAG_TCK97

JTAG_TMS99

GND101

3V3_SOM103

3V3_SOM105

3V3_SOM107

3V3_SOM109

3V3_SOM111

IPU1_CSI0_D18/EIM_D14///UART5_RTS_B/////GPIO6_IO04113

IPU1_CSI0_D15/EIM_D11///UART5_RXD/////GPIO6_IO01115

IPU1_CSI0_D17/EIM_D13///UART4_CTS_B/////GPIO6_IO03117

CSI_D0_P119

CSI_D0_N121

CSI_D1_N123

CSI_D1_P125

CSI_D2_P127

CSI_D2_N129

CSI_D3_N131

CSI_D3_P133

CSI_CLK0_P135

CSI_CLK0_N137

GND139

DSI_D0_N141

DSI_D0_P143

DSI_D1_N145

DSI_D1_P147

GND149

HDMI_TXD2_P151

HDMI_TXD2_N153

HDMI_TXD0_P155

HDMI_TXD0_N157

GND159

LVDS0_D0_N161

LVDS0_D0_P163

LVDS0_D3_N165

LVDS0_D3_P167

GND169

IPU1_CSI0_D14/EIM_D10///UART5_TXD/////GPIO6_IO00171

IPU1_CSI0_D16/EIM_D12///UART4_RTS_B/////GPIO6_IO02173

IPU1_CSI0_D13/EIM_D09///UART4_RXD/////GPIO5_IO31175

IPU1_CSI0_PIXCLK/////GPIO5_IO18177

GND179

LVDS1_D3_P181

LVDS1_D3_N183

GND185

NC/*/TS_X-187

NC/*/TS_X+189

NC/*/TS_Y+191

NC/*/TS_Y-193

AGND195

NC/*/LLINEIN197

NC/*/RLINEIN199

Page 5: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Gigabit EthernetRJ45

Giga Ethernet Differential Pair,Follow Giga Ethernet routingguidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

HEADPHONES

AUDIO

NOTE:

MX6/SOLO/MX8X and 6UL not requiring 2nd Ethernet:To avoid contention with 10/100 PhyETH_RST_B/I2C_BASE_EN_B must be driven Low.

ENET2 - H COM<>NOOTHER - L COM<>NC

I

I

Ipu

Ipu

Ipd

I

I

Ipd

Ipd

Ipu

Ipu

Ipd

Ipu

Ipu

Ipu - Input with 30-73K Typ 45KIpd - Input with 26-79K Typ 43K

Required Boot strap values:PHYAD[2:0]= '011' - Address on MDIO CONFIG[2:0]= '001' - RMIIISO= '0' - Isolate Mode - disableSPEED= '1' - 100MbpsDUPLEX= '0' - FullNWAYEN= '1' - Auto-Nego. EnabledB_CAST_OFF= '0' - Phy add. 0 set to broadcast

Ipd

Ipd

Ipu

Ipd

KSZ8081RNBRST state

KSZ8081RNBRST state

<50mA

Analog Switch used to isolate the 6UL ENET2 fast changing lines from long stubs

COM5 & 6 short for layout ease.

RST_B requires > 500us for warm resetRST_B rise from Vddio/Vdda3.3 stable > 10msRise of RST_B to MDC/MDIO > 100us

Ipu

05. Ethernet, Audio, CAN

DIGITAL MIC

LINE IN

U11-Bootstrap

U11-Bootstrap

U11-Bootstrap

CAN BUS

LED_ACT

LED_SPEED

Ethernet Differential Pair, Follow10/100 Ethernet routingguidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

SIGNAL ISOLATOR

SOM-6UL 10/100 RJ45

SOM-6UL 10/100 ENET2 PHY

BASE_PER_3V3

GND GNDAGND

AGNDGND GND

BASE_PER_3V3

GND

AGND

GND

BASE_PER_3V3

BASE_PER_3V3

GND

GND

GND

BASE_PER_3V3

BASE_PER_3V3

GND

GND

GND

BASE_PER_1V8

BASE_PER_3V3

BASE_PER_3V3

GND

GND

BASE_PER_3V3

GND

ETH#A_LED_ACTETH#A_MDI_A_PETH#A_MDI_A_N

ETH#A_MDI_B_PETH#A_MDI_B_N

ETH#A_MDI_C_PETH#A_MDI_C_N

ETH#A_MDI_D_PETH#A_MDI_D_N

AC#HP_OUT_R

AC#HP_OUT_L

AC#HP_FB

AC#LINE_IN_R

DMIC_CLK

DMIC_DATA

AC#LINE_IN_L

ENET_MDC

ENET2_TD1

ENET2_TX_EN

ENET2_RD1

ENET2_RX_EN

ENET2_TX_CLK

ENET2_RX_ER

ENET2_TD0

ENET2_RD0

ENET_MDIO

I2C#C_SCL_BASEI2C#C_SDA_BASE

I2C#B_SCL_BASEI2C#B_SDA_BASE

ETH#A_LED_SPD

CAN#A_TX

CAN#A_RX

CAN#A_L

CAN#A_H

ETH_RST_B/I2C_BASE_EN_B

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

05. Ethernet, Audio, CAN

A3

5 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

05. Ethernet, Audio, CAN

A3

5 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

05. Ethernet, Audio, CAN

A3

5 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

C60

100nF

D9

TP

D1

E1

0B

09

DP

YR

R33 10K

R81

4.7K

C511uF

C107

100nF

C50100nF

J12

STEREO JACK

12

3

L: COM to NCH: COM to NO

U17

TS3A27518EZQSR

COM1A1

VCCC2

NO1E2

COM2B1

EN#C4

NO2E3

COM3C1

GNDC3

SEL456D3

NO3E4

COM4D1

COM6D2

NO6E5

NO4D5

COM5E1

NO5D4

NC6A5

NC2A2

SEL123B4

NC5C5

NC4B5

NC1B3

NC3A4

N.C.A3

C411nF 2KV

C39

100nF

R53120R 1%

C45 100nF

R422.2K 1%R101 49.9R 1%

J11

STEREO JACK

12

3

C57

4.7uF

R52 4.7K

R35 10K

R571K

C521uF

C56

100nF

R50 4.7K

R99 49.9R 1%

C1011uF

R36120R 1%

C1084.7uF

R48 2.2K 1%NC

R460R

R100 49.9R 1%

R51120R 1%

Green

Yellow

Oragne

J3 S26-ZZ-0018

L2Y-

L1Y+

L4G_O_1

TCT3R1

TD3-R2 TD3+R3

TD2+R4

TCT4R7

TD4+R8

TD4-R9

TD1-R10

SH1SH1

SH2SH2

TD2-R5

TCT2R6

TD1+R11

TCT1R12

L5G_O_2

R37120R 1%

C42 100nF C59

100nF

R34 10K

C104

100nF

C40

100nF

C106

100nF

C4710uF

C105

100nF

D12

TP

D1

E1

0B

09

DP

YR

R98 49.9R 1%

R545.6K 1%

NC

U12

TCAN332GD

TXD1

GND2

VCC3

RXD4

NC15

CANL6

CANH7

NC28

C44 10uF

D11

TP

D1

E1

0B

09

DP

YR

CLOCK INTERFACE

10/100 INTERFACEMII/RMII/SNIINTERFACE

CONFIGURATIONINTERFACE

DEVICE POWER

DEVICE RESET

U11

KSZ8081RNB

1G

ND

2VDD_1.2

3VDDA_3.3

4RX-

5RX+

6TX-

7TX+

8XO

9XI

10REXT

11MDIO

12MDC

13PHYAD0

14PHYAD1

15RXD1/PHYAD2

16RXD0/DUPLEX

17VDDIO_3.3

18CRS_DV/CONFIG2

19REF_CLK/B_CAST_OFF

20RX_ER/ISO

21INTRP/NAND_Tree_B

22

NC

23TX_EN

24TXD0

25TXD1

26

NC

1

27

NC

2

28CONFIG0

29CONFIG1

30LED0/NWAYEN

31LED1/SPEED32

RST_B

33

PG

ND

U13

SPM0423HD4H-WB

VDD6

L/R2

GND3

GND1

DATA5

CLK4

C55

220pFR555.6K 1%

NC

C4

81

nF

R82

4.7K

C531uF

D2530V,100mA

C46 100nF

C4910uF

C54

220pF

R49 2.2K 1%NC

R560R

R4

36

.49

K

Green

Yellow

Oragne

J2 S26-ZZ-0018

L2Y-

L1Y+

L4G_O_1

TCT3R1

TD3-R2 TD3+R3

TD2+R4

TCT4R7

TD4+R8

TD4-R9

TD1-R10

SH1SH1

SH2SH2

TD2-R5

TCT2R6

TD1+R11

TCT1R12

L5G_O_2

R470R

FB4 120R 1.2A

J27

HEADER 2X1

NC12

R106

2.2K 1%

D10

TP

D1

E1

0B

09

DP

YR

R45120R 1%

C43 4.7uF

HPROUT_C

HPLOUT_C

LINEIN_R_C RLINEIN_C

LINEIN_L_C LLINEIN_C

DMIC_CLK_R

DMIC_DATA_R

HPFB_R

6UL_ETH2_RXDN6UL_ETH2_RXDP6UL_ETH2_TXDN6UL_ETH2_TXDP

ETH2_REXT

6UL_LINKLED26UL_LINKSPEED2

VCC_1P2_ETH2

VCCA_ETH2_3V3

ENET2_RD1ENET2_RD0ENET2_RX_ENENET2_TD0

ETH_RST_BETH_RST_B/I2C_BASE_EN_B

6UL_LINKLED2

6UL_LINKSPEED2

ETH2_TCT1ETH2_TCT2ETH2_TCT3ETH2_TCT4

Page 6: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

uSD CARD

Place close to SOM connector

LAYOUT NOTE:

MX6/SOLO/MX8X PCIe

Current Limit: 1.1Kohm 0.35-0.625A Typ 0.5A1K HigherAutoRestart on fault

USB OTG uUSB

Current Limit: 1.1Kohm 0.35-0.625A Typ 0.5A1K HigherAutoRestart on fault

USB HOST Type-A

USB#B_OTG ID for 6UL & MX6/SOLOComes on different pins

USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Differential Impedance: 90 ohms

PCIE Differential Pairs, Follow PCIe routing guidelines.Differential Impedance: 85 ohmsLength match +/-5mil

O.D. signal

LAYOUT NOTE:

LAYOUT NOTE:

Place parallel termination resistorsclose to the mPCIe connector

1.5V_LDO Current limited to 300mA

LAYOUT NOTES:

6UL USDHC controller native CD requires pull down for BOOT-ROM to BOOT from SD Card(MX6/SOLO - Not required)

See also BOOT page

5V and 3.3V are shared across the board .

Avoid exceeding the total regulators capability!

SOLO JTAG TP15,TP16,TP19,TP20,J28.12

Place AC caps close to the connector

LAYOUT NOTE:

SATA Differential Pair, FollowSATA routing guidelines.Differential Impedance: 100 ohmsLength match +/-5mil

MX6 SATA+PWRSOLO JTAG TP's

POWER NOTE:

SHARED PADSPCIE Clock Follow PCIe routing guidelines.

Differential Impedance: 100 ohmsLength match +/-5mil

Appears on J28.12

06. USB, AUDIO, PCIe, SD, SATA

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

JTAG_RST

TP12,TP14, TP26-TP29 Note:Use for SOM-6UL altenate functions.

USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Differential Impedance: 90 ohms

LAYOUT NOTE:

USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Differential Impedance: 90 ohms

LAYOUT NOTE:

Place AC caps close to the connector

GND

GND

GND

GNDGND

BASE_PER_3V3VCC_5V

GND

GND

USB#B_OTG_VBUS

BASE_PER_3V3

BASE_PER_3V3 BASE_PER_3V3

GND

VCC_5V

GND

USB#A_HOST_VBUS

GND VCC_5V

GND VCC_5V

BASE_PER_3V3

BASE_PER_3V3BASE_PER_1V5

GND

GND

GND GND

GND

GNDGND

BASE_PER_3V3 VCC_5V

GND

USDHC#A_DAT2

USDHC#A_DAT1

USDHC#A_DAT3

USDHC#A_DAT0

USDHC#A_CMD

USDHC#A_CLK

OTG_ID_2

OTG_ID_1 USB#B_OTG_D_N

USB#B_OTG_D_P

PCIE_RX_N

PCIE_RX_P

PCIE_TX_N

PCIE_TX_P

PCIE_RST_B

I2C#C_SCL_BASEI2C#C_SDA_BASE

USDHC#A_CD_B

USB#A_HOST_D_N

USB#A_HOST_D_P

J1.70

MX6-SATA_TX_P

MX6-SATA_TX_N

MX6-SATA_RX_N

MX6-SATA_RX_P

UART#DBG_RTS

PCIE_REF_CLK_N

PCIE_REF_CLK_P

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

06. USB, AUDIO, PCIe, SD, SATA

A3

6 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

06. USB, AUDIO, PCIe, SD, SATA

A3

6 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

06. USB, AUDIO, PCIe, SD, SATA

A3

6 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

R10510K

C85

100nF

R6010K

R710R

NC

R671K

C87

22uF

C77

100nF

D13IP4220CZ6

4

2 5

3

1 6

J5

uSD Connector

VCC1

DATAN2

DATAP3

ID4

GND5

S6

S7

S1

1S

10

R7349.9R 1%

TP8

TP28

TP7

TP17

J8

HD

R2

.54

_3

x1

_S

hro

ud

ed

123

L4

MCZ1210AH900L2T

14

3 2

TP10

J7

SATA 7Circuits

GND11

TXP/A+2

TXN/A-3

GND24

RXN/B-5

RXP/B+6

GND37

MP18

MP29

TP19

J6

uSD Connector

CD/DAT32 CMD3 VDD4 CLK5 VSS6 DAT07

DAT21

DAT18

SHL10

SHL13

CD9

SHL11SHL12

R6422R 1%

TP9

C69

4.7uF

D16IP4220CZ6

4

2 5

3

1 6

C8310nF

R7249.9R 1%

C66

10uF

C7810nF

R700R

NC

C71

100uF

C7910nF

C65

100nF

TP14

U14FPF2193

FLAGA1

ENA2 Vout

B1Vin

B2

IsetC1

GNDC2

C76100nF

R6610K

TP11

R621K

C84

100nF

C67

100nF

R5810K

TP27

C74

100nF

C63

100nF

TP12

C73

4.7uF

TP20

L3MCZ1210AH900L2T

14

3 2

C86

22uF

R5910K

R680R

TP29

TP15

C62

4.7uF

U15FPF2193

FLAGA1

ENA2 Vout

B1Vin

B2

IsetC1

GNDC2

C80100nF

R690R

J4USB304FA-C1031301

12

34

5

6

D14IP4220CZ6

4

25

3

16

R6110K

TP18

R651K

C68

100nF

C82100nF

R631K

Q22N7002P

3

1

2

TP26

C8110nF

C72

100uF

TP16

C75100nF

D15IP4220CZ6

4

25

3

16

C64

10uF

J24

MM60-52B1-E1-R650

WAKE#1

COEX13

COEX25

CLKREQ#7

GND19

REFCLK-11

REFCLK+13

GND215

Reserved/UIM_C817

Reserved/UIM_C419

GND321

PERn023

PERp025

GND427

GND529

PETn031

PETp033

GND635

GND1437

+3.3Vaux139

+3.3Vaux241

GND1343

Reserved745

Reserved847

Reserved949

Reserved1051

3.3V_12

GND74

1.5V_16

UIM_PWR8

UIM_DATA10

UIM_CLK12

UIM_RESET14

UIM_VPP16

GND818

W_DISABLE#20

PERST#22

+3.3Vaux24

GND926

1.5V_228

SMB_CLK30

SMB_DATA32

GND1034

USB_D-36

USB_D+38

GND1140

LED_WWAN#42

LED_WLAN#44

LED_WPAN#46

1.5V_348

GND1250

3.3V_252

USDHC#A_DAT2 SD_CLK_R USDHC#A_CD_B

USDHC#A_CD_B

USDHC#A_DAT1

USDHC#A_DAT0 USDHC#A_DAT1

USDHC#A_DAT0

SD_CLK_R

USDHC#A_CMDUSDHC#A_DAT3USDHC#A_DAT2

USB_OTG_N

USB_OTG_P

USB_OTG_ID

USB_HOST_D_N

USB_HOST_D_P

USB_HOST_PWR_EN

USB_OTG_N

USB_HOST_D_N

PCIe_CCLKMPCIe_CCLKP

PCIe_CRXMPCIe_CRXP

PCIe_CTXMPCIe_CTXP

mPCIe_USB#A_D_NmPCIe_USB#A_D_P

SD1_CD_B/

mPCIe_USB#A_D_N

SATAc_TXPSATAc_TXN

SATAc_RXNSATAc_RXP

R_USB#A_D_N

R_USB#A_D_P

mPCIe_USB#A_D_P

USB_OTG_ID

USB_OTG_P

USB_HOST_D_P

USDHC#A_DAT3

USDHC#A_CMD

Page 7: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1. I2C and GPIO run @ 1.8V 2. Camera reference clock generated on camera board3. OV5640 PWRDN is active high - i.e PWR enable is LOW

Connects to Variscite Custom MIPI-CSI2 Camera Board Qualified with x1 OV5640.

Edge connector footprint

PU included in TXS0102

NOTE:

MX6/SOLO MIPI-CSI

LAYOUT NOTE:

HS mode: DIFFLP mode: SE

Differential Impedance (DIFF):100 ohms Single Ended (SE): 50 ohms

MX6/SOLO HDMIMX8X CSI

LAYOUT NOTE:

Differential Impedance:100 ohms

HDMI GPIO

MATING CONNECTORS PN:

HSEC8-113-01-L-DV-A-K - MX8X Camera Adapter

DIR L: B>A H: A>B

From Cam.

From Cam.

To Cam.

To Cam.

To Cam.

<<>>

MX6/SOLO CAMERA BUFFERS

07. HDMI, MIPI-CSI, CSI I2C Level Translator

MX8X-CSI_D03

MX8X-CSI_EN

MX8X-CSI_D07

MX8X-CSI_RST_B

MX8X-CSI_D05

MX8X-CSI_HSYNC

MX8X-CSI_PCLK

MX8X-CSI_D04

MX8X-CSI_D01

MX8X-CSI_D02

MX8X-CSI_D06

MX8X-CSI_VSYNC

MX8X-CSI_D00

HSEC8-113-01-L-RA - HDMI ADAPTER

BASE_PER_3V3 BASE_PER_3V3

BASE_PER_1V8 BASE_PER_1V8

GND GND

BASE_PER_1V8BASE_PER_3V3

GND

BASE_PER_3V3VCC_5V

GND GND

GND

BASE_PER_1V8BASE_PER_3V3

GND

GND

GND

MIPI-CSI_D0_PMIPI-CSI_D0_N

MIPI-CSI_D1_NMIPI-CSI_D1_P

MIPI-CSI_D2_PMIPI-CSI_D2_N

MIPI-CSI_D3_NMIPI-CSI_D3_P

MIPI-CSI_CK_PMIPI-CSI_CK_N

I2C#B_SCL_BASEI2C#B_SDA_BASE

HDMI_TX_DDC_CECHDMI_TX_HPD

J1.79GPLED

UART#A_RTS

UART#A_CTS

HDMI_TX_D0_P

HDMI_TX_D0_N

HDMI_TX_D1_PHDMI_TX_D1_N

HDMI_TX_CK_PHDMI_TX_CK_N

HDMI_TX_D2_NHDMI_TX_D2_P

J1.40

UART#DBG_CTSJ1.70

MIPI_CSI_BUF_OE_B

J1.77

J1.75

UART#DBG_RTS

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

07. HDMI, MIPI-CSI, CSI

A4

7 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

07. HDMI, MIPI-CSI, CSI

A4

7 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

07. HDMI, MIPI-CSI, CSI

A4

7 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

U18SN74AVC4T774

A11

A22

A33

A44

DIR35

DIR46

B112

/OE7

GND8

B49B310B211

DIR216 DIR115

VCCA14

VCCB13

KEY

BOT

TOP

J25

HSEC8-113-01-L-RA-MATING

NC

1357911

13151719212325

2468

1012

14161820222426

TP_CSI-12

VCC

GND

U19

SN74LV1T125DCKR

1

2

3 4

5

TP_CSI-3

TP_CSI-9

TP_CSI-5

R95100K

TP_CSI-16

TP_CSI-1

U16

TXS0102YZPR

B2A1

GNDB1

VCCAC1

A2D1

A1D2

OEC2

VCCBB2

B1A2

TP_CSI-13

J13

HSEC8-130-01-SM-DV-A-MATING

1357911131517192123252729313335373941434547495153555759

2468

1012141618202224262830323436384042444648505254565860

TP_CSI-10

TP_CSI-17

TP_CSI-4

TP_CSI-14

C88100nF

TP_CSI-2

C102100nF

C89100nF

C103100nF

TP_CSI-7

TP_CSI-11

TP_CSI-8

TP_CSI-6

TP_CSI-15

MIPI-CSI_TRIG_1V8

MIPI-CSI_SYNC_1V8MIPI-CSI_OPT_1V8

I2C#B_SCL_BASE_1V8I2C#B_SDA_BASE_1V8

MIPI-CSI_RST_B_1V8MIPI-CSI_PWR_EN_1V8

I2C#B_SCL_BASEI2C#B_SDA_BASE

I2C#B_SCL_BASE

I2C#B_SDA_BASE

I2C#B_SCL_BASE_1V8

I2C#B_SDA_BASE_1V8

MIPI-CSI_TRIG_1V8

MIPI-CSI_SYNC_1V8MIPI-CSI_OPT_1V8MIPI-CSI_RST_B_1V8

MIPI-CSI_PWR_EN_1V8

Page 8: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RESISTIVE TOUCH

MIPI-DSI (MX6/SOLO) SPI2 (6UL) QSPI0B (MX8X)

LVDS_DISP#A

LVDS_DISP26UL - NA

0-3.3V PWM:1KHz

LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms

LAYOUT NOTE:

CAPTOUCH RSTn

CAPACITIVE TOUCH

0-3.3V PWM:1KHz

UART/ESAI/CAN

I2C/SAI

I2C/SPI

ANALOG

08. Display,Touch, Headers

SPI#A

Note: Connect J17.3 to used SOM WDOG_B function.

DISPLAY TOUCH HEADERS

Note: In order to enable Base I2C signals ETH_RST_B/I2C_BASE_EN_B need to be driven LOWSee pp. 05- ETH

Note: Connect J14.10 to used SOM GPIO function for RTC Wake.

GND

BASE_PER_3V3

GND

GND VCC_5V

BASE_PER_3V3

GND

VCC_5V

BASE_PER_3V3

GND GND

BASE_PER_3V3

GND

GND

GND

BASE_PER_3V3

BASE_PER_1V8

GND

UART#BT_TXDUART#BT_RXDUART#BT_CTSUART#BT_RTS

UART#C_TXUART#C_RXUART#C_CTSUART#C_RTS

CLK_OUT#A

J1.70

TP#_X_NEG

TP#_X_POSTP#_Y_POS

TP#_Y_NEG

J1.75J1.77

J1.79

UART#B_CTS

UART#B_TX

UART#B_RTS

UART#B_RXUART#A_CTS

UART#A_TX

UART#A_RTS

UART#A_RX

MIPI-DSI_D0_PMIPI-DSI_D0_N

MIPI-DSI_D1_P

LVDS_DISP2_D0_PLVDS_DISP2_D0_N

LVDS_DISP2_D1_PLVDS_DISP2_D1_N

LVDS_DISP2_D3_PLVDS_DISP2_D3_N

MIPI-DSI_D1_N

LVDS_DISP2_CK_NLVDS_DISP2_CK_P

LVDS_DISP2_D2_N LVDS_DISP2_D2_P

PWM#C

PWM#A

PWM#B

I2C#A_SDAI2C#A_SCL

I2C#A_SDAI2C#A_SCL

CAP_TOUCH_INT_B

GPLED

SAI#A_RXDSAI#A_RXFS

SAI#A_TXCSAI#A_RXCSAI#A_TXFSSAI#A_TXD

I2C#C_SDA_BASEI2C#C_SCL_BASE

I2C#B_SCL_BASEI2C#B_SDA_BASE ENET2_TX_CLK

ENET2_TD1ENET2_TX_EN

CB_RTC_IRQ_B

CB_WDOG_B

UART#DBG_CTS

CAN#A_LCAN#A_H

MIPI_CSI_BUF_OE_B

ENET2_RX_ER

J1.82

LVDS#A_CLK_P

LVDS#A_TX1_PLVDS#A_TX2_N LVDS#A_TX2_P

LVDS#A_CLK_N

LVDS#A_TX1_NLVDS#A_TX0_PLVDS#A_TX0_N

LVDS_TX3_NLVDS_TX3_P

MIPI-DSI_CK_NMIPI-DSI_CK_P

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

08. Display,Touch, Headers

A3

8 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

08. Display,Touch, Headers

A3

8 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

08. Display,Touch, Headers

A3

8 9Tuesday, July 02, 2019Oded A.

Concerto-BoardConcerto-Board

C9610uF

C99

10uF

J26

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

J18

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

C94

470pF

R78100K

J21

HEADER 2X1

NC12

C93

470pF

C92

470pF

J20

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

C91

470pF

J22

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

M1

M2

J15

CF20061D0R0-LF

1234

78

56

J17CH81102M10100

108642

97531

C98

10uF

C90

100nF

C95

10uF

M1M2

J16

4 POS FFC/FPC

123456

J23CH81102M10100

108642

97531

R7710K

J19

HEADER 2X1

NC12

J14CH81102M10100

108642

97531

LCDIF_D6/

TP#_X_NEGTP#_Y_POSTP#_X_POSTP#_Y_NEG

LCDIF_D7/

LCDIF_D20/LCDIF_D21/LCDIF_D4/LCDIF_D5/

SPI2_SCLK/SPI2_MISO/

SPI2_MOSI/JTAG_RSTSPI2_SS/

CAP_TOUCH_INT_B

ECSPI4_MISO/ECSPI1_MISO

ECSPI4_SCLK/ECSPI1_SCLKECSPI4_MOSI/ECSPI1_MOSI

TP#_X_NEGTP#_Y_POSTP#_X_POSTP#_Y_NEGWDOG1_B/

/WDOG1_B

CAP_TOUCH_INT_B

ECSPI4_SS0/ECSPI1_SS0

Page 9: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

6UL BOOT MODE

BOOT SEL

WILL BE REMOVED ON NEXT VERSIONRESET

BOOT_MODE1 - Place PU close to SATA line to minimize stub

- Clean GND under R83 pad

BOOT_MODE0 - Avoid driving High during boot/ PD on SOM

ON = EXT. BOOT.

OFF = INT. BOOT

WAKEUP

BACK

GPLED2

BUTTONS LEDS

All LCDIF_D[0..23] pins should not be driven during boot to undesired value.

Note: For full LCDIF boot values see datasheet of allowed values per pin

NOTE:

09. BOOT, Buttons, LEDs

SOLO BOOT_CFG

J1.40 is boot_sel1; includes 10K PD; Do not drive high during POR_B assertion

BOOT_MODE0

BOOT_MODE1

GND

GND

GND

SOM_3V3_PER

GND

GND

GND

BASE_PER_3V3

GND

VCC_SOM

BASE_PER_3V3

MX6-SATA_RX_N

MX6-SATA_RX_P

BOOT_SEL#A

SW_RSTn

SW_WAKEUP

SW_BACK

MIPI_CSI_BUF_OE_B

GPLED

J1.40

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

09. BOOT, Buttons, LEDs

A

9 9Tuesday, July 02, 2019Oded A.

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

09. BOOT, Buttons, LEDs

A

9 9Tuesday, July 02, 2019Oded A.

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

09. BOOT, Buttons, LEDs

A

9 9Tuesday, July 02, 2019Oded A.

SW4

FSM4JSMATR

12

34

Q42N7002P

31

2

R86 330R

SW3

FSM4JSMATR

12

34

Pin2 is

ON Side

SW2TDA01H0SB1R

12

D21NC

D23

R87

10K

NC

D24TPD1E10B09DPYR

Q32N7002P

NC

3

1

2

D22TPD1E10B09DPYR

D19

D20TPD1E10B09DPYR

R84 330RNC R85

4.7K

NC

SW5

FSM4JSMATR

12

34

R8310K

Page 10: C C CONTENT - Variscite · VCC_GND_SOM_31_33_35 Notes: * New SODIMM pinout modified pins 31 33 35 to be VCC_SOM for delivering > 14W to high power demanding SOMs (e.g. VAR-SOM-MX8).

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

10. Power, RTC, BoardID, Reset, Debug

3.3V BASE

12VPOWER JACK

& ON/OFF Switch

1.8V/0.3A BASE

RTC BATTERY

Note:Variscite does not recommend using SOM RTC circuitry due the high power consumption

SOM PWR

Supply to mPCIe Slot 1

1.5V/0.3A BASE

CURRENT MEASUERMENT

Fiducial

MECHANICSCHASSIS HOLES

3.3V/4A FROM 5V

6.8uH + 1M RT For EMI consideration

DEBUG UART USB BRIDGE

out

out

LAYOUT NOTE:

in

in

USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Differential Impedance: 90 ohms

BOARD ID

Note:To be connected to GPIO for RTC wakeup

5V OKLED

BASE 3.3V PWR LED

3.3V PWR LEDLED

12V TO 5V/6A

SOM_3V3_PER: valid by SOM power up sequence

Optional FAN

Idd < 6uA

90K PU

Vth>=2.79V

Note: Will prevent back flow into an unpowered IO pin.

RESET & WATCHDOG

OD O/P

Equ. PU 17.35K

WDOG_B PINS:MX8: Not ExposedMX8X: 85 - SCU.WDOG0.WDOG_OUTMX6/SOLO: 17,72 - wdog2.WDOG2_B 68 - wdog1.WDOG1_B6UL: 39,55,133,145 - global wdog 46,57,193 - wdog1.WDOG_B 167 - wdog2.WDOG_B 80 - wdog3.WDOG_B

FB1 acts as a fuse.

+12V

BASE_PER_1V8BASE_PER_3V3

GND

BASE_PER_3V3

GNDGND

GND

GND

BASE_PER_3V3 BASE_PER_1V5

GNDGND

VCC_3V3 VCC_SOM

BASE_PER_3V3VCC_3V3

SOM_3V3_PER

GND

GND

GND

VCC_5V VCC_3V3

GND

GND

GND

GND

3V3OUT DEBUG_VBUS DEBUG_VBUS_CON

SOM_3V3_PER

GND GND GND GND GND

GND

GND

GND

GNDGND

BASE_PER_3V3BASE_PER_3V3

GND

GND

VCC_12V

VCC_5V

GND

VCC_12V

GND

GND

VCC_5V

VCC_12V

VCC_5V

GND

GND

GNDGND

GND

GND

VCC_SOM

VCC_SOM

GND

I2C#A_SDA

UART#DBG_RX

UART#DBG_TX

I2C#A_SDAI2C#A_SCL I2C#A_SCL

CB_RTC_IRQ_B

SW_RSTn

CB_WDOG_B

POR_B#_3V3

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

10. Power, RTC,Board ID

A2

10 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

10. Power, RTC,Board ID

A2

10 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

Title

Size Document Number Rev

Date: Sheet ofApproved By:Designer:

Project1.1A_R1.3

10. Power, RTC,Board ID

A2

10 9Tuesday, July 02, 2019Oded A.

Concerto-Board Concerto-Board

C6

47

uF

/16

V

12

TP3

R6

510R

C31

100nF

R111K

JBT1CR1225-HOLDER

+1

-3

++

2

D2

FD1

NC

C27

100nF

C8

10uF

SOT23-6

U9

TPS3808G30DBVT

SENSE5

CT4

MR3

VC

C6

VS

S2

RST1

R1030RNC

FB1

120R 1.2A

C11 10nF

C30

100nF

����

MS1SMTSO-M2-2ET

NC

C23100nF

NC

C371uF

R24

2.2K 1%

U3

TLV70218DBVR

VIN1

EN3

GND2

VOUT5

NC4

R29100K

NC

R960RNCR0603_v1

C3533nF

NC

C9

10uF

D4

TP4

HOLE3

NC

EA

RT

H1

C25100nF

TP25

R10174K 1%

TP5

TP24

D5BAT54C

1

3

2VPC1

PCB

VPC0326

Manufacturer_PN = VPC0326

D1

FD4

NC

R3110K

SW11101M2S3CQE2

C16

47

uF

/16

V

12

C3

10uF

R1423.7K 1%

R19

510R

U4

TLV70215DBVR

VIN1

EN3

GND2

VOUT5

NC4

C14

47

uF

/16

V

12

R18100K

U8FT230XQ

TXD15

RTS#16

VC

CIO

1

RXD2

GN

D1

3

CTS#4

CBUS25

CBUS314

CBUS012

CBUS111

GN

D3

VCC10

RESET#9

EP

AD

17

3V

3O

UT

8

USBDM7

USBDP6

C214.7uF

C34

100nF

R15

21.5K 1%

C138.2nF

HOLE1

NC

EA

RT

H1

R8847K

L2

4.7uH1 2

FD2

NC

C4

100nF

J100

2 Pin Terminal Block

NC12

R2621.5K 1%

R13 100K

R17 0.0RR1210_v1

U2RT7298BHGQW

SS/TR9 GND

2

GND3

PVIN4

PVIN5

RT/SYNC1

FB7

COMP8

GN

D1

5

VIN6

EN10

LX11

LX12

BOOT13

PGOOD14

Y1

32.768KHz

12

R8 1M

C181uF

C5

47

uF

/16

V

12

C284.7uF

ADD= 0xAx

'1' = WP

U6

BR24G04NUX-3TTR

A01

A12

A23

VSS4

SDA5SCL6WP7VCC8

PA

D9

C26

100nF

R910K

NC

C29100nF

'0'-B->A

U7SN74AVC4T245

VCCA1

1DIR2

2DIR3

1A14

1A25

2A16

2A27

GND8

GND92B2102B1111B2121B1132OE#141OE#15VCCB16

PA

D1

7

R970RR0603_v1

U5

ISL12057IUZ

Vcc8

GND4

XI1

XO2

IRQ2#3

SDA5

SCL6

Fout7

C1

10uF

C10

10nF

C33

100nF

R321M

L1

6.8uH1 2

D730V,100mA

HOLE4

NC

EA

RT

H1

R10210K

J10

163-0180-EX

Variscite_PN = VCN0155

1234

J28

HDR2.54_2x1_Shrouded

NC

12

C241uF

NC

C36560pF

D3

PGB1010603MR

C19

4.7uF

C2100nF

C32

10nF

R5

10K

����

MS2SMTSO-M2-2ET

NC

D630V,100mA

U1

RT8070ZQW

COMP1

SS2

EN3

VIN4

LX5

RT6

FB7

PGOOD8

GND9

Q1

TPS27082L

1

3

26

5

4

R21

100K

R89

0R

C221uF

U10TPD4EUSB30

D1+1

D1-2

GND3

D2+4

D2-5

NC110

NC29

GND8

NC37

NC46

����

MS4SMTSO-M2-2ET

NC

RX110K

HOLE2

NC

EA

RT

H1

����

MS3SMTSO-M2-2ET

NC

C15

47

uF

/16

V

12

C7

560pF

J9

USB MICRO AB

VCC1

DATAN2

DATAP3

ID4

GND5

S6

S7

S1

1S

10

R124.3K 1%

D830V,100mA

TP6

FD3

NC

FB3120R 1.2A

R16

68K 1%

R30

0R

R28120R 1%

R7 33K

R2510K

R1041K

R2010K

R2747K

C12180pF

C10033nF

COIN_IN

VCC_RTC

XI

XO

PBAD_U10

PBAD_U10

UART_BRDG_TXDUART_BRDG_RXDUART_BRDG_RTSUART_BRDG_CTS USB_DEBUG_DM

USB_DEBUG_DP

VCC_5V_BAD_BVCC_12V_PJ

VCC_5V_BAD_B

FAN_PWR

SW_RST_R WD_SENSE

RST_CT

nWDOG_C WD_MRn

WD_SENSE