Paper ID #30180

BYOE: Microelectronic Non-Idealities Laboratory Explorations

Mr. Kip D. Coonley, Duke University

Kip D. Coonley received the M.S. degree in Electrical Engineering from Dartmouth College, Hanover, NHand the B.S. degree in Physics from Bates College, Lewiston, ME. Following graduation from Dartmouth,he developed electronically controlled dimmers for fluorescent and incandescent lamps at Lutron Elec-tronics, Coopersburg, PA. From 2001 to 2005, he was a Research Engineer at RTI International, where hedesigned high-efficiency thermoelectrics using epitaxially grown superlattice thin-film structures. Since2005, he has been the Undergraduate Laboratory Manager in the Department of Electrical and ComputerEngineering at Duke University, Durham, NC. His interests include undergraduate engineering education,energy harvesting, RFID, power electronics, plasma physics, and thin films.

Mr. Alexander Gregory Culbert, Duke University

Alexander Culbert is currently a product engineer at TrackX Technology, LLC. He received his B.S.E.in biomedical and electrical and computer engineering from Duke University in 2019. His past researchincludes utilizing additive manufacturing in pre-clinical medical imaging and using magnetic resonanceimaging to verify pulmonary diseases. He is interested in medical imaging and devices, microelectronicdevices, and education.

Prof. Aaron Franklin, Duke University

c©American Society for Engineering Education, 2020

BYOE: Microelectronic Non-Idealities LaboratoryExplorations

AbstractMicroelectronic circuits and semiconductor devices are presented to students and treated incircuits as ideal. This makes sense initially. Unfortunately, it is often not possible to delve fullyinto the many non-ideal behaviors these devices can exhibit in practical situations. In practice,thermal effects, gain and load limits, input and output resistance, operating bandwidth constraints,and breakdown limits are non-negligible and important to understand for upper level circuit andsemiconductor classes, and senior designs or capstones.

This paper presents several laboratory experiments, called explorations, developed for asophomore-level introductory microelectronic devices and circuits course which introducemicroelectronic device non-idealities in a hands-on, self-discovery based laboratory setting.Group learning and presentation skills are employed to provide a breadth of exposure to all thenon-ideal behaviors explored. The laboratory experiments presented are designed to bestand-alone and easily explored with only the most basic level of familiarity with wiring anddevice testing in the laboratory. The non-idealities explorations are described below. Selectedactivities will be presented at the ASEE conference. Student feedback in the form of a satisfactionsurvey administered at the end of the semester provides initial data on the success of thenon-idealities explorations developed.

Thermal Effects on PN Junction Diodes and MOSFETs: This experiment demonstrates the effectsof an increased temperature on PN junction diodes and MOSFETs. Students build a simple circuitand measure the current through the integrated circuit at room temperature and at an increasedtemperature over a fixed voltage range.MOSFET Amplifier Gain and Load Limits: In this experiment, students build a single MOSFETCommon-Drain amplifier and verify its AC gain. Loads, both resistive and capacitive are thenattached to the circuit and the effects on gain and bandwidth explored.MOSFET Input and Output Resistance: This experiment challenges students to measure andsimulate the input and output resistance of a single MOSFET inverter, or “buffer” circuit. Theinfluences of source and load resistance and supply voltage are suggested explorations.MOSFET Inverter Maximum Clock Frequency with External Capacitance Load: The purpose ofthis experiment is to determine the effect of output (load) capacitance on a MOSFET invertercircuit. This is done by measuring the maximum achievable device clock frequency with variouscapacitive loads.Zener Diode and Reverse Breakdown Effects: The purpose of this experiment is to showcasediode reverse breakdown in a practical circuit. To do so, the Zener diode is introduced todemonstrate voltage clamping. A Zener diode circuit is simulated, explored in practice, and itsI-V curve measured in the laboratory.

Introduction

The explorations provided here expand upon a semester’s worth of laboratory experiments thatstudents have completed in an introductory, sophomore-level microelectronics course entitledMicroelectronic Devices & Circuits at Duke University. The laboratories that take place prior tothis one introduce students to the PN junction diode, MOSFET, and discrete digital circuits usingdiodes and transistors. These devices are characterized experimentally and key parameters areextracted. The circuit simulation tool used throughout the course is PSpice. Presented here in itsentirety is the last laboratory in the course, which expands upon what has been learned andextends it to non-ideal device operation.

Similar work has examined both when to best introduce new course material and how to makethat material relevant. Learning theorists propound a structure for education where a scaffoldedframework is coupled with just-in-time information [1]. Both breadth and depth are consistentlyreferenced throughout curricula as an effective means to educate an engineer [2]. Across coursesand through repeated work, both requirements can be met. When to do so appears to depend uponthe level of the material. The objective of one recent study in an introductory lumped systemsmodeling course sought to address the issue of learning retention and understanding with simpleactivities presented early in the term [3]. Another approach, taken by a recent Embedded Systemscourse, added modules to help improve retention, understanding, and utilization of key conceptsfor design course work at the end of the semester [4]. Specifically, in the area of microelectronicdevices, efforts to make material relevant have emphasized hands-on learning. More recently,through the use of technology, success has been found using simulated online and virtual devicecharacterization [5]. To put this work into context, the laboratory explorations presented hereoccur at the end of the semester using hands-on group and team learning exercises in lab. Theyspan the breadth of the course and provide added depth through experimentation. A primary goalis to improve concept retention and understanding and to motivate design work occurring later ina student’s curriculum.

The impetus to create a non-idealities laboratory for this introductory level microelectronicscourse stems from a desire to expand course coverage and motivate student interest for whatcomes next. The content offered in these laboratories goes beyond what is covered in classlectures. Using the same devices implemented earlier in the semester, these short explorationsprovide a relevant hands-on experience with device non-idealities. An additional motivation tointroduce device non-ideal behavior at this introductory level is that many of these concepts willbe explored in much greater depth in subsequent upper-level microelectronics courses. Exploringnon-ideal device parameters empirically in lab and plotting them in simulation provides hapticfeedback to students.

The overarching goal in this work is to cause students to 1.) expand upon the concepts learnedearlier in the course, 2.) explore new applications and limitations of the technologies introduced,3.) work in small groups to design and test an experiment, and 4.) collaborate and ethically sharemeasurement outcomes.

Methods

Each of the earlier laboratories in the Microelectronic Devices & Circuits course, in which thisnon-idealities lab occurs, concludes with its own short experimental exploration. Theseexplorations ask students to use the technology they have just been exposed to in lab and apply itin a practical way. Such practical applications include LED lighting, signal rectification, a ringoscillator, a discrete SR latch, and infrared communication. As the semester progresses, eachexploration grows in complexity and the time it takes to complete. This last lab in the course canbe thought of as an extended exploration. One that explores in further depth several differentpractical applications and limitations of the devices and circuits introduced earlier in thesemester.

The purpose of this non-idealities laboratory is to introduce students to characteristics of thedevices and circuits used earlier in the course that may not adhere to idealized behavior.References to the effects explored can be found in most fundamental microelectronics textbooks.The effects explored in these device non-idealities experiments and the course laboratories arebased on the classic S. M. Sze Semiconductor Devices: Physics and Technology [6] text andshown in Table 1.

Table 1. Non-idealities Experiment References

Topic Laboratory Exercise Sze reference[6]Thermal effects Experiment 1: Thermal Effects on

PN Junction Diodes and MOSFETsCh. 3. p–n Junction, Sect.3.4.3 Temperature Effect, pp.96

Gain limitations and theeffect of load on a cir-cuit’s output

Experiment 2: MOSFET AmplifierGain and Load Limits

Ch. 5. Unipolar Devices,Sect. 5.5 The MOSFET: Ba-sic Characteristics, pp. 200

Non-infinite input re-sistance and non-zerooutput resistance

Experiment 3: MOSFET Input andOutput Resistance

Ch. 5. Unipolar Devices,Sect. 5.5 The MOSFET: Ba-sic Characteristics, pp. 200

Response time of cir-cuits and the effect ofload capacitance

Experiment 4: MOSFET InverterMaximum Clock Frequency withExternal Capacitance Load

Ch. 5. Unipolar Devices,Sect. 5.5.2 Equivalent Circuitand Frequency Response, pp.207

Device breakdown Experiment 5: Zener Diode and Re-verse Breakdown Effects

Ch. 3. p–n Junction, Sect. 3.6Junction Breakdown, pp. 100

The assessment results collected in this study are based on instructor observations and a surveycompleted by students at the end of the semester. Instructor observations are summarized in theDiscussion section following each exploration. These observations are based on input from thelaboratory teaching assistants and course instructors. The survey (Appendix A) results are basedon the responses of over 100 students. The survey was conducted at the end-of-semester andsought student impressions of their self-learning after having completed or observed all of thenon-idealities laboratory explorations.

Experiment 1: Thermal Effects on PN junction diode MOSFET

Conducted in groups of 2 or 3 students each.

Purpose

The purpose of this experiment is to observe the effects on MOSFET characteristics due tothermal variations.

Procedure

PN Junction Diode

1. Construct the circuit shown in Fig. 1 on a breadboard.

VDC

iD R

D

Figure 1. PN-Junction Diode Test Circuit

2. Run the LabVIEW singleloop.vi script. Run from 0 to 6 V with 100 steps. This producesID(Vd)

3. Repeat the above, but with a voltmeter over the diode, to measure VPN . Combine the resultsto produce the graph ID(VPN).

4. Now, obtain thermal paste from your TA and apply it to the diode. Obtain a soldering ironand heat it to its lowest setting. Apply the soldering iron to the diode to allow it to heat up.

5. Repeat steps 1.–3. with increasing diode temperatures and compare the results.

Next, you will explore the thermal effects on a MOSFET.

MOSFET

1. Construct the circuit shown in Fig. 2 on a breadboard.

2. Open doubleloop.vi on LabVIEW. Set the inner voltage VDS , Source to run from 0 to 6.0 Vwith 50 steps, and set the outer-voltage (VGSSource) to run from 2.0 to 3.0 V with 5 steps.Obtain the ID vs. VDSSource.

RDS

100 Ω

IDS

VDS Source

VGS Source

IGS

+

VDS

−

+

VGS

−

Figure 2. Circuit Used to Characterize an NMOSFET

3. Obtain thermal paste from your TA and apply to the face of the NMOSFET. Heat theNMOSFET with a soldering iron on its lowest heat setting. Then, repeat step ii.

4. Analyze the results.

Present your findings for both the PN junction diode and the MOSFET under temperature to theclass.

Typical Experimental Results

Students initially obtain two graphs from LabVIEW for the room-temperature PN junction diode.Representative graphs are shown in Fig. 3. After applying heat, the graphs will look like Fig. 4,with the only noticeable difference being the lower current values in the heat plots. Aftercombining these results to produce the graph ID(VPN), the two I-V curves will look like Fig.5.

For the MOSFET experiment, after running LabVIEW on the device with and without deviceheating, plots should look like Fig. 6, with the noticeable difference between the two plots beingthe higher current values seen in the heated MOSFET case. Choosing one ID at a specificV GSSource and comparing no heat versus a heated MOSFET I-V curve side-by-side will producea graph similar to that shown in Fig. 7, with the noticeable increase in current values for theheated MOSFET.

Discussion

Both the PN junction diode and MOSFET are susceptible to thermal variations. In an earlier labsession, students explore the diode only at room temperature using the diode equation, (1).

(a) ID(Vd) of a PN junction diode (b) VPN of a PN junction diode

Figure 3. LabVIEW plots of a PN junction diode at room temperature

(a) ID(Vd) of a PN junction diode (b) VPN of a PN junction diode

Figure 4. LabVIEW plots of a PN junction diode with heat applied

Figure 5. PN junction I-V (ID(Vd)) curves with and without heat applied

ID(VPN) = IS exp

(qVPN

γkbT− 1

)(1)

where IS is the saturation current (very small, pA in Silicon), q is the charge magnitude of anelectron (1.60 x 10−19 C or 1 eV ), k is Boltzmann’s constant (1.38 x 10−23 J/K or8.614 x 10−5 eV/K), T is temperature (in Kelvin), and γ is the ideality factor (taken as 1.0).

In the earlier laboratory, the assumption is made that VPN > 3kBTq

, which is approximately 75mV at room temperature, such that (1) reduces to

ID(VPN) ≈ IS exp

(qVPN

γkbT

). (2)

This assumption still holds for increase diode temperatures. However, the effect on the thresholdvoltage of the diode and it’s I-V curve slope are observed.

Similarly in the case of the MOSFET device, the effect of temperature is observed in thisexperiment empirically. The device equation is presented in class lectures and emphasizeschannel length parameters and threshold voltage. So, it is interesting for students to observe theincreased conductance of the MOSFET. The increased conductance observed is based largely onfundamental electron conductance across the device energy gap at increased temperatures.

As a result of this experiment, the importance of maintaining a semiconductor’s temperature forreliable operation becomes more evident to students. The need for heat sinks on devices tomaintain their temperature within a desirable range is apparent to students.

(a) ID vs V DSSource of a MOSFET at room temp. (b) ID vs V DSSource of a MOSFET with heat applied

Figure 6. LabVIEW plots of a MOSFET with and without heat applied

Figure 7. I-V curves of a MOSFET with and without heat applied

Experiment 2: MOSFET Amplifier Gain and Load Limits

Conducted in groups of 2 or 3 students each.

Purpose

The purpose of this experiment is to measure the gain of a MOSFET amplifier with varyingresistive and capacitive loads.

Procedure

1. Construct the circuit shown in Fig. 8 on a breadboard.

820 kΩR2

10 µF

C1

vi(t)

R1 1 MΩ

270 ΩR4 10 µFC2

vo(t)

R3 680 Ω

15 V

Figure 8. Circuit Used to Characterize MOSFET Amplifier Gain and Load Limits

2. Set vi(t) to be a 100 mVpp, 50 kHz sinusoid.

3. Carefully measure and record vo(t) (both AC and DC components).

4. Based on this measurement only, determine the AC voltage gain of this amplifier.

5. Now attach a load as shown in Fig. 9 to the amplifier output. CL should be 1 µF and and RL

should be 100 Ω. Carefully measure and record the total output voltage vo(t).

6. Based on this measurement only, determine the voltage gain vo(t)vi(t)

with this output loadapplied.

7. Now increase the magnitude of input vi(t) until vo(t) is severely distorted (i.e. both the topand bottom of the sinewave are clipped). Carefully measure and record the output vo(t)(both AC and DC components).

820 kΩR2

10 µF

C1

vi(t)

R1 1 MΩ

270 ΩR4 10 µFC2

CL

RL

vo(t)

R3 680 Ω

15 V

Figure 9. Circuit Used to Characterize MOSFET Amplifier Gain and Load Limits

8. Repeat steps 4.–7. for CL and RL equals 10 µF and 680 Ω, and for CL and RL equals 47 µFand 10 kΩ, respectively.

At what voltage values did the output signal clip, and why?

Comment on the effect of a capacitive load on this circuit.

Comment on the effect of increasing the magnitude of the input voltage on the circuit.

Comment on the effect of increasing the capacitive load values.

Present your findings to the class.

Typical Experimental Results

After construction of the circuit shown in Fig. 8, students record a vo(t) DC, a typical value is5.15V and vo(t) AC, around 1.25Vpp. Based on this measurement alone, the AC voltage gain ofthis amplifier is vo(t)

vi(t)or 1.25 Vpp

100 mVppor 12.5.

After attaching the load as shown in Fig. 9, students record a total output voltage, vo(t) around5.08V DC and 0.26Vpp AC. Based on this measurement alone, the voltage gain is vo(t)

vi(t)or 0.26 Vpp

100 mVpp

or 2.6.

The circuit’s output voltage, vo(t) becomes severely distorted when in input voltage, vi(t) is set to700mVpp, as seen in Fig. 10. Students should measure vo(t) at 5.17 V DC and 0.96 Vpp AC. Theresults of repeating steps 4.–7. can be found in Table 2.

Figure 10. Distorted voltage plot

Table 2. Capacitance and Resistance values against voltage at distortion

CL and RL vi(t) at Distortion vo(t) at Distortion

1 µF and 100 Ω 700mV 5.17V DC and 0.96Vpp AC10 µF and 680 Ω 1.1V 6.11V DC and 2.78Vpp AC47 µF and 10 kΩ 1.6V 6.85V DC and 4.53Vpp AC

Discussion

Ideal, unloaded MOSFET topologies were explored in earlier laboratories in the course. The goalof this experiment is to show students the effects of resistive and reactive loads on a MOSFETcircuit. The resistive load significantly decreases the overall circuit gain. The addition ofcapacitance at the output has several interesting effects. First, the capacitive load allows thecircuit to amplify without distortion to increased magnitude input voltage values. Students alsoobserve that the output capacitor increases the DC output value as it “holds” charge.

Experiment 3: MOSFET Input and Output Resistance

Conducted in groups of 2 or 3 students each.

Purpose

To measure the input and output resistances of a discrete MOSFET inverter device.

Procedure

The Inverter circuit show in in Fig. 11 from a Discrete Digital Circuits laboratory is often referredto as a Buffer circuit. One of the benefits of using a MOSFET between stages of a system is thatthe MOSFET has a very high input resistance and a very low output resistance. A high inputresistance means that not much current enters the device; a high output resistance means that thedevice does not affect the loading of the system it is attached to. A MOSFET Buffer, as in anearlier Discrete Digital Circuits lab, has both of these advantages. Hence, in a system, it can“buffer” the stages from one other so that the stages act more or less independently of oneanother.

A B

BS170

B

RL 240 kΩ

VDD

A

Figure 11. Inverter Gate Symbol and Discrete Diode Implementation

1. For the MOSFET Inverter shown in Fig. 11, devise a way to determine the input resistanceand the output resistance of the circuit (note that the input and output resistances can bemodeled as the Thevenin equivalent resistances at the input and output terminals,respectively).

2. Conduct your experiment by measuring input and output voltages and currents, respectively.(Hint: Apply Ohm’s Law to determine resistance from current and voltage measurements.)

What is the input resistance of the MOSFET buffer?

What is the output resistance?

3. Now, explore what might change the input and output resistance values the most in thisMOSFET Inverter circuit. What you explore as a group is up to you. As suggestions, thesource resistor value might be changed, or the voltage supplied to the Inverter circuit couldbe changed, perhaps what effect adding a load resistor from source to ground has on theinput and output.

4. Repeat steps 1.–3. in PSpice.

Present your findings to the class

Typical Experimental Results

When building the circuit, a voltage at the gate, or “A” is applied to turn on the MOSFET.Typically, around 4.0 V . A VDD of 12 V is used. In this way, the current and voltage into the gatecan be measured. The current measured is negligible and the voltage measured is equal to theinput voltage. Applying Ohm’s Law students see that for a reasonable voltage of 4.0 V at the gateand a negligible current, the resultant input resistance of the device is very high.

Similarly, when measuring the output volt-age, vo, or “B”, the student will find a smallvoltage. In this situation with vi of 4.0 V ,a voltage of 0.12 mV DC and a current of50.95 µV are measured. Applying Ohm’slaw yields a resistance of 2.4 Ω, demonstrat-ing a very small output resistance. Numer-ous variations may be explored by the stu-dent. Decreasing the voltage into the gate,for example, will increase the output volt-age, and subsequently increase the outputresistance and decrease the input resistance.This circuit is replicated by the student insimulation using PSpice, as in Fig. 12. Byrunning a transient PSpice simulation, cur-rent and voltage values similar to those mea-sured in the physical circuit are observed.

Figure 12. PSpice simulation of a buffer circuit

Discussion

An important characteristic of circuit amplifiers is their near infinite input impedance and nearzero output impedance. The effects of load on a circuit were explored in Experiment 2: MOSFETAmplifier Gain and Load Limits. Thus, the importance of load on circuit behavior is fresh instudents’ minds. The foundation is set in this experiment for Operational Amplifiers whichexhibit both high input impedance and low output impedance.

Experiment 4: MOSFET Inverter maximum clock frequency with externalcapacitive load

Conducted in groups of 2 or 3 students each.

Purpose

The purpose of this experiment is to determine the effect of capacitance at the output on themaximum achievable inverter clock frequency.

Procedure

1. Build the inverter circuit shown in Fig. 13 from a Discrete Digital Circuits laboratory.

BS170

B

RL 240 kΩ

VDD

A

Figure 13. Discrete Diode Implementation Of Inverter Circuit

2. Input a slow 100 Hz, 2 Vpp square wave at the gate of the MOSFET and observe the output.It should look square and should be inverted from the input waveform.

3. Increase the input square wave frequency until the output waveform is degraded. (Justifyhow you define a degraded square wave output. Consider whether a digital switching circuitcould use the output waveform as a reliable input source.)

4. Add a small capacitance (10 nF) to the inverter output from the drain to the ground andrepeat step 2.

5. Now, continue to replace capacitors at the output and repeat step 2., above. Repeat with0.1 µF, 1 µF, 10 µF, and 47 µF.

6. Plot the frequency of the input waveform where the output was considered to be degraded(this is the maximum output frequency fmax) vs. capacitance.

Table 3. Capacitance values versus frequency where waveform degradation begins

Capacitance Frequency at Degradation

0 F 3 kHz10 nF 50 Hz0.1 µF 6 Hz1.0 µF 1 Hz10 µF 50 mHz47 µF 5 mHz

What can you conclude from your plot?

How does maximum clock frequency relate to load capacitance? Why might this be important inapplications?

Present your results to the class.

Typical Experimental Results

The output of the buffer inverter circuit with the initial slow 100 Hz, 2 Vpp square wave shouldlook like Fig. 14 (a). By increasing the input square wave frequency, the student should notice theoutput waveform starts to ”round out”, or look less like a square. As seen in Fig. 14 (b), theoutput is no longer a square, and the maximum and minimum became peaks. This would be adegraded square wave output as a digital switching circuit would not be able to switch under theseconditions. A digital switching circuit requires a binary high and low, and this output is no longerclearly binary. This happens at an input square wave frequency of around 3 kHz.

(a) Initial low frequency square wave output (b) Distorted square wave observed at 3 kHz.

Figure 14. Examples of non-distorted and distorted square waves with no external capacitive load

After adding a small capacitance of 10 nF , the student should find the voltage output becomesdegraded at around 50 Hz. Table 3 displays the capacitance to frequency of degradation for theremaining capacitances.

Discussion

This experiment picks up where an earlier discrete digital circuits laboratory left off. In thatearlier laboratory, MOSFET as an inverter was explored. The discrete MOSFET invertingbehavior was characterized. However, the effect of input frequency on the device’s ability tofollow the inverted behavior was not delved into. In this experiment, the relatively good trackingof the inverter based on a discrete MOSFET topology is observed. And, as in Experiment 2:MOSFET Amplifier Gain and Load Limits, the effect of capacitance at the output is observed.For the inverter circuit here, the maximum clock frequency of the inverter is severely affected bycapacitance. This result motivates the need for buffering circuits at the output of logic gates tominimize the deleterious effects of loading.

Experiment 5: Zener diode (Reverse breakdown)

Conducted in groups of 2 or 3 students each.

Purpose

The purpose of this experiment is to showcase the use of Reverse breakdown in practical circuitsand to show a circuit using the Zener diode to demonstrate voltage clamping.

Procedure

One of the parameters that was not measured in the earlier diode laboratory was the reversebreakdown voltage of a diode. This is because most diodes have very large reverse biasbreakdown voltages, on the order of 100’s of Volts. However, some diodes are specificallymanufactured to be used in the reverse bias breakdown region. These diodes are called Zenerdiodes.

Warning: Diodes and Resistors can get hot when conducting high currents.

1. Simulate the following circuit in PSpice using a 5.5 V Zener diode found in the standardPSpice parts library, a 6 V DC source, and a 100 Ω resistor.

V

iD

D

R +

−

Vout = Vz

Figure 15. Zener Diode Circuit

2. Verify in simulation that the output voltage, Vout is 5.5 V. Where is the remaining 0.5 Vvoltage drop going?

3. Verify the current, iD, through the resistor. Is this value what you expect? Why?

4. Build the circuit in Fig. 15 on a breadboard. There are Zener diodes in the parts bin.

5. Attach the 6 V output source to the circuit. Supply 0 V and measure Vout.

6. Now, increase the DC voltage up to 6 V.

7. Measure the output voltage again.

8. Repeat steps 2.–4., but this time measure current.

What can you conclude about the Zener diode? How might this be of practical use in anapplication?

9. Now, using the singleloop.vi script, create a plot of the Zener diode V-I curve. Be sure totake both forward biased and negative biased measurements of the Zener diode to showturn-on voltage, V-I characteristics, and reverse breakdown.

What differences do you notice about the Zener diode as compared to the PN junction diodeobserved in the earlier diode laboratory?

Present your findings to the class.

Typical Experimental Results

The voltage output at 0 V is 0.35 mV , or noise. At 6 V , it is 5.5 V . The current output at 0 V is0 A, or noise, and at 6 V input it is 1.17 mA.

LabVIEW goes from 0 V to 6 V with a DC supply. In order to go to negative voltage values on anI-V curve plot using LabVIEW, the Dc power supply must be reversed on the circuit. Therefore,the plot seen in Fig. 16 visually is accurate, except the voltage values displayed are going theincorrect direction to display Zener breakdown.

The PSpice simulation should look similar to Fig. 17.

Figure 16. Experimentally measured data using LabVIEW of a Zener diode in reverse bias, orZener breakdown.

Figure 17. PSpice DC circuit simulation using a Zener diode. The apx. 5.5 V clamping behaviorof the Zener diode used is evident.

Discussion

Diode reverse bias breakdown in mentioned in lab but never explored. This is practical since mostdiodes do not exhibit breakdown when reverse biased until 100 V or more. The Zener diode,however, is a PN junction device specifically designed to operate reliably in reverse breakdown. Itis most often used at a voltage clamp to regulate and commonly protect voltage-sensitive devicesin other parts of a larger circuit. They are extremely useful as voltage protectors for integratedcircuits and microprocessors. This experiment allows students to observe reverse breakdown inthe laboratory in a practical way using a Zener diode. They also see how it can be used in a circuitthrough simulation where the clamping behavior of the diode is observed. The curious studentwill ask where the additional voltage goes in the circuit. The increased current flow through thediode when the input voltage is increased can be observed in simulation to answer thisquestion.

Assessment and Results

The laboratory assessment survey conducted at the end of the semester asked students to considerseveral reflective questions. The complete survey presented to students is show in Appendix A.The questions posed were pedagogical in nature and sought student impressions of theirself-learning after having completed or observed all the non-idealities laboratory experiments.While not explicit in the survey, the questions asked attempt to incorporate the AccreditationBoard of Engineering Technology (ABET), Engineering Accreditation Commission (EAC)Criterion 3, Student Outcomes which are assessed for all core and design courses [7].

The survey was conducted over two (2) semesters in the Microelectronic Devices & Circuitscourse. In that time, over 100 students experienced and responded to their impressions of thenon-idealities laboratory. The lab occurred during the last full week of classes in two regularacademic semesters.

Survey results are shown in Figs. 18–21 and are summarized below:

• Overall, students agreed that the laboratory contributed to their knowledge and interest inthe subject of microelectronics, Fig. 18 (a) & (b).

• Students generally felt that the laboratory went beyond previously taught material,Figs. 19 (a). There was more of a spread in opinion regarding whether the laboratory helpedwith critical thinking, Fig. 19 (b).

• The questions regarding the laboratory manual and whether time was well spent in lab werediagnostic and intended to improve future laboratory offerings, Fig. 20 (a) & (b).Responses were acceptable with most students agreeing that the lab manual was clear andtime was well spent in lab.

• Fig. 21 (a) shows which laboratory experiments were performed. Regarding this data, it isimportant to remember that students were placed in groups of 2 or 3 to complete the labexperiments. Each group completed only one (1) of the five (5) experiments in lab. Becausethe explorations were more involved, groups of 3 were chosen for students to completeExperiment 1: Thermal Effects on PN Junction Diodes and MOSFETs,Experiment 2: MOSFET Amplifier Gain and Load Limits, andExperiment 4: MOSFET Inverter Maximum Clock Frequency with ExternalCapacitance Loadwhile students worked in groups of 2 forExperiment 3: MOSFET Input and Output Resistance andExperiment 5: Zener Diode and Reverse Breakdown Effects.Otherwise, each experiment was uniformly conducted and presented on by groups in eachlaboratory.

• Fig. 21 (b) shows which laboratory experiments students generally found the mostinteresting. Experiment 1: Thermal Effects on PN Junction Diodes and Experiment 4:MOSFET Inverter Maximum Clock Frequency with External Capacitance Loadproved to be the most interesting to students.

(a) (b)

Figure 18. Overall knowledge and interest question results

(a) (b)

Figure 19. Introduction of expanded concepts and critical thinking question results

(a) (b)

Figure 20. Lab manual clarity and effective use of time question results

(a) (b)

Figure 21. Laboratory experiments performed and of most interest to students

Conclusions

At Duke University we have added a last laboratory on non-idealities to the introductoryMicroelectronics Devices & Circuits course. The purpose of this addition is to expose students atthe sophomore level to more advanced device concepts which they will explore in much greaterdepth in later courses. An advantage of this laboratory is that it provides a single, compact,laboratory experience that can be implemented with minimal effort in the most basic electronicslaboratory. While this particular laboratory is offered at the college level, this same experimentcould easily be used as-is at the middle- or high-school levels and/or for STEM outreach.

Acknowledgements

The authors would like to thank the Duke University teaching assistants who contributed to thiswork: Anshu Dwibhashi ’20, Cooper Lair ’20, Martin Li ’19, Edward Yao ’19, and Joanne Zheng’20. Januario Carreiro ’21 was also instrumental in circuit diagrams for the lab experiments.

References

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