by S. M. Loo, Arlen Planting Department of Electrical and...
Transcript of by S. M. Loo, Arlen Planting Department of Electrical and...
Boise State University
Digital Systems Laboratory
EE230L Introduction to Xilinx ISE 1
byS. M. Loo, Arlen Planting
Department of Electrical and Computer EngineeringBoise State University
First Released: Spring 2005 with ISE 6.3iUpdated: Fall 2006 with ISE 8.1i
Updated: Spring 2009 with ISE 10.1
Boise State University
Digital Systems Laboratory Introduction
• This tutorial will introduce the Xilinx ISE Computer-Aided
Design (CAD) Software
• The goal of this tutorial is to provide you with the skills to
use ISE to facilitate learning digital designs
• This software tool is capable of simulating any digital
design that you will attempt in this class and, more
EE230L Introduction to Xilinx ISE 2
design that you will attempt in this class and, more
importantly, in a real-world environment
• You will enter a logic circuit that implements the equal
function!• This tutorial has been prepared by your friendly neighborhood lab assistant and
course instructor
Boise State University
Digital Systems Laboratory Start Project Navigator
• Find the Xilinx ISE 10.1 icon on desktop to start Xilinx Project Navigator and double-click the icon
• This is the Xilinx ISE window
EE230L Introduction to Xilinx ISE 3
• This is the Xilinx ISE window
• ISE always opens the most recent project! If this sub-window contains data, then use FILE→Close Project.
• Note Project Navigator in Windows task bar.
Boise State University
Digital Systems Laboratory Create New Project
• To create a new project, File→New Project
EE230L Introduction to Xilinx ISE 4
Boise State University
Digital Systems Laboratory Name Schematic
• Give a name to the
project
• Make sure that the
project location is
where you want it.
The lab computer
EE230L Introduction to Xilinx ISE 5
The lab computer
has a D drive, and
can be used for
your designs.
• Top-Level Module
Type is Schematic
When all the fields have been filled, click Next.
Boise State University
Digital Systems Laboratory Target Device Specification
• This is important, and will be used later for FPGA designs.
• Make sure other values match what is shown
• This device specification is
EE230L Introduction to Xilinx ISE 6
specification is required for targeting the FPGA we have in the lab. This will be important when we download to the FPGA.
Boise State University
Digital Systems Laboratory Skip these Dialogs
EE230L Introduction to Xilinx ISE 7
Boise State University
Digital Systems Laboratory Lab1-Equals Project
• Note the
project name
and target
EE230L Introduction to Xilinx ISE 8
and target
FPGA ID
Boise State University
Digital Systems Laboratory Add Schematic Source to Project
• Now we
need to add
a schematic
source to the
project
EE230L Introduction to Xilinx ISE 9
Boise State University
Digital Systems Laboratory Name Schematic
• Select Schematic
• Name Schematic
EE230L Introduction to Xilinx ISE 10
Boise State University
Digital Systems Laboratory New Schematic Window
• A blank schematic sheet has been created and added to the project.
• Double click on
• You will get this
EE230L Introduction to Xilinx ISE 11
• You will get this schematic capture window. Re-size the window to optimize the working area. Try to close the middle window (the “Select Options” window)
Boise State University
Digital Systems Laboratory Change Page Size
• Since this is a
small design, we
will change the
page size to fit
an 11”x8.5”
sheet of paper.
EE230L Introduction to Xilinx ISE 12
Boise State University
Digital Systems Laboratory Set Page Size to 11”x8.5”
EE230L Introduction to Xilinx ISE 13
• You can always increase the page size by revisiting these steps.
Boise State University
Digital Systems Laboratory Add Symbols
• Now we want to add the component symbols to the schematic
• Select the Add Symbol button from the toolbar.
EE230L Introduction to Xilinx ISE 14
• Hitting the Esc key will cancel the Add Symbol mode.
Boise State University
Digital Systems Laboratory Add Title to Schematic Diagram
• Symbol
categories
• Symbols within
each category
EE230L Introduction to Xilinx ISE 15
Boise State University
Digital Systems Laboratory Add Inv Symbols
• Select “Logic” Category and find “Inv” (abbreviation for inverter)
• Place two “Inv” on the sheet, by clicking at the desired locations on the sheet
EE230L Introduction to Xilinx ISE 16
on the sheet
• Symbols can be moved by clicking once at the symbol. This turns the symbol to red, then it can be moved
Boise State University
Digital Systems Laboratory Add 2-input AND Symbols
• Select the
AND2 symbol
and click on
drawing where
you wish to
add symbol
EE230L Introduction to Xilinx ISE 17
• Add two
AND2
symbols
Boise State University
Digital Systems Laboratory Add 2-input OR Symbol
• Select the OR2 symbol and click on drawing where you wish to add symbol
EE230L Introduction to Xilinx ISE 18
• Add one OR2 symbol
• Organize the symbols as you see in this figure
Boise State University
Digital Systems Laboratory Label Symbols
EE230L Introduction to Xilinx ISE 19
• Right Click on symbol and select Object Properties– This step is to label the symbols to something that could be more
meaningful to you by changing to the Value of InstName
• This step is optional
Boise State University
Digital Systems Laboratory Set Symbol’s Properties
• Change InstName Value as you desire
EE230L Introduction to Xilinx ISE 20
Boise State University
Digital Systems Laboratory Add Wires
• Now add wires to connect the symbols
• Close the Source window by (pull-down menu) View → Source
• Open the Processes window by (pull-down menu) View →Processes
• Select the Add Wire button from the toolbar
EE230L Introduction to Xilinx ISE 21
the toolbar
• On the options tab, select the Use the Manual method …
• Hitting the Esc key will cancel the Add Wire mode and lead to this window that is very useful for selecting a wire
Boise State University
Digital Systems Laboratory Add Wire Step 1
EE230L Introduction to Xilinx ISE 22
• Connect these two segments as indicated by the green
arrows
Boise State University
Digital Systems Laboratory Add Wire Step 2
EE230L Introduction to Xilinx ISE 23
• Hover over as indicated by the red arrow until the cursor
image changes to connection point indicator
• Connection point indicator
Boise State University
Digital Systems Laboratory Add Wire Step 3
EE230L Introduction to Xilinx ISE 24
• Left click (hold the left button) and drag wire as shown in
figure
• Once connection indicator appears, release mouse button
Boise State University
Digital Systems Laboratory Schematic with Wires
EE230L Introduction to Xilinx ISE 25
• Repeat until you have connected all of the pins
• For pins that are connected to external devices such as switches and LEDs, just add wire and leave unconnected on that end
• Does your schematic look like the one above?
Boise State University
Digital Systems Laboratory Add I/O Markers (or I/O Pads)
• Select the Add
I/O Marker
button from the
toolbar
EE230L Introduction to Xilinx ISE 26
Boise State University
Digital Systems Laboratory Add Input/Output Markers
• Select “Add an input marker”
• Add input markers
• Select “Add an output marker”
• Add output marker
EE230L Introduction to Xilinx ISE 27
Boise State University
Digital Systems Laboratory Label I/O Markers
• Right Click I/O Markers
and select Rename
Port
• Input names should be
SW1 and SW2
EE230L Introduction to Xilinx ISE 28
SW1 and SW2
• Output name should
be LED1
Boise State University
Digital Systems Laboratory Save and Check Schematic
• Save the schematic diagram
• Activate the schematic check routine (pull-down menu), Tools→Check Schematic
• Fix any error you might have and run the check routine
– Observe the bottom window for these messages• “Start DRC …”
• “No error or warning is detected”
• You can print your schematic diagram (portrait or landscape) or even preview the printout before you print
EE230L Introduction to Xilinx ISE 29
preview the printout before you print
• Save the diagram before you exit the schematic capture tool (by clicking on the × on the top right hand corner of the schematic capture window)
Boise State University
Digital Systems Laboratory
Back to Project Design
Summary
EE230L Introduction to Xilinx ISE 30
Boise State University
Digital Systems Laboratory Add Test Bench Source
• The circuit entry is completed, but how do we know whether the design works?
• We will test our design using a test bench!
EE230L Introduction to Xilinx ISE 31
Boise State University
Digital Systems Laboratory Name Test Bench
• Select Test Bench
Waveform
• Name Test Bench
EE230L Introduction to Xilinx ISE 32
Boise State University
Digital Systems Laboratory Associate Test Bench With Schematic
• Select the schematic
that is to be used by this
Test Bench
EE230L Introduction to Xilinx ISE 33
Boise State University
Digital Systems Laboratory Test Bench Creation
EE230L Introduction to Xilinx ISE 34
Boise State University
Digital Systems Laboratory
EE230L Introduction to Xilinx ISE 35
Boise State University
Digital Systems Laboratory
Accept Default Timing
Values
EE230L Introduction to Xilinx ISE 36
Boise State University
Digital Systems Laboratory New Test Bench Window
• The waveform window is part of ISE
EE230L Introduction to Xilinx ISE 37
Boise State University
Digital Systems Laboratory Define Input Values
EE230L Introduction to Xilinx ISE 38
• Note the vertical blue line in column 1000 - this is the end of
test marker. It was set in the initial slide. You can reset this
number by positioning the pointer on top of the blue line
close to the time ruler and right clicking.
• Why are the values for SW1 and SW2 defined this way?
You need to understand.
Boise State University
Digital Systems Laboratory Save Test Bench Definition
• The Test Bench is not added to the project until you have
saved this file
EE230L Introduction to Xilinx ISE 39
Boise State University
Digital Systems Laboratory Test Bench & Project
• Note that the Test Bench
TB_Equals has been added
to the project
• Select the “Behavioral
Simulation” from the pull-
down menu as shown and
close the test bench
EE230L Introduction to Xilinx ISE 40
close the test bench
waveform window
Boise State University
Digital Systems Laboratory Activate Simulation
• Make sure that TB_Equals.tbw is selected
• Note the entries in figure
• We want to use Simulate Behavioral Model
• This will create a new set of windows that are
EE230L Introduction to Xilinx ISE 41
of windows that are separate from ISE
Boise State University
Digital Systems Laboratory Wave Default
EE230L Introduction to Xilinx ISE 42
• Multiple windows will appear on Xilinx ISE Simulation
Boise State University
Digital Systems Laboratory Zoom to View Wave
EE230L Introduction to Xilinx ISE 43
• You can move the blue cursor to observe the values at
different times.
Boise State University
Digital Systems Laboratory Close Windows
• Close Xilinx ISE 10.1
EE230L Introduction to Xilinx ISE 44
Boise State University
Digital Systems Laboratory Now wasn’t that simple ?
EE230L Introduction to Xilinx ISE 45
Boise State University
Digital Systems Laboratory And don’t you forget it !
EE230L Introduction to Xilinx ISE 46