Low-Power Circuits and Energy Harvesting for Structural Health Monitoring of BridgesR.RAM PRAKASH (EEE)ST.JOSEPHS COLLEGE OF ENGG AND TECH

Abstract In this paper, we present a self-powered wireless sensor system for structural health monitoring of highway bridges. The system consists of an energy harvesting material, power conditioning circuitry, a sensor, an analog-to-digital converter, and a wireless transmitter. The energy harvesting material is a recently discovered NiMnCoIn magnetic shape memory alloy (MSMA), which converts mechanical vibrations first into a magnetization change and then, with assistance from a pick-up coil, into an alternating current (ac) output. The ac output of the MSMA is converted to a direct current (dc) voltage for powering a sensor and circuitry. Measurement results from a self-powered rectifier (SPR) and a six-bit successive approximation register analog-to-digital converter (SAR ADC) are presented, and implementation considerations are presented for the sensor and wireless transmitter. The SPR produces dc output voltages larger than 700 mV for loads larger than 100 k_ with peak input amplitudes > 400 mVpk. A four-stage rectifier-multiplier is also implemented utilizing the proposed SPR as the first stage. The implemented SAR ADC is functional with a 0.9-V dc supply voltage (Vdd) and achieves an improved performance with a Vdd of 1.8 V, where the SAR ADC achieves a measured integral nonlinearity and differential nonlinearity of +1.2/ 1.9 least significant bit and +1.3/0.99 LSB, respectively. The SPR and SAR ADC are fabricated in a standard 0.5-m CMOS process. The proposed sensor system can be fully optimized due to co-design capabilities. The lack of batteries makes this system ideal for deployment in bridge monitoring systems.Index Terms Analog-to-digital converter (ADC), energy harvesting, magnetic shape memory alloy, power scavenging, rectifier, structural health monitoring.I. INTRODUCTIONIN THE U.S. alone there are more than 55,000 interstate bridges in use today of which approximately 25% areManuscript received June 1, 2011; revised January 21, 2012; accepted October 15, 2012. Date of publication November 12, 2012; date of current version January 14, 2013. The work of I. Karaman was sup-ported in part by the National Science Foundation, Division of Materials Research, Metals and Metallic Nanostructures Program, under Grant 0909170, the National Science Foundation-International Materials Institute Program under Grant DMR 08-044082, the Office of Specific Programs, Division of Materials Research, Arlington, VA, and the U.S. Civilian Research and Development Foundation, under Grant RUE1-2940-T0-09. The associate editor coordinating the review of this paper and approving it for publication was Prof. Elliott R. Brown.J. L. Wardlaw was with Texas A&M University, College Station, TX 77843 USA. He is now with Cirrus Logic, Inc., Austin, TX 78701 USA.I. Karaman is with the Department of Mechanical Engineering, Texas A&M University, College Station, TX 77843 USA (e-mail: ikaraman@tamu.edu).A. I. Karslayan is with the Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX 77843 USA (e-mail: karsilay@ece.tamu.edu).Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/JSEN.2012.2226712

A.CYRIL SUSAI (EEE)ST.JOSEPHS COLLEGE OF ENGG AND TECH

deemed as structurally deficient [1]. It is estimated that it will cost more than $9 billion dollars and take more than 20 years to repair these bridges. These deficiencies pose a threat to individuals who use bridges for their daily commute. For example, in late 2007, a portion of I-35 in Minnesota collapsed killing 13 people and injuring 145. According to the National Transportation Safety Board (NTSB), the collapse was mainly attributed to a structural flaw and a larger load than initially called for in the design [2].For over 30 years a growing trend in academic and industrial research has been to develop systems and methodologies, i.e., structural health monitoring (SHM), to detect and mitigate issues in civil infrastructures to avoid incidents such as the I-35 collapse. Methods for SHM fall into two categories: 1) Destructive Evaluation (DE) and 2) Non-destructive Evalua-tion (NDE) [3]. Ideally NDE is the desired system since it does not require partial destruction of the structure, however this is not completely possible since technology has not advanced far enough to find an NDE method able to detect all structural flaws. Some of the parameters which are evaluated in NDE are strain or stress at different points on, or within, the structure, frequency/modes of vibration, and impedance changes of the material or structure [3].Although there are some NDE systems in place, they are usually inefficient or unable to perform all required tasks for proper structural evaluation. The main method of NDE is visual inspection [4], [5]. However, by the time cracks are optically visible in the structure most of the damage has already occurred and it may be too late. Instead, utilizing a system designed to measure the electrical impedance changes of the concrete section could be employed [6]. In [7], a coil was placed inside a section of concrete and Eddy currents were detected before and after damaging the structure. The impedance of the coil/concrete segment was then measured and it was shown that it changes notably when a damage occurs near the measurement location. It was also found that the impedance difference is greater as the coil is closer to the damage, thus allowing the identification of the damaged location. There are other techniques of impedance based mea-surements where different sensing materials such as optical fibers and capacitive plates that are embedded within the con-crete [8][10]. In [11] accelerometers are utilized to analyze the different vibration modes of a bridge at different locations to determine the optimum placement of the sensors. Once the data is collected it is then transmitted to a central processing unit (CPU). In [12][17], the authors show how the bridge vibrates when a vehicle passes over a bridge or roadway at1530437X/$31.00 2012 IEEEa frequency related to the speed of the passing vehicle, the relative ratio of the masses of the vehicle and the bridge span, as well as the length of the bridge section. This information is then used to perform different characterizations on the bridges to detect damages based on the original vibration tests. In [14], the bridge natural frequency changes when there is a damaged section of the bridge. Therefore, it can be concluded that proper detection of the natural frequency can allow for determination of the health of the bridge.The main issue with most NDE methods is the need to power the circuitry used to characterize the structure. Often times it may be difficult and costly to run cables to all locations which must be monitored. Additionally, the cost of maintain-ing and replacing batteries can become expensive for a large bridge with many sensors. Instead, energy harvesting could be employed to harvest ambient energy from the environment in which the systems are deployed. Efforts have been made to scavenge energy from the bridge vibration to power sensor sys-tems [18] since all structures vibrate and are not always located near large sources of sunlight or wind. In this paper we present an energy harvesting methodology based on a magnetic shape memory alloy (MSMA) power harvester. Additionally, a low-power wireless sensor system is designed which is intended to be deployed as an NDE SHM technique for highway bridges but could be implemented in other civil structures and transportation systems. Key circuit building blocks of the pro-posed sensor system are discussed. Finally, energy harvesting measurement results on a sample of NiMnCoIn MSMA sample are presented along with the measurement results for a self-powered rectifier (SPR) which converts the alternating output from the MSMA sample into a usable dc signal. Additionally, a new low-power successive approximation register analog-to-digital converter (SAR ADC) is designed and fabricated, and the measurement results are shown.II. PREVIOUS SELF-POWERED SHM SENSORSIn recent years there has been a great emphasis placed on environmental/public safety as well as renewable and sustainable energy. A combination of both issues has led to increased research in sensor systems and networks that require minimal stored electrical energy and use of batteries. This means that the sensors and their supporting circuitry either extract energy from an electrical power source in order to transmit the desired information [19] or find a way to generate electrical energy from a mechanical excitation [18].The authors in [18] developed an energy harvester, convert-ing mechanical energy into electrical energy via a mass on a spring system in the presence of a pick-up coil to sense the magnetization change upon the motion of the mass. The authors were able to extract a large amount of power, >12 mW, at the expense of using a fairly large pickup coil, >10,000 turns. In their work, several sensors were placed on a bridge and temperature information was collected. The main focus of their work was on developing an energy harvester and used commercially available sensor circuitry for transmission and data collection.In [19] the authors developed a sensor system which utilizes commercially available radio frequency identification (RFID)

Applied VibrationRectifier

BiasMultiplier

MagneticVdd

Field

MSMA

GND

VddPickup Coil

VddVdd

RR

ADCIRUWB TX

R R+ RStrainGage or OtherSensorFig. 1. Proposed self-powered wireless sensor system.tags and readers to transmit information obtained from custom designed strain gages. The RFID tags are embedded within the structure and are only in use when powered up. The RFID tags are passive, i.e., no battery, and they extract their energy from the RFID reader as it is passed within 1 to 3 feet of the embedded tag. The reader transmits a radio frequency (RF) signal at a specified frequency (915 MHz, 2.4 GHz, among others) and the tag then uses the RF power transmitted from the reader to generate a dc voltage and turn on all the tag circuitry. The information from the RFID tags sensor is then transmitted back to the reader for processing. In this work, the information sent back to the reader is obtained from a temperature sensor. The main drawback of this technique is its necessity for a USB connection to power the reader while its location is between 1 and 3 feet from the tag.Additionally, attempts at using vibration-based energy har-vesting have been implemented in electric power systems [20] and using unconventional materials [21]. However, most of these systems suffer from the necessity of needing large vibra-tional frequencies to generate enough power and/or requiring large output voltage amplitudes to properly power the circuitry.A system level diagram of the proposed self-powered sensor system is shown in Fig. 1. The system consists of a magnetic shape memory alloy (MSMA) for converting the mechanical vibrations from the bridge into a magnetic flux change and then utilizes a pick-up coil to convert this flux change into an electric field change, an ac-dc rectifier to convert the ac output from the coil into a dc voltage, a sensor (a strain gage is shown but another sensor could be implemented), an analog-to-digital converter (ADC), and an impulse radio ultra-wideband transmitter (IR-UWB TX). Below, we describe individual system components in detail and special emphasis will be given to those building blocks which have been implemented, namely the MSMA energy harvester and pick-up coil, the ac-dc converter, and the ADC.

NiMnGaNiMnCoIn

MechanicalMechanical

VibrationsVibrations

pick-upHBias

Magnetic

coil

Field

loadno

Hload

Biasload

Magneticno

pick-up

Fieldload

coil

c rc

lcN

TDFig. 3. Pick-up coil used to capture magnetic flux change in the MSMA device.Fig. 2. Different methods of flux change in NiMnGa and NiMnCoIn MSMAs upon mechanical loading/unloading in the presence of a bias magnetic field.A. Energy Harvesting

1) Magnetic Shape Memory Alloys as Energy Harvest-ing Materials: Previous work on energy harvesting using MSMAs has been performed utilizing NiMnGa MSMA single crystalline samples [22]. MSMAs can convert mechanical work, such as from mechanical vibrations, first into a mag-netic induction change in the material in the presence of a constant bias magnetic field, which can then be converted into electrical energy through pick-up coils. There are two major mechanically-induced microstructural changes that manifest themselves as large magnetization changes in MSMAs. The first one is the stress/strain-induced rotation of martensite vari-ants (the microstructural change) within the material [22][24]. Magnetic domains are strongly coupled with martensite vari-ants in the material exhibiting this mechanism such that martensite variant rotation leads to magnetic domain rotation, and thus magnetic flux change. NiMnGa MSMAs utilize this mechanism to harvest energy from mechanical vibrations or otherwise waste mechanical work [22]. The level of current which can be generated in the pick-up coils, and thus the amount of power which may be delivered to a load, depends on the magnetic induction change upon martensite variant rotation, which is measured to be on the order of 0.15 to 0.2 Tesla in near stoichiometric Ni2MnGa MSMAs [22], [24]. We have recently demonstrated in these materials that the power output levels on the order of a Watt are within reach, upon the conversion of relatively large amplitude mechanical vibrations under 200Hz frequency [22]. The second mechanism of mechanically-induced microstructural and magnetic changes in MSMAs is the stress-induced martensitic phase transformation from a ferromagnetic to a para/antiferro-magnetic phase [25], [26], which is fully reversible upon unloading the stress. This mechanism can cause a large magnetic flux change in the presence of a bias field due to large differences in the saturation magnetizations of the transforming phases. Typical MSMAs exhibiting this large change are NiMnCo(In,Sn,Sb) alloys. They are also called meta-magnetic SMAs because of the simultaneous magnetic and structural phase transitions [26][33]. As compared to the magnetic induction change associated with the mechanically-induced martensite variant

rotation, the magnetic induction change during the stress-induced martensitic transformation in thesematerialscan

be multiple times higher, depending onthe biasfield

levels [26]. Thus, using meta-magnetic SMAs as energy harvesting materials is more beneficial in terms of power output levels for a given vibrational loading. In addition, the magnetization rotations and the nature of the flux change in these two mechanisms are notably different, as shown in Fig. 2 for a NiMnGa and a NiMnCoIn MSMAs. In NiMnGa, the magnetization direction usually changes from horizontal to vertical in the figure upon loading and vice versa upon unloading (depending on the single crystal orientation), but this configuration is the best one per [22], [23]. In meta-magnetic SMAs such as NiMnCoIn alloys, the magnetic flux can be aligned perpendicular to the pick-up coil at all times and the magnetization can change from almost zero to maximum (i.e., saturation magnetization) upon loading/unloading. This implies in NiMnCoIn that the maximum flux change can be sensed by the coil and then generate the maximum output voltage. Moreover, since magnetic domains are strongly coupled with microstructure in NiMnGa, it is necessary to use very expensive single crystals. However, in meta-magnetic SMAs, because saturation magnetization levels of the transforming phases dictate the magnetic induction change upon structuralphasetransformation,relatively inexpensivepolycrystals

can beused. In thepresent study, we, thus,implement

a NiMnCoIn meta-magnetic SMA as a potential energy harvesting material to convert the mechanical vibrations into a usable electrical signal.2) Pick-Up Coil Design: A basic drawing of the coil is shown in Fig. 3 where N is the number of turns, c is the wire diameter, lc is the height of the coil, the outer diameter of the coil is equal to D + 2T where D is the inner diameter and T is the thickness, and rc may be defined as the effective radius of the coil assuming T is small enough when compared to D [34], [35]. The pick-up coil is a key design parameter. Depending on the volume of the MSMA, the inner dimensions and height of the coil are then fixed since the MSMA must fit in the center of the coil and, to maintain as uniform a magnetic field as possible, the coil should not be taller than the MSMA sample [34], [35]. Since the equivalent impedance of the coil determines, in conjunction with the equivalent input impedance of the rectifier, the amount of power which mayIinRcoiloutput voltage, obtainablepower,andoverall rectifiereffi-

ciency will vary depending on the amplitude of the voltage

VRcoilapplied to the rectifier itself. However, in order to obtain

some basic insights into how the coil and rectifier resistances

VcoilVLRLeffect the overall performance of the energy extraction, this

simple model gives a good starting point for some basic

insights. In energy harvesting systems, the amount of energy

scavenged is typically low and therefore any losses within the

system impose limitations on the overall system performance.

Fig. 4. Equivalent electrical model of MSMA harvested voltage and coilTherefore, it is necessary to achieve a high power conversion

efficiency so as to not waste the harvested energy while

resistance Rcoil with rectifier input resistance RL .

obtaining the required amount of energy for the system. In

be transferred from the energy harvester to the ac-dc converteraddition to , it is also beneficial to study the power delivered

Pload to the load Rload and how this power level effects the

the pick-up coil design is crucial.

peak ac voltage (Vpk ) across RL . For maximum power transfer

Assuming the magnetic flux change may be sensed by the

the value of RL should be set to Rcoil which is defined by the

coil without any loss, andthetime varying magnetic field

maximum power transfer theorem. Calling Pmax the power

within the MSMA is B = B0r sin (t) the output voltage of

delivered toRLwhen it is equivalent to Rcoil , the ratio of

the coil with no load may be expressed as [22]Pload / Pmaxmay now be taken into account for the analysis.

d B 2lc T D2 B0r f

VN A(1)Therefore, the electrical efficiency may be defined as the

coil =c.

dt2c2power delivered to the load RL divided by the power put into

In the expression for thetime-varying magnetic field,B0the system. This power, Pin , is equal to the power dissipated

is half the reversible magnetic flux densitychange, rison Rcoil plus the power delivered to RL . Using the simple

the volume fraction of the material undergoing mechanicallymodel in Fig. 4, (4) and (5) show and the ratio of the power

induced martensitic variant reorientation or martensitic phasedelivered to the load to the maximum deliverable power to the

transformation and is defined as _/_max , _ is the appliedload as a function of RL / Rcoil .

strain range, _max is the maximum variant rotation or phasePVIRR

transformation strain, and =2 fwhere f is the frequency =load=Lin=L /coil(4)

PinVIinVIin1+RL / Rcoil

of excitation of the material. In (1), Ac is the area of the coilL+Rcoil

as viewed from above and may be approximated as D2/4Pload=4RL / Rcoil(5)

assuming T is small. Inthisexpression, the value of N isP(1 + RL / Rcoil )2

approximated as lc T /c2since it is assumed that the coil ismax

wound very tightly around the MSMA sample.One important observation about is that it is equal to the ratio

With the approximated output voltage from the coil known,VV. This means the larger the efficiency, the larger the

L /coil

and assuming the rectifier stage has an input resistance ofpeak voltage which appears across RL . This is an important

RL , it is possible to predict the amount of power deliveredobservation and will be revisited later when discussing the

to and voltage across RL as well as determine the overallac-dc conversion.

efficiency of the electrical power delivery. Although theSince the proposed system does not contain any external

efficiency of converting the mechanical vibration into a changebatteries and is intended to operate solely on the harvested

in magnetization and thus a voltage is important, this efficiencyenergy from the MSMA, a method of converting the ac signal

will be assumed ideal (i.e., 1) and the only efficiency infrom the coil into a dc level is necessary. The value of RL

question will be the conversion of the power delivered from theis a model for the input resistance of a passive rectifier-

coil to the input of the rectifier. The resistance of the coil maymultiplier (RM) architecture. A single stage RM implemented

be found from Rcoil= L/ A where is the conductivity ofwith diodes and capacitors is shown in Fig. 1 as the stage

to which the coil connects. As will be discussed in the

the coil material, L is the length of the coil, and A is the cross-

sectional area of the wire. In this case, L may be approximatedfollowing section, obtaining the largest voltage as efficiently

by N D and A = c2/4. Using the same estimation for N asas possible while simultaneously producing adequate power

for the remaining circuitry is critical. Therefore, rather than

in (1) we obtain4lc T D

Rcoil(2)being concerned with maximum power, the overall efficiency

.may be a more critical parameter. To gain an insight, and

c4

Using voltage division on the equivalent model shown inthe ratioPload / Pmaxare plotted in Fig. 5as afunction of

Fig. 4, the peak load voltageVmay be given asRL / Rcoil . It canbeshown that thesetwo functionsinter-

LsectwhenRL / Rcoil= 3whichleads to = 0.75 and

RL / Rcoil

VV(3)Pload / Pmax=0.75. Conversely, if the system were designed

R/ R.

L=coil 1+L= 1, leads to = 0.5 and

coilfor maximum power, i.e., RL / Rcoil

Although RL is modeled as a simple resistor, a real systemPload / Pmax = 1.

will havean impedancethatis timevariant(e.g., diodes,As anexample, assuming a reasonable value of V

switches,etc.). Therefore,unlikewith a fixed resistor,thecoil =

0.3 V [22] may be obtained from an MSMA sample, with

RL / Rcoil

Power Ratio and Efficiency vs. RL/Rcoil1

0.8

C1

VoutMN

and0.6

max0.4PL/Pmax

/P

L

P0.2

012345

0

RL/Rcoil

Fig. 5. Plots of (4), , and (5), PL / Pmax , versus ratio of load resistance RL and coil resistance Rcoil to determine optimum value of RM input resistance and coil resistance to obtain a high efficiency and a reasonable power delivered to the RM.V0.273V , =

Rcoil = 50 _ and RL / Rcoil = 10, L

0.91, and Pload = 148.76 W . Conversely, if one were to use the value RL / Rcoil = 1 for maximum power transfer,V=0150V ,=050, and

the values would then be L..

Pload = 450 W . Although roughly three timesas much

power is delivered to RL in the maximum power case, there is almost half as much voltage swing at the same node. For operating semiconductor devices, which will comprise the RM structure, having a larger voltage swing at the node would be more beneficial than having a larger power. Additionally, although 148.76 W is not a large power, it is a significant amount and, with proper design, can be enough to power the remaining circuitry as long as the rectifier itself performs an efficient ac-dc conversion. This is because the amount of dc power available to the remaining circuitry is equal to the RMs ac-dc conversion efficiency multiplied by the amount of power delivered to the input resistance of the RM, which has been modeled by the resistor RL . So, assuming the case where= 10 to produce a larger input voltage swing to theRM and a RM efficiency of 10%, a power of approximately 15 W will be available for the sensor, ADC, transmitter and any other remaining circuitry. Therefore, low-voltage and low-power circuit design techniques must be employed. These techniques include choosing an appropriate integrated circuit process for circuit design (minimum feature length of devices, threshold voltages, bipolar or CMOS devices, etc.), operating the devices in weak or moderate inversion to save power at the expense of speed, etc. Many of these design choices will be addressed in the following sections.3) AcDc Conversion Unit: The ac signal from the coil must be converted into a dc signal to power the sensor system. Ideally one would like to design a rectifier that, regardless of the input amplitude, would be able to completely convert the ac signal into a dc level without any loss. However, this is not possible and the rectification circuitry must be designed carefully to provide the best output for the given input and loading conditions. Additionally, to minimize overall system cost, the rectifier should be implemented on the same die as the other circuitry and should not contain any special

VinC2Iload

MNFig. 6. Typical single-stage rectifier-multiplier architecture utilizing diode-connected NMOS transistors.process options to avoid additional costs for mask layers or processing.As mentioned previously, it is not necessarily beneficial from a system level view to match the rectifiers input resistance to that of the energy harvesting coil (i.e., setting RL in Fig. 4 equal to Rcoil ). This was attributed to the need for optimizing the peak input voltage of the rectifier. With a typical single stage rectifier consisting of a single ideal diode, a resistor load, and a filtering capacitor, the dc output voltage is equal to the peak input voltageVV(6)

out,ideal =in

where Vout,ideal is the dc output voltage of the ideal rectifier and Vin is the peak amplitude of the ac input voltage. However, due to the diodes forward voltage drop, parasitic effects, reverse conduction losses during the negative half cycle of the input signal, and loading conditions, the dc voltage at the rectifier output is limited to a fraction of the peak input voltage [36]. Assuming the only loss is equal to the diode voltage dropVd , the dc output voltage Vout,real becomesVVV(7)

out,real =in d .

This result shows that, for rectification purposes, it may be necessary to design for the largest input voltage to the rectifier.In energy harvesting applications, the obtained dc voltage levels are generally on the order of a few hundred millivolts with a single rectification stage and are not sufficient to power the system. Instead, one may use a multi-stage rectifier which is often called a rectifier-multiplier (RM) [37][39]. Fig. 6 shows a schematic of a RM using diode-connected NMOS devices instead of traditional diodes. Although NMOS tran-sistors are shown, one may replace these devices with diodes, PMOS devices, or switches and obtain a similar function. The use of devices other than traditional diodes is common in modern integrated circuit technology and they are used when:1) the design kit does not contain proper diode models; or

2) the input amplitude of the rectifier is significantly less than the turn-on voltage of the diode. While these are not the only reasons why certain components are utilized within a specified design, the choice of the implemented devices is one which is typically left as a design parameter and is dependent on a number of factors (e.g., cost, size, availability, performance, drift, etc.).

Although there are many different methods of implementing an RM architecture [36][56], cost and functionality are two constraints on the circuit design. Simple diodes may be used [37][39] to implement the RM structure, however, the voltage drop will likely be too large for an energy harvesting applica-tion since this drop directly effects the maximum obtainable dc voltage. Schottky diodes [36] or zero-threshold diode-connected MOS devices [40] may be used for their lower ON voltage, but not all integrated circuit processes support these structures. Additionally, even if zero-threshold devices are supported within the design kit, it is possible that the CMOS transistors threshold voltage (Vth ) variation, and therefore loss associated with the diode-connected device, is too large to be realizable for an energy harvesting application [41]. Instead, implementing the RM structure using standard metal oxide semiconductor (MOS) transistors and either metal-insulator-metal (MiM) or MOS capacitors is a more viable option [41][54]. However, these circuits are usually limited by the necessity of implementing external oscillators, current sources, implementing large resistors, or even reverse conduction losses of the devices themselves. Another method of rectification is to use switches as the main rectification devices instead of diodes. In these applications, diodes may be used within the circuitry, but are only used for initial start-up sequences or for supporting the main rectification path. In these applications where switches are implemented, the gates of the switches, and therefore ON resistances, are controlled by on-chip low-power circuitry, such as diodes or low-power comparators to bias the gates [55], [56].In applications where the RM input amplitude is limited to a few hundred millivolts, minimizing conduction losses and voltage drops within the RM circuit becomes the most critical design aspect. Therefore, implementing an architecture which performs this task is tantamount. One topology which achieves this task uses a comparator to control the RM switches. Although the power consumption of the comparator degrades the maximum possible efficiency since it directly draws power from the RM output, it is an ideal solution as long as the power consumption of the comparator is negligible compared to the load and is considered during the design process [56]. The comparator in [56] utilizes current mirrors to perform the comparison with a fixed voltage and therefore this circuit draws a static power from the RM output.For sensor applications, keeping the overall system cost as low as possible is desirable. Therefore, since the system is implemented using integrated circuit technologies, keeping the cost per chip down is a key design parameter. To do this, the circuits should be implemented using standard components without any special processing options that require more mask layers, and therefore cost increase. This places constraints on performing the rectification operation without using exter-nal oscillators and batteries, zero-Vth devices, Schottky or standard diodes. Additionally, the rectifier and any circuitry controlling the rectification process should be powered by its own dc output. With these constraints in place and knowing the input peak-to-peak voltage of the rectifier will be on the order of a few hundred millivolts, a switching rectifier will present the most efficient design which translates to a larger dc output voltage.

Vx

VG

C1

VinMPVout

MNC2Iload

VxVG

VoutComparator Implementation and generated from VinFig. 7. Proposed self-powered rectifier (SPR) [57] for structural health monitoring (SHM) and the implemented gate-driven comparator [58].Since external circuitry for controlling the gates is avoided to keep the cost down, the signal used to control the gates of the rectifiers must be generated by the input signal. To do this, a low-voltage, low-power comparator should be imple-mented which consumes minimal dc power, has an input-output latency which is negligible compared to the period of the rectifier input signal, and is capable of driving the CMOS switches. One method of implementing the comparator has already been discussed in [56]. The main drawback of [56] is its consumption of static dc power. To avoid this, a low-voltage comparator is proposed to incrementally sample the voltages at Vx and Vout at time instances related to the period of the signal at the rectifiers input. Since, by definition, dynamic power is only consumed during switching events, this should lead to a more efficient solution. Therefore, to minimize static power consumption, use standard components without addi-tional processing options, and to increase the overall system efficiency, the circuit shown in Fig. 7 illustrates the proposed comparator-based RM [57]. This circuit utilizes a low-voltage comparator comprised of inverters and transmission gates [58] to perform the comparison and amplification operations. To minimize the ON resistance of the transmission gates, which provides a faster decision time for the comparator and a more efficient RM topology, a clock doubler [59] is implemented to increase the amplitude of, and generate, the anti-phase signalsand . The circuit is called a self-powered rectifier (SPR)since the only applied signal (ac or dc) to the circuit is the ac input from the MSMA coil and the comparator is then powered by the rectified signal at the RM output. In other words, there are no batteries and the circuit generates a dc voltage from the ac input which is used to power all other circuits as well as its own supporting circuitry.B. Sensor Unit

1) Strain Gage: A well-known sensor used for determining the mechanical condition of a structure is a strain gage.

The electrical resistance of the strain gage changes as the structure is put under mechanical loading/unloading. Usually one or more strain gages are employed in a sensor network and are connected in a Wheatstone Bridge configuration. Fig. 1 has a representation of a Wheatstone Bridge. Since the reference voltage (Vdd ) for the bridge may be directly supplied by the ac-dc converter, the resistances used in the bridge configuration can directly affect the power consumption and limit the amount of voltage which may be obtained from the rectifier-multiplier (RM). Since, from the viewpoint of the ac-dc converter, the Wheatstone Bridge is effectively a parallel combination of two resistors, each resistor (nominally) must maintain a high enough value (usually greater than 100 k_ so as to not limit the operation of the RM and to minimize the amount of current in the Wheatstone Bridge. To do this, proper material selection for the strain gage must be done. According to Strain Measurement Devices [60], the gage may be made using a sputtered thin film process depositing the strain gage material in a high vacuum. The strain gage material used in their process has a nominal resistance of 4 k_/mm2. Therefore, as long as the sensor itself has an average strained area > 25 mm2, the nominal resistance of the strain gage will be over 100 k_. This value is both reasonable to keep the power consumption low as well as allowing the device to fit easily on a strained area of a bridge.It should be noted also that the outputs of the strain gage sensor will be nominally set at approximately Vdd /2, assuming equal resistances are used in the configuration. Therefore, as long as large deflections are not created due to heavy loading, poor structural stability, or damage, the output of the strain gage will be centered around Vdd /2. This implies the input to the analog-to-digital converter (ADC) should also remain relatively close to this same level implying the upper and lower extremes of the ADCs dynamic range may not be used unless the system is damaged.2) Magnetic Shape Memory Alloy as a Sensor: It has already been mentioned that the MSMA is an ideal candidate for deployment as an energy harvester for the proposed self-powered wireless sensor system. With its harvesting capa-bilities known and its design parameters mentioned, it is also worth stating that the MSMA material itself may be implemented as a sensor [22], [24]. This may be done since the magnetization is linearly dependent on strain in MSMAs. Therefore, as the strain increases/decreases on the MSMA, there will be a direct change in the output voltage from the pick-up coil. As long as a circuit is used which may accurately read and detect the change in output from the MSMA, this will then provide information as to the state of the structure. Therefore, the system can be implemented with multiple MSMAs, if necessary. One MSMA would be placed and used as an energy harvester while the other device could be used in a different location as a sensor. In the event the strain on the MSMA is large enough, a single device may be used as an energy harvester and as a sensor.C. Analog-to-Digital ConversionIn order to transmit the data from the sensor to a central processing unit, the data from the sensor should be modulated

SingleDual

Vref

VinVref

TintTintTdeint

CC

RVinR

VinVref1Vout

Vout

Vref

Fig. 8. Single- and dual-slope integrating ADC architectures.to reduce the size of the required antenna and as well as easing the design specifications for the receiver [61]. Modulating the strain gage data with a higher frequency carrier signal, which reduces the required antenna size, for transmission is possible, however the transmit circuitry might consume the entire power budget. Rather than modulating this information directly, an estimate of the information may be good enough to determine the state of the bridge. Therefore, the information is converted to a digital signal using an analog-to-digital converter (ADC). Typically, the more bits transmitted implies a more accurate result at the cost of increased power and integrated circuit die area. Although large resolutions may be obtained using Sigma-Delta ( ) and pipeline ADCs [62], or using a Flash architecture for a speed improvement [62], these architectures are generally too complex, occupy too large of an area, and are too power demanding for deployment in a sensor [63]. For a low-power solution, a class of ADCs known as counting ADCs is typically employed [62], [63]. Counting ADCs may be generally divided into two groups: 1) integrating ADCs; and 2) algorithmic ADCs.1) Integrating Analog-to-Digital Converter: An integrating ADC (IADC) is one that, using a number of clock cycles, obtains a digital estimate of an analog signal. There are generally two variants of an IADC, a single-slope (SS) and a dual-slope (DS). A basic diagram of each architecture is shown in Fig. 8. The SS-IADC compares the input signal to a known reference voltage and uses a counter to determine how many clock cycles are required for the output of the comparator to change. A DS-IADC integrates the unknown input signal for a specified number of clock cycles and then de-integrates a known reference voltage for an unknown amount of time. There are many advantages and disadvantages of each archi-tecture, with the main advantage being the relative ease of implementation compared to more complex architectures [62]. The main drawbacks are the necessity to generate accurate voltage references and clocks, with the dominant impediment being the possibility of a conversion time equal to 2N clock cycles where N is the resolution of the converter [62]. 2) Algorithmic Analog-to-Digital Converter: To alleviate the conversion time issues with the IADC architectures, the ADC can compare the input signal to an adaptive reference voltage implemented by a digital-to-analog converter (DAC) whose value is dependent on the relative values of the input

2N C8C 4C 2C CC

V

VrefinSwitchesSAR Logic

GNDNbitData Out (Serial or Parallel)Fig. 9. Top-level view of the SAR ADC.

PulseAntenna

Shaping

Vdd /2Driver

Circuit

RingSHAPE

OscillatorVdd /2

VbpEN2

VbnEN1signal and the reference voltage from the previous clock cycles. One method of doing this is to implement a binary search algorithm to control the DAC voltage VD AC [62], [63]. ADCs which utilize a binary search algorithm are often referred to as successive approximation register (SAR) ADCs. Beginning with the most significant bit (MSB), this archi-tecture converges on a digital approximation of the sampled analog input signal. The value of VD AC in the SAR ADC may be expressed asNbNi 2Ni

i1

VD AC = Vdd=2N(8)

where Vdd is the DAC reference voltage and supply voltage to the overall ADC, bNi is the value of the ( N i )th bit and takes on a value of 1 or 0 depending on whether or not the bit is kept, and N is the number of bits in the ADC. The search process continues until all N bits have been accounted for and the output stream is then read out. The main feature of the binary search algorithm is the SAR ADC will determine the output code starting with the MSB and will then work back to the least significant bit (LSB) value, where the MSB is defined as Vdd /2 and the LSB is defined as Vdd /2N . A general block diagram of a SAR ADC is shown in Fig. 9.Although a decision is not reached in a single clock cycle, the maximum number of clock cycles is greatly reduced in the SAR ADC compared to the IADC. For a SAR ADC, it takes approximately N + 1 clock cycles, where N is the number of ADC bits, to evaluate the analog signal and convert it to its equivalent digital output. For bit counts greater than 3 or 4 this is a significant power and conversion cycle savings compared to IADCs. For example, for a 4 bit architecture, an IADC may take up to 24 = 16 clock cycles whereas the SAR ADC will take approximately 4 + 1 = 5 clock cycles. The output data from the SAR logic is parallel in nature. In the event serial data is required, a simple multiplexer may be implemented to provide the desired output codes. Due to the SAR ADCs ability to converge on a solution in fewer clock cycles than an IADC, a SAR ADC is chosen for implementation in the proposed self-powered wireless sensor system. The logic for the SAR ADC dominates the system since most of the circuits in a SAR ADC are D-type flip flops (DFFs) and may be implemented using pass-transistor logic (PTL) to provide a low-power and low-voltage solution [64].

Fig. 10. IR-UWB TX of [66], which may be implemented in the proposed wireless sensor system.D. Impulse Radio Ultra-Wideband Transmitter andModulationOnce the sensor information has been digitized, it is neces-sary to send the data to a central processing unit for further characterization. Choosing the most appropriate method for data transmission is often a trade-off between power con-sumption and bit-error-rate (BER), among other things. For low-power and low data rate applications more complex trans-mission methods such as multi-band orthogonal-frequency-division-multiplexing (MB-OFDM) should be avoided due to the necessity of a frequency synthesizer. In recent years, impulse based solutions have been used for low-power appli-cations as a viable and reliable method of data transmission with a relatively low power consumption [65], [66]. Since the modulation method limits the overall system performance, its choice is important for the overall system. The main modulation formats for impulse based designs are usually phase-shift keying (PSK), frequency-shift keying (FSK), or amplitude-shift keying (ASK).For the proposed self-powered wireless sensor system, a variant of ASK can be implemented. This variant is known as On-Off Keying (OOK). In Fig. 1 the block driving the antenna is listed as IR-UWB TX. Within this block, an oscillator is assumed to be the circuit which is driving the antenna. Unlike other systems where an oscillator continuously runs, the oscillator will lower its amplitude, or be completely shut off during a 0 transmission. This will lead to a lower overall power consumption in the transmit circuitry. However, the main drawback is the necessity to shut down the oscillator and insure its startup within one ADC clock cycle so as to not lose any information. Although this is an issue, for the proposed sensor system this is not a large problem since due to the low sampling rate of the ADC. Therefore, ASK, and more specifically OOK, is the most optimum choice for proposed implementation of the IR-UWB TX. A low-power implementation of an IR-UWB TX which could be used for the proposed sensor system was presented in [66] and is shown in Fig. 10. This work shows a dramatically reduced static power consumption when compared to recently reported IR-UWB TX designs. The novelty of the design and its ease ofFig. 11. Measured MSMA output voltage of the energy harvesting sample at three different frequencies of sinusoidal mechanical excitation: 2.5, 5, and 7.5 Hz.

implementation are attractive assets for future implementation in the proposed sensor system.III. MEASUREMENT RESULTSSome of the main blocks comprising the proposed system have been fabricated and measured to compare real-world

140

)120

pkMeasured

(mV100

1st Order

Voltage80

Output60

40

SMA

20

05101520

0

Frequency (Hz)

Fig. 12. Measured and first-order extrapolated MSMA output voltages versus frequency.measurements with theoretical concepts. The fabricated devices are the NiMnCoIn MSMA energy harvesting material, the rectification circuitry, and the low-power SAR ADC. The measurement results obtained as well as some projected values from the obtained data are then presented.A. Magnetic Shape Memory Alloy SamplesAn ingot of Ni45Mn36.5Co5In13.5 (at atomic %) was pre-pared using vacuum induction melting. Single crystals weregrown using the Bridgman technique in a helium atmosphere. They were cut into rectangular prisms with dimensions of 4 mm 4 mm 16 mm using wire electro discharge machining. In the austenite high temperature phase, the normal vectors of the prism faces were along the [100], [011], and[011] directions.The single crystalline sample was placed in a bias magnetic field of 1 Tesla where a copper coil with 1000 turns was used to convert the magnetic flux change within the material due to a sinusoidal mechanical excitation, applied along the long axis of the sample. This mechanical excitation led to the transformation of austenite to martensite upon loading and reverse transformation back to austenite upon unloading. The two leads of the copper pick-up coil were then connected to an oscilloscope to monitor the output voltage. The measured coil outputs from the material with 2.5, 5 and 7.5 Hz sinusoidal excitations are shown in Fig. 11. As can be seen from the measurements, there is an increased voltage at the output of the coil as the frequency increases. This is as expected since the output voltage Vcoil of the MSMA sample should be frequency dependent as seen in (1). A typical value of the volume fraction of the martensite after transformation, r , is 1.0 for this sample. Assuming the coil has a small width compared to the material, D + 2T D, and an ideal magnetic coupling between the material and the coil, the predicted output voltages at 2.5, 5 and 7.5 Hz are approximately 20 mV, 40 mV and 60 mV, respectively, for r = 1. These values closely match the measured values of 30 mV, 40 mV, and 60 mV.Although these results are promising, it is necessary to produce larger output voltages from the MSMA material. One

(a)

(b)Fig. 13. (a) ON 0.5-m CMOS SPR RM and (b) four-stage rectifier with SPR as first stage and three cascaded high-efficiency SVC [44] stages.method of doing this would be to increase the number of turns on the coil N. Assuming the material can withstand higher loading frequencies (>10 Hz), it could also be possible to obtain larger output voltages from the coil under slightly higher loading frequencies as shown in Fig. 12 where the measured data was extrapolated using a first-order curve fit. A first-order dependence on frequency is what is predicted from (1). Unfortunately, the response of NiMnCoIn MSMAs under relatively high loading frequencies (> 8 Hz) and high cycle numbers (> 10,000) is not known and further studies are needed. However, since NiMnGa MSMAs can survive loading cycles up to 108 cycles [67], NiMnCoIn MSMAs are also expected to show similar cyclic resistance and survive under high loading frequencies on the order of tens of Hz.B. Dc Power ExtractionThe output of the MSMA pick-up coil needs to be connected to the proposed rectifier-multiplier to obtain a usable dc output voltage for the subsequent circuits. The pick-up coil was measured to have an equivalent series impedance of 55.16 _ and 9.25 mH at 120 Hz. The self-powered rectifier circuit shown in Fig. 7 was fabricated in ON Semiconductor 0.5 m CMOS where all components were on-chip except for the 1 F and 100 F electrolytic capacitors. In addition to the proposed single-stage SPR circuit, a four-stage rectifier-multiplier architecture was fabricated where the proposed SPR RM was implemented as the first stage and the second through fourth stages are implemented as a known high-efficiency, low-voltage rectifier [44]. The die micrographs of these circuits are shown in Fig. 13.The circuits were tested using an HP33120A Function Generator, an HP34401A Digital Multimeter, and a Tektronix TDS 3054 Oscilloscope. Load resistances of 100 k_, 1 M_ and 10 M_ were used to emulate next stage loading and power delivery capabilities. The input signal to the RM architectures was a 20 Hz sine wave with no dc component. The function

generators impedance is listed at 50 _ which is close to the coil impedance of roughly 56 _ at 20 Hz. The input amplitude of the signal was varied from 50 mV to 1000 mV. All off-chip capacitors used were 1 F and 100 F for both architectures. The measurement results of the fabricated rectifiers are shown in Fig. 14. From these results it can be inferred that for a 20 Hz mechanical vibration, which corresponds to an extrapolated MSMA pick-up coil output voltage of approximately 300 mVpk, a single-stage rectifier-multiplier may not produce a large enough dc output voltage to power the subsequent sensor system. This is because a dc level of 100 mV is not sufficient to power many standard CMOS circuits. However, for the same input amplitude, the implemented four-stage rectifier-multiplier is able to generate a dc level over 1 V for load resistances larger than 1 M_. This value is generally sufficient to operate most CMOS circuits which are fabricated in processes whose minimum feature size is less than 1 m. Additionally, for a load of 1 M_, the implemented four-stage rectifier-multiplier is able to deliver between 1 and 14 W of power with input amplitudes between 300 and 1000 mVpk. For loads of approximately 100 k_ and input voltages of 1000 mVpk, the power delivered to the load is approximately 100 W with a dc voltage near 3 V . Although 14 W , or even 100 W , may not be sufficient to power the proposed ADC and other circuitry in the technology used (0.5-m CMOS), if the the technology were to scale to 0.18-m CMOS, this obtained power level will be sufficient to power the ADC and the other circuitry. This fact is discussed further in the following section. Nevertheless, the results shown are encouraging and indicate the proposed comparator-based RM and the proposed four-stage RM can produce large dc levels.C. Analog-to-Digital ConverterThe proposed 6 bit successive approximation register analog-to-digital converter (SAR ADC) was fabricated using ON Semiconductor 0.5-m CMOS using standard CMOS devices and poly-poly metal-insulator-metal (MiM) capacitors. The chip micrograph of the fabricated ADC with annotated sub-blocks is shown in Fig. 15. The circuit was tested using an Agilent 1673G Logic Analyzer to measure the serial and parallel output data, an HP33102A Function/Arbitrary Wave-form Generator for generating the square-wave ADC clock as well as for generating the input ramp and sinusoidal signals for characterization, and an Agilent E3360A Triple Output dc Supply to power the chip. Functionality of the proposed ADC at different Vdd levels was tested as well as static performance with the proposed system. During testing it was determined that the minimum Vdd to power the chip was 0.9 V . At this supply level, the proposed low-power ADC with a dc input level of 513 mV produces a logic output as shown in Fig. 16. The ADC functionally performs at this supply level and is able to digitize input levels around Vdd /2, however at the upper and lower extremes of the supply the ADC fails to operate properly. This is attributed to the buffer amplifiers used at the input of the comparator block which have a limited input common-mode range (ICMR).719

10004000

3500

8003000

(mV)(mV)

60010M2500

Output1MOutput2000

100k

4001500

10M

dcdc

1M

1000

200100k

500

0200400600800100002004006008001000

00

Input Amplitude (mVpk)Input Amplitude (mVpk)

(a)(b)

1201000

dcOutputPower(W)100Voltage Conversion Eff. (%)80010M

10M1M

801M100k

100k600

60

40400

20200

0200400600800100002004006008001000

00

Input Amplitude (mVpk)Input Amplitude (mVpk)

(c)(d)

Fig. 14. Measured dc output voltages versus load resistance for (a) single stage SPR, (b) four stage with SPR as first stage and three cascaded SVC stages,(c) measured dc output power and voltage conversion efficiency for the four stage RM with SPSR as first stage, and (d) three cascaded SVC stages.

Fig. 15. Chip micrograph of the low power, six-bit SAR ADC designed in ON 0.5-m CMOS.In Fig. 16 the output bits are listed as Bit 0, the least significant bit (LSB), to Bit 5, the most significant bit (MSB). Bit 6 in the figure is the serial output of the multiplexer

Fig. 16. Measured SAR ADC output bits and serial output for a Vdd of 0.9 V and a sampled input voltage of 513 mV.which is designed to control the IR-UWB TX. The average power consumption of the ADC at this supply level was measured to be approximately 880 W which was in good agreement with the simulated value of 820 W . Although thisMax. INL = +1.2/1.9LSB 2

1.51(LSB)0.5

0

INL0.5

11.5

2102030405060

0

Code NumberMax. DNL = +1.3/0.99LSB 2

1.51(LSB)0.5

0

DNL

0.5

11.5

2102030405060

0

Code NumberFig. 17. Measured INL and differential nonlinearity (DNL) of the fabricated SAR ADC.is larger than desired, the large power consumption is mainly attributed to large parasitic capacitances due to the process as well as requiring a large Vdd and large ON/OFF overlap within the circuits due to the large Vth of the NMOS and PMOS devices in this process of approximately 0.7 V and 0.9 V , respectively. In the event a process with a smaller minimum feature size may be utilized, the power consumption can be decreased. To verify this, the proposed ADC was re-implemented in a commercially available 0.18-m CMOS process with nominal Vth of 0.4 V and 0.45 V for NMOS and PMOS devices, respectively. For the same power supply and input level, the simulated average power consumption was only 30 nW which is slightly lower than other state-of-the-art ADCs with the same minimum feature size and a larger supply voltage [68][70].For static testing of the ADC, a low frequency ramp signal was applied to the input of the ADC with a sampling frequency of approximately 800 Hz. The data from the logic analyzer was then exported into MATLAB for post-processing. The mea-sured integral nonlinearity (INL), global variation from ideal input-output relationship, and differential nonlinearity (DNL), step-by-step variation in ideal input-output relationship, of the fabricated SAR ADC with a Vdd of 1.8 V are shown in Fig. 17. The results were obtained using the histogram measurement technique with a ramp input. Assuming typical operation of the

Fig. 18. Measurement results of the proposed four-stage rectifier powering the low-voltage, low-power six-bit SAR ADC. The input to the four-stage rectifier was a 20-Hz sinusoid with a 1.2-V amplitude. From top to bottom, the measurement shows the output of the on-chip SAR ADC clock generator, the serial output of the six-bit SAR ADC, the output of the DAC used in the SAR ADC, and the dc voltage produced by the four-stage rectifier.ADC, the INL and DNL limits should be between 0.5 LSB. The measured results shown deviate from these values at a few code locations within the implemented ADC. However, this is mainly attributed to a design implementation error with voltage buffers employed at the input of the SAR ADC comparator. The ADC block level diagram shown in Fig. 9 contains the same comparator as shown in the proposed self-powered rectifier of Fig. 7. The main difference in implementing these two blocks is that, for the ADC, voltage buffers were placed at each input terminal. This was done since the implemented digital-to-analog converter (DAC) within the SAR ADC is capacitive, a circuit needed to be implemented to isolate the DAC output from its respective comparator input. For symmetry, a voltage buffer was also placed at the opposite input of the comparator. The overall INL and DNL of the proposed SAR ADC were exacerbated by the implemented voltage buffers. This is because the input to each voltage buffer was the gate of an NMOS transistor. The NMOS device was not able to sufficiently turn on for input levels below approximately 0.3 V while at high input levels other devices within the voltage buffer were not able to function properly and the devices saturated. Simulations show that as long as the comparator input remains centered around Vdd /2 and stays above approximately 0.2 V and below approximately Vdd 0.5 V , the operation of the ADC is fairly close to ideal. In a future design, an improved comparator and/or improved voltage buffers will be implemented.D. Rectifier Powering the ADCTo show the rectifiers ability to power the ADC, the proposed 4 stage rectifier multiplier was used to power the proposed 6 bit SAR ADC. An external clock was used for the ADC and an input amplitude of 1.2 V at 20 Hz was used to drive the rectifier. The measurement results are shown in Fig. 18.

IV. CONCLUSIONIn this paper we have proposed a magnetic shape memory alloy-based self-powered sensor system for structural health monitoring of highway bridges. System level design consid-erations were discussed and circuits were proposed for key elements of the sensor system. Some of the most important blocks of the system were designed, fabricated, and charac-terized. Measurement results on the MSMA material were presented and show the proposed NiMnCoIn MSMA is a viable material for deployment as an energy harvester for a self-powered system. Additionally, rectification circuitry and a low-power ADC were designed, fabricated and characterized. To show the benefits of implementing the ADC, and perhaps other circuitry, in a smaller technology node, simulations were performed to characterize the power consumption of the ADC. The measured results for the presented devices were in good agreement with simulations and theory..