Bowers IEE Nov 2010

8/8/2019 Bowers IEE Nov 2010

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1

John BowersDirector, Institute of Energy Efficiency

University of California, Santa [email protected]

http://optoelectronics.ece.ucsb.edu/

The Promise and Pitfalls of Silicon Photonics



Acknowledgements

UCSB: Dan Blumenthal, Larry Coldren, Steve DenBaars, Nadir Dagli,

Jared Bauters, Jock Bovington, Hui-Wen Chen, Hsu Chang, Daoxin Dai, MartijnHeck, Sid Jain, Geza Kurzveil, Phil Mages, Jon Peters, Jason Tien, Zhi Wang

Intel : Richard Jones, Yimin Kang, Mario Paniccia, Brian Koch, Hyundai Park, MattSysak

Aurrion: Alex Fang, Greg Fish, Eric Hall

Hewlett Packard: Di Liang, Marco Fiorentino, Ray Beausoleil

2

Collaborators

Financial Support

DARPA MTO (Rodgers, Shah), Intel, Hewlett Packard, Rockwell Collins



IEE Electronics/Photonics Group

• Banerjee CMOS thermal management• Blumenthal Terabit Optical Ethernet

• Bowers Low power silicon photonics

• Coldren Photonic Integrated Circuits

• Mishra High efficiency wireless transmitters

• Rodwell High efficiency circuits

• Rodoplu Wireless networks

• Theogarajan Low power VLSI design

• Yue High frequency CMOS communication circuits

Two new centers:PICO: Photonic Integration for Coherent Optics (Coldren et al.) $4MCTOE: Center for Terabit Optical Ethernet (Blumenthal et al.)



Photonic Integration for Coherent Optics(PICO)

Create a new generation of photonic integration engines that provideunprecedented and practical control of optical frequency and phase, driving alevel of sophistication that is routine today for RF into the optical domain.

– Enabling revolutionary capabilities in sensing & communications

– Advancing the intimacy of electronic and photonic integration with new monolithic and hybrid

materials as well as integration platforms

Goal:

2009 2010 2011 2012 2013 2014

C a p a b i l i t y

1Tb/s Integrated

Tx/Rx Capacity

100Gb/s All-Optical

Coherent Regeneration

256 QAM

Coherent PICs

Ultra-Narrow Δν andTunable InP/Si Lasers

& Laser Arrays

Epitaxial InP on Si

PICs

THz-Bandwidth ChirpedLidar & mmW Sources

QPSK Coherent

PICs

100Gb/s IntegratedTx/Rx Capacity

1st Gen Optical

Phase-Locked Loops

1st Gen Hybrid InP/Si

Laser Technology

350 GHz f max HBT

OPLL ASICs

2009 2010 2011 2012 2013 2014

C a p a b i l i t y

1Tb/s Integrated

Tx/Rx Capacity

100Gb/s All-Optical

Coherent Regeneration

256 QAM

Coherent PICs

Ultra-Narrow Δν andTunable InP/Si Lasers

& Laser Arrays

Epitaxial InP on Si

PICs

THz-Bandwidth ChirpedLidar & mmW Sources

QPSK Coherent

PICs

100Gb/s IntegratedTx/Rx Capacity

1st Gen Optical

Phase-Locked Loops

1st Gen Hybrid InP/Si

Laser Technology

350 GHz f max HBT

OPLL ASICs

Coldren, Bowers, Rodwell, Johansson (UCSB),

Yariv (Caltech), Koch (Lehigh), Campbell (UVA), Ram (MIT)

LIDAREthernet Rx



TOEC Organization and Scope

Collaborations

Terabit Optical Ethernet Center (TOEC)Faculty: Blumenthal (Director), Bowers,

Coldren, Dagli, Rodwell

Data Center Center Fred Chong

(Director)

MaterialsCenter

StanfordClean Slate

Institute-McKeown

5

Founding Industrial Affiliates

IEE

D. J. Blumenthal – Terabit OpticalEthernet Center (TOEC), UCSB



What does silicon photonics (and PICOand CTOE) have to do with Energy

Efficiency and IEE?

6



The Problem: Power

• Data centers and the Internet consume~4% of electricity today

– 870 Billion kWhr/year

• Traffic is doubling every 18 months.

– 3 years: 4x

– 6 years: 16x

– 9 years: 64x!!! (more than twice the totalelectricity generated today).

7



IP Traffic Growth

I n t e r n e t t r a f f i c ( e x a b i t p s ( 1 0 0 0 T b

p s )

8

Internet video to pc

File sharing



500 Million users in July, 2010

Top 10 Global Web Companies

Donn Lee (Facebook)



Modern Data Center

10

• 50 MW power

• Million of servers• Tens of thousands of fibers

From Donn Lee (Facebook)



Human Genomics7 EB/yr, 200% CAGR

Clinical Image DB~1PB

Ave. Files on HD54GB

Physics (LHC)300 EB/yr

Retail Customer DB600 TB

Business Medical Personal Media Science

HD video forecast12 EB/yr

Social Media

Estimating the Exaflood, Discovery Institute, 1/08; Amassing Digital Fortunes, a Digital Storage Study , CEA, 3/08 Courtesy: Rattner(2010)

A Wealth of Data to Move

DigitalSignage

Robotics

Security

Surveillance

TransportationTest &

Measurement

NetworkAppliances

IP Services

MedicalImaging

Aerospace

Kiosks

Point of Sale

In-VehicleInfotainment

MedicalPortable

HomeAutomation

Sensors

IP Media

Phones

Factory

Automation

Energy

& Utilities

S f h A El i



Maximum configuration for CRS-1 92 Tbps (80 racks)

~1 Megawatt!!!

• Problem: Bandwidth demands scaling faster than both silicon and

cooling technologies

State-of-the Art ElectronicTerabit IP Router

Cisco CRS-1 Router



The other problem: Power Density

100

101

102

103

1.5μ 1.0μ 0.8μ 0.6μ 0.35μ 0.25μ 0 .18μ 0.13μ

38 6

48 6

Pentium®

PentiumPro®

Pentium® II

Pentium®

III

Pentium®

4

AthlonMP

Palomino®

AthlonMP

Thoroughbred®

A MD®

K 6

A MD®

K 5

Technologynode

P o w e

r D e n s i t y

( W / c m

2 )NuclearReactor

HotPlate

RocketNozzle



PowerWall:ModuleHeatFluxTrend

B ipolar C MO S

F ujits uM‐780

T ‐ R e x

J ayhawk(dual)

Vacuum IBM360IBM370 IBM3033

IBME S 9000

FujitsuVP2000

IBM3090S

NT T

IBM3090

C DC C yber2 05IBM4381

IBM3081

F ujits uM380

I B M R Y 5

IBMGP

I B M R Y 6

Apache

Pulsar

Merced

I B M R Y 7

I B M R Y 4

P entiumII(DS IP )

S quadrons

P entium4

Mckinley

P resc ott

O p p o

r t u n i t i e s f o r 3 D a n d

L o w

P o w e r M u l t i ‐ C o r e

Integ ratedC irc uit

YearofAnnouncement1950 1960 1970 1980 1990 2000 2010

M

o d u l e H e a t F

l u x

0

2

4

6

8

10

12

14

1957

The solution to the heat problem is multiple coreswith a Terabit optical bus



15200 data lines x 5 GHz = 1 Tbps=



The Solution: Optical Interconnects

• InP: dominant technology for interconnects today.

– Not CMOS compatible

• Silicon photonics:

– CMOS compatible

– Integrable with CMOS electronics

16



The Solution: Optical Interconnects

• 3D layer stacking will be

prevalent in the 22nmtimeframe

• Intra-chip optics can takeadvantage of thistechnology

• Photonics layer (with

supporting electricalcircuits) more easilyintegrated with high

performance logic andmemory layers

• Layers can be separately

optimized for performanceand yield

O p t i c

a l I / O

Logic Plane

O

f f - c h i p

o p t i c

a l

s i g

n a

l s

O n

- c h i p

o p t i c

a l t r a

f f i c

Photonic PlaneMemory Plane

Kash, “Photonics in Supercomputing:

the Road to Exascale,” IPNRA, 2009

BUT: Silicon has an indirect gap and doesn’t emit light!So, how to integrate sources?

BUT: Silicon has an indirect gap and is a poor absorber (not1.55 µm)! So, what about photodetectors?

BUT: Silicon is centrosymmetric (not electro-optic)!So, how to integrate modulators?

BUT: SiO2 is thermally resistive. So, power dissipation of active devices is a problem, particularly for rings and DWDM

BUT: Silicon is reciprocal. How to make an isolator?

Enough Pitfalls?



A Half Century of Innovation

Lasers

First Laser (Schawlow and Townes)

Countless apps

50years

1960 Today

• Practical usages not known upon invention

• Laser has impacted industries from medicine tomanufacturing to entertainment and more

• High speed communications is driven by lasersCourtesy: Rattner (Intel)



A Half Century of Integration

First Silicon IC

(Noyce)

Silicon

Billions of Transistors

~50years

• We have gone from 2 transistors to 2 billion

• Integrated circuits has transformed society

• Silicon manufacturing has made this all possible

1959 Today

Courtesy: Rattner (Intel)



Bringing Si Manufacturing to the Laser

Lasers Si Manufacturing

Very highbandwidth

Long distances

Immunity toelectrical noise

High volume,low cost

Highlyintegrated

Scalability

OPTICAL

ANYWHERE,INCREDIBLE

POTENTIAL

Courtesy: Rattner (Intel)

YearofProduction 1995 1998 2001 2004 2007 2010 2013 2016

DRAM1/2Pitch(nm) 270 190 130 90 65 43 32 22WaferSize(mm) 150 200 200 200 300 300 300 450

InPPhotonicIntegratedcircuits

SiliconPhotonicIntegratedcircuits

Six Generations



Why Silicon Photonics?

Utilize advanced fabrication technologies for low cost, high volume integrated photonics.



Silicon Does Have Advantages…

• Cheaper substrates• Larger substrates (>300 mm)

• Large fabrication infrastructure (32 nm 300 mm fabs)

• Improved process control-critical for large scale integration.

• Reduced two photon absorption (100x less)

• Lower loss waveguides: <0.3 dB/cm

• Higher thermal conductivity (κ) of

– Waveguides (Si has 30x higher κ than InGaAsP)

– EAMs or PD Absorbers: Ge has 16x higher κ than InGaAs

• Excellent APD characteristics – K factor: 0.02 versus 0.6

– Gain bandwidth product: 850 GHz versus 160 GHz22



23

Silicon light emission – How?•

Bulk silicon• Low dimension Silicon – Silicon nanocrystal (Pavesi, …)

– Periodic nanopatterned crystalline silicon (Jimmy Xu)

• Er dopants (Dal Negro,…)

• Avoid direct interband transition – Raman laser (UCLA/Intel)

• Another material for gain (hybrid approach) – Epitaxial

• Ge

• Quantum Dot

• Pillars

• InGaAsP (Mages)

– Bonding• Dice level

• Wafer level (BCB or Molecular)



24

Bulk silicon LED

M. A. Green et al., Nature 412, 805 (2001)

Solar cell forward bias

~1% external quantum efficiency



25

Field effect electroluminescence

R. J. Walters, G. I. Bourianoff and H. A. Atwater, Nature Materials 4, 143 (2005)

Sequential injectionof electron and hole



26 26

Nanopatterned Crystalline Silicon

S. G. Cloutier, P. A. Kossyrev and J. Xu, Nature Materials 4, 887 (2005)



27

Emission mechanism

J. Xu, IEEE International Conference on Group IV Photonics, Ottawa, Canada (2006), FA1.

Nano-patterning creates a densely packed array of Emissive Structural Deformation (ESD) zones in the side-wall region of the nano-holes



Silicon nanoclusters: waveguides

•

Si-nc embedded in SiO2 can provide optical gain (redwavelengths);

• Slot waveguides provide high SiO2 confinement andsmall cross-section;

•

Si-nc creates localization of injected carriers atluminescent centers (Er 3+ for infrared)

28 N. Daldosso and L. Pavesi, Laser & Photon. Rev., 2009



Silicon nanoclusters: LED

• EL power efficiency values for LED devices: – 0.01–0.03% for pure Si-nc;

– 0.2–0.3% for rare-earth ion doped

• For high EL efficiency: bipolar injection needed

–

issue: electron tunneling barrier << hole barrier

29

N. Daldosso and L. Pavesi, Laser & Photon. Rev., 2009



30 30

Rare earth doped light emitting MOS

M.E. Castagna et al ., Materials Science and Engineering B 105, 83 (2003)

U E SiN



Use Er:SiNDal Negro (Boston Univ)

• EL centered at 1535 nm (Er 4I13/2) – Small peak at 980 nm (Er 4I11/2)

31

S. Yerci et al., IPR 2010



32

0

5

10

15

20

0 50 100 150 200Coupled Pump Power (mW)

L a s e r o u t p u t ( m W )

A (0.22, 0.20)

B (0.21, 0.04)

Fit A

Fit B

Pump

p-region

n-region V bias

Directional coupler

Ring cavity

Laser output

H. Rong, et al, Opt. Express 14, 6705-6712 (2006)

CW Ring Raman silicon laser

23% slope efficiency

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

10

1684 1685 1686 1687

Wavelength (nm)

R e l a t i v e P o

w e r ( d B )

70dB

A pump laser is still needed

Hybrid Approaches:



33

Hybrid Approaches:Use another material for gain

• Epitaxial growth on Si substrate

– Strained Germanium (MIT)

– Quantum Dot (Michigan)

– MOCVD nanopillars on Si (UC Berkeley)

– Epitaxial layer overgrowth (Mages, Shultz,Palmstrom, DenBaars, Bowers, UCSB)

• Bonded III-V layers on Si substrate – BCB (Ghent)

– Molecular (UCSB, Intel, Caltech, TIT)

Direct Gap Transition of Ge by Tensile



Direct Gap Transition of Ge by TensileStrain and n-type doping

34

• Efficient emission at 1550-1620 nm: 0.2-0.3% tensile strain plus

• n-type doping to compensate energy difference between Γ and L valleys.• Threshold also observed at ~5µJ/pulse (30 kW/cm2).

Liu et al, Opt. Express. 15, 11272 (2007) MIT

Quantum Dot Lasers on Silicon



Quantum Dot Lasers on SiliconBhattacharya, University of Michigan

400X5µm2

Ith~ 50mA

f -3dB

= 5.5 GHz

180 mA

Si substrate

GaAs buffer 2.0 µm

GaAs:Si 0.8 µm

Al0.4Ga0.6As:Si 1.0 µm

GaAs 500 Å

×10

GaAs 500 Å

GaAs 500 Å

Al0.4Ga0.6As:Be 1.0 µm

GaAs 500 Å

GaAs 0.2 µm

GaAs 350 Å

GaAs 350 Å

InAs

QDs

In0.15Ga0.85As

50 Å Q D

b u

f f e r

l a y e r

A c t i v e

r e g i o n

Z. Mi, J. Yang, P. Bhattacharya, Proc. IEEE 97, 1239 (2009)

Self-organized quantum dots, byvirtue of the large strain fields,

can inhibit the propagation of

dislocations.



36

Silicon light emission – How?

• Another material for gain (hybridapproach)

– Bonding: Die level – Flip-chip bonding



Die bond lasers one at a time (Luxtera)

Flip-chip bonded laserswavelength 1550nm

passive alignmentnon-modulated = low cost/reliable

Ceramic Package

Fiber cable plugs here



38

Step 1: Bond InP-dies on SOI waveguide

Step 2: Remove substrate

Step 3: Process lasers at wafer scale

Waveguide bundel

8 lasers

III-V dies

SOI-waveguide wafer

Si

SiO2

InP

Si

SiO2

Si

BCB or SiO2

Heterogeneous integration



39 39

Heterogeneous integration• Adhesive layer bonding

– Planarization and bonding in singlestep (IMEC-Ghent University)

– Ultra-thin bonding layers (sub 200nmdemonstrated) [1]

• Molecular bonding – InP on SOI-waveguides (UCSB,

Intel, CEA-LETI, TRACIT) [2,3]

InP-layer

Si-wire

[1] G. Roelkens et al., “Adhesive Bonding of InP/InGaAsP Dies to Processed Silicon-On-Insulator Wafers using DVS-bis-Benzocyclobutene”, J.Electrochem. Soc., Volume 153, Issue 12, pp. G1015-G1019 (2006)

[2] D. Liang469. D. Liang, G. Roelkens, R. Baets, J. E. Bowers , "Hybrid Integrated Platforms for Silicon Photonics," Materials , 3 ( 3 ), 1782-1802 ,March 12 , 2010

[3] M. Kostrzewa et al., 'InP dies transferred onto silicon substrate for optical interconnects application ', Sensors & Actuators A 125 (2006) 411-414

Two alternatives for the die-to-wafer bonding process



Hybrid Silicon Photonics

Silicon rib waveguide onSOI wafer

III-V active region

– Optical gain from III-V Material

– Efficient coupling to silicon passivephotonic devices

– No bonding alignment necessary: suitablefor high volume CMOS

–

All back end processing low temperature(<350 C)

– CW lasing to 105 C

40

7 lasers operating c.w.simultaneously

Liang and Bowers, Nature Photonics, 4, 511, Aug. 2010.

Silicon

Direct Gap III-VInGaAlAs

Alex Fang

A.W. Fang, et al. EEE Photonics Technology Letters , 18 ( 10 ), 1143-1145 , May 15 , 2006



Scaling of Bonded Wafers

2 cm

150 mm (6”)

50 mm (2”)100 mm (4”)

These wafers have patterned optical waveguides on SOI with 2 micron GaInAsPlayer on top.Oxygen plasma enhanced bonding: 300 C, 30 minutes

• D. Liang, G. Roelkens, R. Baets, J. E. Bowers , "Hybrid Integrated Platforms for Silicon Photonics," Materials , 3 ( 3 ),1782-1802 March 12 2010

Di Liang



Photoluminescence study

Beforebonding

After bonding

Wavelength Intensity FWHM

Epi Grown by Oakley et al.

Lincoln LabsPL improves after bonding

68 nm

40 nm5.7 V

5.4 V

105 C CW 1310 l



105 C CW 1310 nm laser • 1310 nm important for

FTTH and datacommunications.

• Max fiber coupled output

power: 5.5 mW

• Max operation temperature:

105 °C

• T0: 80 °C

• Injection efficiency: 52 %

Chang et al., Optics Express 15(18), 11466, August (2007).



Silicon Evanescent DFB Lasers

44

Alex Fang



-90

-80

-70

-60

-50

-40

-30

1240 1260 1280 1300 1320 1340 1360

P o w e

r ( d B m )

Wavelength (nm)

1240 1260 1280 1300 1320 1340 1360

O n c

h i p g a

i n ( d B )

Wavelength (nm)

GainGain

Bandgap ABandgapB

ISLC 2010, Kyoto , JapanWA3 9.15 - 9.30 Integrated Broadband Hybrid Silicon DFB Laser Array using Quantum Well Intermixing

QWI DFB Array

iddharth Jain



Hybrid Silicon Microring Laser

III-V

Si

Confinement: MQW: 5.5%; silicon: 52%

D. Liang, et al. Optics Express , 17 ( 22 ), 20355-20364 , October 23 , 2009

Di Liang

Th h ld I t



47

Threshold Improvement

D. Liang et al., Group IV Photonics 2009

Hybrid Silicon Evanescent



48

• Impact – Electrically pumped amplifiers (unlike Raman or Erbium

amplifiers)

– Wider wavelength range than erbium amps: 1310 nm, S, C,L band operation

• Issues: – Minimize reflections at transitions for spectrally flat gain,

and high gain.

Silicon waveguide on

SOI wafer

III-V active region

Hybrid Silicon EvanescentOptical Amplifiers

H. Park et al., PTL, 19(4), 230, February (2007).

8 AMPs 8 detectors

Silicon optical modulators



49

Silicon optical modulators

Intel. A. Liu. 40Gbps IBM. W. Green. 10Gbps

Cornel Univ. M. Lipson. 12.5GpbsHKUST. A. Poon. 0.5 Gb/s

(1) MZ silicon modulator

(2) Microring/disk modulator

I d Ch b C i D l ti



Index Change by Carrier Depletion

SiIII-V

==

PlasmaPlasma +

>10xBF Pockels Kerr + + +….

+….

Si

H.-W. Chen et al., “25Gbps Hybrid silicon switch using a capacitivelyloaded traveling wave electrode,” Opt. Exp. 18, 1070 (2010).

Capacitively Loaded Slotline MZI



51 Hui-Wen Chen, GFP 2009

40 50 60 70 80 90 100

-20

-10

0

10

20

Filling factor(% )

Δ v * d

e v i c e l e n g t h ( m m

%

)

50 0um long

35Ω

40Ω50Ω

Capacitively Loaded Slotline MZI

• Modulation is done by loaded “T” section – Implant is used to isolate different T sections

• Bragg frequency is around 10 THz

• Velocity match and increase impedance to 50 ohm

• 25 Gbit/s Bandwidth

• 40 Gbit/s Modulation

• 500 micron long

25 Gb/s

Hui Wen Chen

Hi h S d H b id Sili S it h



52 Hui-Wen Chen, IPR (2010)

High Speed Hybrid Silicon Switch

• BER test – Pattern: 231-1 NRZ PRBS at 40Gb/s

– Switch voltage : 2V

– Power penalty : <1.5 dB for all ports configuration

-11

-10

-9

-8

-7

-6

-5

-30 -29 -28 -27 -26 -25 -24 -23

Received Power (dBm)

l o g ( B E R )

2->4

2->31->4

1->3

BtoB

Linear (1->3)

Linear (1->4)

Linear (2->4)

Linear (2->3)

Linear (BtoB)

40Gb/s data stream 13 (35ps) 14 (25ps)

23 (35ps) 24 (25ps)

P i O ti l S it h



• Eliminating OEO conversion, and switching optically eliminatesabout 1W per Gbit/s of information transmission. For a 1 Tbit/sswitch, that is a savings of 10 kW per node.

• Collaboration with Luke Theogarajan (Luiz Chen)

Power savings – Optical Switches

1.E‐06

1.E‐05

1.E‐041.E‐03

1.E‐02

1.E‐01

1.E+00

1.E+01

1.E+02

1.E+03

Inherent

PIC

Amplified

PIC

32Tbit/s

PIC

system

Ethernet

Switch

Core

Router

PONONU IPTV

Server

E n e

r g y

p e r b i t ( n J )

100,000x lower

H b id Sili Filt



54

Hybrid Silicon Filters

Cell response with thermal tuning

Lower loss waveguides

More compact design

Integrated optical buffers and



g psynchronizers

5 circulations

back-to-back

Buffer

AWG

DigitalTunableLaser

Geza Kurczveil

T i l



Chang et al. Optics Express (2010)

Triplexers

56

Important for fiber to the home (FTTH) receivers

Integrated:Laser

1310/1500 nm MUX MMI

MZI 1550/1490 MUX

PDsAndy Chang



57 Intel Press Release July 2010



58 Rattner, IPR 2009

High Performance Computing Scaling



Power Consumption

C o m p u

t a t i o n a

l T h r

o u g

h p u

t

1 kW10 kW100 kW1 MW10 MW

“Peta-FLOPS in

a rack”

HPC performance spaceexpanded by Chip-to-Chip

Optical Interconnects

electrical inter-chip

interconnect barrier overcome by OI

OI at ~100 fJ/bit*

*D. A. B. Miller, IEEE Proc., 2009

enabled by Optical Interconnects

100GFLOPS

1TFLOPS

10TFLOPS

100TFLOPS

1 Peta-FLOPS

10 Peta-FLOPS

OI at ~1 pJ/bit

Saving power in supercomputers: Higher bisectional bandwidth

and 100 x lower power!

Summary



Summary

FP, ML, DFB, and DBR lasers(Fang et al., IEEE PTL, 20 , 2008 )

Waveguide detector and amplifier

(Park et al.,IEEE PTL,19 , 2007)

AMPdetector

Microring resonator laser (Liang et al.,FA5, postdealine, GFP2009)

DFB

DBR

MLL

Ringlaser

What’s Missing?Ultra low threshold lasers (low power is key).High power optical amplifiers

Short pulse mode locked lasersIsolatorsPolarizersPolarization Rotators

Bowers IEE Nov 2010

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