IP Lookup: Some subtle concurrency issues Arvind Computer Science & Artificial Intelligence Lab
Basics of Multi-rule Systems Arvind Computer Science & Artificial Intelligence Lab.
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Transcript of Basics of Multi-rule Systems Arvind Computer Science & Artificial Intelligence Lab.
September 17, 2009 L06-1http://csg.csail.mit.edu/korea
Basics of Multi-rule Systems
ArvindComputer Science & Artificial Intelligence Lab.Massachusetts Institute of Technology
September 17, 2009
September 17, 2009 L06-2http://csg.csail.mit.edu/korea
Synchronous Pipeline
xsReg1inQ
f1 f2 f3
sReg2 outQ
rule sync-pipeline (True); inQ.deq(); sReg1 <= f1(inQ.first()); sReg2 <= f2(sReg1); outQ.enq(f3(sReg2));endrule
Red and Green tokens must move even if there is nothing in the inQ!
Modify the rule to deal with these conditions
Also if there is no token in sReg2 then nothing should be enqueued in the outQ
Valid bits orthe Maybe type
September 17, 2009 L06-3http://csg.csail.mit.edu/korea
Synchronous Pipeline using the Maybe type data
rule sync-pipeline (True); if (inQ.notEmpty()) begin sReg1 <= Valid f1(inQ.first()); inQ.deq(); end else sReg1 <= Invalid; case (sReg1) matches tagged Valid .sx1: sReg2 <= Valid f2(sx1); tagged Invalid: sReg2 <= Invalid; case (sReg2) matches tagged Valid .sx2: outQ.enq(f3(sx2));endrule
xsReg1inQ
f1 f2 f3
sReg2 outQ
September 17, 2009 L06-4http://csg.csail.mit.edu/korea
Asynchronous pipelineUse FIFOs instead of pipeline registers
xfifo1inQ
f1 f2 f3
fifo2 outQ
rule stage1 (True); fifo1.enq(f1(inQ.first()); inQ.deq(); endrulerule stage2 (True); fifo2.enq(f2(fifo1.first()); fifo1.deq(); endrulerule stage3 (True); outQ.enq(f3(fifo2.first()); fifo2.deq(); endrule
Firing conditions?
Can tokens be left inside the pipeline?
Easier to write?
No Maybe types?
September 17, 2009 L06-5http://csg.csail.mit.edu/korea
Asynchronous pipeline: Some Issues
Easier to write but will not behave like a pipeline unless all rules can execute simultaneously It must be possible to enqueue and dequeue in a FIFO simultaneously
September 17, 2009 L06-6http://csg.csail.mit.edu/korea
Rule scheduling and the synthesis of a scheduler
September 17, 2009 L06-7http://csg.csail.mit.edu/korea
Guarded Atomic Actions (GAA):Execution model
Repeatedly:Select a rule to execute Compute the state updates Make the state updates
Highly non-deterministic
Implementation concern: Schedule multiple rules concurrently without violating one-rule-at-a-time semantics
User annotations can help in rule selection
September 17, 2009 L06-8http://csg.csail.mit.edu/korea
Rule: As a State TransformerA rule may be decomposed into two parts (s) and (s) such that
snext = if (s) then (s) else s
(s) is the condition (predicate) of the rule, a.k.a. the “CAN_FIRE” signal of the rule. is a conjunction of explicit and implicit conditions
(s) is the “state transformation” function, i.e., computes the next-state values from the current state values
September 17, 2009 L06-9http://csg.csail.mit.edu/korea
Compiling a Rule
f
x
currentstate
nextstate values
enable
f
x
rule r (f.first() > 0) ; x <= x + 1 ; f.deq ();endrule
= enabling condition = action signals & values
rdy signalsread methods
enable signalsaction parameters
September 17, 2009 L06-10http://csg.csail.mit.edu/korea
Combining State Updates: strawman
next statevalue
latch enable
R
OR
1
n
1,R
n,R
OR
’s from the rulesthat update R
’s from the rulesthat update R
What if more than one rule is enabled?
September 17, 2009 L06-11http://csg.csail.mit.edu/korea
Combining State Updates
next statevalue
latch enable
R
Scheduler:PriorityEncoder
OR
1
n
1
n
1,R
n,R
OR’s from the rules
that update R
Scheduler ensures that at most one i is true
’s from all the rules
one-rule-at-a-timescheduler isconservative
September 17, 2009 L06-12http://csg.csail.mit.edu/korea
One-rule-at-a-time Scheduler
Scheduler:PriorityEncoder
12
n
12
n
1i i
21 2 .... n 1 2 .... n
3. One rewrite at a time i.e. at most one i is true
Very conservative
way of guaranteeing
correctness
September 17, 2009 L06-13http://csg.csail.mit.edu/korea
A compiler can determine if two rules can be executed in parallel without violating the one-rule-at-a-time semantics
James Hoe, Ph.D., 2000
September 17, 2009 L06-14http://csg.csail.mit.edu/korea
Executing Multiple Rules Per Cycle: Conflict-free rules
Parallel execution behaves like ra < rb or equivalently rb < ra
rule ra (z > 10); x <= x + 1;
endrule
rule rb (z > 20); y <= y + 2;
endrule
rule ra_rb; if (z>10) then x <= x+1; if (z>20) then y <= y+2; endrule
Parallel Execution can also be understood in terms of a composite
rule
Rulea and Ruleb are conflict-free if
s . a(s) b(s) 1. a(b(s)) b(a(s))
2. a(b(s)) == b(a(s))
September 17, 2009 L06-15http://csg.csail.mit.edu/korea
Mutually Exclusive RulesRulea and Ruleb are mutually exclusive if they can never be enabled simultaneously
s . a(s) ~ b(s)
Mutually-exclusive rules are Conflict-free by definition
September 17, 2009 L06-16http://csg.csail.mit.edu/korea
Executing Multiple Rules Per Cycle: Sequentially Composable rulesrule ra (z > 10);
x <= y + 1; endrule
rule rb (z > 20); y <= y + 2;
endrule
Parallel execution behaves like ra < rb
Parallel Execution can also be
understood in terms of a composite rule
Rulea and Ruleb are sequentially composable ifs . a(s) b(s) 1. b(a(s))
2. PrjR(rb)(b(s)) == PrjR(rb)(b(a(s)))
rule ra_rb; if (z>10) then x <= x+1; if (z>20) then y <= y+2; endrule
- R(rb) is the range of rule rb
- Prjst is the projection selecting st from the total state
September 17, 2009 L06-17http://csg.csail.mit.edu/korea
Multiple-Rules-per-Cycle Scheduler
1.i i
2.1 2 .... n 1 2 .... n
3.Multiple operations such thati j Ri and Rj are conflict-free or
sequentially composable
Scheduler12
n
12
n
Scheduler
Scheduler
Divide the rules into smallest conflicting groups; provide a scheduler for each group
September 17, 2009 L06-18http://csg.csail.mit.edu/korea
Compiler determines if two rules can be executed in parallel
Rulea and Ruleb are sequentially composable ifs . a(s) b(s)
1. b(a(s)) 2. PrjR(Rb)(b(s)) == PrjR(Rb)(b(a(s)))
Rulea and Ruleb are conflict-free if
s . a(s) b(s)
1. a(b(s)) b(a(s))
2. a(b(s)) == b(a(s))
These properties can be determined by examining the domains and ranges of the rules in a pairwise manner.
Parallel execution of CF and SC rules does not increase the critical path delay
D(Ra) R(Rb) = D(Rb) R(Ra) = R(Ra) R(Rb) =
D(Rb) R(Ra) =
These conditions are sufficient but not necessary
September 17, 2009 L06-19http://csg.csail.mit.edu/korea
Muxing structureMuxing logic requires determining for each register (action method) the rules that update it and under what conditions
Conflict Free/Mutually Exclusive)
and
and
or1122
Sequentially Composable
and
and
or11 and ~2
22
If two CF rules update the same element then they must be mutually exclusive
(1 ~2)
September 17, 2009 L06-20http://csg.csail.mit.edu/korea
Scheduling and control logicModules
(Current state)Rules
Scheduler
1
n
1
n
Muxing
1
nn
n
Modules(Next state)
cond
action
“CAN_FIRE” “WILL_FIRE”
Compiler synthesizes a scheduler such that at any given time ’s for only non-conflicting rules are true
September 17, 2009 L06-21http://csg.csail.mit.edu/korea
Does our pipeline behave properly?
xfifo1inQ
f1 f2 f3
fifo2 outQ
rule stage1 (True); fifo1.enq(f1(inQ.first()); inQ.deq(); endrulerule stage2 (True); fifo2.enq(f2(fifo1.first()); fifo1.deq(); endrulerule stage3 (True); outQ.enq(f3(fifo2.first()); fifo2.deq(); endrule
Can all three rules fire concurrently?
next time