Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and...
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Transcript of Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and...
![Page 1: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/1.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
1
EVLA Monitor and Control
Module Interface Board (MIB) Design
![Page 2: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/2.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
2
MIB Block Diagram
EthernetInterface
EmbeddedController
FlashM emory
ResetLogic
ParallelInterface
SerialInterface
ControlLogic
TimingLogic
TC11IB
Power
M IB B lock D iagram
![Page 3: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/3.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
3
Embedded Controller
• Infineon TRICore TC11IB System On a CHIP
12 MHZ External Clock
1.5 MBytes RAM
Hardware, Software & Watchdog ResetsSleep Modes Six Thirty-Two Bit Timers
![Page 4: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/4.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
4
Embedded Controller
• Infineon TC11IB – Interfaces Media Independent Interface (Ethernet) Two Asynchronous Serial Ports One Synchronous Serial Port (SPI) External Bus Unit (EBU)
![Page 5: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/5.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
5
Ethernet Interface
• Ethernet Interface – 100 MBits/second
Translation Chip – Intel LXT971A
Fiber Optic Transceiver – Infineon
V23809-C8-C10
![Page 6: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/6.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
6
Flash Memory
• Flash Memory Serial Flash or Parallel Flash (8MByte)
Serial Flash?
Parallel Flash – AMD Am30LV0064D
All Code Documented
![Page 7: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/7.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
7
Power & Reset Logic
• Power & Reset Logic
Power Regulator & Supervisor
Texas Instruments TPS70351PWP
Watchdog Protection – TC11IB
Devices will get User Reset and MIB Reset
Devices Must Reset into Safe Condition
![Page 8: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/8.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
8
Timing Logic
• Timing Logic
19.2 Hz Timing Signal (Heartbeat)
1 PPS Timing Signal?
10 Second Timing Signal?
Devices May Require Precise Timing
Hardware Timing
![Page 9: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/9.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
9
Parallel Interface
• Parallel Interface External Bus Unit
Thirty-Two Bits Data Transfer (8, 16 or 32)
Address Lines (Twenty-Four Possible)
Texas Instruments SNLVTH32(244/245)
LVTTL Outputs, TTL Compatible
![Page 10: Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.](https://reader036.fdocuments.us/reader036/viewer/2022082710/56649e595503460f94b53a11/html5/thumbnails/10.jpg)
AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
10
Control Logic
• Control Logic Peripheral Interface Signals
RD*, WR*, ALE, WAIT*, CS* Lines
Resets*, SPI, etc.
Texas Instruments SNLVTH32244
LVTTL Outputs, TTL Compatible
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AuthorWayne M. Koski
EVLA Monitor & Control Software PDRMay 14 & 15, 2002
11
Serial Interfaces
• Serial Interfaces Asynchronous Ports
One RS232 Modem Port (Auto Off) Maxim MAX3225CAP RS485 Port?
Synchronous Ports Serial Peripheral Interface Port – SPI