ATA6824 and ATmega88

Application NoteATA6824 and ATmega88:DC Motor Control in High Temperature

Environment

1. IntroductionThe purpose of this document is to explain Atmels High Temperature H-bridge MotorControl System. The demand for driver solutions in under-the-hood environments israpidly increasing, and in particular, the use of applications such as turbo chargers,EGR, or AGR calls for new solutions.

Figure 1-1. ATA6824 and ATmega88 9102AAUTO08/07

2. H-bridge Motor Control System2 ATA6824 and ATmega88

Figure 2-1. Fully Integrated H-bridge Motor Control Application

The system consists of two integrated circuits: the microcontroller ATmega88 and the H-bridgeDC Motor Driver ATA6824.

The ATA6824 uses gate drivers to drive H-bridge FETs, voltage regulator, watchdog, and serialIO interface. An integrated charge pump controls the NMOS FETs for low-side and high-sideswitches. In addition, the charge pump voltage is capable of providing a low-drop inverse volt-age protection. Therefore, only a NMOS FET in the source drain direction is necessary.

The ATA6824 switches the outputs off in the event of short circuits, voltage failures, and over-temperature. Temperature prewarning and charge pump failures are also indicated. Theschematic has a current shunt, which can react at different current levels. The current signal isprepared for the microcontroller by an amplifier.

The ATmega88 generates the PWM speed signal to run various movement profiles as requiredfor the load.

SIO WD TimerCC

TimerGate Driver Low Side 2

Gate Driver Low Side 1

Gate Driver High Side 1

Gate Driver High Side 2CP

13V Regulator

3.3V/5V VCC Regulator

Supervisor: Short Circuit Open Load

Over Temperature Under Voltage

Logic Control

ATA6824PCINT

Interrupt Pins

PWM Timer

I/Os

UART Input

Capture

ADC + Analog

Comparator

AVR ATmega88 VCC

DG1DG2DG3

PWM

DIR

WD

/RESETRX

TX

SIO

SIO RWD CC GNDPGND

L2

L1

S1

H1

S2

H2

VBAT

3.3V/5V VCC Regulator

VMODE VINT VG CPLO CPHI VRES PBAT

VBAT

+

-

M9102AAUTO08/07

ATA6824 and ATmega88

2.1 Cooling Area Design3

The driver IC ATA6824 is housed in a QFN package. QFN packages are particularly suitable forpower applications because of the exposed die pad. To make use of this advantage, the heatslug must be completely soldered to the PCB.

To reduce thermal resistance, vias etched down to the soldering layer are required. An adequateground plane must be placed on the soldering layer to eliminate the thermal energy.

A via diameter of 0.3 mm to 0.4 mm with a spacing of 1 mm to 1.5 mm has proven to be mostsuitable. Care should be taken of the copper area's planarity to avoid, in particular, any solderbumps arising at the thermal vias.

3. High Ambient TemperatureThe application is designed for high temperature environments. The ATmega88 and the driverATA6824 are qualified up to an ambient temperature of 150C. Under thermal overload condi-tions, the ATA6824 switches off. If the temperature exceeds the prewarning threshold, themicrocontroller can reduce the output power.

Capacitance material on X8R quality is necessary to ensure high ambient temperatures.

Mounted connectors, a switch, and a potentiometer on the board, enable prototyping; however,these components are not qualified for use under high temperatures. The board can be inte-grated into high-temperature environments using wires.

4. The Application BoardThe application board is run-capable when connected to nominal 12V at the battery connector(see Figure 4-1 on page 4). The board can be connected to the automotive environment over anSIO bus.

A mounted switch (DIR) for run/stop, clockwise, and counterclockwise and a a potentiometer(SPEED) for variable speed (PWM) input are available on the application board to enablestand-alone prototyping.

An optional feedback loop from the DC motor to the ATmega88 can be established using Hallsensor(s). The two Hall inputs can be linked to the connector HALL as well as the 5V supply forthe Hall sensors. There is also an on-board shunt current sensor to detect over-currents (usingATmega88s analog comparator) and to measure motor current.

4.1 On Board FeaturesThe application board provides the following features:

ATmega88 QFN32 MCU

ATA6824 QFN 5V/3.3V voltage regulator (fixed on-board to 5V) Low drop voltage protection management H-bridge driver with diagnostics Serial link transceiver to connect board to external environment Watchdog9102AAUTO08/07

4 ATA6824 and ATmega88

On-Off-On switch Stand-alone commands interface: Run/stop, clockwise, and counterclockwise

Potentiometer Standalone speed variation command (PWM ratio)

System clock MCU internal RC oscillator

Power H-bridge (4 power FET) Human interface

Diagnostics signaling/latching through LED and unlatching through push button Connectors

Power supply (battery voltage) and SIO DC motor connector Hall sensor inputs and supply (2 filtered inputs and 5V regulated supply voltage) SP/debugWire connector, for on-chip in-situ programming (ISP) and for on-chip

debugging using JTAG ICE supported by AVR Studio interface(1)

Dimensions: 45 mm 90 mmNote: 1. The ATmega88 is supported by AVR Studio, version 4.12 or higher. For up-to-date information

on this and other AVR tool products, please consult our web site. The newest version of AVR Studio, AVR tools, and user guide can be found in the AVR section of the Atmel web site, http://www.atmel.com

Figure 4-1. Application Board Top View, and Connector Usage

Motor Out 1

Motor Out 2

PGND

SIO

Vbat

CWStopCCW

Speed

1 23 45 6

JP1

ISP MK2 Header

MISOSCKNRES

MOSI

VCC 5V

GND9102AAUTO08/07

ATA6824 and ATmega88

5. Software Description5

All code is implemented in C language. Source code can be compiled using IAR EWAVR 4.20Aas well as AVR-GCC (WinAVR-20060421 with AVR Studio).HTML documentation is included in the package. Use the High_temp_brushed_DC.html file inthe root directory to start viewing the documentation.

5.1 Motor Management Motor stopped

PWM ratio is set to zero Command switch inputs are monitored to start motor or keep it stopped.

Motor running ATA6824 DIR pin is set according to command direction. PWM ratio is refreshed

constantly according to speed of the potentiometer ADC input. Command switch inputs are monitored to stop motor or keep it stopped.

Degraded mode: ATA6824 detects a short circuit: H-bridge short-circuited and FET is switched off

until next PWM rising edge. This default is reported to software through a diagnostic feature: an interrupt occurs on DG1 MCU input pin, which internally latches a failure. Apart from switching on the DG1 LED, no action is taken by the software in response to this event. In a customer application, this should be managed, eventually by the interrupt sub-routine, especially in case of a 100% PWM ratio where no rising edge appears at the ATA6824 PWM input to make a retry. Care should be taken in motor transient state (e.g. motor start-up). An accelerating curve is preferable from 0% to 100% PWM ratio transition, which may be mistaken for a short-circuit condition. Without management, in the worst case scenario, the motor will not start as the outputs are switched off, and short circuit will be shown on DG1 pin.

ATA6824 detects an over-temperature warning: an interrupt occurs on the MCU. This diagnostic doesnt need to be software latched as it remains high until the temperature decreases. The application software toggles an LED.

ATA6824 detects an under-voltage, an over-voltage, or a charge pump failure. Then, an interrupt occurs on DG2 MCU input PIN. This diagnostic is latched by software and an LED is switched on.

An over-current is detected by the analog comparator. An interrupt is generated. The output PWM is then disabled until the current decreases bellow the over-current limit.

5.2 Resources

Table 5-1. Code, Data, and CPU Resources (without Compiler Optimizations)Compiler/Resources Code Size (Flash) Data Size (Ram) CPU Load

IAR EWAVR 4.20A 1 180 bytes 335 bytesAll routines are

constantly executed in main loop

AVR-GCC 1724 bytes 15 bytes9102AAUTO08/07

The following MCU peripherals are used:6 ATA6824 and ATmega88

Timer 0 PWM generation through output compare 0B (OC0B pin)

ADC channels 0, 6, and 7 Resp. current, battery supply voltage and desired speed (potentiometer) value

acquisitions. Pin change interrupts

DG1, DG2 and DG3 diagnostic pins interrupts Optional hall sensors

Analog comparator Generates over-current interrupts

I/O LEDs, switch and push-button operations, watchdog trigger, motor direction

command Additional (not managed by this stand-alone software)

UART for SIO implementation (communication through high-voltage serial interface).

5.3 Caution about ATmega88 Start-up Time (Fuse Configuration)ATA6824 uses a windowed watchdog, which can reset the ATmega88 using the reset pin.

ATmega88 is configured by default (fuse configuration) with a start-up time of 65 ms after a power-on reset. With tolerances, this value can increase up to 69 ms.

ATA6824 waits for a watchdog trigger within 68 ms after the reset signal has been released.Such an additional 65 ms delay is unnecessary and could cause the application not to start.ATA6824 ensures an adequate VCC through its power-on delay. ATmega88 default fuse config-uration should be over-written with a smaller start-up time. The start-up time can be set to4.1 ms or 0 ms. The start-up settings in the fuse configuration can be changed by setting theSUTx and CKSELx fuse bits. Further details about fuses can be found in ATmega88 datasheetand in the AVR Studio Help: AVR Tools users guide.9102AAUTO08/07

ATA6824 and ATmega88

Figure 5-1. ATmega88 Fuse Configuration Editing in AVR Studio 7

9102AAUTO08/07

5.4 Diagrams8 ATA6824 and ATmega88

Figure 5-2. Flowchart for Analog Comparator (Over-current) ISR

Figure 5-3. Flowchart for Optional Hall Sensors ISR

Figure 5-4. Flowchart for Diagnostic Interrupt Pins

YN

Over-current ISR (Analog Comparator ISR)

Current Over Limit?

Latch Over Current

Report Over Current

Disable Output PWM

Clear Over-current Report

Re-enable Output PWM

Pin Change Interrupt 0 (Hall Sensor ISR)

Optional Code Can Be Put in it

Y

Pin Change Interrupt 1 (Diagnostic 1, 2 and 3 ISR

DG1 set? Latch DG1 Failure

DG2 set?

DG3 set?

Clear DG3 Warning

Latch DG2 Failure

Report DG3 Warning

Y

Y

N

N

N9102AAUTO08/07

ATA6824 and ATmega88

Figure 5-5. Main Loop Flowchart 9

5.5 Modulesvoid ADC_Init(); (void)

Sets up ADC to acquire desired speed from potentiometer.void Timer0_start(void)

Configures timer 1 for PWM on Output compare 0 B pin.void AN_compare_init(void)

Configures Analog comparator to detect over-currents by interrupts.void Hall_sensors_ISR_init(void)

Sets up pin change interrupts on hall sensors inputs.void Diag_inputs_ISR_init(void)

Sets up interrupts on Diagnostic pins.void ADC_task(void)

Schedules ADC acquisitions: desired speed, Vbat, and Motor current. It is called in background(main loop).

unsigned int adc_get_speed(void)

Returns last acquired desired speed from potentiometer.unsigned int adc_get_current(void)

Returns last acquired motor current.unsigned int adc_get_V_bat(void)

Returns last acquired supply voltage measurement.void manage_time_base(void)

Main Loop (Background)

ADC Scheduler

Time Base Management

Watchdog Refresh Task

Motor Management

Diagnostic Display on LED

Initialize I/O, ATA6824 WD, ADC, Hall Sensors ISR, Diagnostic ISR, Timer0-PWM9102AAUTO08/07

Manages a general purpose time base by monitoring Timer0 overflows (used by watchdog10 ATA6824 and ATmega88

refresh routine, LED toggling).void refresh_ATA6824_watchdog(void)

Refreshes ATA6824 according to hardware fixed period and software time base. It is called inbackground (main loop).

void clear_faults(void)

Clears software latched faults (from diagnostics pins) only when they have disappeared.TIMER0_SET_OC0B_PWM (val)

This macro changes PWM ratio.DISABLE_OCB0()

This macro disables PWM output by changing pin multiplexing back to general I/O configuration.RE_ENABLE_OCB0()

This macro enables PWM output by giving pin control to Output compare 0 B (Timer 0 PWMoutput).9102AAUTO08/07

ATA6824 and ATmega88

6. Application Board Full Description11

Figure 6-1. BLDC Application Board Schematic

32

31

30

29

28

27

26

25

87VC

C6

GND

5VC

C42

GND

31

16

15

14

13

12

11

10

9

24 23AD

C722

GND

21AR

EF20

ADC6

19 18 17

U2

ATm

ega8

8

123

Vbat S

IO

12

34

56

JP1

MIS

OSC

KNR

ESM

OSI

VCC

5V

GND

MOSI

MISO

SCSCK

100

nF

C8

100

nFC1

0

AGND

VCC

5V

Spee

d_Se

t

SIO_TXD

SIO_RXD

10K

R1NR

ES

GND

AGND

WD

WD_

RESE

T

Mot_PWM

123 MPT

4

4HALL

VCC

5V GND

10K

R410

KR6

1 nF

C15

1 nFC1

647KR7 47K

R10

Hall2

_SHa

ll1_S

GND

Hal

l2_S

Diag3

Diag2

Diag1

DG2_Fault

330R

R34

330R

R36

330R

R37

LED

CMS

Red

DG1

DG3_

Fault

LED

CMS

Red

DG3

LED

CMS

Red

DG2

VCC

5V

VCC

5V

VSHU

NT

100

nFC2

7

100

nFC20VC

C 5V

GND

LED

CMS

Blue

MO

T_CC

W

1KR15

Mot

_Side

1

10K

R9

Q1

PGND

470K

R8

10K

R11

PGND

Vbat

Pbat

Pbat

VRES

470

nFC1

4

SIO

WD_

RESE

T

220

nFC1

7

GND

51K

R12 1

0KR1

3 330

pF

C19

WD_

TRIG

PGND

GF1G

D1

Pbat

2.2

FC5

VCC

5VVC

C 5V

GND

Pbat

PGND

LSide

2Cm

d

PGND

10

F 50

VC2

100

nF 5

0VC3

100

nF 5

0VC1

PGND

LSide

1Cm

d

220

nFC1

8

VRES

470

nFC1

3

PGND

NC

32

31

VBAT

30

VCC

29

PGND

28

L1

27

L2

26

PBAT

25

SIO

8G

ND7

WD

6RE

SET

5CC

4VI

NT2

RWD

3VM

ODE

1

DG1

16

DG2

15

DG3

14

RX

13

NC

12

PWM

11

DIR

10

TX

9

VG24

CPLO

23CP

HI22

VRES

21H2

20S2

19H1

18S1

17

H-br

idge

Drive

r Vo

ltage

Reg

ulato

r W

atch

dog

U1

ATA6

824

Diag3

Diag2

Diag1

Q4 Q6

Q3 Q5

10 n

FC2

110

nF

C22

10 n

F

C28

10 n

FC2

9

470KR2

1

470KR2

547

0KR2

6

470K

R20

10RR1

8

10R

R19

10R

R23

10R

R22

4.7

nFC2

34.

7 nFC24

4.7

nFC2

54.

7 nF

C26

4R7

R16

4R7

R17

4R7

R28

4R7

R27

Pbat

Mot

_Side

1M

ot_S

ide2

HSide

1Cm

d

LSide

1Cm

d

SHUN

T 5

mR

R30

10KR3

210

K

R29

249K

R33

100

pFC3

0

PGND

VCC

5V24

9K

R24

2K2

R31

1 nF

C31

100

nFC3

2

VSHU

NT

1 2 MO

T

D2

100

nFC4

120K

R2 47K

R5

VBat

_Mea

s

Opt

iona

l Hal

l Sen

sors

Supp

ly V

olta

ge M

easu

rem

ent

WD_TRIG

Mot_Dir

120K

R14

VCC

5V

AGND

AGND

2.5V

120K

R35

100

nFC3

3

V_Protect

VSHUNT

AGND

AGND

AGND

Ove

r Cur

rent

Com

pare

H-B

ridge

Dia

gnos

tic D

ispl

ay

AGND

AGND

AGND

RELE

ASE_

BP

VBat

_Mea

s

3 41

5 2

OPA3

33

V+ V-

U3

Mot

or R

otat

ing

Dire

ctio

n

Vbat

GND

LED

MO

T_CW

DG1_Fault

DG3_Fault

100

F 5

0V

+

C6D3

PGND

Bat a

nd S

IO

TP1

GND

VCC

5V

SPEE

D

GND

100K

Spee

d Se

t

VCC

5V

GND

R3

330R

PWR

LED

CMS

Gre

en

ON/

OFF

/ON

Switc

h R

ight A

ngle

DIR

SWIT

CH C

W

SWIT

CH C

CW

GND

RELE

ASE

GND

RELE

ASE

BP

ISP

MK2

Hea

derSW

ITCH

_CCW

SWIT

CH_C

W

VCC

5V

GND

Hal

l1_S

0R: N

et ti

e

PB5(S

CK/P

CINT

5)AV

CC

PC0(A

DC0/P

CINT

8)PC

1(ADC

1/PCI

NT9)

PD2(INT0/PCINT18)

PD1(TXD/PCINT17)

PD0(RXD/PCINT16)

PC6(RESET/PCINT14)

PC5(ADC5/SCL/PCINT13)

PC4(ADC4/SDA/PCINT12)

PC3(ADC3/PCINT11)

PC2(ADC2/PCINT10)

PD3(I

NT1/O

C2B/

PCIN

T19)

PD4(T

0/XCK

/PCI

NT20

)

PB6(T

OSC1

/XTA

LL1/P

CINT

6)PB

7(TOS

C2/X

TAL2

/PCI

NT7) PD5(T1/OC0B/PCINT21)

PD6(AIN0/OC0A/PCINT22)

PD7(AIN1/PCINT23)

PB0(ICP1/CLKO/PCINT0)

PB1(OC1A/PCINT1)

PB2(OC1B/SS/PCINT2)

PB3(MOSI/OC2A/PCINT3)

PB4(MISO/PCINT4)

DG2_

Fault

DG1_

Fault

BZX84-C5V1

BAS1

6

L1 6 H

Q2

BC81

7-40

Low

Dro

p R

ever

se V

olta

ge P

rote

ctio

n

SUD5

0N04

0R: N

et T

ie

HSide

2Cm

dM

ot_S

ide2

HSide

1Cm

dM

ot_S

ide1

SIO_RXD

SIO_TXD

Mot_Dir

Mot_PWM

VBATSW

Shun

t of 5

m

-->

Gai

n =

25

Def

ect >

20A

V

Shun

t = 1

00 m

V

VAm

pl =

2.5

V

SUD5

0N04

SUD5

0N04

SUD5

0N04

SUD5

0N04

LSide

2Cm

d

HSide

2Cm

d

Mot

_Side

2CM

S Ye

llow

Mot

_Side

2M

ot_S

ide19102AAUTO08/07

12 ATA6824 and ATmega88

Figure 6-2. BLDC Application Board Top View and Component Placement

Figure 6-3. BLDC Application Board Bottom View 9102AAUTO08/07

9102AAUTO08/07

Headquarters International

Atmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600

Atmel AsiaRoom 1219Chinachem Golden Plaza77 Mody Road TsimshatsuiEast KowloonHong KongTel: (852) 2721-9778Fax: (852) 2722-1369

Atmel EuropeLe Krebs8, Rue Jean-Pierre TimbaudBP 30978054 Saint-Quentin-en-Yvelines CedexFranceTel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11

Atmel Japan9F, Tonetsu Shinkawa Bldg.1-24-8 ShinkawaChuo-ku, Tokyo 104-0033JapanTel: (81) 3-3523-3551Fax: (81) 3-3523-7581

Product Contact

Web Sitewww.atmel.com

Technical Supportauto_control@atmel.com

Sales Contactwww.atmel.com/contacts

Literature Requestswww.atmel.com/literature

Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to anyintellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMELS TERMS AND CONDI-TIONS OF SALE LOCATED ON ATMELS WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORYWARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULARPURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDEN-TAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OFTHE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes norepresentations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specificationsand product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically providedotherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmels products are not intended, authorized, or warranted for useas components in applications intended to support or sustain life.

2007 Atmel Corporation. All rights reserved. Atmel, logo and combinations thereof, AVR, AVR Studio and others are registered trademarksor trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.