Assignment No:-1 of Computer Architecture

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Assignment No:-1 Of COMPUTER ARCHITECTURE

Submitted To:Lect. Kuljeet kaur

Sumitted by:Name:- ShamiRedg no:-10811543 roll no:- D3803A17

PART-A Q1. Identify at least two application areas (discuss their roles also) for a) Encoder/Decoder ANS:- Encoder/Decoder:- an encoder is a digital circuit that performs the inverse operation of decoder . An encoder has 2 power n input lines and n output lines Application of encoder are as given below:1) By using encoder we can produce n number of outputs e.g of an encoder is the octal to binary encoder. Decoder:- an decoder is a digital circuit that performs the inverse operation of encoder . An decoder has n input lines and 2 power n output lines. Application of Decoder are as given below:1) By using Decoder we can produce 2 power n number of outputs example of an Decoder is the NAND gate decoder in which we can produce 2 to 4 line decoder. 2) Enable inputs are a convienent feature for interconnecting two or more circuits for the purpose of expanding the digital component into a similar function but with more inputs and outputs. (b)Multiplexers/Demultiplexer ANS:- Multiplexers/Demultiplexer:- A multiplexer is a combinational circuit that receives binary information from one of 2 power n input data lines and directs into a single line. (c) Flip Flops Q2. Discuss the basic logic behind counters i.e. how will you obtain 1000(8) from 0111(7)? How will you implement the same? How many flip flops will be complemented in a 10 bit binary counter to reach the next count after 1001100111? ANS:-By adding one bit to the 0111(7) we can obtain the 1000(8) or by complementing the 0111(7) 0111 0111 compliments is 1000 i.e 1s compliment + 1 ------------------ or 1000 ------------------Reverse the case is compliments of 1000 is 0111 Q3. What will happen if buffer gate in the clock input of the register is removed? What is the role of clear and load signals in designing register with parallel load? Ans:- Buffer gate is mainly used for storage of temporary data whereas flip-flop stores only one bit either 0 or 1. Clock is common to all flip-flop. If buffer gate in the clock input of the register is removed then the new input will be entered but it will be produces load on the register and will become confusing for the register from which input output is produced. Clear Input goes to a special terminal in each flip-flop. When the input goes to 0 all flip-flops are reset asynchronously. The clear input is useful for clearing the registers to all 0s prior to its

R2 R1

R1

R2

clocked operation. Load signals:- the load input in the register determine the action to be taken with each clock pulse. When the load input is one , the data in the 4 inputs are transferred into the register with the next positive transition of clock pulse. The load input determines whether the next pulse will accept new information or leave the information in the register intact. PART-B Q4. The content of a four bit register is initially 1101. The register is shifted six times to the right with the serial input being 101101. What is the content of the register after each shift? Ans:- 1101 The content of each register is 1110, 0111, 1011, 1101 Q5. Draw the block diagram to implement following register transfer statement yT2 : R2R1, R1R2 Ans:-

Q6. A digital computer has a common bus system for 16 registers of 32 bit each. The bus is constructed with multiplexers. a) How many selection inputs are there in each multiplexer? ANS:- Four selection inputs are there in each multiplexer if it is a 16X1 multiplexer b) What sizes of multiplexers are needed? ANS:- 32X1 multiplexer sizes of multiplexers are needed (c) How many multiplexers are there in the bus? Ans:- 16 multiplexers are there in the bus.