Devices and Electronics

Assignment 4

Mosfets

Q1.

An NMOS transistor, fabricated with W = 100 µm and L = 5 µm in a technology for

which kn' = 50 µA/V2 and Vt = 1V, is to be operated at very low values of vDS as

linear resistor. Calculate the value of channel resistance for two values of Vgs 1.1

V and 11 V? You range of resistance would then be the difference between the

two values that you have calculated.

How does this range change if

i. the device width is halved?

ii. the device length is halved?

Now Vgs is reduced to 0 V. What would be the channel resistance?

Q2.

Qs 5.57 from Sedra Smith 6th edition

Q3.

Determine qualitatively how the trans-conductance of a MOSFET(operating in

saturation) changes if

a) W/L is doubled but Id remains constant.

b) Vgs-Vth is doubled but Id remains constant.

c) Id is doubled but W/L remains constant.

d) Id is doubled but Vgs-Vth remains constant.

Q4.

All the transistors in the circuits shown have the same values of Vt, k’, W/L and

lambda. Moreover, Lambda is negligibly small. All operate in saturation at Id=I

and |Vgs|=|Vds|= 1V. Find the voltages at V1, V2, V3 and V4. If |Vt|=0.5 V and

I=0.1mA, how large a resistor can be inserted in series with each drain connection

while maintaining saturation? Attempt this question this for the 3 circuits shown

below.

Q5.

Determine the region of operation of the transistors in each of the circuits shown below. Assume VTH = 0.4 V for NMOSdevices.

Q6:

For the Circuit shown below, calculate Vo. Vt=2V and k=1mA/(V^2). In order to

solve this, you have to determine yourself if M1 and M2 are in saturation or linear

region. Start by assuming something.

Qs 7:

A P channel Transistor for which |Vt| is 1v, |Va| is 50v, operates in saturation region with

|Vgs| is 3v, Vds| is 4v and Id is 3mA. Find the signed values of the following

Vgs

Vsg

Vds

Vsd

Va

λ

K’(W/L)

V t

Q8:

For the circuit below, let RG = 10 Mohms and RD = 1O Kohmsand VDD = 10 V. For each of the

following two transistors, findthe voltages VD and VG:

(a) Vt=1 Vand k'nW/L = 0.5 mA/V2

(b) Vt= 2 V and k’nW/L= 1.25 mA/V2

Q1NMOSFET

RD10k

RG1

10k

RG2

10k

Vdd

Qs 9:

For the Circuit below, using a 6-V supply with an NMOS transistor for which V, = 1.2 V, k'nW/L =

3.2 mA/V2 and λ = 0, provide a design which biases the transistor at ID = 2 mA, with VDS large

enough to allow saturation operation for a 2-V negative signal swing at the drain. Use 22 M

ohm as the largest resistor in the feedback-bias network. What values of RD, RG1and RG2 have

you chosen?