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UNIVERSITY OFDAR ES SALAAM
COLLEGE OF ENGINEERING AND TECHNOLOGY
FACULTY OF ELECTRICAL AND COMPUTER SYSTEMS ENGINEERING
DEPARTMENT OF COMPUTER SYSTEMS ENGINEERING
CS 251: INTRODUCTION TO COMPUTER ENGINEERING
ASSIGNMENT 3
GROUP MEMBERS:
SURNAME FIRST NAME DEG. PROG. REG. NUMBER
HUSSEIN TATU TE 2007-04-05286SADICK EUGENE TE 2007-04-00360
JUNE, 2009.1. Perform the following base conversions using subtraction or division-
remainder:
a) 45810 to base
b) 67710 to base5
c) 151810 to base7
d) 440110 = to base 9
2. Convert the following decimal fractions to binary with a maximum of six places to the right of the binary point:
a) 26.78125
LSB
LSB
LSB
MSB
LSB
MSB
MSB
MSB
b) 194.03125
c) 16.1240234375
3. Represent the following decimal numbers in binary using 8 – bit signed magnitude, one’s compliment and two’s compliment:
a) 77b) -42c) 119d) -107
Lsb
Msb
Lsb
Lsb
Msb
Lsb
MsbLsb
Lsb
Msb
Msb
Msb
Number 8-bit signed magnitude
One’s compliment
Two’s compliment
77
7710 = 10011012
+7710 = 010011012
7710 = 10011012
+7710=010011012
7710 = 10011012
+7710=010011012
-42
4210 = 1010102
-4210 = 101010102
4210 = 1010102
= 001010102
-4210 = 110101012
4210 = 1010102
= 001010102
Using drop down trailing zeros up to the first 1, then complimenting the rest,
-4210 = 110101102
119
11910 = 11101112
+11910=011101112
11910 = 11101112
+11910 = 011101112
11910 = 11101112
+11910 = 011101112
-107
10710 = 11010112
-10710 = 111010112
10710 = 11010112
= 011010112
-10710 = 100101002
10710 = 11010112
= 011010112
Using drop down trailing zeros up to the first 1, then complimenting the rest,
-10710 = 100101012
Lsb
Lsb
Lsb
Msb
Msb
Msb
Lsb
Msb
4. Given a (very) tiny computer that has a word size of 6 bits, what are the smallest negative numbers and the largest positive numbers that this computer can represent in each of the following representations?
a) One’s complimentGiven N = No. of bits = 6 bits
Smallest negative number = - (2N-1-1) = - (26-1-1) = - (25-1) = -31 Largest positive number = + (2N-1-1) = + (26-1-1) = + (25-1) = +31
b) Two’s compliment Smallest negative number = - (2N-1) = - (26-1) = - (25) = -32 Largest positive number = + (2N-1-1) = + (26-1-1) = + (25-1) = +31
5. Using Booths algorithm to find the multiplication of the below binary numbers
a) 1100x 101
Multiplicand = 1100;
Its 2’s compliment is 0011 +1 = 111110100
Multiplier = 0101
Record = 01010
+1 -1 +1 -1
1 1 0 0
X +1 -1 +1 -1
1 1 1 1 0 1 0 0
0 0 0 1 1 0 0
1 1 0 1 0 0
0 1 1 0 0
0 0 1 1 1 1 0 0
So
1100 X 101 = 111100
b) 10101 x 111
Multiplicand = 10101, its 2’s compliment is 01010 +1 = 01011;
Multiplier is 111; the store is 01110
+100-1
1 0 1 0 1
X +1 0 0 -1
1 1 1 0 1 0 1 1
0 0 0 0 0 0 0
0 0 0 0 0
1 0 1 0 1
1 0 0 1 0 0 1 1
So 10101 X 111 = 10010011
6. Using Booths algorithms to solve the below division.
a) 1010111 ÷101 Divisor = 1011
A register Q register
Initially 0 0 0 0 1010111
Shift left 0 0 0 1 010111
Subtract divisor 1 0 1 1
Set Qo 1 1 0 0 0101110
Shift left 1 1 0 0 0 101110
Add divisor
0 0 1 0 1
Set Qo 1 1 1 0 1 1011100
Shift left 1 1 1 0 1 1 011100
Add divisor
0 0 0 1 0 1
Set Qo 0 0 0 0 0 0 0111001
Shift left 0 0 0 0 0 0 0 111001
Subtract divisor 1 1 1 1 0 1 1
Set Qo 1 1 1 1 0 1 1 1110010
Shift left 1 1 1 1 0 1 1 1
110010
Add divisor
0 0 0 0 0 1 0 1
Set Qo 1 1 1 1 1 1 0 0
1100100
Shift left 1 1 1 1 1 1 0 0 1
100100
Add divisor
0 0 0 0 0 0 1 0 1
Set Qo 1 1 1 1 1 1 1 1 0
1001000
Shift left 1 1 1 1 1 1 1 1 0 1
001000
Add divisor
0 0 0 0 0 0 0 1 0 1
Set Qo 0 0 0 0 0 0 0 0 1 0
0010001
The Quotient is 0001 0001 and the remainder is 10.
b) 10000001÷101 -divisor= 1011
A register Q register
Initially 0 0 0 0 10000001
Shift left 0 0 0 0 1 0000001
Subtract divisor
1 1 0 1 1
Set Qo 1 1 1 0 0 00000010
Shift left 1 1 1 0 0 0 0000010
Add divisor
0 0 0 1 0 1
Set Qo 1 1 1 1 0 1 00000100
Shift left 1 1 1 1 0 1 0 0000100
Add divisor
0 0 0 0 1 0 1
Set Qo 1 1 1 1 1 1 1 00001000
Shift left 1 1 1 1 1 1 1 0 0001000
Add divisor
0 0 0 0 0 1 0 1
Set Qo 0 0 0 0 0 0 1 1 00010001
Shift left 0 0 0 0 0 1 1 0 0010001
Subtract divisor
1 1 1 1 1 0 1 1
Set Qo 0 0 0 0 0 0 0 1 0100011
Shift left 0 0 0 0 0 0 0 1 0
100011
Subtract divisor
1 1 1 1 1 1 0 1 1
Set Qo 1 1 1 1 1 1 1 0 1
1000110
Shift left 1 1 1 1 1 1 1 0 1 1
000110
Add divisor
0 0 0 0 0 0 0 1 0 1
Set Qo 0 0 0 0 0 0 0 0 0 0
0001100
The Quotient is 1100, with a remainder of 0
7.
Sign=1digit Exponent = 5 digits Mantissa =8 digits
Exponent bias = 16.
The number 100.010 =01100100.0 = 1.1001 X 106
Mantissa = 10010000
Exponent = 6+16 = 22 = 10110
Sign = 0
The number 0.25 = 0.01=1.0X10-2
Mantissa = 01000000
Exponent = 16+-2=14 = 1110
Sign =0
8. Why do we usually store floating point numbers in the normalized form? What are the advantages of using a bias as opposed to adding a sign bit to the exponent? Answer:
The reason of using the normalized form floating point numbers is that they tend to allow very large and very small numbers to be presented using only few digits at the expense of precision
Used in many application to represent numbers since most of them they are not capable of using integers
Advantages of using bias as opposed to sign bit is Easy to present the floating point numbers
0 10110 10010000
0 01110 01000000
Accuracy in the floating numbers representation
9. Given that the ASCII code for A is 1000001, what is the ASCII code for J?
Given that the EBCDIC code for A is 11000001, what is the EBCDIC code for J?
(a) A=1000001
To change A into hexadecimal number:
A=0100|0001=4116
From A to J we have 9 characters, so add 9 in A to get J
9 in binary is 1001
J=A+9=1000001+1001=1001010
J=1001010
Hence the value of J is 1001010
(b) A=11000001
To change A into hexadecimal number:
A=1100/0001=121
From A to J we have 9 characters, so add 9 in A to get J
9 in binary is 1001
J=A+9=11000001+1001=11001010
J=11001010
Hence the value of J is 11001010
10.
Assume a 24 –bit word on a computer .In these 24 bits we wish to represent the value 295.
(a) If our computer uses even parity ,how would the computer represent the decimal value 295?
(b) If our computer uses 8-bit ASCII and even parity ,how would be computer represent the string 295
(c) If our computer uses packed BCD ,how would the computer represent the number +295
(a) To represent the decimal value 295
Change 295 into binary
29510=100100111
If we use even parity 295 will be 000000000000001100100111
(b) If we use 8-bit ASCII and even parity
To change 295 into binary
295=100100111
If we use even parity 295 will be 000000000001000100100111
(c) If a computer uses packed BCD
295 in BCD=001010010101
BCD using 24 bits 295 will be equal to 000000000000001010010101
11.
Decode the following ASCII message, assuming 7-bit ASCII character and no parity.
1001010 1001111 1001000 1001110 0100000 1000100 1000101.
To change each binary into hexadecimal
1001010=4A, 1001111=4F, 1001000=48, 1001110=4E, 0100000=20, 1000100=44,
1000101=45
To change each hexadecimal into its equivalent character
4A=J ,4F=0 ,48=H ,4E=N ,20=BLANK ,44=D ,45=E
When 1001010 1001111 1001000 1001110 0100000 1000100 1000101 is decoded it will be equal to JOHN DE
12.
Find the quotients and remainders for the following division problems modules.
(a) 10101112÷11012
(b) 10111112÷111012
Solution.
0000110a/ 1101 -1101 10001 - 1101 1001 0000 1001
Quotient is 110 and remainder is 1001
b/ 0000011 11101 -11101 100101 -11101 01000
Quotient is 11 and remainder is 10000
13.Convert the IEEE single precision Floating Point numbers to the decimal values
Answer:
The number i
The number is
14.
In order to print out number 3.142, which five ASCII characters must be sent to the printer?
Answer:
15.
Describe IEEE 754 Floating Point Standard of representing fraction numbers.
Answer:
This is the standard format for representing binary floating point numbers introduced by IEEE.The number is represented by using three fields,sign field,exponent field and mantissa field.The three fields are represented in the form of where “ f” is the value of the fraction field and “e” is the
biased exponent.
Example:
In single precision
In tabular form:
S e m
0 0000...........................0000
1 bit 8 bits 32 bits
In double precision
e
m
S e m
0 0000........................................0000
1 bit 11 bits 64 bits
16.
Calculate the decimal value represented by the binary number 10101 using
a) Signed magnitude c) Two’s complement
b) One’s complement d) Excess representation
Answer:
a) Using Signed magnitude
b) Using One’s complement
20
c) Using Two’s complement
hence the number is 9
d) Using Excess representation
16. Calculate the decimal value represented by the binary number 10101 using
(a) signed magnitude(b)one’s compliment(c) two’s compliment(d)excess representation
(a) signed magnitudeIn signed magnitude the msb indicates the sign of the decimal number
then 1 in 101012 indicates that the number is negative of magnitude
= 20 +22 = 1+4 = -510
b) one’s compliment
In one’s complement 101012 become 010102
= 21 +23
=1010
(c) two’s complimentIn 2’s complement 101012 become 010112
=20 +21 +23 =1110
(d)excess representation 101012 its bias = 25-1 =16=100002
2’s complement = 010112 Add bias = 16 = 1000Answer = 110112
The number is positive since msb is 1,=20 +21+23
=1110
17.What is the Booth’s Algorithm? State the steps required for multiplying two signed binary numbers. When multiplying -6 times -5, what is the sequence of values in the (P, A) register pair?
Booth algorithm- Is the technique used to speed up the multiplication operation based on the observation that the larger the number of consecutive zeros and ones, the fewer partial products that have to be generated.
Steps required performing multiplication1) If x is the count of bits of the multiplicand, and y is the count of bits of the
multiplier : 2) Draw a grid of three lines, each with squares for x + y + 1 bits. Label the
lines respectively A (add), S (subtract), and P (product). 3) In two's complement notation, fill the first x bits of each line with : 4) A: the multiplicand 5) S: the negative of the multiplicand 6) P: zeroes 7) Fill the next y bits of each line with : 8) A: zeroes 9) S: zeroes
i. P: the multiplier
10) Fill the last bit of each line with a zero. 11) Do both of these steps |y| (the Absolute Value of y) times : 12) If the last two bits in the product are... 13) 00 or 11: do nothing. 14) 01: P = P + A. Ignore any overflow. 15) 10: P = P + S. Ignore any overflow. 16) Arithmetically shift the product right one position. 17) Drop the last bit from the product for the final result.
18) Sequence value is of (P, A) in register pair for -6*-519) A = 0011 0000 0 20) S = 1101 0000 0 21) P = 0000 1100 0 22) Perform the loop four times :
23) P = 0000 1100 0. The last two bits are 00. 24) P = 0000 0110 0. A right shift. 25) P = 0000 0110 0. The last two bits are 00. 26) P = 0000 0011 0. A right shift. 27) P = 0000 0011 0. The last two bits are 10. 28) P = 1101 0011 0. P = P + S. 29) P = 1110 1001 1. A right shift. 30) P = 1110 1001 1. The last two bits are 11. 31) P = 1111 0100 1. A right shift.
a. The product is 1111 0100, which is 30
18.
Design a full subtractor using only the NOR gates
Truth table
X Y Bin D Bout
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0
1
1
0
1
0
0
1
0
1
1
1
0
0
0
1
Logic expressions:
Bout
D
BinYX
19. Design a full adder circuit using only the NAND gates.
Cin
Sum
Carry
BA