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AROMA: A Highly Accurate Microcomponent-based Approach for Embedded Processor Power Analysis
Zih-Ci Huang*, Chi-Kang Chen*§§§§, Ren-Song Tsay** National Tsing-Hua University, Taiwan
§§§§ ITRI, Taiwan
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∗ Existing Power Estimation Issues
∗ Related Work
∗ AROMA
∗ Experimental Results
∗ Conclusions
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Outline
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∗ Either slow or inaccurate
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Issues of Existing Approaches
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Can It Be Both Fast and Accurate ?
Fast
Accurate
?
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∗ Circuit-level / Gate-level / RTL power analysis
∗ Very Accurate (golden result)
∗ Extremely Slow (only good for simple/small designs)
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Related Work – Circuit
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∗ ALPA (architecture level power analysis) 2000 ~ 2008
∗ Reasonably accurate using capacitive power models
∗ Limited performance based on cycle-accurate simulator
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Related Work - ALPA
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∗ ILPA (instruction level power analysis) 1994 ~
∗ Pre-characterize power for each instruction
∗ High Performance
∗ Power = ∑ (Inst. Count)*(Power/Inst. )
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Related Work - ILPA
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∗ BB-based (basic-block based power analysis) 2011 ~ 2013
∗ Pipeline effect can be captured
∗ Higher performance
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Related Work – BB-based
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A
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time IF ID EXE MEM WB
1 i1
2 i2 i1
3 i3 i2 i1
4 i4 i3 i2 i1
5 i5 i4 i3 i2 i1
6 I5 I4 i3 * i2
7 I5 I4 i3 * *
8 i5 i4 i3 *
9 i5 i4 i3
10 i5 i4
11 i5
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AROMA – Our Proposal
Fast
Accurate
∗ Pre-characterized instruction-pair-based μ-component
∗ Instruction-μcomponent processor timing simulator
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μ-component-based Methodology
∗ Instruction follows a regular flow in pipeline
∗ Each instruction uses specific μ-components
Instruction {μ-component}
add {Reg File, Ctrl, ALU, Mux} mul {Reg File, Ctrl, Mult, Mux}
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∗ μ-component input causes switching which consumes power
∗ Minimize variations of switching effect influence (inaccuracy)
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μ-component Identification
Input Instructionadd {Reg File, Ctrl, ALU, Mux} mul {Reg File, Ctrl, Mult, Mux}
Initial μ-component setμc = {Reg File, Ctrl, ALU, Mux, Mult}
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μ-component Identification
Initial μ-component setμc = {Reg File, Ctrl, ALU, Mux, Mult}
After add inst.μc1 = {Reg File, Ctrl, ALU, Mux}μc2 = {Mult} (The rest)
Input Instructionadd {Reg File, Ctrl, ALU, Mux} mul {Reg File, Ctrl, Mult, Mux}
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μ-component Identification
After mul inst.μc1 = {Reg File, Ctrl, Mux}μc2 = {ALU}μc3 = {Mult}μc4 = {} (The rest)
Input Instructionadd {Reg File, Ctrl, ALU, Mux} mul {Reg File, Ctrl, Mult, Mux}
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μ-component Identification
Outputμc1 = {Reg File, Ctrl, Mux}μc2 = {ALU}μc3 = {Mult}
add = {μc1, μc2 }mul = {μc1, μc3 }
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∗ Instruction � Control signals on each μ- component
∗ Consecutive instruction � Control signal transitions
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Power Table Construction
M: μ-component number
N: Instruction number
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∗ Enumerate all potential consecutive instruction-pairs
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Power Table Construction
M: μ-component number
N: Instruction number
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∗ Key idea is to know the timing of μ-component usage
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μ-component based Power Analysis
Pipeline
stage sInst
iInst
i
μComponent
trt(i, s) tet(i, s)execution delay
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∗ Instruction execution � μ-component usage status
∗ Illustrative example:
∗ add-mul � add-NOP + NOP mul
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μ-component based Power Analysis
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TargetProcessor
Identifyμ-components
Characterizing μ-components
μ-componentspower table
Instruction-μ-componenttiming/power simulation
timing/powerreports
Preparationphase
Simulationphase
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μ-component-based Methodology
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∗ Target processor
∗ OpenRISC OR1200 processor (32-bit, 4-stages)
∗ 0.18 um 6LM process
∗ Host machine
∗ Intel Xeon 3.4 GHz dual-core
∗ 2GB ram
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Experimental Environment
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∗ Synthesizer
∗ Design Compiler
∗ Power Characterization (Power Table Generation)
∗ PrimeTime PX
∗ Benchmarks
∗ Fibonacci series
∗ OR1200 RISC Processor Benchmark:
∗ basic, cbasic, mul, dhry
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Experimental Environment
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Performance Comparison
BB: Basic-block based Power AnnotationILPA: Instruction Level Power AnalysisALPA: Architecture Level Power Analysis
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Accuracy Comparison
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∗ Innovative power estimation approach
∗ μ-component based
∗ Capture CMOS switching activities
∗ Contribution of this work
∗ Fast and very accurate
∗ Future Work
∗ Extend the idea to bus, memory and others
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Conclusions
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Thanks
Q & A
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