Arm Intro 3 f10
Transcript of Arm Intro 3 f10
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INTRODUCTION TO
ARM
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ARM Overview
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Market Share
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Key Growth Drivers
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Licensing Base
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Applications
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Application
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Embedded Complexity
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The Rise of Linux-based Embedded OS
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The Rise of Linux-based Embedded OS
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ARM Community
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Processor across applications
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Major ARM SW/Prog/EM Support
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MDK Vs RVDS Vs DS-5
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Development of the ARM Architecture
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Evolution of ARM Processor Architecture
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ARM Processor Names
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ARM Processor Names (2)
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ARM Core Family
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Product Code Demystified
T: Thumb
D: On-chip debug support
M: Enhanced multiplier
I: Embedded ICE hardware
T2: Thumb-2
S: Synthesizable code
E: Enhanced DSP instruction set
J: JAVA support, Jazelle
Z: Should be TrustZone
F: Floating point unit
H: Handshake, clockless design for synchronous orasynchronous design
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ARM7
ARM has continued to develop new processors and systemblocks. These include the popular ARM7TDMI processor and,, the ARM1176TZ(F)-S processor, which is used in high-endapplications such as smart phones.
ARM7TDMI processor is based on the ARMv4T architecture(the Tis forThumbinstruction mode support).
The ARMv5E architecture was introduced with the ARM9Eprocessor families (ARM926E-S and ARM946E-S) [EnhancedDigital Signal Processing (DSP) instructions for multimediaapplications].
ARM11 processor family (ARMv6). memory system features and Single InstructionMultiple Data (SIMD)
instructions.
ARM1136J(F)-S, the ARM1156T2(F)-S, and the ARM1176JZ(F)-S.
optimized Thumb-2 instruction set
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ARM Architecture profiles
The architecture design is divided into three profiles: TheA profile is designed for high-performance open application
platforms.
The R profile is designed for high-end embedded systems in which
real-time performance is needed. The M profile is designed for deeply embedded microcontroller-
type systems.
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ARM Architecture profiles A Profile (ARMv7-A):
Application processors which are designed to handle complex applicationssuch as high-end embedded operating systems (OSs) (e.g., Symbian, Linux,and Windows Embedded).
These processors requiring the highest processing power, virtual memorysystem support with memory management units (MMUs), and, optionally,enhanced Java support and a secure program execution environment.
Example products include high-end mobile phones and electronic wallets forfinancial transactions.
R Profile (ARMv7-R): Real-time, high-performance processors targeted primarily at the higher end of
the real-time1 marketthose applications, such as high-end breaking systemsand hard drive controllers, in which high processing power and high reliability
are essential and for which low latency is important. M Profile (ARMv7-M):
Processors targeting low-cost applications in which processing efficiency isimportant and cost, power consumption, low interrupt latency, and ease of useare critical, as well as industrial control applications, including real-time controlsystems.
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ARM Architecture profiles
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ARMv7Architecture
Cortex-M3 processor, one Cortex product of the familiesthat use the ARMv7 architecture.
Other Cortex family processors include:
the Cortex-A8 (application processor), which is based on the
ARMv7-A profile, and
the Cortex-R4 (real-time processor), which is based on the ARMv7-R profile.
All ARM architecture contains the following key areas:
Programmers model Instruction set
Memory model
Debug architecture
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ARM Cortex-M3 The ARM Cortex-M3 processor
First of the Cortex generation of processors (32 bit) Released in 2006, excellent performance at low gate count features of high-end processors.
Suitable for 32-bit embedded processor market: Greater performance efficiency: allowing more work to be done without increasing
the frequency or power requirements Low power consumption: enabling longer battery life, especially critical in portable
products including wireless networking applications Enhanced determinism: guaranteeing that critical tasks and interrupts are serviced
as quickly as possible and in a known number of cycles Improved code density: ensuring that code fits in even the smallest memory
footprints Ease of use: providing easier programmability and debugging for the growingnumber of 8-bit and 16-bit users migrating to 32 bits
Lower cost solutions: reducing 32-bit-based system costs close to those of legacy 8-bit and 16-bit devices and enabling low-end, 32-bit microcontrollers to be priced atless than US$1 for the first time
Wide choice of development tools: from low-cost or free compilers to full-featureddevelopment suites from many development tool vendors
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Programmers Model
Data Sizes and Instruction Sets
When used in relation to the ARM: Halfword means 16 bits (two bytes)
Word means 32 bits (four bytes)
Doubleword means 64 bits (eight bytes) Most ARMs implement two instruction sets
32-bit ARM Instruction Set
16-bit Thumb Instruction Set
Latest ARM cores introduce a new instruction setThumb-2 Provides a mixture of 32-bit and 16-bit instructions
Maintains code density with increased flexibility
Jazelle-DBX cores can also execute Java bytecode
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The Thumb-2 Technology and ISA
The Thumb-2 technology extended the Thumb InstructionSet Architecture (ISA)
highly efficient and powerful instruction set
ease of use, code size, and performance
extended instruction set in Thumb-2 is a superset of theprevious 16-bit Thumb instruction set
additional 16-bit instructions alongside 32-bit instructions Less switching between ARM state and Thumb state.
PS: Cortex-M3 supports only the Thumb-2 (and traditionalThumb) instruction set. uses the Thumb-2 instruction set for all operations.
Cortex-M3 processor is not backward compatible with traditionalprocessors
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Processor Modes
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The ARM Register Set
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Data alignment
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Exception Handling
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ARM Instruction Set
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Thumb/2 Instruction Set
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Thumb-2 Instruction Set
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ARM 7 Architecture v4T 3-stage pipeline Single interface to memory
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ARM 9
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ARM 9
Flexible Cache Design
Flexible TCM Design
DSP Enhancements
ARM926EJ-S Architecture v5TE 5-stage pipeline Single-cycle 32x16 multiplier Caches and TCMs
Memory management unit (MMU) 2 AHB memory interfaces Jazelle technology
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ARM 11
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ARM 11
ARM1176JZ(F)-S ProcessorCore TrustZone 8-stage pipeline
Branch prediction Four AXI memory ports IEM (Intelligent EnergyManagement) Integrated VFP coprocessor
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ARM Cortex-M
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ARM Cortex-M1
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ARM Cortex-M3
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ARM Cortex-M0
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ARM Cortex-M4
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ARM Cortex-A8
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ARM Cortex-A8
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ARM Cortex-A8
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ARM Cortex-A8
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ARM Cortex-R4
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SUMMARY