Architectural modeling
1
Compiled program with target toolchain Target binary 0101…111 Emulation on existing platform (e.g., x86) Equivalent instructions (translation) Input (e.g, Image) Output EMULATION Instruction Set Simulator (ISS) Output ISS Architectural Simulator Output ARCH_SIM Output GROUND_TRUTH Impl. on mature platform (e.g., x86) = = = e.g., Vector add -> for loop add Java, python, C, whatsoever Memory hierarchy model Timing model Functional model S t e p 1 S t e p 2 S t e p 3 S t e p 4 Functional with instruction counts
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Transcript of Architectural modeling
Compiled program with target toolchain
Target binary0101…111
Emulation on existing platform (e.g., x86)
Equivalent instructions (translation)
Input (e.g, Image)
OutputEMULATION
Instruction Set Simulator (ISS)
OutputISS
Architectural Simulator
OutputARCH_SIM OutputGROUND_TRUTH
Impl. on mature platform (e.g., x86)
= = =
e.g., Vector add -> for loop add
Java, python, C, whatsoeverMemory
hierarchy modelTiming model
Functional model
Step 1
Step 2
Step 3
Step 4
Functional with instruction counts
