Chapitre 3 : Les firmes multinationales (FMN ou FTN : firme transnationale) 1.
AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.
-
Upload
clement-morgan -
Category
Documents
-
view
213 -
download
0
Transcript of AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.
![Page 1: AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.](https://reader036.fdocuments.us/reader036/viewer/2022082820/56649d025503460f949d5ddf/html5/thumbnails/1.jpg)
AR3BL2Measurements at Penn
3rd Assembled boardNovember 9 04
FMN
![Page 2: AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.](https://reader036.fdocuments.us/reader036/viewer/2022082820/56649d025503460f949d5ddf/html5/thumbnails/2.jpg)
3BL2 with/without 10pF LoadClock Min - Max 300KHz Rate
![Page 3: AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.](https://reader036.fdocuments.us/reader036/viewer/2022082820/56649d025503460f949d5ddf/html5/thumbnails/3.jpg)
3BL2 Test Pulse Scan Shaping Controll 0,0 and 1,1
Test Pulse not functional in this location #46 even after replacement of DTMROC. Board layout appears OK using DVM and examining Gerbers.
All 3BL2, 1 locations OK for even and Odd test pulse lines.
![Page 4: AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.](https://reader036.fdocuments.us/reader036/viewer/2022082820/56649d025503460f949d5ddf/html5/thumbnails/4.jpg)
Data Read TestsDelay from First L1A 1.0us and 3.18uS ( “in time”)
![Page 5: AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.](https://reader036.fdocuments.us/reader036/viewer/2022082820/56649d025503460f949d5ddf/html5/thumbnails/5.jpg)
3BL2 Data Read Noise Antenna @#46 Data Out to @#47 Load Board
“ In time ” Delay from First L1A 3.18uS
![Page 6: AR3BL2 Measurements at Penn 3 rd Assembled board November 9 04 FMN.](https://reader036.fdocuments.us/reader036/viewer/2022082820/56649d025503460f949d5ddf/html5/thumbnails/6.jpg)
3BL2 Measurement SummaryThreshold scans OK.
Clock, Data pickup very low.
Additional Tests Performed• DLL lock at 2.4V All locations locked.
• Voltage /Temp Readout - all locations as expexted.
• BX / DX delay scans look reasonable.
?? Location @#46 test pulse ??
High Threshold --- not done yet