APV25 & Origami Status M.Friedl, C.Irmler, M.Pernicka HEPHY Vienna.
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Transcript of APV25 & Origami Status M.Friedl, C.Irmler, M.Pernicka HEPHY Vienna.
![Page 1: APV25 & Origami Status M.Friedl, C.Irmler, M.Pernicka HEPHY Vienna.](https://reader036.fdocuments.us/reader036/viewer/2022062423/56649e1b5503460f94b0a163/html5/thumbnails/1.jpg)
APV25 & Origami Status
M.Friedl, C.Irmler, M.Pernicka
HEPHY Vienna
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2Markus Friedl (HEPHY Vienna)18 Mar 2009
APV25 Purchase & Thinning
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3Markus Friedl (HEPHY Vienna)18 Mar 2009
APV25 Purchase
• Current Belle purchase – 1500 diced „normal“ APV chips (~300µm
thick)– 2500 uncut APVs on wafers (for thinning)
• Future order– 1000 more „normal“ APVs which did not
fit in current purchase due to financial limits
• 8 wafers with a total of 2674 known good dies were delivered to Vienna on 9 Jan 2009
• One wafer contains 360 APVs in total • Each chip was tested on the wafer, yielding an average of 93% good
dies
• The 1500 normal APVs are at KEK, financial transaction underway
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4Markus Friedl (HEPHY Vienna)18 Mar 2009
APV25 wafers (8")
Wafer map showing test results (used to ink mark bad dies on wafer)
More photos: http://www.hephy.at/gallery2/v/electronics2/8inchwafer
APV25 Wafer Inspection
• On 19 Jan 2009, we sent 1 wafer (319 good dies) for– Thinning (100µm target), dicing and waffle packing
• Received back on 4 Feb 2009– 105µm (nominal) thickness– 314 (out of 319) good dies (= 98.4% yield)
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5Markus Friedl (HEPHY Vienna)18 Mar 2009
Inspection of Thinned APVs
More photos: http://www.hephy.at/gallery2/v/electronics2/1stwaferthinned
Thickness measurement(Mitutoyo CMM)
Waffle-packed thinned APV chips
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6Markus Friedl (HEPHY Vienna)18 Mar 2009
Investigation of Thinned APV25 Chips
• Thickness measurement: 106.6 +/- 3.2 µm • Thin dies are still quite rigid, easy handling
thinning mechanically OK
• Mounting 16 thinned chips on hybrids + 4 normal chips for electrical measurements
• All perform equally well
thinning electrically OK
• Next step: populate 2 Origami modules, one with normal, one with thinned APVs
• If again no difference, we will proceed with thinning all the chip-on-sensor wafers
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7Markus Friedl (HEPHY Vienna)18 Mar 2009
SVD Layout & Origami
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8Markus Friedl (HEPHY Vienna)18 Mar 2009
Possible SuperSVD Layout
• Geometry optimization is underway• Pixel double-layer using DEPFET• Strip layers extend to r~14 cm (presently
8.8 cm)• Every sensor is read out individually
(no ganging) to maintain good S/N Origami concept for inner DSSDs (red)
Double-layer of DEPFET pixels
4 layers of double-sided strip sensors
0
0
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1+23
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6[cm] layers
[cm]
20
-10-20-30 10 20 30 40More on the layoutby Thomas Bergauer
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9Markus Friedl (HEPHY Vienna)18 Mar 2009
Origami Chip-on-Sensor Concept
(readout connections not shown)
• Kapton hybrid design for 4“ sensor done,being manufactured now
• Design for assembly jigs is ongoing• Module to be constructed in April 2009
Total material budget: 0.72% X0
(cf. 0.48% for conventional readout)
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10Markus Friedl (HEPHY Vienna)18 Mar 2009
Origami – 4" DSSD Layout
4 n-side APV chips
2 p-side APV chips 2 p-side APV chips Connectors(on both sides)
Flex fanouts to bewrapped aroundthe sensor edge
• 3-layer flex hybrid design• p- and n-sides are
separated by 80V bias• n-side pitch adapter is
integrated in hybrid• ordered at CERN PCB
workshop, expected back ~end of March
Animal farm (mascots:cat MF, eagle SS, bat CI)
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11Markus Friedl (HEPHY Vienna)18 Mar 2009
APV25 Trigger, Clock and Dead Time
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12Markus Friedl (HEPHY Vienna)18 Mar 2009
No External Restrictions
• Min Lost: too little distance between triggers (6 clocks min.)• FIFO Lost: too many pending readouts (filling APV25 buffers)• Nakao-san wishes <3% dead time @ L1=30kHz OK (0.87%) for 42.4MHz clock, slightly higher (3.43%) at 31.8MHz
Trigger Loss @ 42.4MHz
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10
10 20 30 40 50
Trigger rate [kHz]
Tri
gg
er
loss [
%]
FIFO Lost [%]
Min Lost [%]
Trigger Loss @ 31.8MHz
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1
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10 20 30 40 50
Trigger rate [kHz]T
rig
ger
loss [
%]
FIFO Lost [%]
Min Lost [%]
12.8 25.9
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13Markus Friedl (HEPHY Vienna)18 Mar 2009
Trigger Loss @ 42.4MHz
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10 20 30 40 50
Trigger rate [kHz]
Tri
gg
er
loss [
%]
FIFO Lost [%]
Min Lost [%]
External 500ns Dead Time Requirement (ECL)
• Nakao-san‘s wish (<3% dead time @ L1=30kHz) met in both cases 0.42% for 42.4MHz clock and 2.7% at 31.8MHz• 500ns dead time (as required by ECL) not accounted for APV25
– Hence minimum lost figure is always zero
Trigger Loss @ 31.8MHz
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1
2
3
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6
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10 20 30 40 50
Trigger rate [kHz]T
rig
ger
loss [
%]
FIFO Lost [%]
Min Lost [%]
11.4 24.0
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14Markus Friedl (HEPHY Vienna)18 Mar 2009
Summary & Outlook
• APV Thinning– 1st wafer successfully thinned (16.6 µm)– Electric sample (~5%) tests are fine– Remaining APV wafers to be processed
after successful tests on Origami
• Origami Status – flex circuit design submitted for fabrication at CERN, expected
back ~end March 2009– Jig design underway, will assemble in April
• Dead Time – Always <3% dead time with both
42.4 and 31.8 MHz clocks in case of500 ns dead time requirement (ECL)
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15Markus Friedl (HEPHY Vienna)18 Mar 2009
Backup Slides
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16Markus Friedl (HEPHY Vienna)18 Mar 2009
Origami Concept
• Extension of chip-on-sensor to double-sided readout• Flex fan-out pieces wrapped to opposite side (hence “Origami“)• All chips aligned on one side single cooling pipe
zylon rib
APV25 cooling pipe
4-layer kapton hybrid
integrated fanout(or: second metal)
DSSD
single-layer flex wrapped to p-side
Side View (below)
APV25(thinned to 100µm)
zylon ribcooling pipe
DSSDRohacellKapton