Application of the SIDECAR ASIC as the Detector Controller for ACS and the JWST Near-IR Instruments...
-
Upload
melanie-blair -
Category
Documents
-
view
220 -
download
1
Transcript of Application of the SIDECAR ASIC as the Detector Controller for ACS and the JWST Near-IR Instruments...
Application of the SIDECAR ASIC as the Detector Controller for ACS and the JWST
Near-IR Instruments
Markus LooseSTScI Calibration Workshop
July 22, 2010
2
Outline
• SIDECAR ASIC Architecture– Overview– Features– Current SIDECAR Missions
• Performance Aspects– Preamp/ADC Noise– Preamp offset drift– Reference/Bias voltage noise
• Conclusion
Oct 15, 2009 Scientific Detector Workshop, Garching, Germany
STScI Calibration Workshop 3July 22, 2010
Digital ControlMicrocontroller for Clock Generation
and Signal ProcessingBias
Generator
Amplification and A/D
Conversion
Data Memory
Program Memory
Data Memory
Digital I/O
Interface
SIDECAR
Exte
rnal
El
ectr
onic
s
Mul
tiple
xer,
e.g.
HAW
AII-
2RG
analog mux out
bias voltages
clocksmain clock
data in
data out
synchron.
Digital Generic I/O
System for Image Digitization, Enhancement, Control And Retrieval
SIDECAR ASIC Architecture
STScI Calibration Workshop 4
SIDECAR ASIC Features
July 22, 2010
• 36 analog input channels, each channel provides:– 500 kHz A/D conversion with 16 bit resolution – 10 MHz A/D conversion with 12 bit resolution – gain = 0 dB …. 27 dB in steps of 3 dB– optional low-pass filter with programmable cutoff– optional internal current source (as source follower load)
• 20 analog output channels, each channel provides:– programmable output voltage and driver strength– programmable current source or current sink– internal reference generation (bandgap or vdd)
• 32 digital I/O channels to generate clock patterns, each channel provides:– input / output / highohmic– selectable output driver strength and polarity– pattern generator (16 bit pattern) independent of microcontroller– programmable delay (1ns - 250µs)
• 16 bit low-power microprocessor core (single event upset proof)– responsible for timing generation and data processing– 16 kwords program memory (32 kByte) and 8 kwords data memory (16 kByte)– 36 kwords ADC data memory, 24 bit per word (108 kByte)– additional array processor for adding, shifting and multiplying on all 36 data channels in parallel
(e.g. on-chip CDS, leaky memory or other data processing tasks)
STScI Calibration Workshop 5
“SIDECAR ASIC” Missions
July 22, 2010
ACS (HST)in space
NIRCam/NIRSpec/FGS(JWST)
in development
TIRS (LDCM)in development
STScI Calibration Workshop 6
Noise Reduction by Using Multiple ADC Channels
July 22, 2010
1 ADC
2 ADCs
4 ADCs
6 ADCs
8 ADCs
• PreAmp inputs shorted to ground (lowest noise signal in order to be dominated by ADC noise)
• PreAmp gain set to 4 (12 dB)• Noise measured by using multiple
preamp and ADC channels in parallel (1, 2, 4, 6, and 8)
• Noise reduces almost as the square root of the number of channels used
0
0.5
1
1.5
2
2.5
3
0 1 2 3 4 5 6 7 8 9
Number of averaged ADC channels
Ou
tpu
t N
ois
e [
AD
U]
0
5
10
15
20
25
30
35
40
45
Inp
ut
Re
ferr
ed
No
ise
[µ
V]
STScI Calibration Workshop 7
Preamp Drift and Mitigation
July 22, 2010
Data taken as 512 x 64 frames for efficiency, Gain = 4
Drift
kTC row noise
kTC removed (CCD mode)
σ= 52 ADU
σ= 2.6 ADU
σ= 13.9 ADU
STScI Calibration Workshop 8
Bias Generator Noise
July 22, 2010
• Bias output 1 routed back into PreAmp• PreAmp gain set to 22 (27 dB)• Use 4 ADCs in parallel to reduce PreAmp & ADC noise• Noise on bias without filtering is about 35µV (11.6
ADU)• Noise can be reduced by RC filtering to less than 5µV
0
2
4
6
8
10
12
14
0.001 0.01 0.1 1 10 100 1000
RC filter time contant [ms]
Ou
tpu
t N
ois
e [A
DU
]
0
5
10
15
20
25
30
35
40
45
Inp
ut
Ref
erre
d N
ois
e [µ
V]
total noise
bias noise
Bias noise as a function of RC filter time constant
PreAmp & ADC noise floor
Unfiltered Noise of Bias Output 1
Filtered Noise of Bias Output 1 (tRC = 360 ms)
STScI Calibration Workshop 9July 22, 2010
Noise Power Spectrum of the Bias Outputs
-60
-50
-40
-30
-20
-10
0
10
20
0.1 1 10 100 1000 10000 100000
Frequency [Hz]
No
ise
[d
Bµ
V/r
oo
tHz]
-60
-50
-40
-30
-20
-10
0
10
20
0.1 1 10 100 1000 10000 100000
Frequency [Hz]
No
ise
[d
Bµ
V/r
oo
tHz]
FFT of temporal noise measurement with RC filter set to tRC= 3 µs
FFT of temporal noise measurement with RC filter set to tRC= 3 ms
STScI Calibration Workshop 10July 22, 2010
-60
-50
-40
-30
-20
-10
0
10
20
0.1 1 10 100 1000 10000 100000
Frequency [Hz]
No
ise
[d
Bµ
V/r
oo
tHz]
-60
-50
-40
-30
-20
-10
0
10
20
0.1 1 10 100 1000 10000 100000
Frequency [Hz]
No
ise
[d
Bµ
V/r
oo
tHz]
FFT of temporal noise measurement with RC filter set to tRC= 360ms
FFT of temporal noise measurement with grounded PreAmp inputs (i.e. noise floor)
Noise Power Spectrum of the Bias Outputs, Part 2
STScI Calibration Workshop 11
1/F Noise in NIRSpec/JWST
July 22, 2010
• Traditional CDS • Optimal CDS
σCDS ~ 18 e- rms σCDS ~ 8 e- rms
STScI Calibration Workshop 12
ACS 1/f Noise
July 22, 2010
STScI Calibration Workshop 13
ACS 1/f Noise
July 22, 2010
Bias Frame without correction(superbias subtracted)
Bias Frame with correction(superbias subtracted)
STScI Calibration Workshop 14
Conclusion
• SIDECAR ASIC is a small, low power and highly programmable solution for operating scientific detectors
• Current performance limitations– Bias voltages exhibit high 1/f noise, even after filtering– ADC noise higher than ideal 16-bit ADC
• Methods for dealing with these limitations exist– Hardware: Filtering, Gain– ASIC firmware (assembly code): Averaging of channels– Post-processing: Correlated noise correction algorithms
• New version of SIDECAR ASIC currently in design– Improved bias generator with 5x lower noise– Reduced ADC noise
July 22, 2010
First Image of the Repaired Advanced Camera for Surveys
Barred Spiral Galaxy NGC 6217
Photographed on June 13 and July 8 2009