APPLE p84
44
DESCRIPTION OF CHANGE REV. A D C B A D C B 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 Apple Computer Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART I TO MAINTAIN THE DOCUMENT IN CONFIDENCE NOTICE OF PROPRIETARY PROPERTY TITLE DRAWING NUMBER SHT OF METRIC DRAFTER ENG APPD QA APPD RELEASE DESIGN CK MFG APPD DESIGNER SCALE NONE MATERIAL/FINISH NOTED AS APPLICABLE SIZE D THIRD ANGLE PROJECTION DIMENSIONS ARE IN MILLIMETERS XX X.XX X.XXX DO NOT SCALE DRAWING REV ZONE ECN CK APPD DATE ENG APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. ANGLES REFERENCE DESIGNATOR(S) BOM OPTION QTY DESCRIPTION PART# 09/04/2003 INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG BATTERY CHARGER AND CONNECTOR MARVELL GIGABIT ETHERNET PHY SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET) SCHEM,MLB,PB17" 17 STUFF EXT_TMDS ATI_MEMIO_LO ATI_MEMIO_HI INTREPID_USB NEC_USB 1_5V_MAXBUS D3_HOT D3_COLD FIREWIRE A/B CONNECTORS, PORT POWER LIMITER 25 24 5V_HD_LOGIC 3V_HD_LOGIC NO_4XVCORE INT_TMDS NO_SSCG SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON DUAL-CHANNEL LVDS CONTENTS PAGE INTREPID AGP 4X/PCI INTREPID MEMORY INTERFACE / BOOT ROM 10 MPC7450 DATA TITLE PAGE AND CONTENTS CPU PLL AND CONFIGURATION STRAPS 200PIN DDR MEMORY SODIMM CONNECTORS INTREPID ENET/FW/UATA/EIDE INTERFACES 2 BBANG NO_BBANG 32 30 1 4 5 13 11 12 14 9 18 SSCG 35 33 8 DDR MEMORY MUXES INTREPID MAXBUS AND BOOT STRAPS 31 28 GPU_SS NO STUFF GPU_SWITCH SERIAL_DEBUG VCORE_OFFSET 1_8V_MAXBUS BOM OPTIONS 3 SYSTEM BLOCK DIAGRAM 20 SIL1162 TMDS TRANSMITTER 39 PAGE 26 27 29 22 23 COMPONENT LOCATIONS SIGNAL NAMES FUNCTIONAL TEST POINTS SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF 1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES CPU CORE VOLTAGE POWER SUPPLY 3.3V / 5V SYSTEM POWER SUPPLIES 12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY PMU (POWER MANAGEMENT UNIT) INTERNAL CONNECTORS - DVD, LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED 36 37 38 40 M10 ANALOG, POWER, GND SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS 43-44 41-42 FAN CONTROLLER, MODEM, SOUND VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH USB 2.0 SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK REVISION HISTORY (1 OF 1) M10 LVDS/TMDS/VGA/GPIO & GPU VCORE M10 AGP & CLOCKS CARDBUS CONTROLLER (PCI1510) INTREPID DECOUPLING INTREPID POWER RAILS FIREWIRE A/B PHY 34 21 16 15 19 7 6 MPC7450 MAXBUS INTERFACE PCB NOTES AND HOLES POWER BLOCK DIAGRAM CONTENTS 1 820-1524 PCBF,MLB,PB17 INCH PCB1 PRODUCTION RELEASED 051-6531 44 ? 293301 B 1 09/11/03 SCHEM,MLB,PB17 INCH B 051-6531 SCHEM,MLB,PB17 INCH SCH1 1 www.kythuatvitinh.com
Transcript of APPLE p84
TABLE_5_ITEM
DESCRIPTION OF CHANGE
REV.
A
D
C
B
A
D
C
B
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Apple Computer Inc.
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARYPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORAGREES TO THE FOLLOWING
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
NOTICE OF PROPRIETARY PROPERTY
TITLE
DRAWING NUMBER
SHT OF
METRIC
DRAFTER
ENG APPD
QA APPD
RELEASE
DESIGN CK
MFG APPD
DESIGNER
SCALE
NONE
MATERIAL/FINISHNOTED ASAPPLICABLE
SIZE
DTHIRD ANGLE PROJECTION
DIMENSIONS ARE IN MILLIMETERS
XX
X.XX
X.XXX
DO NOT SCALE DRAWING
REV ZONE ECN
CKAPPD
DATE
ENGAPPD
DATE
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
ANGLES
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
09/04/2003
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG
BATTERY CHARGER AND CONNECTOR
MARVELL GIGABIT ETHERNET PHY
SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)
SCHEM,MLB,PB17"
17
STUFF
EXT_TMDS
ATI_MEMIO_LO
ATI_MEMIO_HI
INTREPID_USB
NEC_USB
1_5V_MAXBUS
D3_HOT
D3_COLD
FIREWIRE A/B CONNECTORS, PORT POWER LIMITER
25
24
5V_HD_LOGIC
3V_HD_LOGIC
NO_4XVCORE
INT_TMDS
NO_SSCG
SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON
DUAL-CHANNEL LVDS
CONTENTSPAGE
INTREPID AGP 4X/PCI
INTREPID MEMORY INTERFACE / BOOT ROM
10
MPC7450 DATA
TITLE PAGE AND CONTENTS
CPU PLL AND CONFIGURATION STRAPS
200PIN DDR MEMORY SODIMM CONNECTORS
INTREPID ENET/FW/UATA/EIDE INTERFACES
2
BBANG
NO_BBANG
32
30
1
4
5
13
11
12
14
9
18
SSCG35
33
8
DDR MEMORY MUXES
INTREPID MAXBUS AND BOOT STRAPS
31
28
GPU_SS
NO STUFF
GPU_SWITCH
SERIAL_DEBUG
VCORE_OFFSET
1_8V_MAXBUS
BOM OPTIONS
3
SYSTEM BLOCK DIAGRAM
20 SIL1162 TMDS TRANSMITTER
39
PAGE
26
27
29
2223
COMPONENT LOCATIONS
SIGNAL NAMES
FUNCTIONAL TEST POINTS
SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
CPU CORE VOLTAGE POWER SUPPLY
3.3V / 5V SYSTEM POWER SUPPLIES
12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY
PMU (POWER MANAGEMENT UNIT)
INTERNAL CONNECTORS - DVD,
LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED
36
37
38
40
M10 ANALOG, POWER, GND
SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS
43-44
41-42
FAN CONTROLLER, MODEM, SOUND
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO
CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH
USB 2.0
SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK
REVISION HISTORY (1 OF 1)M10 LVDS/TMDS/VGA/GPIO & GPU VCORE
M10 AGP & CLOCKS
CARDBUS CONTROLLER (PCI1510)
INTREPID DECOUPLING
INTREPID POWER RAILS
FIREWIRE A/B PHY
34
21
16
15
19
7
6
MPC7450 MAXBUS INTERFACE
PCB NOTES AND HOLES
POWER BLOCK DIAGRAM
CONTENTS
1820-1524 PCBF,MLB,PB17 INCH PCB1
PRODUCTION RELEASED
051-653144
?293301B
1
09/11/03
SCHEM,MLB,PB17 INCH
B
051-6531 SCHEM,MLB,PB17 INCH SCH11
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
P.28
P.26
P.25
P.33
P.25
P.22P.22P.22
P.22
P.18-21
P.25
P.27
P.24
P.26
P.32-36
P.24
P.32
P.31
P.32
P.26
P.26
P.26
P.25
P.25
P.29
P.30P.30
P.28
4 DATA PAIRS
UIDE
Connector
32BITS
ATI M10
33MHZ
P.13
4X AGP
INTREPIDPCI
ULTRA ATA/100
66MHZ
1.5V/3.3V
33MHZ
AIRPOPT
SYSTEM BLOCK DIAGRAM
Connector
64MB
S-VIDEO
TMDS
DVI-IConnector
P.14BOOT ROM
USB 2.0
Connector
CARDSLOT
Ethernet
G/MII
P.11
100MHZ
800 MB/S
(MPC7457)
P.14
FIREWIREETHERNET
P.15
64BIT DATA
APOLLOCPU
U42
U52
CONTROLLER
LIGHT SENSORKB LED
P.101M X 8
U17
LMUSLEEPLED
3.3V
SMBUS
BatteryConnector
I2C
I2C
LMU
PMU
TRACKPAD
OPTICAL DRIVE
TI PCI1510
Keyboard
USB PORT C
USB PORT F
Inverter
FireWire
BOOTROM
VIA/PMU
EIDEUATA 100
DDR MEMORY
DDR SDRAM DIMM 1
DDR SDRAM DIMM 0
SO-DIMM Connector
2:1 DDR MUXES
10/100/1000
MAXBUS
USB PORT B
USB PORT D
(INTERNAL MEM)
MEMORY
CH. C
MEMORY
(INTERNAL MEM)
CH. A
(INTERNAL MEM)
MEMORY
CH. D
MEMORY
(INTERNAL MEM)
CH. B
Connector
CardBusController
3.3V
32BITSPCI BUS
P.7
P.5-6
P.12
P.9
P.10
P.13
P.15
P.14P.14
P.15
P.15
P.15
P.15
P.15
64BITS167MHZ2.5V
(DDC TOO)
ConnectorS-Video
EDID (I2C)
LVDS
ConnectorLCD Panel
COMPOSITE
RGB
Connector
P.18
P.18
Connector
5VSERIAL
& ChargerPower Supply
ConnectorConnector
SUTRO (PWR)Connector
TUBA (SOUND)Connector
Connector
FanCircuit
P.14P.15P.15
SCCASerial Debug
Connector
32BITS
PHYEthernet
10/100/1000
3.3V
8BIT TX
8BIT RX
125MHZ
FW - AConnector
FW - B
PHY
2 DATA PAIRS@ 400MHZ
@ 200MHz
8BIT TX/RX
3.3V
1394 OHCI
EIDEI2S
I2C
BlueTooth
LEFT USB
BACKUP BATTERY
NOT USED
NOT USED
NOT USED
32BIT ADDRESS
MAXBUS1.8V167MHZ
PMU
INTRPEIDI2C
33MHZ16/32 BITS3.3V/5V
J18
U49
J24 J22
U28
J13
J11
J14
U48/J2/J4
J25 J19
U36
U39
J15
CARDBUS
J10
U26
J21
J5
U43
J8
J17J7 J16
U11/U12/U13/U14
J20/J23
U44
J9
J3 (SHARE WITH LEFT USB)
J3 (SHARE WITH BLUETOOTH)
J12
USB 2.0
USB 2.0
P.14 P.14
P.15
USB PORT A
AGP BUS
I2CI2S
MEMORY BUS
ConfigCPU PLL
Modem BoardConnector
RIGHT USB
2 DATA PAIRS
USB PORT E
051-6531 B
442
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DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
MAP31 DDR CORE
RC AT 1M*0.1UF @ 24V
RC AT 1M*0.047UF @ 24V
<100UA ALLOWED
STBYMD
+3.3V_MAIN
DC/DC
PG 35(LTC3411)
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
(LTC1625)
SHUT-DOWN
+PBUS (12.8V)
SLEEP: D3HOT/D3COLD
BECOMES ’1’; MUCH LESS THAN THE
AFTER PMU IS UP AND RUNNING
EXT_VCC
TURNS ON AS LOW AS 0.8V/TYP 1.5V
RC CHARGING AT INT_VCC (5V)
MAP31 DDR I/O
+2.5V_MAIN
INTREPID CORE
+5V_MAIN
MAIN 2.5V/1.5V
SHUTDOWN: STOPPED
RUN: RUNNINGSLEEP: STOPPED
PG 34
PG 35
RUN: RUNNINGSLEEP: STOPPED
SHUTDOWN: STOPPED
PG 20SHUTDOWN: STOPPED
(LTC1778)DC/DC
PG 32
PG 33
PG 31
PG 31
PG 32
PG 32
PG 31
RUNSHUT-DOWN RUN SLEEP
(D3COLD)GPU_VCORE
(D3HOT)GPU_VCORE(AT LTC1778 RUN/SS)
1_5V_2_5V_OK(MAX1715 OUTPUT)
1_5V_2_5V_OK
+1_5V_SLEEP
+2_5V_SLEEP+2_5V_MAIN
SLEEPSLEEP_L_LS5
3V_5V_OK 2.4V - ??? MS
+3V_SLEEP
+5V_SLEEP+3V_MAIN
+5V_MAIN
DCDC_ENDCDC_EN_L
(+1.4V/+1.5V)CPU_VCORE
1M & 0.1UF @14V, IT TAKES~5.88MS TO START SWITCHER
GPU_VCORE
SEQUENCING
DCDC_EN_L
1_5V_2_5V_OK
D3_HOT
D3_HOT
RUN/SSINTERNAL 1.2UA CURRENT SOURCE
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL+5V_MAIN TURNS ON
DCDC_EN_L OR PMU_POWERUP_L
DCDC_EN
SLEEPD3_COLD
VCC
RUN: RUNNING
+5V_MAIN
SEQUENCINGMAXBUS
DCDC_ENSLEEP
VCC SHDN
+5V_MAIN
(MAX1717)DC/DC
BROADCOMMAXBUS
AGP I/O
+1.5V_MAIN
+5V_MAIN+4_6V_BU
ON1/ON2
PGOOD
3V_5V_OKPGOOD
(MAX1715)
DC/DC
BACKLIGHTINVERTER
TURNS CONTROL TO RUN/SSWHEN IT’S OPEN
NO INRUSH PROTECTIONWHEN ONLY BATTERY IS CONNECTED
+5V_MAIN
14V_PBUS
+3V_PMULDO+3V_PMU
(MAX1772)
CHARGERBATTERY
BUCK
<~13.44V SHUTS-OFF
>~13.44V TURNS-ON
INRUSHLIMITER
ADAPTER
IN
AC
(UNTIL DRAINED)
POWER BLOCK DIAGRAM
3S 3P PRISMATIC CELLS
& BOOST OUTPUT
FEED-IN PATH
U21-
+
1V20_REF
BACKUP BATTERY
BACKUP
BATTERY
CHARGER INPUT
24V IS OUTPUT ONLY FROM
SHUTDOWN: STOPPED
RUN: RUNNINGSLEEP: RUNNING
RUN/SS - 3V
SHUTDOWN: STOPPEDSLEEP: RUNNINGRUN: RUNNING
TURNS ON OUTPUT @ 2.4V
WHEN ONLY BATTERY IS CONNECTEDNO INRUSH PROTECTION
+24V_PBUS
+24V_PBUS
+BATT
+BATT
1_5V_2_5V_OK
VCC
+1.8V_MAIN
+5V_MAIN
LOW IN SHUTDOWNDCDC_EN_L WILL PULL ON1/ON2
DCDC_EN_L
VCC
VCC
TURNS ON AT >1V
DC/DC(LTC3707)
MAIN 3V/5V
<100UA ALLOWED
RUN/SS - 5VTURNS ON AT >1V
INTERNAL ZENER CLAMP TO 6V
INTERNAL ZENER CLAMP TO 6V
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
BATTERY VOLTAGE
SHUTDOWN: RUNNINGSLEEP: RUNNINGRUN: RUNNING
NO AC: BATTERY VOLTAGE1625 NOT RUNNING
~13.5MS
2.6 MS
~11MS
~???MS
+1_5V_MAIN
+1_8V_MAIN
2.6 MS
1.9 MS
PG 30
PG 31
+PBUS (12.8V)
AC: 12.8V
+PBUS
12.8V CHARGES BACKUP BATTERY
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V
+PBUS
+PBUS
REGULATOR
HOLDS BOTH RUN/SS AT GND
RUN/SS DDR POWER
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
GPU_VCORE
POWER SYSTEM ARCHITECTURE
WHEN IT’S CONNECTED TO GND
+1.2V/+1.0V
443B051-6531
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PREPREG THICKNESS: 2-3 MILS
LAYER COUNT: 12
GROUND VIAS
ASICS HEATSINK MOUNTS
BOARD INFORMATION
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
IMPEDANCE : 50 OHMS +/- 10%
1.0 OZ CU THICKNESS: 1.4 MILS 1/2 OZ CU THICKNESS: 0.7 MILS THICKNESS : 1.2 MM / 0.047 IN
DIELECTRIC: FR-4
BOARD STACK-UP AND CONSTRUCTION
SIGNAL (1/2 OZ)
20R10 TH VIA OR VIA IN PAD
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/3 OZ + COPPER PLATING)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
GROUND (1/2 OZ)
CUT POWER PLANE(1 OZ)
CUT POWER PLANE(1 OZ)
PREPREG (2MIL)
PREPREG (2MIL)
LAMINATE (3MIL)
LAMINATE (4MIL)
PREPREG (3MIL)
SIGNAL (1/2 OZ)
LAMINATE (4MIL)GROUND (1/2 OZ)
PREPREG (3MIL)
SIGNAL (1/3 OZ + COPPER PLATING)
SIGNAL TRACE WIDTH: 4 MILSSIGNAL TRACE SPACING: 4 MILS
PCB SPECS
LAMINATE (4MIL)
1
2 PREPREG (3MIL)
LAMINATE (4MIL)3
4
5
6
7
8
10
9
11
PREPREG (3MIL)12
INVERTERCHASSIS MOUNTS
BOARD HOLES
SPEAKER CLIPS
CONDUCTIVE MOUNTS
I/O AREA
255R158
OMIT
1
ZT11
HOLE-VIA-20R101
ZT75
HOLE-VIA-20R101
ZT61
HOLE-VIA-20R101
ZT63
HOLE-VIA-20R101
ZT51
HOLE-VIA-20R101
ZT54
HOLE-VIA-20R101
ZT42
HOLE-VIA-20R101
ZT64
HOLE-VIA-20R101
ZT76
HOLE-VIA-20R101
ZT59
HOLE-VIA-20R101
ZT62
HOLE-VIA-20R101
ZT22
HOLE-VIA-20R101
ZT3
HOLE-VIA-20R101
ZT25
HOLE-VIA-20R101
ZT32
HOLE-VIA-20R101
ZT31
HOLE-VIA-20R101
ZT26
HOLE-VIA-20R101
ZT23
HOLE-VIA-20R101
ZT19
HOLE-VIA-20R101
ZT15
HOLE-VIA-20R101
ZT17
HOLE-VIA-20R101
ZT13
HOLE-VIA-20R101
ZT12
HOLE-VIA-20R101
ZT21
HOLE-VIA-20R101
ZT14
HOLE-VIA-20R101
ZT18
HOLE-VIA-20R101
ZT20
235R126
OMIT
1
ZT4
OMIT
146R1261
ZT83
OMIT
146R1261
ZT5
OG-503040SHLD-SM
3
2
1
SH1
CHGND1
SPKR_CLIP_P84
1
SP6SPKR_CLIP_P84
1
SP1SPKR_CLIP_P84
1
SP3SPKR_CLIP_P84
1
SP5SPKR_CLIP_P84
1
SP2
STDOFF-217ODX150IDX35H-TH1
BS1
SPKR_CLIP_P84
1
SP4
OMIT
235R1261
ZT6
OMIT
235R1261
ZT16CHGND6
CHGND2
OMIT
255R1581
ZT10
CHGND5
HOLE-VIA-20R101
ZT77
HOLE-VIA-20R101
ZT30
HOLE-VIA-20R101
ZT28
HOLE-VIA-20R101
ZT37
HOLE-VIA-20R101
ZT39
HOLE-VIA-20R101
ZT40
HOLE-VIA-20R101
ZT27
HOLE-VIA-20R101
ZT36
HOLE-VIA-20R101
ZT38
OMIT
255R1581
ZT2
HOLE-VIA-20R101
ZT24
HOLE-VIA-20R101
ZT81
HOLE-VIA-20R101
ZT34
HOLE-VIA-20R101
ZT33
HOLE-VIA-20R101
ZT43
HOLE-VIA-20R101
ZT46
HOLE-VIA-20R101
ZT50
HOLE-VIA-20R101
ZT35
HOLE-VIA-20R101
ZT44
HOLE-VIA-20R101
ZT66
HOLE-VIA-20R101
ZT67
HOLE-VIA-20R101
ZT53
HOLE-VIA-20R101
ZT52
HOLE-VIA-20R101
ZT70
HOLE-VIA-20R101
ZT71
HOLE-VIA-20R101
ZT78
HOLE-VIA-20R101
ZT69
HOLE-VIA-20R101
ZT65
HOLE-VIA-20R101
ZT45
HOLE-VIA-20R101
ZT47
HOLE-VIA-20R101
ZT49
HOLE-VIA-20R101
ZT56
HOLE-VIA-20R101
ZT48
HOLE-VIA-20R101
ZT72
HOLE-VIA-20R101
ZT55
HOLE-VIA-20R101
ZT29
HOLE-VIA-20R101
ZT82
HOLE-VIA-20R101
ZT74
HOLE-VIA-20R101
ZT79
HOLE-VIA-20R101
ZT68
HOLE-VIA-20R101
ZT60
HOLE-VIA-20R101
ZT58
HOLE-VIA-20R101
ZT41
HOLE-VIA-20R101
ZT7
HOLE-VIA-20R101
ZT9
HOLE-VIA-20R101
ZT8
HOLE-VIA-20R101
ZT1
HOLE-VIA-20R101
ZT57
HOLE-VIA-20R101
ZT80
HOLE-VIA-20R101
ZT73
444051-6531 B
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(1 OF 3)
TEST4TEST3TEST2TEST1TEST0
EXT_QUAL
TBEN
L2TSTCLKL1TSTCLK
TCKTMSTDOTDI
DTI0DTI1DTI2DTI3
PLL_EXTPLLCFG3PLLCFG2PLLCFG1PLLCFG0CLKOUTSYSCLK
BVSEL
TT3TT2TT1
TSIZ0
TSIZ2TSIZ1
TT4
TT0
A33A34A35
AP0
AP3AP2
AP4
AP1
A25A24A23
A26A27A28A29A30A31A32
A13A14A15A16A17A18A19A20A21A22
A12
A10A9A8A7A6
A3A4A5
A11
A2
A0A1
OVDDVDD
GND
AVDD
BR*BG*
TS*
TRST*LSSDMODE*
TA*
TEA*
QREQ*QACK*
CKSTP_IN*CKSTP_OUT*
INT*SMI*MCP*
SRESET*HRESET*
PMON_IN*PMON_OUT*
BMODE0* BMODE1*
TBST*
GBL*WT*CI*AACK*ARTRY*SHD0*
HIT*SHD1*
DRDY*DBG*
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
CPU_VCORE DECOUPLING NETWORK
PLCAE SHORT CLOSE TO CENTER OF CPU
MORE 0805 10UF CAPS ON VCOREPOWER SUPPLY PAGE (PG 33)
470OHM FOR BOOT BANGER
IN FORMER L3 AREA
MPC7447
PLACE BELOW CPU
NC
MPC7447 MAXBUS
NC
NC
NC
NC
NC
NC
MPC7447 PULL-UPSCPU_OVDD DECOUPLING NETWORK
470OHM FOR BOOT BANGER
470OHM FOR BOOT BANGER
CPU INTERNAL PLL FILTERING
10K
5%1/16WMF402
21
R87
5%1/16WMF402
10K21
R139
MF402
1/16W5%
10K21
R107
MF1/16W
470
5%
402
21
R59
5%1/16WMF402
10K21
R97
MF1/16W5%200
402
NO_BBANG
2
1R85
MF1/16W
10K
5%
402
21
R160
1K
1/16WMF402
5%
21
R57
1/16WMF402
5%
10K21
R58
5%
10K
1/16WMF402
21
R129
10V
402CERM
20%0.1uF
2
1 C39
CERM
0.1uF20%10V
4022
1 C203
10V
402CERM
20%0.1uF
2
1 C73
20%
CERM402
10V
0.1uF
2
1 C74
20%
402
10VCERM
0.1uF
2
1 C194
402CERM
0.1uF10V20%
2
1 C40
20%
CERM10V
402
0.1uF
2
1 C191
CERM
20%10V
402
0.1uF
2
1 C152
0.1uF10VCERM
20%
4022
1 C138
0.1uF
402CERM10V20%
2
1 C113
0.1uF
402
10VCERM
20%2
1 C104
402
20%10VCERM
0.1uF
2
1 C115
20%
CERM402
10V
0.1uF
2
1 C38
0.1uF20%
CERM10V
4022
1 C224
0.1uF20%
CERM402
10V2
1 C48
0.1uF20%10V
402CERM2
1 C90
10V
402CERM
20%0.1uF
2
1 C72
CERM
20%10V
402
0.1uF
2
1 C107
1/16W5%
MF402
470
2
1R20620%
CERM10V
402
0.1uF
2
1 C114
10VCERM402
20%0.1uF
2
1 C154
10V20%
CERM402
0.1uF
2
1 C91
CERM
0.1uF20%10V
4022
1 C168
402
10VCERM
20%0.1uF
2
1 C223
CERM
0.1uF
402
10V20%
2
1 C112
402MF
1/16W5%
470
2
1R241
5%1/16WMF402
10K21
R60
5%1/16WMF402
47021
R61
5%
402
1/16WMF
10K21
R148
5%
402MF
1/16W
1K21
R98
10uF20%6.3VCERM805
C25
6.3V20%
CERM805
10uF
2
1 C346
CERM
20%6.3V
10uF
805
C342
20%
805
6.3VCERM
10uF
2
1 C8
402MF
5%1/16W
10K21
R120
402MF
5%
10K
1/16W
21
R109
1/16WMF402
4021%
1
2R106
805
10V20%2.2uF
CERM2
1 C340
10V
805CERM
20%2.2uF
2
1 C12
1/16WMF402
10K
5%
21
R73
MF402
5%1/16W
10K21
R72
1/16W
1_5V_MAXBUS
603MF
5%
021
R702
1_8V_MAXBUS
MF
5%
0
603
1/16W
21
R693
+1_5V_SLEEP
+1_8V_SLEEP
402
5%4701/16WMF
BBANG
2
1R86
470
402MF
1/16W5%
21
R128
BGAAPOLLO_MPC7445_360
800MHZ
OMIT
D3
K10
K8
J13
J11
J9
J7
H12
H10
M12
M10
M8
L13
L11
L9
L7
K14
K12
H8
C5
E9
F6
E6
E5
E7
F7
G6
L4
A5
F1
D10
E10
B10
B6
A12
L1
A4
B9
C6
F11
E1
K6
A10
A2
F9
H5
E4
P4
G5
A9
D9
A7
D7
C7
C8
B8
J5
H3
G18
F2
E18
D5
C12
V14
V10
V7
V4
U16
U12
U2
T9
T6
C2
R16
R13
R4
P11
P8
P2
N6
M3
L5
K2
B4
C9
E8
B3
G8
D4
D8
B2
H7
H4
G17
F3
E17
V15
V11
V8
V5
U17
U13
U3
D13
T10
T7
R17
R14
R5
P12
P9
P3
N7
M13
D6
M11
M9
M7
M4
L12
L10
L8
L6
K13
K11
C3
K9
K3
K7
J12
J10
J8
J6
H13
H11
H9
B5
E2
A11
N1
P1
K1
G1
R3
M2
H2
B1
A3
J1
B7D2
F8
G9
M1
A8
N2
G7
F5
H6
E3
C1
R1
G2
C10
D1
D11
L2
F10
B11
G10
C4
B12
W1
N5
G3
U1
V2
T1
N3
P5
M5
J3
N4
K4
J2
C11
W2
K5
R2
J4
V1
F4
T2
G4
L3
D12
H1
E11
U43
402
10VCERM
20%0.1uF
2
1 C103
402
20%
CERM10V
0.1uF
2
1 C149
0.1uF10V
402CERM
20%2
1 C1510.1uF10VCERM
20%
4022
1 C202
402
10VCERM
20%0.1uF
2
1 C111
10V
402CERM
20%0.1uF
2
1 C1100.1uF10V
402CERM
20%2
1 C275
10V20%
402
0.1uF
CERM2
1 C257
0.1uF
402CERM
20%10V
2
1 C2730.1uF20%
CERM402
10V2
1 C41
10VCERM402
0.1uF20%
2
1 C272
10VCERM402
20%0.1uF
2
1 C46
10K
5%1/16WMF402
21
R65
5%1/16WMF402
10K21
R130
5%1/16WMF402
10K21
R79
5%
MF
10K
402
1/16W
21
R108
402
10VCERM
20%0.1uF
2
1 C190
402
10VCERM
20%0.1uF
2
1 C150
20%0.1uF
402
10VCERM2
1 C201
402
0.1uF10VCERM
20%2
1 C193
CERM
0.1uF
402
10V20%
2
1 C153
20%
CERM
10uF6.3V
8052
1 C34420%
CERM10V
402
0.1uF
2
1 C189
402CERM
20%0.1uF10V2
1 C105
10V
402
20%0.1uF
CERM2
1 C192
0.1UF20%10VCERM402
2
1 C47
0.1UF20%10VCERM402
2
1 C188
0.1UF20%10VCERM402
2
1 C169
0.1UF20%10VCERM402
2
1 C170
0.1UF20%10VCERM402
2
1 C155
0.1UF20%10VCERM402
2
1 C139
0.1UF20%10VCERM402
2
1 C92
0.1UF20%10VCERM402
2
1 C106
10UF
805CERM6.3V20%
2
1 C195
805CERM6.3V20%10UF
2
1 C34710UF20%6.3VCERM805
2
1 C258
805CERM6.3V20%10UF
2
1 C345
805CERM6.3V20%10UF
2
1 C156
805
6.3V20%10UF
CERM2
1 C34110UF20%
805CERM6.3V2
1 C225
805CERM6.3V20%10UF
2
1 C343
SM
OMIT21
XW31
402
10V20%
CERM
0.1uF
2
1 C137
805CERM10V
2.2uF20%
2
1 C136
B051-6531
5 44
IC,APOLLO7,1.X,1.3GHZ,1.XV CORE,85C U431337S2733 CRITICAL 1_30_VCORE
1_32_VCORE337S2807 1 IC,APOLLO7,1.X,1.33GHZ,1.32V VCORE,85C U43 CRITICAL
CPU_ADDR<0>
CPU_AVDD
MAXBUS_SLEEP
CPU_CLKOUT_SPN
JTAG_CPU_TRST_L
CPU_QREQ_L
JTAG_CPU_TCK
CPU_DTI<2>
CPU_ADDR<9>
JTAG_CPU_TCK
CPU_L1TSTCLK
MPIC_CPU_INT_L
JTAG_CPU_TDI
JTAG_CPU_TMS
CPU_SMI_L
CPU_HRESET_L
CPU_SRWX_L
CPU_L2TSTCLK
CPU_PULLDOWN
CPU_EDTI
CPU_PULLUP
CPU_PMONIN_L
CPU_CHKSTP_OUT_L
CPU_LSSD_MODE
CPU_SHD0_L
CPU_TBEN
CPU_SHD1_L
CPU_CHKS_L
CPU_VCORE_SLEEP
CPU_TEA_L
CPU_BR_L CPU_BUS_VSEL
SYSCLK_CPU
CPU_PULLUP
CPU_CHKS_L
CPU_EMODE1_L
CPU_EMODE0_L
CPU_PMONIN_L
CPU_CHKSTP_OUT_L
MPIC_CPU_INT_L
CPU_MCP_L
CPU_SMI_L
CPU_HRESET_L
CPU_SRESET_L
CPU_TBEN
JTAG_CPU_TDI
JTAG_CPU_TDO_TP
JTAG_CPU_TRST_L
JTAG_CPU_TMS
CPU_L1TSTCLK
CPU_LSSD_MODE
CPU_L2TSTCLK
CPU_TA_L
CPU_PLL_CFG<3>
CPU_DBG_L
CPU_DTI<1>
CPU_DTI<0>
CPU_PLL_CFG<0>
MAXBUS_SLEEP
CPU_HIT_L
CPU_SHD1_L
CPU_SHD0_L
CPU_ARTRY_L
CPU_CI_L
CPU_WT_L
CPU_AACK_L
CPU_TSIZ<2>
CPU_GBL_L
CPU_TBST_L
CPU_TSIZ<0>
CPU_TT<2>
CPU_TT<3>
CPU_TT<4>
CPU_TT<1>
CPU_ADDR<31>
CPU_ADDR<30>
CPU_ADDR<29>
CPU_ADDR<28>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<20>
CPU_ADDR<16>
CPU_ADDR<17>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<15>
CPU_ADDR<12>
CPU_ADDR<8>
CPU_ADDR<10>
CPU_ADDR<7>
CPU_ADDR<4>
CPU_ADDR<3>
CPU_ADDR<2>
CPU_TS_L
CPU_BG_L
CPU_TT<0>
CPU_SRWX_L
CPU_PULLDOWN
CPU_PULLDOWN
CPU_EDTI
CPU_DRDY_L
CPU_PULLDOWN
CPU_TSIZ<1>
MAXBUS_SLEEP
CPU_EMODE1_L
CPU_MCP_L
CPU_SRESET_L
CPU_ADDR<6>
CPU_ADDR<5>
CPU_ADDR<11>
CPU_QACK_L
CPU_ADDR<1>
ADT7460_VCORE_MON
CPU_VCORE_SLEEP
CPU_PLL_CFG<4>
CPU_PLL_CFG<2>
CPU_PLL_CFG<1>
38
38
38
34
34
34
23
23
23
16
16
16
15
39
39
39
15
15
39
8
39
39
39
39
39
23
38
23
39
39
39
8
8
38
36
7
23
36
23
36
36
23
14
23
23
30
7
39
8
34
36
36
36
39
14
30
7
39
8
23
23
23
36
36
36
36
7
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
7
39
36
36
36
36
36
34
8
38
5
5
8
5
8
8
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
8
8 7
8
5
5
5
7
5
5
5
5
5
5
5
5
5
39
5
5
5
5
5
8
7
8
8
8
7
5
8
5
5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
5
5
5
5
8
5
8
5
5
5
5
8
8
8
8
8
25
5
7
7
7
www.kythuatvitinh.com
(2 OF 3)
D0
D60D61D62D63
DP7
DP0DP1DP2DP3DP4DP5DP6
D59
D56D57D58
D55D54D53D52
D50D51
D49
D46D45
D47D48
D44D43D42D41D40D39D38D37D36D35D34D33
D30D31D32
D29
D26D25D24D23
D27D28
D22D21D20D19D18D17D16D15D14D13D12D11D10D9D8D7D6D5D4
D1D2D3
(3 OF 3)
NC_B14NC_B13NC_E12NC_B18NC_N19NC_K17NC_N18NC_N12
NC_A6
NC_C13NC_G11NC_A14NC_F12NC_A13NC_A18NC_C14NC_A15NC_B16NC_E13NC_F13NC_F14NC_G12NC_A17NC_C15NC_G14NC_H14NC_E14NC_G13NC_C16NC_C17NC_B17NC_B15NC_E15NC_D14NC_A19NC_B19NC_A16NC_C18NC_G15NC_D15NC_C19NC_K16NC_J17NC_K18NC_L18NC_L19NC_M18NC_P16NC_L16NC_H15NC_J16NC_K19NC_J15NC_J19NC_J18NC_J14NC_K15NC_L14NC_L17NC_M15NC_N17NC_P19NC_M16NC_M19NC_N16NC_N13NC_M17NC_M14NC_N14NC_P18NC_N15
NC_D19NC_F15NC_G19NC_E16NC_D17NC_D16
NC_P15NC_L15
NC_H19NC_H18NC_H17NC_H16NC_E19NC_D18NC_F16NC_G16
NC_F19NC_F17NC_F18
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
MPC7447/BBANG
NC
BOOT BANGER - LMU PERORMS THIS FUNCTION IF NEEDEDSEE PAGE 22
APOLLO_MPC7445_360
BGA800MHZ
OMIT
W6
N8
V3
M6
W9
T4
W4
T3
W13
V13
P14
T8
W8
R8
P6
U15
R7
U7
U8
U4
V17
W3
T17
T18
T16
W18
T15
W17
U18
W19
U19
T19
V19
R18
V18
R19
P17
W16
V6
P7
R6
W7
U5
T5
U6
W5
V9
U9
V16
W10
R9
U10
P10
N9
R10
T11
W11
U11
R11
T14
N10
N11
V12
W12
T12
R12
W14
U14
P13
T13
W15
R15
U43
OMIT
BGA800MHZ
APOLLO_MPC7445_360
P19
P18
P16
P15
N19
N18
N17
N16
N15
N14
N13
N12
M19
M18
M17
M16
M15
M14
L19
L18
L17
L16
L15
L14
K19
K18
K17
K16
K15
J19
J18
J17
J16
J15
J14
H19
H18
H17
H16
H15
H14
G19
G16
G15
G14
G13
G12
G11
F19
F18
F17
F16
F15
F14
F13
F12
E19
E16
E15
E14
E13
E12
D19
D18
D17
D16
D15
D14
C19
C18
C17
C16
C15
C14
C13
B19
B18
B17
B16
B15
B14
B13
A6
A19
A18
A17
A16
A15
A14
A13
U43
6 44051-6531 B
CPU_DATA<18>
CPU_DATA<0>
CPU_DATA<2>
CPU_DATA<1>
CPU_DATA<3>
CPU_DATA<5>
CPU_DATA<4>
CPU_DATA<6>
CPU_DATA<7>
CPU_DATA<8>
CPU_DATA<10>
CPU_DATA<9>
CPU_DATA<12>
CPU_DATA<11>
CPU_DATA<13>
CPU_DATA<15>
CPU_DATA<14>
CPU_DATA<17>
CPU_DATA<16>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<33>
CPU_DATA<32>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<46>
CPU_DATA<45>
CPU_DATA<47>
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<51>
CPU_DATA<50>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<57>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<61>
CPU_DATA<60>
CPU_DATA<62>
CPU_DATA<63>
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
www.kythuatvitinh.com
G
D
S
G
D
S
04
G
D S
G
D
S
S
D
G
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
R01DTRANSISTOR ON CPU_PLL_CFG<4> IS MET.
PLL DISABLE 1 X
STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC
R01B R00C
1417
1167
1083
1000
9.0X
11.0X
1500
R10B
MAXBUS VSEL
1.5V INTERFACE
BUSTYPE SELECT
APOLLO ONLY SUPPORTS MAXBUS
(PROCESSOR)CPU_BUS_VSEL
SIGNAL
(PROCESSOR)CPU_EMODE0_L
CPU_HRESET_L
CPU_HRESET_INV
CPU_HRESET_L
TIEDHIGH
LOW 1.8V INTERFACE
1.5V INTERFACE
2.5V INTERFACE
60X BUS MODE
APPLICATION
MAX BUS MODE
DESKTOP HAD PROBLEM USING
1.8V INTERFACE
933
267
400
533
867
800
733
667 0 1011 0B
0 1001 09
5.0X
5.5X
333
500
667
9.5X
8.0X
7.5X
7.0X
6.5X
6.0X
4.0X
3.0X
2.0X
1.0X
0.0X
APOLLO 7
PULLUP TO ENSURE THAT Vgs OF PASSR10E R00ER10A R00D
LOW SPEED 0 0
R10D R01E
CPU FREQUENCY CONFIGURATION
(MHZ)
PLL OFF
133MHZ
(Bus-to-Core)
MULTIPLIER
0 1111 0F
CPU_PLL_CFG(AT BUS FREQUENCY)CORE FREQUENCY
167MHZ
PLL BYPASS 0 0011 03
0 0100 04
0 1000 08
0 1010 0A
0 1101 0D
0 0101 05
0 0010 02
0 1100 0C
0 0001 011000
1067
1 0110 1632004000
3733466728.0X
24.0X
1 1010 1A
0 0000 00
1 1000 18
1 1001 191833
1667
1750
1917
1467
1333
1400
1533
1 1100 1C
1 0001 11
1 1101 1D
1 0101 15
0 1110 0E
1 0000 10
1 0010 12
1 0011 13
1 1011 1B
1 1111 1F
1 0100 14
1667
1600
2667
2400
2267
1800
1733
2133
2000
18672333
2500
2667
2083
2000
3333
3000
2833
2250
2167
3500 2800
16.0X
15.0X
14.0X
10.0X
10.5X
12.0X
11.5X
12.5X
13.0X
13.5X
17.0X
18.0X
20.0X
21.0X
1 0111 171200
1133 0 0110 06
1583 1267 0 0111 07
1 1110 1E
CPU CONFIGURATION
4 0123E ABCD HEX
R10E, R01E, OR PULLUP STUFFEDSTUFF PASS TRANSISTOR ONLY IF
HIGH SPEED 0 1
CPU PLL CONFIG CIRCUITRY
R00B R10C
INVERTED HRESET_L
R00A R01C
NEED TO CHARACTERIZEINVERTER TO INVERT HRESET_L
CPU CONFIGURATION
1250
1333
833
917
8.5X
+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L R01ANO STUFF
0
MF402
5%1/16W
2
1R23NO STUFF
5%
402MF1/16W
0
2
1R16
1/16W
10K5%
MF4022
1R9
1/16W
10K
402MF
5%
2
1R1010K1/16W5%
MF4022
1R11
402
10K
MF1/16W5%
2
1R12
402
5%1/16W
MF
47K
2
1R3
1/16W
402
10K5%
MF2
1R48
402
82K
MF1/16W
5%
2
1R33
05%1/16WMF402
NO STUFF
2
1R185%01/16WMF402
NO STUFF
2
1R17
10K5%1/16WMF402
NO STUFF
2
1R2
2N7002DWSOT-363
4
5
3
Q2
2N7002DWSOT-363
1
2
6
Q2
SC70-5
SN74AUC1G04
1_5V_MAXBUS
CRITICAL
4
5
3
2
U1
402MF1/16W5%0
2
1R272N7002DW
NO STUFF
SOT-363
1
2
6
Q1
2N7002DW
NO STUFF
SOT-363
4
5
3
Q1
+5V_SLEEP
1/16WMF
5%
22
402
1_5V_MAXBUS
1 2
R422
1/16WMF
5%
402
1 2
R149
10
MF
5%1/16W
402
1_8V_MAXBUS
2
1R5
2N7002SM
2
1
3
Q3
SM2N3904
2
3
1 Q4249K
402MF
1/16W1%
21
R47
NO STUFF
5%1/16WMF402
0
2
1R19+3V_SLEEP
1/16W
NO STUFF
402MF
5%0
2
1R20
MF402
5%0
NO STUFF
1/16W
2
1R21
1/16W
NO STUFF
402MF
5%0
2
1R22
MF1/16W
0
402
5%
2
1R24
1/16WMF
5%
402
0
2
1R2505%1/16WMF402
NO STUFF
2
1R26
402MF
5%01/16W
2
1R14
402
5%
NO STUFF
0
MF1/16W
2
1R13NO STUFF
402MF1/16W5%0
2
1R15
447051-6531 B
CPU_PLL_CFG<0>
CPU_PLL_CFG<1>
CPU_PLL_FS10
CPU_PLL_FS00
MAXBUS_SLEEP
CPU_VCORE_HI_OC
CPU_PLL_FS01
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_PLL_STOP_BASE
CPU_PLL_CFGEXT CPU_PLL_CFG<4>
CPU_PLL_STOP_OC
PLL_STOP_L
CPU_PLL_STOP_OC
CPU_BUS_VSEL
MAXBUS_SLEEP
CPU_HRESET_INVCPU_HRESET_L
CPU_HRESET_L CPU_EMODE0_L
PLL_STOP_L
38
38
34
34
23
23
16
16
15
15
39
39
8
8
23
23
7
34
30
30
7
7
7
5
5
5
30
5
5
5
7
7
7
5
5
5
5 5
7
www.kythuatvitinh.com
(PLL6)VSSA_7
(PLL6)VDD15A_7
D_42
D_41
D_40
D_39
D_38
D_44
D_43
D_45
D_46
D_47
D_48
D_52
D_51
D_50
D_49
D_53
D_55
D_54
D_56
D_57
D_58
D_60
D_59
D_62
D_61
D_63
DBG
DRDY
DTI_0
TEA
TA
DTI_2
DTI_1
D_1
D_0
D_2
D_6
D_5
D_4
D_3
D_7
D_11
D_10
D_9
D_8
D_12
D_14
D_13
D_15
D_16
D_17
D_22
D_21
D_20
D_19
D_18
D_23
D_24
D_25
D_26
D_27
D_32
D_31
D_30
D_29
D_28
D_34
D_33
D_35
D_36
D_37
BR
(1 OF 9)
MAXBUS
INTERFACE
TS
BG
A_0
A_1
A_2
A_3
A_4
A_5
A_9
A_6
A_7
A_8
A_10
A_14
A_13
A_12
A_11
A_20
A_16
A_17
A_18
A_19
A_15
A_27
A_22
A_21
A_30
A_29
A_28
A_26
A_25
A_24
A_23
TT_2
TT_1
TT_0
A_31
TBST
TSIZ_0
TSIZ_1
TSIZ_2
CI
GBL
TT_4
AACK
QREQ
ARTRY
TT_3
WT
HIT
ANALYZER_CLK
SUSPENDACK
SUSPENDREQ
QACK
STOPCPUCLK
CPU_FB_OUT
CPU_FB_IN
CPU_CLK
TBEN
ACS_REF
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
DDR_TPDModeEnable_h
0: TDI input (JTAG)
1: TDI output
Spare
Spare
Spare
Spare
MODE C (2.0X) IS FOR CLOCK SLEW OPERATION
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
MAXBUS PULL-UPS
0: Legacy interface
1: B-mode interface
FireWire PHY interface
PCI1_REQ1_L / PCI1_GNT1_L
PCI1_REQ2_L / PCI1_GNT2_L
PCI1_REQ0_L / PCI1_GNT0_L
Spare
1: GPIOs
0: REQ/GNT
1: GPIOs
0: REQ/GNT
1: GPIOs
0: REQ/GNT
Processor Bus Mode
1: 60x bus (G3)
0: Max Bus (G4)
BIT 56 TO 63
INTREPID BOOT STRAPS
LONG = 1" LONGER THAN MATCHED LENGTHSHORT = 1" SHORTER THAN MATCHED LENGTH
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - ?
INPUT - PU
INPUT - PD
NO BUS KEEPER - PU
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PU
NO BUS KEEPER - PU
NO BUS KEEPER
NO BUS KEEPER
Vout = MaxBus rail (1.8V)Vin = Intrepid Vcore (1.5V)
BIT2 BIT1 BIT0
BIT0BIT2
001: 50 ohm
101: 40 ohm
010: 100 ohm
100: 200 ohm
000: 200 ohm
110: 66.6 ohm
011: 33.3 ohm
111: 28.6 ohm
MaxBus output impedance
PLL4MODESEL_NXT[2:0]
1: External source
SelPLL4ExtSrc
1: Active
INTREPID OUTPUTS HIGH BY DEFAULT
BUF_REF_CLK_OUTEnable_h
1: Active
0: Normal 1394b
1: TI PHY workaround
TI 1394b workaround
Spare
Spare
0: Inactive
AnalyzerClk_En_h
0: Inactive
DDR_TPDEn_Pol
1: Active low
0: Active high
0: Active high
ExtPLL_SDwn_Pol
Spare
BIT 32 TO 39
Spare
NO BUS KEEPER - PU
Intrepid MaxBus
1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
THE FOLLOWING STRAP BITS CAN BECHANGED BY SOFTWARE:
IF A STRAP IS NOT LISTED, THENIT CANNOT BE CHANGED BY SOFTWARE
INPUT
NO BUS KEEPER - PU
0: PLL5 (NO SPREAD)
1: PLL4
001: 149.76MHZ000: 166.4MHZ (2.5X)
BIT1 0: PLL5 (NO SPREAD)
PCI0 Source Clock
010: 133.12MHZ (2.0X)011: 99.84MHZ (1.5X)100: 83.20MHZ
MODE A (2.5X) IS FOR STATIC OPERATION
INTREPID BOOT STRAPS
1: Active
Spare
Spare
1: Active low
0: Inactive
0: PLL5
BIT 48 TO 55
InternalSpreadEn
BIT 40 TO 47
1: PLL4
PCI1 Source Clock
402MF
1/16W1%1K
2
1R137
402CERM6.3V20%
0.22UF
2
1C308
4.7
5%1/16WMF402
21
R227
0
402MF
1/16W5%
21
R144
10K
5%1/16WSM1
72
RP24
0
402MF
1/16W5%
2 1
R167
MF1/16W
1%
402
511
2
1R197
NO STUFF
5%1/16W
MF402
10K
2
1R17810K
402MF
1/16W5%
NO STUFF
2
1R179NO STUFF
10K
402MF
1/16W5%
2
1R651NO STUFF
5%1/16W
MF402
10K
2
1R16610K
402MF
1/16W5%
NO STUFF
2
1R153NO STUFF
5%1/16W
MF402
10K
2
1R123NO STUFF
10K
402MF
1/16W5%
2
1R135
5%1/16W
MF402
10K
2
1R67410K
402MF
1/16W5%
2
1R1435%
MF402
1/16W
10K
2
1R6735%
1/16WMF402
10K
2
1R66410K
402MF
5%1/16W
2
1R6575%
402
10K
MF1/16W
2
1R63910K
402MF
5%1/16W
2
1R643
10K
402MF
1/16W5%
NO STUFF
2
1R642
10K
402MF
5%1/16W
2
1R136
MF402
1/16W5%
10K
NO_SSCG
2
1R165NO_SSCG
10K
402
1/16W5%
MF2
1R177
402MF
1/16W5%
NO_SSCG
10K
2
1R1525%
1/16WMF402
NO STUFF
10K
2
1R184
402MF
1/16W5%
10K
SSCG
2
1R134NO STUFF
10K
402MF
1/16W5%
2
1R16410K
402MF
1/16W5%
NO STUFF
2
1R14210K
402MF
1/16W5%
NO STUFF
2
1R122
5%
MF402
10K
SSCG
1/16W
2
1R666
MF
5%10K1/16W
SSCG
4022
1R658SSCG
10K
402MF
1/16W5%
2
1R6755%
MF402
10K1/16W
2
1R683
402MF
1/16W5%
10K
NO_SSCG
2
1R6445%
1/16WMF402
10K
2
1R66510K
402MF
1/16W5%
2
1R65210K
402MF
1/16W5%
2
1R640
10K
402MF
1/16W5%
NO STUFF
2
1R1765%
1/16WMF402
10K
NO STUFF
2
1R14110K
402MF
1/16W5%
2
1R18310K
402MF
1/16W5%
NO STUFF
2
1R1625%
1/16WMF402
10K
NO STUFF
2
1R15110K
402MF
1/16W5%
2
1R1635%
1/16WMF402
10K
SSCG
2
1R121
10K
402MF
1/16W5%
2
1R676NO STUFF
5%1/16W
MF402
10K
2
1R6845%
1/16WMF402
10K
2
1R65310K
402MF
1/16W5%
2
1R6675%
1/16WMF402
10K
2
1R659
402MF
1/16W5%
NO STUFF
10K
2
1R668NO_SSCG
5%
MF402
10K1/16W
2
1R641
10K
402MF
1/16W5%
SSCG
2
1R133
MF1/16W
NO_SSCG
10K5%
4022
1R645
5%1/16W
MF402
10K
NO STUFF
2
1R18210K
402MF
1/16W5%
2
1R1745%
1/16WMF402
10K
NO STUFF
2
1R15010K
402MF
1/16W5%
NO STUFF
2
1R1315%
1/16WMF402
10K
NO STUFF
2
1R132NO STUFF
10K
402MF
1/16W5%
2
1R175NO STUFF
10K
402MF
1/16W5%
2
1R1615%
1/16WMF402
10K
NO STUFF
2
1R140
10K
402MF
1/16W5%
2
1R68510K
402MF
1/16W5%
2
1R660NO STUFF
5%1/16W
MF402
10K
2
1R6785%
1/16WMF402
10K
2
1R64710K
402MF
1/16W5%
2
1R6465%
1/16WMF402
10K
2
1R67710K
402MF
1/16W5%
2
1R6695%
1/16WMF402
10K
2
1R654
INTREPID-REV2.1BGA
CRITICAL
D28
H25
H26
J25
D27
B28
G25
E25
D26
H24
G24
B27
E28
A28
A31
E27
AK9
AM8
AH9
A32
G27
B31
A29
D11
E12
A8
G20
B20
G19
E19
A9
D19
A20
J19
B19
H19
A19
A18
D18
B18
E18
B8
B17
A17
G18
D17
H18
J18
A16
E17
B16
A15
B9
H17
B15
G17
E16
D16
A13
A14
D15
J16
E15
H11
G16
A12
B14
D14
H15
B13
G15
B12
E14
H14
E11
G14
A11
D13
B11
G13
E13
D12
A10
J13
B10
G12
D10
B30
D29
K25
G28
A30H16
J24
J15
G26
E29
E26
E23
A25
D23
A26
B26
G23
A21
D20
E24
B21
E20
A22
H21
B22
H20
A23
D21
A24
E21
A27
G21
J21
E22
B23
B24
D22
G22
H22
B25
J22
D25
D24
H23
G8
H13
B29
U45
402MF
1/16W5%0
NO STUFF
2
1R225
0
5%1/16WMF402
21
R215
402MF
1/16W5%0
2
1R208
NO STUFF
0
5%1/16WMF402
21
R207
402MF
1/16W5%
021
R226NO STUFF
402MF
1/16W5%
021
R196
1/16W5%
10K
SM1
63
RP24
10K
5%1/16WSM1
81
RP23
SM11/16W5%
10K54
RP23
SM1
10K
5%1/16W
72
RP23
1/16W5%
10K
SM1
72
RP21
SM1
10K
5%1/16W
81
RP21
SM1
10K
1/16W5%
63
RP21
10K
5%1/16WSM1
54
RP21
1/16W5%
10K
SM1
54
RP24
SM1
10K
1/16W5%
63
RP23
B051-6531
448
CPU_DATA<43>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_DATA<47>
CPU_DATA<45>
CPU_DATA<46>
MAXBUS_SLEEP
CPU_DATA<54>
CPU_DATA<52>
MAXBUS_SLEEP
CPU_CI_L
CPU_ADDR<31>
CPU_ADDR<29>
CPU_DATA<38>
CPU_DATA<42>
CPU_DATA<44>
CPU_GBL_L
+1_5V_INTREPID_PLL7
INTREPID_ACS_REF
CPU_TBEN
CPU_CLK_EN
SYSCLK_LA_TP
INT_CPUFB_OUT
INT_SUSPEND_ACK_L
INT_SUSPEND_REQ_L
CPU_QACK_L
CPU_QREQ_L
CPU_ARTRY_L
CPU_HIT_L
CPU_AACK_L
CPU_WT_L
CPU_TT<3>
CPU_TT<4>
CPU_TT<2>
CPU_TT<0>
CPU_TT<1>
CPU_TSIZ<1>
CPU_TSIZ<2>
CPU_TSIZ<0>
CPU_TBST_L
CPU_ADDR<30>
CPU_ADDR<28>
CPU_ADDR<25>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<20>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<17>
CPU_ADDR<16>
CPU_ADDR<15>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<11>
CPU_ADDR<12>
CPU_ADDR<10>
CPU_ADDR<9>
CPU_ADDR<8>
CPU_ADDR<7>
CPU_ADDR<6>
CPU_ADDR<5>
CPU_ADDR<4>
CPU_ADDR<3>
CPU_ADDR<2>
CPU_ADDR<0>
CPU_ADDR<1>
CPU_TS_L
CPU_BG_L
CPU_BR_LCPU_DATA<1>
CPU_DATA<0>
CPU_DATA<3>
CPU_DATA<4>
CPU_DATA<2>
CPU_DATA<5>
CPU_DATA<6>
CPU_DATA<8>
CPU_DATA<9>
CPU_DATA<7>
CPU_DATA<10>
CPU_DATA<11>
CPU_DATA<13>
CPU_DATA<12>
CPU_DATA<14>
CPU_DATA<15>
CPU_DATA<16>
CPU_DATA<18>
CPU_DATA<17>
CPU_DATA<19>
CPU_DATA<21>
CPU_DATA<20>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<26>
CPU_DATA<25>
CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<31>
CPU_DATA<30>
CPU_DATA<32>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<42>
CPU_DATA<41>
CPU_DATA<43>
CPU_DATA<45>
CPU_DATA<44>
CPU_DATA<46>
CPU_DATA<47>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<48>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<54>
CPU_DATA<53>
CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<59>
CPU_DATA<58>
CPU_DATA<60>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<63>
CPU_DBG_L
CPU_DRDY_L
CPU_DTI<0>
CPU_DTI<1>
CPU_DTI<2>
CPU_TA_L
CPU_TEA_L
+1_5V_INTREPID_PLL
MAXBUS_SLEEP
CPU_DATA<39>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<33>
CPU_DATA<55>
CPU_DATA<41>
CPU_DATA<40>
CPU_DATA<53>
CPU_DATA<51>
CPU_DATA<50>
CPU_DATA<49>
CPU_DATA<48>
CPU_DATA<32>
INT_CPUFB_IN
INT_CPUFB_OUT_NORM
INT_CPUFB_IN_NORM
INT_CPUFB_LONG
CPU_DATA<63>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<60>
CPU_DATA<59>
MAXBUS_SLEEP
CPU_DATA<58>
CPU_DATA<57>
CPU_DATA<56>
CPU_TA_L
CPU_TS_L
CPU_BR_L
CPU_ARTRY_L
CPU_DRDY_L
CPU_HIT_L
CPU_AACK_L
CPU_TEA_L
CPU_DBG_L
CPU_BG_L
MAXBUS_SLEEP
CPU_QREQ_L
INT_CPUFB_IN
SYSCLK_CPU_UFSYSCLK_CPU
INT_CPUFB_OUT INT_CPUFB_OUT_SHORT
38
38
38
38
38
34
34
34
34
34
23
23
23
23
23
16
16
16
16
16
15
15
15
15
15
36
36
36
36
8
36
36
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
36
36
36
36
36
36
36
36
36
36
36
36
36
8
36
8
36
36
8
8
8
7
8
8
7
36
36
36
8
8
8
36
36
36
8
8
8
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
8 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
36
36
36
8
8
14
7
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
36
8
8
8
8
8
7
8
8
8
8
8
8
8
8
8
8
8
8
8
7
8
36
36
36
6
5
5
6
6
6
5
6
6
5
5
5
5
6
6
6
5
38
5
30
8
30
30
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
12
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
36
36
36
6
6
6
6
6
5
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
8
36 5
8 36
www.kythuatvitinh.com
A0A1
A6
A2A3A4A5
A9A8A7
A10A11A12A13A14A15A16
A20
A17A18A19
CEOEWEWPPWD
GND
DQ0DQ1
DQ6DQ5
DQ2DQ3DQ4
DQ7
VPP VCC
FEPR-1MX8
(2 OF 9)
DDR_VREF_1
DDR_VREF_0
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDR_DATA_16
DDR_DATA_17
DDR_DATA_18
DDR_DATA_19
DDR_DATA_20
DDR_DATA_21
DDR_DATA_25
DDR_DATA_26
DDR_DATA_27
DDR_DATA_28
DDR_DATA_29
DDR_DATA_30
DDR_DATA_33
DDR_DATA_34
DDR_DATA_35
DDR_DATA_36
DDR_DATA_37
DDR_DATA_38
DDR_DATA_39
DDR_DATA_40
DDR_DATA_41
DDR_DATA_42
DDR_DATA_43
DDR_DATA_44
DDR_DATA_45
DDR_DATA_46
DDR_DATA_47
DDR_DATA_48
DDR_DATA_49
DDR_DATA_50
DDR_DATA_51
DDR_DATA_52
DDR_DATA_53
DDR_DATA_54
DDR_DATA_55
DDR_DATA_56
DDR_DATA_57
DDR_DATA_58
DDR_DATA_59
DDR_DATA_60
DDR_DATA_61
DDR_DATA_62
DDR_DATA_63
DDR_DATA_22
DDR_DATA_23
DDR_DATA_24
DDR_DATA_31
DDR_DATA_32
DDR_BA_0
DDR_BA_1
DDRCS_3
DDRCS_2
DDRCS_1
DDRCS_0
DDR_DQS_7
DDR_DQS_6
DDR_DQS_5
DDR_DQS_4
DDR_DQS_3
DDR_DQS_2
DDR_DQS_1
DDR_DQS_0
DDR_DM_7
DDR_DM_6
DDR_DM_5
DDR_DM_4
DDR_DM_3
DDR_DM_2
DDR_DM_1
DDR_DM_0
DDRRAS
DDRCAS
DDRWE
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
DDR_MCLK_0_P
DDR_MCLK_0_N
DDR_MCLK_1_P
DDR_MCLK_1_N
DDR_MCLK_2_P
DDR_MCLK_2_N
DDR_MCLK_3_P
DDR_MCLK_3_N
DDR_MCLK_4_P
DDR_MCLK_4_N
DDR_MCLK_5_P
DDR_MCLK_5_N
DDR_REF
DDR_SELHI_0
DDR_SELHI_1
DDR_SELLO_0
DDR_SELLO_1
MEMORYDDR
INTERFACE
DDR_A_10
DDR_A_11
DDR_A_12
DDR_A_9
DDR_A_8
DDR_A_7
DDR_A_6
DDR_A_5
DDR_A_4
DDR_A_3
DDR_A_2
DDR_A_1
DDR_A_0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
OVERRIDE ROM MODULE
PULL-DOWN RESISTORS TO ENSURECKE STAYS LOW AFTER INTREPID2.5V I/O SHUTS OFF
1MB BOOT ROM
INTERCEPTS ROM CHIP SELECT
MEM_VREF
’2’ & ’3’ GO TO SLOT B’0’ & ’1’ GO TO SLOT A
’2’ & ’3’ GO TO SLOT B’0’ & ’1’ GO TO SLOT A
’1’S ARE SAME POLARITY (ACTIVE-HI)’0’S ARE SAME POLARITY (ACTIVE-LO)
CNTL
BA
ADDR
CKE
CS
PINS ARE SWAPABLE FOR RPAKS
CLOCKS
INT - DDR/BOOTROM
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
402MF
1/16W
10K5%
2
1R387
402MF
1/16W5%
2221
R238
402MF1/16W1%1K
2
1R199
402MF
1/16W1%
10K
2
1R198
402CERM10V20%
0.1UF
2
1C2451%
1/16WMF402
10K
2
1R191
OMIT
3.3VTSOP
12
9
11 3130
10
24
3923
35
34
33
32
28
27
26
25
22
7
8
14
15
16
17
18
38
19
37
13
40
1
2
3
4
5
6
36
20
21
U17
10VCERM805
20%2.2UF
2
1 C46020%10VCERM402
0.1UF
2
1 C47020%10VCERM402
0.1UF
2
1 C479
402MF
1/16W
10K5%
2
1R386
+3V_MAIN
INTREPID-REV2.1
CRITICAL
BGA
T22
Y22
T32
N30
AE29
AB32
AA22
W35
W36
V33
V32
W32
W33
Y30
W30
Y35
Y36
Y32
Y33
L32
N29
P32
V30
AB30
AD32
AH31
AJ31
L33
N32
T33
T35
AC35
AD33
AH33
AJ33
AG35
AG33
AJ36
K35
K36
J36
K33
AJ35
K32
J35
J33
J32
M30
N33
L36
M33
M35
L35
AJ32
M36
N35
R32
R33
R35
R36
P36
P35
R30
P33
AK36
T36
U35
U36
T30
V35
U32
U33
V36
AB33
AA32
AK35
AC36
AB35
AB36
AA33
AA35
AA36
AD35
AD36
AE33
AE35
AK31
AE36
AF36
AF35
AE32
AG31
AG32
AH32
AH36
AG36
AH35
AK33
AK32
M29
L30
H36
D36
G32
E36
E35
F35
F36
G36
D35
H33
G33
G35
H35
K30
L29
AL33
AL35
AN36
AN34
AL36
AM36
AM35
AN35
H32
U45
5%10K1/16W
MF402 2
1R338
1K
5%1/16WMF402
21
R357
SM11/16W5%
2254
RP33
1/16W5%
22
SM1
63
RP33
SM11/16W5%
2281
RP34
1/16W5%
22
SM1
72
RP34
22
5%1/16WSM1
72
RP33
22
5%1/16WSM1
63
RP34
22
5%1/16WMF402
21
R250
22
5%1/16WSM1
81
RP33
22
5%1/16WSM1
54
RP34
22
5%1/16WSM1
81
RP36
22
5%1/16WSM1
54
RP35
22
5%1/16WSM1
63
RP36
SM11/16W5%
2272
RP36
SM11/16W5%
2254
RP36
22
5%1/16WSM1
72
RP35
SM11/16W5%
2281
RP35
SM11/16W5%
2263
RP35
22
5%1/16WSM1
81
RP31
22
5%1/16WSM1
81
RP25
22
5%1/16WSM1
72
RP25
SM11/16W5%
2263
RP25
22
5%1/16WSM1
54
RP25
SM11/16W5%
2281
RP30
SM11/16W5%
2272
RP30
SM11/16W5%
2263
RP31
SM11/16W5%
2254
RP30
SM11/16W5%
2254
RP31SM1
1/16W5%
2272
RP31
SM11/16W5%
2254
RP26
22
5%1/16WSM1
63
RP30
22
5%1/16WSM1
81
RP26
22
5%1/16WSM1
72
RP26
22
5%1/16WSM1
63
RP26
+3V_MAIN
402MF
1/16W
10K5%
2
1R5005%
10K1/16W
MF4022
1R439
402MF
1/16W
10K5%
2
1R409
9 44051-6531 B
341S1336 CRITICAL1 BOOTROM,P84 U17 ?
RAM_CKE<1>
RAM_CKE<2>
RAM_CKE<3>
+2_5V_INTREPID
MEM_RAS_L RAM_RAS_L
RAM_WE_LMEM_WE_L
MEM_CAS_L RAM_CAS_L
RAM_BA<1>MEM_BA<1>
RAM_BA<0>MEM_BA<0>
RAM_ADDR<11>MEM_ADDR<11>
RAM_ADDR<9>MEM_ADDR<9>
RAM_ADDR<12>MEM_ADDR<12>
RAM_ADDR<10>MEM_ADDR<10>
RAM_ADDR<8>MEM_ADDR<8>
RAM_ADDR<7>MEM_ADDR<7>
RAM_ADDR<5>MEM_ADDR<5>
RAM_ADDR<3>MEM_ADDR<3>
RAM_ADDR<1>MEM_ADDR<1>
RAM_ADDR<6>MEM_ADDR<6>
RAM_ADDR<4>MEM_ADDR<4>
RAM_ADDR<2>MEM_ADDR<2>
RAM_ADDR<0>MEM_ADDR<0>
RAM_CKE<3>MEM_CKE<3>
RAM_CKE<1>MEM_CKE<1>
RAM_CS_L<3>MEM_CS_L<3>
RAM_CKE<2>MEM_CKE<2>
RAM_CKE<0>MEM_CKE<0>
RAM_CS_L<2>MEM_CS_L<2>
RAM_CS_L<1>MEM_CS_L<1>
SYSCLK_DDRCLK_B0_LSYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B1_LSYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_A0_LSYSCLK_DDRCLK_A0_L_UF
RAM_CS_L<0>MEM_CS_L<0>
SYSCLK_DDRCLK_B0SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B1SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_A1_LSYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A0SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A1SYSCLK_DDRCLK_A1_UF
INT_MEM_VREF
MEM_ADDR<12>
MEM_ADDR<11>
MEM_ADDR<10>
MEM_ADDR<9>
MEM_ADDR<8>
MEM_ADDR<7>
MEM_ADDR<6>
MEM_ADDR<5>
MEM_ADDR<4>
MEM_ADDR<3>
MEM_ADDR<2>
MEM_ADDR<1>
MEM_ADDR<0>
MEM_MUXSEL_L<1>
MEM_MUXSEL_H<1>
MEM_MUXSEL_H<0>
MEM_CKE<3>
MEM_CKE<2>
MEM_CKE<1>
MEM_CKE<0>
MEM_WE_L
MEM_CAS_L
MEM_RAS_L
MEM_DQM<7>
MEM_DQM<6>
MEM_DQM<5>
MEM_DQM<4>
MEM_DQM<3>
MEM_DQM<1>
MEM_DQM<0>
MEM_DQM<2>
MEM_DQS<7>
MEM_DQS<6>
MEM_DQS<5>
MEM_DQS<4>
MEM_DQS<3>
MEM_DQS<2>
MEM_DQS<1>
MEM_DQS<0>
MEM_CS_L<2>
MEM_CS_L<1>
MEM_CS_L<0>
MEM_CS_L<3>
MEM_BA<1>
MEM_BA<0>
MEM_DATA<54>
MEM_DATA<31>
MEM_DATA<29>
MEM_DATA<25>
MEM_DATA<24>
MEM_DATA<15>
MEM_DATA<63>
MEM_DATA<62>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<56>
MEM_DATA<55>
MEM_DATA<53>
MEM_DATA<52>
MEM_DATA<51>
MEM_DATA<50>
MEM_DATA<49>
MEM_DATA<48>
MEM_DATA<47>
MEM_DATA<46>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<40>
MEM_DATA<39>
MEM_DATA<38>
MEM_DATA<37>
MEM_DATA<36>
MEM_DATA<35>
MEM_DATA<34>
MEM_DATA<33>
MEM_DATA<32>
MEM_DATA<30>
MEM_DATA<28>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<23>
MEM_DATA<22>
MEM_DATA<21>
MEM_DATA<20>
MEM_DATA<19>
MEM_DATA<18>
MEM_DATA<17>
MEM_DATA<16>
MEM_DATA<14>
MEM_DATA<13>
MEM_DATA<12>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<8>
MEM_DATA<7>
MEM_DATA<6>
MEM_DATA<5>
MEM_DATA<4>
MEM_DATA<3>
MEM_DATA<2>
MEM_DATA<1>
MEM_DATA<0>
MEM_MUXSEL_L<0>
INT_DDRCLK5_N_TP
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B0_UF
INT_DDRCLK5_P_TP
INT_DDRCLK2_P_TP
INT_DDRCLK2_N_TP
INT_MEM_VREF
INT_MEM_REF_H
PCI_AD<31>
PCI_AD<30>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<3>
PCI_AD<20>
PCI_AD<2>
PCI_AD<19>
PCI_AD<18>
PCI_AD<17>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
PCI_AD<10>
PCI_AD<1>
PCI_AD<0>
ROM_OE_L
ROM_RW_L
INT_RESET_L
ROM_CS_L ROM_ONBOARD_CS_L
ROM_WP_L
RAM_CKE<0>
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
36
36
36
16
36
36
36
36
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
39
39
39
36
11
11
11
15
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
11 9
11 36
36 36
11 36
11 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
24
24
30
24 39
11
9
9
9
10
9 11
11 9
9 11
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
9 36
9 9
11 9
9 9
9 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
11 9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
10
10
10
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
38
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
13
12 24
9
www.kythuatvitinh.com
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW
BIT 0..15 BIT 16..31 BIT 32..47 BIT 48..63
16BIT 2:1 DDR MUXES
SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GNDSEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND
ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG
MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH
402CERM10V20%0.1UF
2
1 C74220%10VCERM402
0.1UF
2
1 C748
402CERM10V20%0.1UF
2
1 C753
402CERM10V20%0.1UF
2
1 C73720%10VCERM402
0.1UF
2
1 C738
402CERM10V20%0.1UF
2
1 C736
402CERM10V20%0.1UF
2
1 C75220%10VCERM402
0.1UF
2
1 C747
402CERM10V20%0.1UF
2
1 C741
402CERM10V20%0.1UF
2
1 C743
402CERM10V20%0.1UF
2
1 C727
402CERM10V20%0.1UF
2
1 C735
CBTV4020BGA
CRITICAL
F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U13 CBTV4020BGA
CRITICAL
F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U12
CRITICAL
BGACBTV4020
F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U10
CRITICAL
BGACBTV4020
F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U9
NO STUFF
5%
0
402MF
1/16W
21
R242
NO STUFF
1/16WMF402
0
5%
21
R252
1/16WMF402
0
5%
21
R243
5%
0
402MF
1/16W
21
R239
051-6531 B
10 44
MEM_MUXSEL_H<0> RAM_MUXSEL_H
MEM_MUXSEL_L<0> RAM_MUXSEL_L
MEM_MUXSEL_H<1> RAM_MUXSEL_H
MEM_MUXSEL_L<1> RAM_MUXSEL_L
RAM_DATA_B<0>
RAM_DATA_B<1>
RAM_DATA_B<2>
RAM_DATA_B<10>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DQM_B<0>
RAM_DQS_B<0>
RAM_DATA_B<4>
RAM_DATA_B<3>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DATA_B<5>
RAM_DQM_B<1>
RAM_DQS_B<1>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DATA_B<13>
RAM_DATA_B<12>
RAM_DATA_B<11>
RAM_DATA_A<10>
RAM_DATA_A<11>
RAM_DATA_A<13>
RAM_DATA_A<12>
RAM_DATA_A<15>
RAM_DATA_A<14>
RAM_DQS_A<1>
MEM_DATA<0>
RAM_DQM_A<1>
MEM_DATA<3>
MEM_DATA<1>
MEM_DATA<2>
MEM_DATA<5>
MEM_DATA<4>
MEM_DQS<0>
MEM_DATA<6>
MEM_DATA<7>
MEM_DQM<0>
MEM_DATA<8>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<13>
MEM_DATA<12>
MEM_DATA<14>
MEM_DQS<1>
MEM_DATA<15>
RAM_MUXSEL_L
RAM_DQM_A<0>
RAM_DQS_A<0>
RAM_DATA_A<7>
RAM_DATA_A<6>
RAM_DATA_A<4>
RAM_DATA_A<5>
RAM_DATA_A<1>
RAM_DATA_A<3>
RAM_DATA_A<2>
RAM_DATA_A<0>
RAM_DATA_A<8>
MEM_DQM<1>
RAM_DATA_A<9>RAM_DATA_B<16>
RAM_DATA_B<17>
RAM_DATA_B<18>
RAM_DATA_B<26>
RAM_DATA_B<25>
RAM_DATA_B<24>
RAM_DQM_B<2>
RAM_DQS_B<2>
RAM_DATA_B<20>
RAM_DATA_B<19>
RAM_DATA_B<23>
RAM_DATA_B<22>
RAM_DATA_B<21>
RAM_DQM_B<3>
RAM_DQS_B<3>
RAM_DATA_B<31>
RAM_DATA_B<30>
RAM_DATA_B<29>
RAM_DATA_B<28>
RAM_DATA_B<27>
RAM_DATA_A<26>
RAM_DATA_A<27>
RAM_DATA_A<29>
RAM_DATA_A<28>
RAM_DATA_A<31>
RAM_DATA_A<30>
RAM_DQS_A<3>
MEM_DATA<16>
RAM_DQM_A<3>
MEM_DATA<19>
MEM_DATA<17>
MEM_DATA<18>
MEM_DATA<21>
MEM_DATA<20>
MEM_DQS<2>
MEM_DATA<22>
MEM_DATA<23>
MEM_DQM<2>
MEM_DATA<24>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<25>
MEM_DATA<29>
MEM_DATA<28>
MEM_DATA<30>
MEM_DQS<3>
MEM_DATA<31>
RAM_MUXSEL_L
RAM_DQM_A<2>
RAM_DQS_A<2>
RAM_DATA_A<23>
RAM_DATA_A<22>
RAM_DATA_A<20>
RAM_DATA_A<21>
RAM_DATA_A<17>
RAM_DATA_A<19>
RAM_DATA_A<18>
RAM_DATA_A<16>
RAM_DATA_A<24>
MEM_DQM<3>
RAM_DATA_A<25>RAM_DATA_B<32>
RAM_DATA_B<33>
RAM_DATA_B<34>
RAM_DATA_B<42>
RAM_DATA_B<41>
RAM_DATA_B<40>
RAM_DQM_B<4>
RAM_DQS_B<4>
RAM_DATA_B<36>
RAM_DATA_B<35>
RAM_DATA_B<39>
RAM_DATA_B<38>
RAM_DATA_B<37>
RAM_DQM_B<5>
RAM_DQS_B<5>
RAM_DATA_B<47>
RAM_DATA_B<46>
RAM_DATA_B<45>
RAM_DATA_B<44>
RAM_DATA_B<43>
RAM_DATA_A<42>
RAM_DATA_A<43>
RAM_DATA_A<45>
RAM_DATA_A<44>
RAM_DATA_A<47>
RAM_DATA_A<46>
RAM_DQS_A<5>
MEM_DATA<32>
RAM_DQM_A<5>
MEM_DATA<35>
MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<37>
MEM_DATA<36>
MEM_DQS<4>
MEM_DATA<38>
MEM_DATA<39>
MEM_DQM<4>
MEM_DATA<40>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<46>
MEM_DQS<5>
MEM_DATA<47>
RAM_MUXSEL_H
RAM_DQM_A<4>
RAM_DQS_A<4>
RAM_DATA_A<39>
RAM_DATA_A<38>
RAM_DATA_A<36>
RAM_DATA_A<37>
RAM_DATA_A<33>
RAM_DATA_A<35>
RAM_DATA_A<34>
RAM_DATA_A<32>
RAM_DATA_A<40>
MEM_DQM<5>
RAM_DATA_A<41> RAM_DATA_B<48>
RAM_DATA_B<49>
RAM_DATA_B<50>
RAM_DATA_B<58>
RAM_DATA_B<57>
RAM_DATA_B<56>
RAM_DQM_B<6>
RAM_DQS_B<6>
RAM_DATA_B<52>
RAM_DATA_B<51>
RAM_DATA_B<55>
RAM_DATA_B<54>
RAM_DATA_B<53>
RAM_DQM_B<7>
RAM_DQS_B<7>
RAM_DATA_B<63>
RAM_DATA_B<62>
RAM_DATA_B<61>
RAM_DATA_B<60>
RAM_DATA_B<59>
RAM_DATA_A<58>
RAM_DATA_A<59>
RAM_DATA_A<61>
RAM_DATA_A<60>
RAM_DATA_A<63>
RAM_DATA_A<62>
RAM_DQS_A<7>
MEM_DATA<48>
RAM_DQM_A<7>
MEM_DATA<51>
MEM_DATA<49>
MEM_DATA<50>
MEM_DATA<53>
MEM_DATA<52>
MEM_DQS<6>
MEM_DATA<54>
MEM_DATA<55>
MEM_DQM<6>
MEM_DATA<56>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<62>
MEM_DQS<7>
MEM_DATA<63>
RAM_MUXSEL_H
RAM_DQM_A<6>
RAM_DQS_A<6>
RAM_DATA_A<55>
RAM_DATA_A<54>
RAM_DATA_A<52>
RAM_DATA_A<53>
RAM_DATA_A<49>
RAM_DATA_A<51>
RAM_DATA_A<50>
RAM_DATA_A<48>
RAM_DATA_A<56>
MEM_DQM<7>
RAM_DATA_A<57>
+2_5V_INTREPID +2_5V_INTREPID +2_5V_INTREPID +2_5V_INTREPID38
38 38 38
16 16
16 16 15
15 15 15
36 36
36 36
36 36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
10 10
10 10
9 10
9 10
9 10
9 10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
10
11
11
11
11
11
11
11
11
11
11
11
9
11 11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
10
11
11
11
11
11
11
11
11
11
11
11
9
11 11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
10
11
11
11
11
11
11
11
11
11
11
11
9
11 11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
10
11
11
11
11
11
11
11
11
11
11
11
9
11
9 9
9 9
www.kythuatvitinh.com
DQ58
RFU18
KEY
VDD6
VSS6
VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4
DQ5
VSS1
VREF1
VDD1
SA1
SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6
A4
A2
A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11
VSS16
RFU9
VDD14
RFU3
VSS14
RFU5
RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41
DQS5
VSS24
VDD22
DQ42
DQ34
VSS22
DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5
A3
A9
A7
VSS18
CKE1
RFU14
RFU13
VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11
DQ26
DQ27
DQS3
VDD11
DQ19
DQ24
VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11
VDD4
VSS7
CK0*
CK0
DQS1
VSS4
DQ10
VDD2
DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0
DQ1
VSS0
VREF0
A12
DQ58
RFU18
KEY
VREF0
VDD0
DQ0
DQ1
VSS0
DQS0
VSS2
DQ3
DQ8
DQ2
VDD2
VSS4
DQS1
DQ10
DQ9
DQ11
CK0
CK0*
VSS7
VDD4
DQ16
DQ18
VDD7
DQ17
DQS2
VSS9
DQ25
VDD9
DQ24
DQ19
DQS3
VDD11
DQ27
DQ26
VSS11
RFU0
VDD13
RFU4
VSS13
RFU2
RFU6
RFU13
RFU12
RFU8
RFU10
VSS15
A9
CKE1
RFU14
VDD16
A1
A5
A7
VSS18
A3
BA0
VDD18
S0*
WE*
A10_AP
DQ33
VSS20
DQ32
VDD20
RFU16
DQS4
DQ34
VSS22
DQ35
DQ40
VDD22
DQ41
DQS5
VSS24
DQ42
DQ43
DQ48
VSS26
VDD26
VDD24
VSS27
VSS29
DQ50
DQ49
DQS6
VDD27
DQS7
DQ51
VDD29
DQ56
DQ57
SDA
VDD31
VSS31
DQ59
VDDSPD
SCL
RFU19
VDD32
VSS28
CK1
DQ52
VDD28
DM6
DQ54
VSS30
DM7
DQ55
DQ60
VDD30
DQ61
DQ53
SA1
SA2
SA0
DQ63
DQ62
VSS32
VSS25
DM5
DQ45
VDD23
VDD21
VSS21
DQ36
RFU17
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RAS*
CAS*
S1*
DQ46
DQ47
CK1*
VDD25
RFU7
RFU5
VDD14
VSS17
VDD15
CKE0
RFU15
VDD17
A11
A8
RFU11
VSS16
RFU9
VSS19
A0
A2
A4
A6
BA1
VDD19
VDD12
VSS12
DQ31
DQ30
DM3
DQ22
DQ21
VDD8
DQ20
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
VSS6
VSS8
RFU1
VSS14
RFU3
VREF1
DQ5
DQ4
DM0
DQ6
DQ12
DQ7
VSS3
VSS1
VDD1
VDD3
DM1
VSS5
DQ14
DQ13
DQ15
VDD5
VDD6
A12
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
ONE 0.1UF PER SLOTDDR VREF
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DDR SODIMM CONNS
FACTORY SLOTSLOT "A"STANDARD REVERSED
SLOT "B"CUSTOMER SLOT
ADDR=0XA0(WR)/0XA1(RD) ADDR=0XA2(WR)/0XA3(RD)
SLOT "A"
SLOT "B"
DDR BYPASS CAPS
FOR RETURN CURRENT
CRITICAL
F-RT-SMAS0A42-D2S
119
51
4039
38
2827
186185
174
16
173
162161
159
150149
138137
126125
15
104103
90
8887
7675
6463
52
43
21
197
57
4645
36
3433
192191
180
22
179
168167
157
156155
144143
132131
21
114113
9493
92
8281
7069
58
109
193
195
198
196
194
122121
8483
8079
7877
7473
200199
124123
9897
91
89
8685
7271
118
202
201
183
169
147
133
61
47
25
11
23
19
18
190
188
182
178
14
189
187
181
177
176
172
166
164
175
171
8
165
163
154
152
146
142
153
151
145
141
6
140
136
130
128
139
135
129
127
68
66
17
60
56
67
65
59
55
54
50
44
42
13
53
49
43
41
32
30
24
20
31
29
7
5
184
170
148
134
62
48
26
12
95 96
158
160
37
35
120
116
117
101 102
105 106
107 108
109 110
99 100
115
111 112
J19
CERM6.3V20%
805
10UF
2
1 C602
805CERM6.3V20%10UF
2
1 C601
AS0A42-D2RF-RT-SM
CRITICAL
119
51
40 39
38
28 27
186 185
174
16
173
162 161
159
150 149
138 137
126 125
15
104 103
90
88 87
76 75
64 63
52
4 3
2 1
197
57
46 45
36
34 33
192 191
180
22
179
168 167
157
156 155
144 143
132 131
21
114 113
94 93
92
82 81
70 69
58
10 9
193
195
198
196
194
122 121
84 83
80 79
78 77
74 73
200 199
124 123
98 97
91
89
86 85
72 71
118
202
201
183
169
147
133
61
47
25
11
23
19
18
190
188
182
178
14
189
187
181
177
176
172
166
164
175
171
8
165
163
154
152
146
142
153
151
145
141
6
140
136
130
128
139
135
129
127
68
66
17
60
56
67
65
59
55
54
50
44
42
13
53
49
43
41
32
30
24
20
31
29
7
5
184
170
148
134
62
48
26
12
9596
158
160
37
35
120
116
117
101102
105106
107108
109110
99100
115
111112
J22
CERM6.3V20%
805
10UF
2
1 C530
805CERM6.3V20%10UF
2
1 C589
402MF1/16W1%1K
2
1R449
1K1%1/16WMF4022
1R44020%10VCERM402
0.1UF
2
1 C54220%10VCERM402
0.1UF
2
1 C482
+2_5V_MAIN+2_5V_MAIN +2_5V_MAIN +2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+3V_MAIN
402CERM10V20%0.1UF
2
1 C573
402CERM10V20%0.1UF
2
1 C52620%10VCERM402
0.1UF
2
1 C525
+3V_MAIN
402CERM10V20%0.1UF
2
1 C49020%10VCERM402
0.1UF
2
1 C527
402CERM10V20%0.1UF
2
1 C48120%10VCERM402
0.1UF
2
1 C523
402CERM10V20%0.1UF
2
1 C54920%10VCERM402
0.1UF
2
1 C52420%10VCERM402
0.1UF
2
1 C595
20%10VCERM402
0.1UF
2
1 C522
402CERM10V20%0.1UF
2
1 C597
402CERM10V20%0.1UF
2
1 C489
+3V_MAIN
20%10VCERM402
0.1UF
2
1 C594
20%10VCERM402
0.1UF
2
1 C596
402CERM10V20%0.1UF
2
1 C54820%10VCERM402
0.1UF
2
1 C565
402CERM10V20%0.1UF
2
1 C550
402CERM10V20%0.1UF
2
1 C551
20%10VCERM402
0.1UF
2
1 C761
4411051-6531 B
DDR_VREF
RAM_DATA_B<4>
RAM_DATA_B<5>
RAM_DQM_B<0>
RAM_DATA_B<6>
RAM_DATA_B<7>
RAM_DATA_B<12>
RAM_DQM_B<1>
RAM_DATA_B<13>
RAM_DATA_B<14>
RAM_DATA_B<15>
RAM_DATA_B<20>
RAM_DATA_B<21>
RAM_DATA_B<22>
RAM_DQM_B<2>
RAM_DATA_B<23>
RAM_DATA_B<28>
RAM_DATA_B<29>
RAM_DATA_B<30>
RAM_DQM_B<3>
RAM_DATA_B<31>
RAM_CKE<2>
RAM_BA<1>
RAM_ADDR<2>
RAM_ADDR<11>
RAM_ADDR<8>
RAM_ADDR<6>
RAM_ADDR<0>
RAM_ADDR<4>
RAM_CS_L<3>
RAM_RAS_L
RAM_CAS_L
RAM_DATA_B<36>
RAM_DATA_B<37>
RAM_DQM_B<4>
RAM_DATA_B<38>
RAM_DATA_B<47>
RAM_DATA_B<46>
RAM_DATA_B<39>
RAM_DATA_B<44>
RAM_DQM_B<5>
RAM_DATA_B<45>
SYSCLK_DDRCLK_B1_L
SYSCLK_DDRCLK_B1
RAM_DATA_B<52>
RAM_DATA_B<53>
RAM_DATA_B<54>
RAM_DQM_B<6>
RAM_DATA_B<55>
RAM_DATA_B<60>
RAM_DATA_B<63>
RAM_DATA_B<61>
RAM_DQM_B<7>
RAM_DATA_B<62>
INT_I2C_CLK0
INT_I2C_DATA0
RAM_DATA_B<59>
RAM_DATA_B<58>
RAM_DATA_B<57>
RAM_DQS_B<7>
RAM_DATA_B<51>
RAM_DATA_B<56>
RAM_DQS_B<6>
RAM_DATA_B<50>
RAM_DATA_B<49>
RAM_DATA_B<48>
RAM_DATA_B<43>
RAM_DATA_B<42>
RAM_DQS_B<1>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DATA_B<3>
RAM_DATA_B<2>
RAM_DQS_B<0>
RAM_DATA_B<1>
RAM_DATA_B<0>
DDR_VREF
RAM_DATA_A<31>
RAM_DQM_A<2>
RAM_DATA_A<63>
DDR_VREF
RAM_DATA_A<0>
RAM_DATA_A<1>
RAM_DQS_A<0>
RAM_DATA_A<2>
RAM_DATA_A<8>
RAM_DATA_A<3>
RAM_DATA_A<9>
RAM_DATA_A<10>
RAM_DQS_A<1>
RAM_DATA_A<11>
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_A0
RAM_DATA_A<16>
RAM_DATA_A<17>
RAM_DQS_A<2>
RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<25>
RAM_DATA_A<24>
RAM_DQS_A<3>
RAM_DATA_A<26>
RAM_DATA_A<27>
RAM_CKE<1>
RAM_ADDR<12>
RAM_ADDR<9>
RAM_ADDR<7>
RAM_ADDR<3>
RAM_ADDR<5>
RAM_ADDR<1>
RAM_ADDR<10>
RAM_WE_L
RAM_BA<0>
RAM_CS_L<0>
RAM_DATA_A<33>
RAM_DATA_A<32>
RAM_DATA_A<34>
RAM_DQS_A<4>
RAM_DATA_A<40>
RAM_DATA_A<35>
RAM_DATA_A<41>
RAM_DATA_A<42>
RAM_DQS_A<5>
RAM_DATA_A<43>
RAM_DATA_A<48>
RAM_DATA_A<49>
RAM_DATA_A<50>
RAM_DQS_A<6>
RAM_DATA_A<51>
RAM_DATA_A<56>
RAM_DATA_A<57>
RAM_DQS_A<7>
RAM_DATA_A<58>
RAM_DATA_A<59>
INT_I2C_DATA0
INT_I2C_CLK0
DDR_VREF
RAM_DATA_A<4>
RAM_DATA_A<5>
RAM_DQM_A<0>
RAM_DATA_A<6>
RAM_DATA_A<12>
RAM_DATA_A<7>
RAM_DATA_A<13>
RAM_DQM_A<1>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DATA_A<20>
RAM_DATA_A<22>
RAM_DATA_A<23>
RAM_DATA_A<28>
RAM_DATA_A<29>
RAM_DQM_A<3>
RAM_DATA_A<30>
RAM_CKE<0>
RAM_ADDR<11>
RAM_ADDR<8>
RAM_ADDR<6>
RAM_ADDR<2>
RAM_ADDR<4>
RAM_ADDR<0>
RAM_BA<1>
RAM_CAS_L
RAM_RAS_L
RAM_CS_L<1>
RAM_DATA_A<37>
RAM_DATA_A<36>
RAM_DQM_A<4>
RAM_DATA_A<38>
RAM_DATA_A<44>
RAM_DATA_A<39>
RAM_DATA_A<45>
RAM_DQM_A<5>
RAM_DATA_A<46>
RAM_DATA_A<47>
SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_A1
RAM_DATA_A<52>
RAM_DATA_A<53>
RAM_DATA_A<54>
RAM_DQM_A<6>
RAM_DATA_A<55>
RAM_DATA_A<60>
RAM_DQM_A<7>
RAM_DATA_A<62>
RAM_DATA_A<61>
RAM_DATA_A<21>
DDR_VREF
RAM_DATA_B<40>
RAM_DATA_B<41>
RAM_DQS_B<5>
RAM_DATA_B<25>
RAM_DQS_B<3>
RAM_DATA_B<26>
RAM_DATA_B<27>
RAM_CKE<3>
RAM_ADDR<9>
RAM_ADDR<7>
RAM_ADDR<5>
RAM_ADDR<3>
RAM_ADDR<1>
RAM_ADDR<10>
RAM_BA<0>
RAM_CS_L<2>
RAM_WE_L
RAM_DATA_B<32>
RAM_DATA_B<33>
RAM_DQS_B<4>
RAM_DATA_B<34>
RAM_DATA_B<35>
RAM_ADDR<12>
RAM_DATA_B<10>
RAM_DATA_B<11>
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B0_L
RAM_DATA_B<16>
RAM_DATA_B<17>
RAM_DQS_B<2>
RAM_DATA_B<18>
RAM_DATA_B<24>
RAM_DATA_B<19>
39
39 39
39
36
36
36
36
36
36
36
36
36
23
23
36
36
36
36
36
36
36
36
36
23
23
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
11
11
11
11
11
11
11
36
11
11
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
13
13
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36
36
36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
11
11
11
11
11
11
11
11
11
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
13
13
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
11
11
11
11
11
11
11
11
11
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36
36
36
36
36
36
36
36
11
11
11
11
11
11
11
36
11
36
36
36
36
36
11
36
36
36
36
36
36
36
36
36
36
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
10
11
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
10
10
10
11
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
11
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
10
11
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
9
10
10
9
9
10
10
10
10
10
10
www.kythuatvitinh.com
(PLL4)VDD15A_6
(PLL4)VSSA_6
ROM_WE
ROM_OE
PCI_STOP
PCI_DEVSEL
PCI_CBE_3
PCI_CBE_2
PCI_CBE_1
PCI_CBE_0
ROM_CS
PCI_CLK_IN
PCI_CLK_OUT
PCI_CLK2
PCI_CLK1
PCI_CLK0
PCI_FRAME
PCI_PAR
PCI_TRDY
PCI_IRDY
PCI_REQ_2
PCI_REQ_1
PCI_REQ_0
PCI_GNT_0
PCI_GNT_1
PCI_GNT_2
PCI/ROMINTERFACE
PCIAD_31
PCIAD_30
PCIAD_28
PCIAD_27
PCIAD_26
PCIAD_25
PCIAD_29
PCIAD_19
PCIAD_18
PCIAD_17
PCIAD_16
PCIAD_15
PCIAD_23
PCIAD_24
PCIAD_20
PCIAD_21
PCIAD_22
PCIAD_14
(7 OF 9)
PCIAD_11
PCIAD_10
PCIAD_12
PCIAD_13
PCIAD_9
PCIAD_6
PCIAD_5
PCIAD_7
PCIAD_8
PCIAD_4
PCIAD_3
PCIAD_1
PCIAD_2
PCIAD_0
ROM_OVRLY_EN
VSSA_5(PLL5)
(PLL5)VDD15A_5
STP_AGP
AGPPVT
AGPVREF0
AGPVREF1
AGP_BUSY
AGP_CLK
AGP_FB_IN
AGP_FB_OUT
AGPAD0
AGPREQ
AGPGNT
AGP_SBA3
AGP_SBA2
AGP_SBA1
AGP_SBA0
AGPCBE_3
AGPFRAME
AGPTRDY
AGPIRDY
AGPSTOP
AGPDEVSEL
AGPPAR
AGPAD31
AGPAD30
AGPCBE_0
AGPCBE_1
AGPCBE_2
AGP_ST2
AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N
AGPPIPE
AGPRBF
AGP_ST1
AGP_SBA7
AGP_SB_STB_P
AGP_SB_STB_N
AGP_ST0
AGP_WBF
AGPINTERFACES
AGP_SBA6
AGP_SBA5
AGP_SBA4
AGPAD29
AGPAD28
AGPAD27
AGPAD26
AGPAD25
AGPAD24
AGPAD23
AGPAD22
AGPAD21
AGPAD20
AGPAD19
AGPAD18
AGPAD17
AGPAD16
AGPAD15
AGPAD14
AGPAD13
AGPAD12
AGPAD11
AGPAD10
AGPAD9
AGPAD8
AGPAD7
AGPAD6
AGPAD5
AGPAD4
AGPAD3
AGPAD2
AGPAD1
(3 OF 9)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ARE POWERED IN SLEEP+3V_MAIN BECAUSE THESE CHIPSUSB2 AND CBUS REQ REMAINS ON
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
PLACE CLOSE TO INTREPID SIDE
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPSSIMPLY PROVIDING REFERENCE TO CHIP
(PLACE CLOSE TO INTREPID AGP BALLS)
AGP I/O REFERENCE
OUTPUT IMPEDANCE IS ABOUT 20OHMNeed divider for 3.3V slot!
INTREPID AGP/PCI
AGP PULL-UPS/PULL DOWNS
Vin = Vcore (1.5V)
Vout = AGPIO (1.5V)
use 52-ohm a resistor here.NOTE: Designs using AGP slot should
PCI PULL-UPS
VOUT = 3.3V
VIN = 1.5V (CORE)
PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE
MF1/16W5%
4.7
402
21
R146
0
402
5%1/16WMF
21
R217
1%1/16WMF402
60.4
2
1R209
SM1
10K
5%1/16W
81
RP22
SM11/16W5%
10K81
RP20
SM11/16W5%
10K81
RP19 SM11/16W5%
10K72
RP19402
4.7
5%1/16WMF
21
R112
0.22UF
402
20%6.3VCERM 2
1C83
INTREPID-REV2.1BGA
CRITICAL
J10
J11
AN9
AK17
AR7
AM9
AT15
AR15
AT17
AR16
AR17
AT14
AH16
AN17
AN18
AT16
AN16
AM17
AM18
AJ19
AT18
AH18
AR18
AJ15
AM16
AK16
AR14
AR9
AK13
AH13
AN11
AT8
AN10
AM15
AN15
AJ8
AK14
AT13
AN14
AH15
AK15
AR13
AM11
AT12
AJ11
AR12
AK12
AM13
AN13
AT10
AT11
AK11
AN12
AM12
AR11
AT9
AR10
AR8
AM10
U45
33
402MF
1/16W5%
21
R192
33
402MF
1/16W5%
21
R147
MF1/16W5%
402
3321
R171
5%1/16WMF402
47
2
1R186
+3V_SLEEP
SM11/16W5%
10K81
RP18SM1
1/16W5%
10K63
RP17
SM11/16W
10K
5%
81
RP17
10K
5%1/16WSM1
72
RP17
SM11/16W5%
10K63
RP18
SM1
10K
5%1/16W
54
RP17
1/16W5%
10K
SM1
54
RP18
1/16W5%
10K
SM1
72
RP18
402MF
1/16W5%
2221
R77
402MF
1/16W5%
2221
R82
402MF
1/16W5%
2221
R103
33
402MF
1/16W5%
21
R169
NEC_USB
5%1/16WMF402
2221
R157
+3V_MAIN
10K
5%1/16WMF402
21
R187
5%
10K
1/16WMF402
21
R230
402MF
1/16W5%
10K21
R193
10K
5%1/16WMF402
21
R170402MF
1/16W5%
10K21
R194
5%
10K
1/16WMF402
21
R216
4.99K1%
1/16WMF4022
1R185
4.99K1%
1/16WMF4022
1R1800.22UF6.3V
402CERM
20%2
1 C247
10K
5%1/16WSM1
54
RP20
10K
5%1/16WSM1
72
RP22
1/16W5%
10K
SM1
72
RP20
SM1
10K
5%1/16W
63
RP19
10K
5%1/16WSM1
54
RP19
10K
5%1/16WSM1
63
RP20
10K
5%1/16WSM1
54
RP22
10K
5%1/16WSM1
63
RP22
INTREPID-REV2.1BGA
CRITICAL
V13
V14
AN19
AK30
AR30
AT30
AN29
AH25
AG25
AN30
AM30
AT31
AR31
AN31
AM31
AR32
AT32
AK25
AK27
AK28
AT19
AK21
AK22
AK20
AK19
AB21
AB20
AR29
AM28
AT33
AK24
AJ24
AJ29
AT29
AT28
AM29
AN28
AM27
AL25
AN24
AT23
AM20
AT22
AM21
AN21
AR21
AN20
AT21
AN27
AR28
AR20
AT27
AR27
AM26
AN26
AM25
AT26
AR26
AL24
AN25
AM24
AT20
AR25
AT25
AR24
AM23
AT24
AR23
AN23
AM22
AN22
AR22
AM19
AR19
U45
0.22UF
CERM6.3V20%
4022
1C160
B051-6531
12 44
CLK33M_CBUS_UF
CLK66M_GPU_AGP
CLK66M_GPU_AGP_UF
CLK33M_USB2 CLK33M_USB2_UF
INT_PCI_FB_IN
INT_PCI_FB_OUT
CLK33M_CBUS
CLK33M_AIRPORT
CLK33M_AIRPORT_UF
INT_ROM_RW_L
INT_ROM_CS_L
INT_ROM_OE_L
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_IRDY_L
PCI_PAR
CBUS_PCI_GNT_L
AIRPORT_PCI_GNT_L
USB2_PCI_GNT_L
USB2_PCI_REQ_L
CBUS_PCI_REQ_L
AIRPORT_PCI_REQ_L
+1_5V_INTREPID_PLL6
PCI_AD<30>
PCI_AD<31>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<19>
PCI_AD<21>
PCI_AD<20>
PCI_AD<17>
PCI_AD<18>
PCI_AD<15>
PCI_AD<14>
PCI_AD<16>
PCI_AD<12>
PCI_AD<13>
PCI_AD<9>
PCI_AD<11>
PCI_AD<10>
PCI_AD<7>
PCI_AD<8>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<2>
PCI_AD<1>
PCI_AD<3>
PCI_AD<0>
+1_5V_INTREPID_PLL
PCI_STOP_L
PCI_TRDY_L
PCI_IRDY_L
PCI_DEVSEL_L
PCI_FRAME_L
+1_5V_AGP
INT_AGPPVT
+1_5V_INTREPID_PLL5
AGP_SBA<1>
AGP_REQ_L
AGP_GNT_L
STOP_AGP_L
AGP_BUSY_L
INT_AGP_VREFAGP_AD<0>
AGP_AD<1>
AGP_AD<2>
AGP_AD<3>
AGP_AD<4>
AGP_AD<5>
AGP_AD<6>
AGP_AD<8>
AGP_AD<9>
AGP_AD<10>
AGP_AD<11>
AGP_AD<12>
AGP_AD<13>
AGP_AD<14>
AGP_AD<15>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<19>
AGP_AD<20>
AGP_AD<21>
AGP_AD<22>
AGP_AD<23>
AGP_AD<24>
AGP_AD<25>
AGP_AD<26>
AGP_AD<27>
AGP_AD<28>
AGP_AD<29>
AGP_AD<30>
AGP_AD<31>
AGP_AD<7>
AGP_CBE<0>
AGP_CBE<1>
AGP_CBE<2>
AGP_CBE<3>
AGP_PAR
AGP_FRAME_L
AGP_TRDY_L
AGP_IRDY_L
AGP_STOP_L
AGP_DEVSEL_L
AGP_SBA<0>
AGP_SBA<2>
AGP_SBA<3>
AGP_SBA<4>
AGP_SBA<5>
AGP_SBA<6>
AGP_SBA<7>
AGP_SB_STB
AGP_SB_STB_L
AGP_ST<0>
AGP_ST<2>
AGP_ST<1>
AGP_AD_STB<1>
AGP_AD_STB_L<1>
AGP_AD_STB<0>
AGP_AD_STB_L<0>
AGP_PIPE_L
AGP_RBF_L
AGP_WBF_L
+1_5V_INTREPID_PLL
AGP_BUSY_L
AGP_GNT_L
STOP_AGP_L
+3V_GPU
AGP_FRAME_L
AGP_REQ_L
AGP_DEVSEL_L
AGP_TRDY_L
AGP_RBF_L
AGP_PIPE_L
AGP_AD_STB<1>
AGP_AD_STB_L<0>
AGP_IRDY_L
AGP_WBF_L
AGP_STOP_L
AGP_AD_STB<0>
+1_5V_AGP
AGP_SB_STB
AGP_AD_STB_L<1>
AGP_SB_STB_L
CLK66M_AGP_15V_TP
INT_AGP_FB_IN
INT_AGP_FB_OUT
+1_5V_AGP
INT_AGP_VREF
ROM_CS_LINT_ROM_CS_L
ROM_OE_LINT_ROM_OE_L
ROM_RW_LINT_ROM_RW_L
AIRPORT_PCI_REQ_L
USB2_PCI_REQ_L
CBUS_PCI_REQ_L
38
38
38
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
21
21
21
39
39
39
39
37
37
37
37
37
39
37
37
37
37
37
37
37
37
39
39
37
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
19
19
19
37
37
37
37
26
26
26
26
26
37
26
26
26
26
26
26
26
26
37
37
26
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
38
26
26
26
26
26
18
38
38
18
18
39
26
26
26
26
24
24
24
24
24
26
39
24
24
24
24
24
24
24
24
26
26
24
26
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
14
24
24
24
24
24
16
37
37
38
37
37
37
37
37
37
37
37
37
37
37
37
14
37
21
37
37
37
37
37
37
37
37
37
37
16
37
37
37
16
38
39
39
39
39
36
36
36
36
24
24
24
24
17
17
17
17
17
24
39
26
17
24
17
17
17
17
17
17
17
17
24
24
17
24
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
12
17
17
17
17
17
15
37
18
18
18
18 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
18
18
18
18
18
37
37
37
37
37
37
37
18
18
18
18
18
18
18
18
12
18
18
19
18
18
18
18
18
18
18
18
18
18
18
15
18
18
18
15
18
24
24
24
24
26
17
36
18
36
26 36
36
36
17
24
36
12
12
12
17
17
17
17
12
12
12
12
12
17
17
24
26
12
12
12
38
9
9
9
9
9
9
9
9
17
17
9
17
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
8
12
12
12
12
12
12
38
18
12
12
12
12
12 18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
12
12
12
12
12
18
18
18
18
18
18
18
12
12
18
18
18
12
12
12
12
12
12
12
8
12
12
12
18
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
36
36
12
12
9 12
9 12
9 12
12
12
12
www.kythuatvitinh.com
CS_CE2
CS_CE1
CS_IORD
CS_IOWR
ATA_CS1
ATA_CS0
IDE
IDEINTRQ
IDECHRDY
IDECS0
IDECS1
IDEDMACKIDEDMARQ
IDERD
IDEWR
IDERST
IDEA9
IDEA8
IDEA7
IDEA6
IDEA5
IDEA4
IDEA3
IDEA2
IDEA1
IDEA0
IDEDD15
IDEDD14
IDEDD13
IDEDD12
IDEDD11
IDEDD10
IDEDD9
IDEDD8
IDEDD7
IDEDD6
IDEDD5
IDEDD4
IDEDD3
IDEDD2
IDEDD1
IDEDD0
CARDSLOT
CS_WAIT
CS_OE
CS_WE
ATA_INTRQ
ATA_DMARQ
ATA_CHRDY
ATA_DMACK
ATA_RD
ATA_WR
ATA_RST
ATA_VREF
UATA100
ATA_A1ATA_A2
ATA_A0
ATA_D12
ATA_D11
ATA_D15
ATA_D14
ATA_D13
ATA_D10
ATA_D9
ATA_D3
ATA_D2
ATA_D1
ATA_D0
ATA_D4
ATA_D8
ATA_D7
ATA_D6
ATA_D5
(5 OF 9)
IICDATA_1
IICCLK_1
IICCLK_0
IICDATA_0
TST_PLLEN
TST_MONOUT
TST_MONIN
TEI
TRSTN
TMS
TCK
TDO
TDI
TEST
MDC
GBE_REFCLK
MDIO
COL
CRS
GTX_CLK
RXD_6
RXD_4
RXD_5
RXD_3
RXD_7
RXD_2
RXD_1
RX_ER
RX_DV
RX_CLK
RXD_0
FW_PINT
FW_LINKON
FWR_LCLK
TX_ER
TX_EN
TX_CLK
TXD_0
RESET
PURESET
PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK
(4 OF 9)
MISCTXD_3
TXD_2
TXD_1
TXD_4
TXD_5
TXD_6
TXD_7
GB ETHERNET
FIREWIRE
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA5
PHY_DATA7
PHY_DATA4
PHY_DATA6
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
D1-RDD0-WR
6A-WR6B-RD
59-RD
A1-RD
ADDR
84-WR85-RD
A0-WR
A2-WRA3-RD
AE-WRAF-RD
BUS
LMU
(MAIN)
RAM - STANDARD
N/A
N/A
N/A
I2C-0
RAM - REVERSED
N/ABOOTBANG E2PROM
N/A
N/A
N/AFAN CONTROLLER
SNAPPER SOUND
N/A
N/A
N/A
N/A
N/A
N/A
(MAIN)
N/A
N/A
I2C-1
N/A
(SLEEP)
I2C-2
N/A
N/A
DASH MODEM
N/A N/A
N/A
N/A
N/A
(SLEEP)
N/A
00
0
00
0
0
1
0
0
JTG_RSTN_L
11
111
0(I)0(I)
1(I)1(I)1(I)
0(I) 1X
0
01(I)1(I)
1
0(I)
1(I)
EXTPLL
X
0
0
X
TST_TEI_H(I/O)
HWPLL_
0
1
SHUTDOWN(OUTPUT)
JTG_TDO_H
TESTSEL5
(OUTPUT)
(INPUT)
0(I)
X
(OUTPUT)
DDR_TPDENABLE
1
X
1
0(I)
1(I)
0
(I/O)JTG_TDI_H TST_PLLEN_H
MEMWE
X(I)X(I)
X(I)X(I)X(I)
ATPG IDDQ
POSTSCALAR BYPASS
POSTSCALAR BYPASS
PLL OUTPUTSSELECTED
SELECTEDPLL OUTPUTS
X(OUTPUT)
SYNC/MEM DATABYPASS
ANALYZER_CLK
JTAG MODEDESCRIPTION
VIEW PLLS (SOFTWARE)
NORMAL OPERATION
TEST TRI-STATE
VIEW PLLS (HARDWARE)
FUNCTIONAL TEST WITHOUT
FUNCTIONAL TEST IDDQ
FUNCTIONAL TEST WITH
UDMA - STOP
UDMA - HOSTDMARDY/HSTROBE
UDMA - DEVICEDMARDY/DSTROBE
NOT USING CARDSLOT INTERFACE
EIDE/I2CINT - ENET/FW/UATA
ENET_TXD SERIES TERMINATION
I2C PULL-UPS
TEST PULL-UPS/DOWNS
J20 - PG 12
J23 - PG 12
U37 - PG 23
U36 - PG 23
J9 - PG 25
0(I) ATPG NORMAL
58-WR
AD-RDAC-WR
ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES
U56 - PG 15
CLOCK SLEW SSCG
J12 - PG 24
U3 - PG 24
PMU
CS_WAIT IS AN INPUT
402MF
1/16W5%
1K21
R629
10K
5%1/16WSM1
81
RP16
10K
402MF
1/16W5%
21
R621
402MF1/16W5%10K
2
1R52
1/16W5%
SM1
2272
RP15
1/16W5%
SM1
2254
RP14
5%1/16WSM1
2263
RP14
1/16W5%
SM1
2281
RP14
1/16W5%
SM1
2272
RP14
5%1/16WSM1
2263
RP15
1/16W5%
SM1
2281
RP15
5%1/16WSM1
2254
RP15
+3V_MAIN
10K
MF1/16W5%
402
12
R117
+3V_MAIN
+3V_MAIN
402MF
1/16W5%
1K21
R626
SM11/16W5%
2.2K72
RP12
SM11/16W
2.2K
5%
81
RP12
SM11/16W5%
2.2K54
RP12
1/16W5%
SM1
2.2K63
RP12
1/16W5%
10K
SM1
63
RP16
SM1
10K
5%1/16W
72
RP16
1/16W5%
10K
SM1
54
RP16
1%1K1/16WMF4022
1R154
BGA
CRITICAL
INTREPID-REV2.1
AM2
AJ4
AL2
AA7
AH7
AG8
AE5
AE4
AG2
AD5
AH1
AF2
AG1
AF1
AJ2
AJ1
AG4
AD7
AH2
AF4
AD4
AC5
AM1
AB7
AK4
AG7
AF7
AH5
AK2
AL1
AH4
AG5
AK1
AE7
AF5
AE1
AE2
AC4
AD2
AB5
AB4
AD1
AA1
Y15
Y4
AA2
AA8
AC2
AC1
W8
W2
V1
W1
V2
V4
U2
U1
Y8
W7
Y1
Y2
W5
W4
T1
V5
AB2
AA4
AA5
Y7
AB1
Y5
U45
402
5%1/16WMF
8221
R51
402
82
MF1/16W5%
21
R92
BGAINTREPID-REV2.1
CRITICAL
A5
A7
H9
E10
D9
G10
B7
A6
D8
E9
H10
AR6
AK10
AM7
AN6
AR5
AH10
AT5
AK8
AP5
D2
C4
J12
E8
G9
D7
A4
B4
D6
E7
D3
U5
T2
M2
M1
N4
L2
K2
K1
N5
P7
M4
L4
L1
P5
B5
B6
AM3
AN1
AK5
AN2
H12
L13
N1
N2
T7
U14
E6
C5
U45
22
5%1/16WMF402
21
R145402MF
1/16W5%
2221
R34
402MF
1/16W5%
1021
R624 402MF
1/16W
10
5%
21
R630
402MF
1/16W5%
1021
R124
051-6531 B
13 44
JTAG_ASIC_TCK
JTAG_ASIC_TMS
JTAG_ENET_TDI
JTAG_ASIC_TDI
INT_TST_PLLEN_PD
INT_TST_MONIN_PD
JTAG_ASIC_TRST_L
INT_JTAG_TEI
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_CLK0
INT_I2C_DATA0
ENET_LINK_TXD<6>ENET_PHY_TXD<6>
ENET_LINK_TXD<7>ENET_PHY_TXD<7>
ENET_LINK_TXD<5>ENET_PHY_TXD<5>
ENET_LINK_TXD<2>ENET_PHY_TXD<2>
ENET_LINK_TXD<4>ENET_PHY_TXD<4>
ENET_LINK_TXD<3>ENET_PHY_TXD<3>
ENET_LINK_TXD<0>ENET_PHY_TXD<0>
ENET_LINK_TXD<1>ENET_PHY_TXD<1>
CLKENET_PHY_GTX CLKENET_LINK_GTX
INT_PU_RESET_L
INT_RESET_L
JTAG_ASIC_TDI
JTAG_ENET_TDI
JTAG_ASIC_TCK
JTAG_ASIC_TMS
JTAG_ASIC_TRST_L
INT_JTAG_TEI
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_DATA0
INT_I2C_CLK0
INT_TST_MONOUT_TP
INT_TST_PLLEN_PD
INT_TST_MONIN_PD
ENET_MDC
ENET_MDIO
ENET_COL
ENET_CRS
CLKENET_LINK_GBE_REF
ENET_LINK_RXD<7>
ENET_LINK_RXD<6>
ENET_LINK_RXD<5>
ENET_LINK_RXD<4>
ENET_LINK_RXD<2>
ENET_LINK_RXD<3>
ENET_LINK_RXD<1>
ENET_LINK_RXD<0>
ENET_RX_ER
ENET_RX_DV
CLKENET_LINK_RX
CLKFW_LINK_LCLK
FW_PINT
FW_LKON
ENET_LINK_TX_ER
CLKENET_LINK_TX
ENET_LINK_TX_EN
ENET_LINK_TXD<1>
ENET_LINK_TXD<0>
ENET_LINK_TXD<2>
ENET_LINK_TXD<3>
ENET_LINK_TXD<4>
ENET_LINK_TXD<6>
ENET_LINK_TXD<5>
ENET_LINK_TXD<7>FW_LINK_DATA<1>
FW_LINK_DATA<3>
FW_LINK_DATA<0>
FW_LINK_DATA<2>
FW_LINK_DATA<4>
FW_LINK_DATA<5>
FW_LINK_DATA<6>
FW_LINK_DATA<7>
FW_PHY_LPS
FW_LINK_CNTL<1>
FW_LINK_CNTL<0>
FW_LINK_LREQ
CLKFW_LINK_PCLK
ENET_PHY_TX_ER
ENET_PHY_TX_EN
CLKFW_PHY_LCLK
FW_PHY_LREQ
UIDE_REF
UIDE_CS1_L
UIDE_CS0_L
UIDE_IOCHRDY
UIDE_DMACK_L
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_RST_L
UIDE_ADDR<2>
UIDE_ADDR<1>
UIDE_ADDR<0>
UIDE_DATA<5>
UIDE_DATA<15>
UIDE_DATA<14>
UIDE_DATA<13>
UIDE_DATA<12>
UIDE_DATA<11>
UIDE_DATA<10>
UIDE_DATA<9>
UIDE_DATA<8>
UIDE_DATA<7>
UIDE_DATA<6>
UIDE_DATA<4>
UIDE_DATA<3>
UIDE_DATA<2>
UIDE_DATA<1>
UIDE_DATA<0>
EIDE_DATA<11>
EIDE_DATA<13>
EIDE_DATA<15>
EIDE_DATA<14>
EIDE_ADDR<0>
EIDE_ADDR<1>
EIDE_IOCHRDY
EIDE_ADDR<2>
EIDE_DATA<12>
EIDE_DATA<9>
EIDE_DATA<10>
EIDE_DATA<8>
EIDE_DATA<6>
EIDE_DATA<7>
EIDE_DATA<4>
EIDE_DATA<5>
EIDE_DATA<3>
EIDE_DATA<2>
EIDE_DATA<1>
EIDE_DATA<0>
EIDE_CS0_L
EIDE_CS1_L
EIDE_INT
EIDE_DMACK_L
EIDE_DMARQ
EIDE_WR_L
EIDE_RD_L
EIDE_RST_L
HD_DMARQ
UIDE_DMARQ
HD_INTRQUIDE_INTRQ
CSLOT_IOWAIT_L_PU
CSLOT_WE_L_SPN
CSLOT_OE_L_SPN
CSLOT_IOWR_L_SPN
CSLOT_IORD_L_SPN
CSLOT_CE2_L_SPN
CSLOT_CE1_L_SPN
CSLOT_ADDR9_SPN
CSLOT_ADDR8_SPN
CSLOT_ADDR7_SPN
CSLOT_ADDR6_SPN
CSLOT_ADDR5_SPN
CSLOT_ADDR4_SPN
CSLOT_ADDR3_SPN
39
39
39
39
39
39
39
39
39
39
39
25
25
23
23
39
39
39
25
25
23
23
27
27
27
39
27
14
14
13
13
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
36
30
30
39
27
27
27
27
14
14
13
13
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
36
37
36
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
36
37
37
36
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
13
13
13
13
13
13
13
13
13
13
11
11
13 27
13 27
13 27
13 27
13 27
13 27
13 27
13 27
27 36
25
9
13
13
13
13
13
13
13
13
11
11
13
13
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
36
28
28
37
27
37
13
13
13
13
13
13
13
13 28
28
28
28
28
28
28
28
28
28
28
37
28
27
27
28
28
38
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
37
24 37
www.kythuatvitinh.com
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VSSA_8
VSSA4
VSSA3
VSSA2
VSSA1
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VDD15A_8
VDD15A_4
VDD15A_3
VDD15A_2
VDD15A_1
CPU_INT
PCIPME
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
GPIO16
GPIO15
GPIO12
GPIO11
GPIO9
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSSU_2
VDDU33_2
VDDU33_1
(6 OF 9)
SCCRTSA
SCCTXDA
SCCDTRA
SCCRXDA
SCCGPIOA
SCCTRXCA
SCCTXDB
SCCGPIOB
SCCTRXCB
SCCRXDB
SCCRTSB
PURPOSEGENERAL
I/O’S
EXTINT8
EXTINT7
EXTINT6
EXTINT0
INTERRUPTS
EXTINT11
EXTINT4
EXTINT5
EXTINT10
EXTINT9
EXTINT3
EXTINT2
EXTINT1
AUD_DTO
AUD_DTI
AUD_SYNC
MOD_DTO
AUD_BITCLK
AUD_CLKOUT
IICCLK_2
MOD_SYNC
MOD_DTI
MOD_CLKOUT
IICDATA_2
MOD_BITCLK
IIC
AUDIO/I2S
CLOCKS
XTAL_OUT
PROCSLEEPREQ
PENDPROCINT
XTAL_IN
SS_REF_CLK_IN
BUF_REF_CLK_OUT
STOPXTAL
WATCHDOG
PCI_
PCI_
PCI_
VSSU_1
PCI_
USB_VD0_P
USB_VD0_N
USB_VD1_P
USB_VD1_N
USB_VD2_N
USB_VD2_P
USB_PWRFLT0
USB_PRTPWR0
USB_VD3_N
USB_VD3_P
USB
USB_PRTPWR1
USB_PWRFLT1
USB_VD4_N
USB_VD4_P
USB_VD5_N
USB_VD5_P
USB_PRTPWR2
USB_PWRFLT2
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
CPU0
VDDA
VDD0
VDD1
VDDC
VDDQ
VSS1
VSS0
VSSA
VSSC
VSSQ
LOCK
ODSEL
PD*
SDATA
SCLK
FSEL
CLKIN
RESET*
ADDRSEL
TABLE_5_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
CRYSTAL LOAD CAPACITANCE IS 16PF
INTERNAL 250K PULL-DOWN
INT - USB/GPIOS/I2S
BRIGHTNESS PWM
CONTRAST PWM
USB POWER FAULT SIGNALS
OTHERWISE A LOT OF OVERSHOOT/UNDERSHOOT
5TESTMUXSELHWPLL_
MOD_DTO_B_H
MOD_SYNC_B_H
10
234
SIGNAL NAME
MOD_BITCLK_B_H
MOD_CLKOUT_B_H
MOD_DTI_B_H
JTG_TDO_H
INTERNAL 250K PULL-UPFAN PWM
POWERBOOK SPARE
MISO
REQ*
MOSI
ACK*
SCK
VIA
USB PORT ASSIGNMENTS
VGATE/LOCK INTERRUPT
VCORE_A/B SEL
OPEN-DRAIN OUTPUT
PLACE R68 CLOSE TO INTREPID SIDE
OUTPUT IMPEDANCE ~18-20OHMINTERNAL 250K PULL-UP
PORT A - RIGHT USB 1
NC
NC
PORT E - BLUETOOTH
PORT F - MODEM
PORT C - LEFT USB
PORT D - UNUSED
CBUS_IREQ_L
PORT B - UNUSED
+3V_MAIN
10UF
CERM805
20%6.3V2
1 C97
5%1/16WMF402
100K21
R111
+3V_MAIN
0.1UF
CERM
20%10V
4022
1 C850.01UF20%
CERM16V
4022
1 C84
402
22
1/16WMF
5%
21
R50402
22
5%
MF1/16W
21
R67
402
22
5%
MF1/16W
21
R91
47
5%1/16WSM1
72
RP8
1/16WSM1
5%
4763
RP8
47
5%1/16WSM1
54
RP8
47
SM11/16W5%
81
RP8
402
22
1/16WMF
5%
21
R90
INTREPID-REV2.1BGA
CRITICAL
V15
U4
AT7
R8
R9
AH29
AK18
AJ16
AJ13
AA15
U8
T8
AG29
P8
N8
K5
L5
M7
M8
H2
H1
G2
G1
L8
L7
N7
J1
K4
M5
J2
J4
AN7
K9
AR4
AF9
AM5
AT4
AG10
AG11
AL5
AN3
AP4
AG9
AF10
AT6
AN8
AJ18
AJ17
AJ12
AA16
AJ7
R1
R2
T4
P1
V8
AH8
AL4
H4
L9
H5
J8
F2
J7
K7
F1
K8
J5
E1
G5
C32
D31
G30
E31
A33
B33
D34
C33
G4
H7
E2
D1
F4
J9
E30
B32
E34
F33
D30
U15
T5
R4
R7
R5
P2
U45
+3V_SLEEP
INTREPID_USB
402MF
1/16W5%
2421
R614
402
1/16WMF
5%15K
2
1R115
INTREPID_USB
24
5%1/16WMF402
21
R609
24
5%1/16WMF402
INTREPID_USB
21
R89
402MF
1/16W5%
24
INTREPID_USB
21
R80
0.22UF
CERM6.3V20%
4022
1C198402
4.7
5%1/16WMF
21
R1550.22UF
CERM6.3V20%
4022
1C148 MF1/16W5%
4.7
402
21
R1250.22UF
CERM6.3V20%
4022
1C182
4.7
MF1/16W5%
402
21
R156
0.22UF
CERM6.3V20%
4022
1C353
402
5%1/16W
MF
15K
2
1R114
0.22UF
CERM6.3V20%
4022
1C200
MF1/16W5%
402
4.721
R244
MF1/16W5%
4.7
402
21
R168
18.432M
CRITICAL
8X4.5MM-SM
21
Y1
1/16W
10M
MF
5%
402
NO STUFF
2 1
R622
22PF
402CERM
5%50V
2
1 C140
402CERM50V5%
22PF
2
1C15
1/16W
NO STUFF
402
0
5%
MF
21
R49
U.FL-R_SMTF-ST-SM
NO STUFF
CRITICAL
1
2
3
J1
402
NO STUFF
5%511/16WMF
2
1R280
402MF1/16W5%
2
1R632
1UF
603CERM10V20%
2
1C433
402
68.1K1%
1/16WMF
2
1R277
402
15.8K1%
1/16WMF
2
1R278
10UF
805
20%6.3VCERM2
1 C419603
5%1/16W
0
MF
NO STUFF
21
R291
5%1/16WMF603
021
R264
+2_5V_MAIN
+1_8V_MAIN
LT1962-ADJMSOP
CRITICAL
5
1
7
6
8
4
3
2
U7
CERM
0.01UF
402
20%16V
2
1C424
402
5%1/16WMF
10K12
R7
402
10K
MF1/16W5%
12
R113
402
5%1/16WMF
1K
1
2R29
402
5%1/16WMF
1K
1
2R102
10K
5%1/16WSM1
36
RP48
10K
5%1/16WSM1
45
RP7
10K
5%1/16WSM1
27
RP46
10K
5%1/16WSM1
18
RP46
5%1/16WSM1
10K18
RP47
SM1
10K
1/16W5%
36
RP47
5%1/16WSM1
10K81
RP7
SM1
5%1/16W
10K27
RP47
5%1/16WSM1
10K81
RP48
10K
SM11/16W5%
54
RP6
SM1
5%1/16W
10K72
RP29
5%1/16WSM1
10K54
RP29
5%1/16WSM1
10K72
RP51
SM1
5%1/16W
10K45
RP47
5%1/16W
10K
SM1
63
RP46
10K
SM11/16W5%
54
RP51
10K
1/16W5%
SM1
81
RP51
10K
SM11/16W5%
81
RP29
5%1/16WSM1
10K81
RP1
10K
SM11/16W5%
72
RP6
SM1
10K
1/16W5%
54
RP48
10K
SM11/16W5%
63
RP6
10K
SM11/16W5%
72
RP48
5%1/16W
10K
SM1
63
RP29
5%1/16W
10K
SM1
81
RP24
5%1/16W
10K
SM1
63
RP7
5%1/16W
10K
SM1
81
RP6
75
SSCG
MF1/16W5%
4021
2R100
10K
1/16W5%
SM1
54
RP46
5%
10K
1/16WSM1
54
RP1
5%
SM11/16W
10K63
RP1
SM1
5%1/16W
10K72
RP1
SSCG
MF1/16W
0
402
5%
21
R636
1/16W5%10K
402MF
2
1R6380.1UF
SSCG
20%10VCERM402
2
1 C6911UF
603
20%10VCERM
SSCG
2
1 C692
CERM
0.1UF
402
10V20%
SSCG
2
1C698SSCG
SM-1400-OHM-EMI
2
1
L22
+3V_MAIN
400-OHM-EMISM-1
SSCG
2
1
L18
0.1UF
SSCG
402CERM10V20%
2
1 C686
+2_5V_MAIN
402
SSCG
MF1/16W
0
5%
21
R281
NO STUFF
402
10K5%1/16WMF
2
1R656
10K
MF
5%
402
1/16W
NO STUFF
2
1R682
10K
1/16W5%
SM1
63
RP51
CRITICAL
TSSOPSSCG
CY28512D
156
11
197
18
512
10
1
8
9
17
13
4
2
3
1620
14
U42 SSCG
5%
33
402MF
1/16W
21
R634
402
10K
SSCG
1/16W5%
MF2
1R6255%0
MF402
1/16W
NO STUFF
2
1R631
+3V_SLEEP
47
1/16WSM1
5%
72
RP56
1/16W5%
47
SM1
63
RP56
MOD_BITCLK47
5%
SM11/16W
81
RP56
SM11/16W5%
4754
RP56
NEC_USB
5%10K1/16WMF4022
1R701NEC_USB
402MF1/16W5%10K
2
1R708
NEC_USB
402MF1/16W
10K5%
2
1R699NEC_USB
5%10K1/16WMF4022
1R707
0
5%1/16WMF402
21
R698
402MF
1/16W5%
10K21
R720
FERR-EMI-100-OHMSM
1
2
L1
R100RES,METAL FILM,10 K OHM,5,1/16W,0402,SM NO_SSCG116S1104 1
B051-6531
14 44Y1 ALT FOR SIWARD197S0035197S0004
CLK18M_INT_EXT
INT_I2C_CLK1
+2_5V_CG_MAINFW_PHY_PD FW_PHY_PD_INT
SND_HP_MUTE_L
COMM_RESET_L
COMM_RING_DET_L
AGP_INT_L
USB_DAP
USB_DAM
USB_DBM
USB_DCP
USB_D2M
USB_D2P
USB_DBP
USB_DCM USB_D1M
USB_D1P
USB_DDM
USB_DDP
USB_DFM
USB_DFP
USB_DEM BT_USB_DM
USB_DEP BT_USB_DP
MODEM_USB_DM
MODEM_USB_DP
USB_OC_AB_L
INT_I2C_CLK2
INT_I2C_DATA2
+3V_CG_PLL_MAIN
LTC1962_INT_VIN
INT_I2C_DATA1
INT_REF_CLK_OUTCG_CLKOUT
VCORE_VGATE
VCORE_VGATE INT_EXTINT10_PU
LT1962_INT_BYP
LT1962_INT_ADJ
+3V_INTREPID_USB
+1_5V_INTREPID_PLL2
+1_5V_INTREPID_PLL3
+1_5V_INTREPID_PLL1
COMM_TXD_L
COMM_RTS_L
COMM_GPIO_L
COMM_DTR_L
PMU_FROM_INT
PMU_ACK_L
PMU_REQ_L
INT_GPIO12_PU
SND_HW_RESET_L
INT_GPIO9_PU
PMU_INT_L
INT_EXTINT3_PU
SND_LIN_SENSE_L
CBUS_INT_L
AIRPORT_PCI_INT_L
ENET_ENERGY_DET
PMU_INT_NMI
INT_EXTINT11_PU
INT_PROC_SLEEP_REQ_L
INT_PEND_PROC_INT
SYSTEM_CLK_EN
INT_WATCHDOG_L
INT_REF_CLK_OUT
INT_REF_CLK_IN
COMM_TRXC
COMM_RXD
PMU_CLK
PMU_TO_INT
USB_DAM
USB_DAP
USB_DCM
USB_PWREN_AB_L
USB_DDP
USB_DDM
USB_PWREN_CD_L
USB_DEP
USB_DEM
USB_DFP
SND_AMP_MUTE_L
INT_GPIO15_PU
INT_ENET_RST_L
PMU_PME_L
MPIC_CPU_INT_L
SND_HP_SENSE_L
USB2_PCI_INT_L
INT_EXTINT16_PU
INT_EXTINT14_PU
INT_EXTINT13_PU
INT_EXTINT12_PU
CLK18M_XTAL_IN
CLK18M_INT_XOUT
+1_5V_INTREPID_PLL8
+1_5V_INTREPID_PLL4
SND_TO_AUDIO
USB_DCP
USB_DBM
USB_PWREN_EF_L
USB_DFM
USB_OC_CD_L
INT_AUDIO_TO_SND
INT_MOD_DTI
USB_OC_EF_L
MOD_DTO
MOD_CLKOUT
MOD_SYNC
SND_CLKOUT
INT_SND_CLKOUT
INT_SND_SCLK
INT_SND_TO_AUDIO
INT_SND_SYNC
SND_SCLK
+1_5V_INTREPID_PLL
CG_LOCK
INT_EXTINT8_PU
USB_DBP
INT_GPIO1_PU
CG_FSEL
INT_REF_CLK_IN
MAIN_RESET_L
AIRPORT_PCI_INT_L
USB_PWREN_EF_L
USB_OC_AB_L
USB_OC_EF_L
USB_PWREN_CD_L
USB_PWREN_AB_L
USB2_PCI_INT_L
INT_EXTINT8_PU
COMM_RING_DET_L
USB_OC_CD_L
INT_EXTINT14_PU
INT_GPIO1_PU
INT_GPIO15_PU
INT_MOD_CLKOUT_UF
CBUS_INT_L
PMU_REQ_L
INT_GPIO12_PU
PMU_INT_L
PMU_INT_NMI
INT_MOD_DTO_UF
INT_EXTINT3_PU
INT_EXTINT13_PU
INT_EXTINT11_PU
INT_EXTINT16_PU
INT_EXTINT10_PU
INT_GPIO9_PU
INT_MOD_DTI_UF
INT_MOD_BITCLK_UF
COMM_SHUTDOWN
CG_RESET_L
FW_PHY_PD_INT
INT_MOD_SYNC_UF
INT_MOD_SYNC_UF
SND_SYNC
INT_MOD_CLKOUT_UF
INT_MOD_BITCLK_UF
INT_MOD_DTO_UF
SND_HW_RESET_L
CG_ADDRSEL
CG_FSEL
SYSTEM_CLK_EN
CLK18M_INT_XIN
INT_EXTINT12_PU
39 30 26
39
24
39
39
30
39
39
39
39
39
38
38
39
39
39
39
38
20
39
30
39
39
25
39
25
26
26
26
26
37
37
37 37
37 37
37
37
39
39
25
36
34
34
39
39
39
39
30
25
30
39
17
24
30
30
36
36
39
39
26
26
26
37
37
37
30
39
26
39
26
37
39
39
39
39
39
36
36
12
34
36
18
24
26
25
34
17
30
30
30
39
39
25
30
25
36
13
38
28 14
25
25
14
18
14
14
14
14
26
26
14
14 26
26
14
14
14
14
14 24
14 24
25
25
14
25
25
38
38
13
14
14
14 14
38
38
38
38
25
25
25
25
30
30
14
14
14
14
14
14
25
14
14
27
14
14
30
30
14
30
14
14
25
25
30
30
14
14
14
14
14
14
14
14
14
14
25
14
27
26
5
25
14
14
14
14
14
36
36
38
38
25
14
14
14
14
14
25
25
14
25
25
25
25
25
8
14
14
14
14
14
17
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
25
14
14
14
25
14
14
14
14
14
14
36
14
www.kythuatvitinh.com
POWER/GROUND
VSS
(8 OF 9)
VDD2.5
VSS
VDD1.8/CPUVIO
GROUND
POWER
(9 OF 9)
VDD1.5
AGP_IO_VDD
VDD3.3
AGP_IO_VSS
VSS
VSS
VDD3.3
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Intrepid Power
INTREPID-REV2.1BGA
M34
M32
M31
M3
M28
M24
M21
M20
M18
M17
M14
L24
J6
J34
J31
J3
G7
F6
F34
F31
F3
F28
F25
F22
F19
F16
F13
F10
D4
D33
C7
C36
C34
C31
C3
C28
C25
C22
C19
C16
C13
C10
C1
B35
B2
AT34
AT3
AR35
AR2
AP9
AP6
AP36
AP34
AP33
AP30
AP3
AP27
AP24
AP21
AP18
AP15
AP12
AP1
AN4
AN33
U16
U10
T27
T24
T23
T14
T11
R6
R34
R31
R3
R29
R26
R24
R23
R21
R19
R18
R16
R14
P4
P29
P22
P17
P12
N25
N15
M9
M6
AE31
AC28
AC27
AC25
AB34
E33
Y29
Y27
W34
AB31
W31
W25
V29
V25
U28
U25
T34
T31
T29
T28
AB27
T25
R27
R25
P28
P25
N36
N34
N31
N28
K34
AB25
K31
G34
G31
C35
AP35
AK34
AH34
AH30
AF28
AE34
AA29
AA25
F12
C9
C30
C27
C24
C21
C18
P19
P16
N23
N21
N18
C15
M23
M22
M19
M16
M15
F27
F24
F21
F18
F15
C12
U45
INTREPID-REV2.1BGA
AE21
AE19
AE18
AE16
AE14
AD6
AL9
AL6
AL34
AL31
AL27
AD34
AL21
AL18
AL15
AL12
AK7
AK3
AH27
AH23
AH21
AD31
AH20
AG6
AG34
AG30
Y25
Y24
Y23
Y19
Y16
AG3
Y14
Y12
Y11
W26
W23
W14
W11
V6
V34
V31
AG24
V3
V24
V21
V18
V17
V12
V10
U29
U27
U22
AG23
U19
AG21
AE28
AE22
AD3
AD28
G3
F9
F7
F30
E4
B34
D5
D32
C6
C2
B3
AR3
AC13
AP7
AP2
W6
W3
W13
W12
U12
T6
T3
T18
AC12
T12
R22
P14
P13
N6
N3
N24
K6
K3
AP16
AB6
AP13
AP10
AN5
AM4
AL7
AL3
AL16
AL13
AL10
AK6
AB3
AH6
AH3
AF25
AE6
AE3
AE17
AE15
AD21
AC14
G6
AA12
AA11
AD13
AC23
AC19
AC17
AB19
AB17
AB15
Y18
Y13
W24
W16
V22
V20
V19
V16
U24
U18
AB13
U17
T13
R20
R17
P21
P20
P18
P15
AD22
AD15
AA24
AA21
AA6
AA34
AA31
AA3
AA27
AA20
A34
AD25
AD23
AD12
AC26
AC22
AC20
AC18
AC16
A3
AC15
AC11
AB29
AB28
AB24
AB18
AB16
AB14
AB12
AB11
AL19
AJ23
AJ21
AH28
AH22
AH19
AF22
AR34
AE23
AR33
AP31
AP28
AP25
AP22
AP19
AN32
AL30
AL28
AL22
AE20
AD20
U45
+1_5V_MAIN +3V_MAIN
+2_5V_MAIN
0
FF805
5%1/10W
2
1R287NO STUFF
805FF1/10W5%0
2
1R399
+2_5V_SLEEP
B051-6531
4415
+1_5V_AGP
MAXBUS_SLEEP+2_5V_INTREPID
38
38
34
21
23
19
16
38
18
8
16
16
7
10
12
5
9
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
29 X 0.22UF (0402)
Intrepid Decoupling
24 Balls 4 X 10UF (0805) 4 X 10UF (0805)
30 Balls
4 X 10UF (0805)57 Balls
4 X 10UF (0805)51 X 0.22UF (0402)
44 Balls
32 X 0.22UF (0402)
72 X 0.22UF (0402)
INTREPID DDR DECOUPLING
INTREPID MAXBUS DECOUPLING
24 X 0.22UF (0402) 4 X 10UF (0805)21 Balls
INTREPID AGP I/O DECOUPLING
INTREPID CORE DECOUPLING
INTREPID 3.3V DECOUPLING
402CERM6.3V20%0.22uF
2
1 C240
402CERM6.3V20%0.22uF
2
1 C239
0.22uF20%6.3VCERM402
2
1 C174
402CERM6.3V20%0.22uF
2
1 C206
10uF20%
6.3VCERM805
2
1C348
805CERM6.3V20%
10uF
2
1C2040.22uF20%6.3VCERM402
2
1 C350
0.22uF20%6.3VCERM402
2
1 C259
0.22uF20%6.3VCERM402
2
1 C312
0.22uF20%6.3VCERM402
2
1 C237
0.22uF20%6.3VCERM402
2
1 C176
0.22uF20%6.3VCERM402
2
1 C238
0.22uF20%6.3VCERM402
2
1 C288
0.22uF20%6.3VCERM402
2
1 C95
0.22uF20%6.3VCERM402
2
1 C313
0.22uF20%6.3VCERM402
2
1 C117
0.22uF20%6.3VCERM402
2
1 C94
0.22uF20%6.3VCERM402
2
1 C241
402CERM6.3V20%0.22uF
2
1 C226
402CERM6.3V20%0.22uF
2
1 C1750.22uF20%6.3VCERM402
2
1 C171
402CERM6.3V20%0.22uF
2
1 C173
805CERM6.3V20%
10uF
2
1C19610uF
20%6.3VCERM805
2
1C236
0.22uF20%6.3VCERM402
2
1 C3200.22uF20%6.3VCERM402
2
1 C370
0.22uF20%6.3VCERM402
2
1 C392
402CERM6.3V20%0.22uF
2
1 C294
0.22uF20%6.3VCERM402
2
1 C322
402CERM6.3V20%0.22uF
2
1 C384
0.22uF20%6.3VCERM402
2
1 C390
0.22uF20%6.3VCERM402
2
1 C352
402CERM6.3V20%0.22uF
2
1 C369
0.22uF20%6.3VCERM402
2
1 C4800.22uF20%6.3VCERM402
2
1 C317
0.22uF20%6.3VCERM402
2
1 C291
402CERM6.3V20%0.22uF
2
1 C335
0.22uF20%6.3VCERM402
2
1 C403
402CERM6.3V20%0.22uF
2
1 C410
0.22uF20%6.3VCERM402
2
1 C310
402CERM6.3V20%0.22uF
2
1 C391
0.22uF20%6.3VCERM402
2
1 C295
402CERM6.3V20%0.22uF
2
1 C399
402CERM6.3V20%0.22uF
2
1 C292
0.22uF20%6.3VCERM402
2
1 C318
402CERM6.3V20%0.22uF
2
1 C407
0.22uF20%6.3VCERM402
2
1 C367
402CERM6.3V20%0.22uF
2
1 C321
10uF20%
6.3VCERM805
2
1C417
805CERM6.3V20%
10uF
2
1C423
805CERM6.3V20%
10uF
2
1C422
10uF20%
6.3VCERM805
2
1C418
0.22uF20%6.3VCERM402
2
1 C3890.22uF20%6.3VCERM402
2
1 C3540.22uF20%6.3VCERM402
2
1 C4010.22uF20%6.3VCERM402
2
1 C3870.22uF20%6.3VCERM402
2
1 C289
0.22uF20%6.3VCERM402
2
1 C397
0.22uF20%6.3VCERM402
2
1 C386
0.22uF20%6.3VCERM402
2
1 C402
402CERM6.3V20%0.22uF
2
1 C400
402CERM6.3V20%0.22uF
2
1 C290
402CERM6.3V20%0.22uF
2
1 C404
0.22uF20%6.3VCERM402
2
1 C337
0.22uF20%6.3VCERM402
2
1 C298
0.22uF20%6.3VCERM402
2
1 C39320%0.22uF6.3VCERM402
2
1 C325
0.22uF20%6.3VCERM402
2
1 C267
0.22uF20%6.3VCERM402
2
1 C229
0.22uF20%6.3VCERM402
2
1 C3550.22uF20%6.3VCERM402
2
1 C217
0.22uF20%6.3VCERM402
2
1 C3570.22uF20%6.3VCERM402
2
1 C378
0.22uF20%6.3VCERM402
2
1 C2500.22uF20%6.3VCERM402
2
1 C268
402CERM6.3V20%0.22uF
2
1 C297
0.22uF20%6.3VCERM402
2
1 C265
402CERM6.3V20%0.22uF
2
1 C249
402CERM6.3V20%0.22uF
2
1 C230
0.22uF20%6.3VCERM402
2
1 C266
402CERM6.3V20%0.22uF
2
1 C356
0.22uF20%6.3VCERM402
2
1 C228
402CERM6.3V20%0.22uF
2
1 C251
10uF20%
6.3VCERM805
2
1C231
805CERM6.3V20%
10uF
2
1C394
805CERM6.3V20%
10uF
2
1C371
10uF20%
6.3VCERM805
2
1C281
402CERM6.3V20%0.22uF
2
1 C215
402CERM6.3V20%0.22uF
2
1 C142
402CERM6.3V20%0.22uF
2
1 C162
402CERM6.3V20%0.22uF
2
1 C208
402CERM6.3V20%0.22uF
2
1 C161
402CERM6.3V20%0.22uF
2
1 C197
402CERM6.3V20%0.22uF
2
1 C181
402CERM6.3V20%0.22uF
2
1 C159
402CERM6.3V20%0.22uF
2
1 C213
402CERM6.3V20%0.22uF
2
1 C227
402CERM6.3V20%0.22uF
2
1 C242
402CERM6.3V20%0.22uF
2
1 C177
402CERM6.3V20%0.22uF
2
1 C180
402CERM6.3V20%0.22uF
2
1 C179
402CERM6.3V20%0.22uF
2
1 C263
402CERM6.3V20%0.22uF
2
1 C2620.22uF20%6.3VCERM402
2
1 C243
402CERM6.3V20%0.22uF
2
1 C178
402CERM6.3V20%0.22uF
2
1 C211
0.22uF20%6.3VCERM402
2
1 C212
0.22uF20%6.3VCERM402
2
1 C246
0.22uF20%6.3VCERM402
2
1 C147
402CERM6.3V20%0.22uF
2
1 C244
402CERM6.3V20%0.22uF
2
1 C144
805CERM6.3V20%
10uF
2
1C101
10uF20%
6.3VCERM805
2
1C315
10uF20%
6.3VCERM805
2
1C128
805CERM6.3V20%
10uF
2
1C157
402CERM6.3V20%0.22uF
2
1 C143
402CERM6.3V20%0.22uF
2
1 C31
402CERM6.3V20%0.22uF
2
1 C21
402CERM6.3V20%0.22uF
2
1 C42
402CERM6.3V20%0.22uF
2
1 C530.22uF20%6.3VCERM402
2
1 C351
402CERM6.3V20%0.22uF
2
1 C199
402CERM6.3V20%0.22uF
2
1 C52
0.22uF20%6.3VCERM402
2
1 C277
0.22uF20%6.3VCERM402
2
1 C96
0.22uF20%6.3VCERM402
2
1 C76
0.22uF20%6.3VCERM402
2
1 C145
402CERM6.3V20%0.22uF
2
1 C60
0.22uF20%6.3VCERM402
2
1 C45
0.22uF20%6.3VCERM402
2
1 C30
0.22uF20%6.3VCERM402
2
1 C1090.22uF20%6.3VCERM402
2
1 C980.22uF20%6.3VCERM402
2
1 C126
402CERM6.3V20%0.22uF
2
1 C261
402CERM6.3V20%0.22uF
2
1 C35
0.22uF20%6.3VCERM402
2
1 C125
0.22uF20%6.3VCERM402
2
1 C141
0.22uF20%6.3VCERM402
2
1 C32
0.22uF20%6.3VCERM402
2
1 C146
402CERM6.3V20%0.22uF
2
1 C430.22uF20%6.3VCERM402
2
1 C184
0.22uF20%6.3VCERM402
2
1 C55
0.22uF20%6.3VCERM402
2
1 C120
402CERM6.3V20%0.22uF
2
1 C108
402CERM6.3V20%0.22uF
2
1 C23
0.22uF20%6.3VCERM402
2
1 C1630.22uF20%6.3VCERM402
2
1 C590.22uF20%6.3VCERM402
2
1 C51
402CERM6.3V20%0.22uF
2
1 C122
0.22uF20%6.3VCERM402
2
1 C375
805CERM6.3V20%
10uF
2
1C39510uF
20%6.3VCERM805
2
1C164
402CERM6.3V20%0.22uF
2
1 C33
0.22uF20%6.3VCERM402
2
1 C16
402CERM6.3V20%0.22uF
2
1 C34
10uF20%
6.3VCERM805
2
1C9
805CERM6.3V20%
10uF
2
1C10
0.22uF20%6.3VCERM402
2
1 C75
0.22uF20%6.3VCERM402
2
1 C440.22uF20%6.3VCERM402
2
1 C610.22uF20%6.3VCERM402
2
1 C200.22uF20%6.3VCERM402
2
1 C220.22uF20%6.3VCERM402
2
1 C580.22uF20%6.3VCERM402
2
1 C210
402CERM6.3V20%0.22uF
2
1 C248
402CERM6.3V20%0.22uF
2
1 C1240.22uF20%6.3VCERM402
2
1 C3960.22uF20%6.3VCERM402
2
1 C990.22uF20%6.3VCERM402
2
1 C170.22uF20%6.3VCERM402
2
1 C36
402CERM6.3V20%0.22uF
2
1 C18
402CERM6.3V20%0.22uF
2
1 C296
402CERM6.3V20%0.22uF
2
1 C183
0.22uF20%6.3VCERM402
2
1 C214
0.22uF20%6.3VCERM402
2
1 C280
0.22uF20%6.3VCERM402
2
1 C278
402CERM6.3V20%0.22uF
2
1 C279
0.22uF20%6.3VCERM402
2
1 C264
0.22uF20%6.3VCERM402
2
1 C1210.22uF20%6.3VCERM402
2
1 C123
0.22uF20%6.3VCERM402
2
1 C190.22uF20%6.3VCERM402
2
1 C57
0.22uF20%6.3VCERM402
2
1 C26
402CERM6.3V20%0.22uF
2
1 C28
0.22uF20%6.3VCERM402
2
1 C500.22uF20%6.3VCERM402
2
1 C54
0.22uF20%6.3VCERM402
2
1 C270.22uF20%6.3VCERM402
2
1 C56
0.22uF20%6.3VCERM402
2
1 C24
402CERM6.3V20%0.22uF
2
1 C290.22uF20%6.3VCERM402
2
1 C3660.22uF20%6.3VCERM402
2
1 C365
402CERM6.3V20%0.22uF
2
1 C3760.22uF20%6.3VCERM402
2
1 C385
402CERM6.3V20%0.22uF
2
1 C405
402CERM6.3V20%0.22uF
2
1 C406
402CERM6.3V20%0.22uF
2
1 C398
402CERM6.3V20%0.22uF
2
1 C309
0.22uF20%6.3VCERM402
2
1 C3360.22uF20%6.3VCERM402
2
1 C319
402CERM6.3V20%0.22uF
2
1 C293
402CERM6.3V20%0.22uF
2
1 C388
402CERM6.3V20%0.22uF
2
1 C334
402CERM6.3V20%0.22uF
2
1 C368
0.22uF20%6.3VCERM402
2
1 C316
402CERM6.3V20%0.22uF
2
1 C216
402CERM6.3V20%0.22uF
2
1 C377
402CERM6.3V20%0.22uF
2
1 C3230.22uF20%6.3VCERM402
2
1 C324
0.22uF20%6.3VCERM402
2
1 C1580.22uF20%6.3VCERM402
2
1 C286
0.22uF20%6.3VCERM402
2
1 C3140.22uF20%6.3VCERM402
2
1 C260
0.22uF20%6.3VCERM402
2
1 C349
402CERM6.3V20%0.22uF
2
1 C119
402CERM6.3V20%0.22uF
2
1 C287
402CERM6.3V20%0.22uF
2
1 C118
402CERM6.3V20%0.22uF
2
1 C207
402CERM6.3V20%0.22uF
2
1 C172
0.22uF20%6.3VCERM402
2
1 C2050.22uF20%6.3VCERM402
2
1 C209
0.22uF20%6.3VCERM402
2
1 C1270.22uF20%6.3VCERM402
2
1 C100
0.22uF20%6.3VCERM402
2
1 C185
+1_5V_MAIN
+3V_MAIN
0.22uF20%6.3VCERM402
2
1 C49
16 44051-6531 B
MAXBUS_SLEEP
+1_5V_AGP
+2_5V_INTREPID
38 34
38
23
21
15
19
38
8
18
15
7
15
10
5
12
9
www.kythuatvitinh.com
C/BE3*C/BE2*C/BE1*C/BE0*
VR_EN*VR_PORT
VCCCBVCCP
GND
VCC
GRST
MFUNC4MFUNC5MFUNC6
MFUNC3
MFUNC0
SUSPEND
MFUNC1MFUNC2
PCLK
SPKROUT
GNT
TRDYSTOPFRAME
PRSTREQ
DEVSEL
PERRIDSELSERRIRDY
AD31
PAR
AD30AD29AD28AD27
AD20AD21
AD18AD19
AD26AD25AD24AD23AD22
AD17
AD10AD11
AD9AD8
AD16AD15AD14AD13AD12
AD7
AD0
AD2AD3AD4AD5AD6
AD1
D14/RSVDD13/CAD6D12/CAD4D11/CAD2
D10/CAD31
D15/CAD8
D9/CAD30D8/CAD28D7/CAD7D6/CAD5D5/CAD3D4/CAD1D3/CAD0D2/RSVD
D1/CAD29D0/CAD27
A22/CTRDY*
A20/CSTOP*
A23/CFRAME*
A21/CDEVSEL*
A19/CBLOCK*
A15/CIRDY*A14/CPERR*
A12/CC/BE2*
A8/CC/BE1*
A25/CAD19A24/CAD17
A18/RSVDA17/CAD16A16/CCLK
A13/CPAR
A11/CAD12A10/CAD9A9/CAD14
A7/CAD18A6/CAD20A5/CAD21
CE2/CAD10*INPACK/CREQ*WAIT/CSERR*
A4/CAD22A3/CAD23A2/CAD24A1/CAD25A0/CAD26
VPPD1VPPD0
VCCD0*VCCD1*
IORD*/CAD13IOWR*/CAD15OE*/CAD11
WE*/CGNT*
CD2*/CCD2*CD1*/CCD1*
CE1*/CC/BE0*
RDY/IREQ*/CINT*
VS1*/CVS1VS2*/CVS2
REG*/CC/BE3*RESET/CRST*
BVD1/CSTSCHG/STSCHG*/RI*BVD2/SPKR*/CAUDIO
WP/IOIS16*/CCLKRUN*
RI_OUT/PME
CLK_48_RSVD/NC
TPS2211
OC
AVPP
AVCC2AVCC1AVCC0
GND
SHTDWN
VCCD0VCCD1VPPD0VPPD1
V_5_2V_5_1
V_3_2V_3_1
V_12
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CARDBUS POWER FOR PSUEDO-D3COLDTHIS PROPERLY SHUTS DOWN
PCI1510 PULL-UPS
0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV
MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES
NC
NC
TO MINIMIZE INDUCTANCE!
CARDBUS
NC
NC
NCCLAMP FOR PCICLAMP FOR PC-CARD
INTEGRATED PULL-UP
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
PC CARD/CARDBUS CONNECTOR
+3V_MAIN
+5V_MAIN
+3V_MAIN
402CERM10V20%0.1UF
2
1 C467
402
10K
1/16WMF
5%
21
R757
MF1/16W
10K
402
5%
21
R756
402
10K
1/16WMF
5%
21
R753
SM
25V1/32W5%10K
1
2
8
9
3
7
4
6
10
5
RP39
+3V_MAIN
CRITICAL
QT500806-L111M-ST-SM1
9
84
83 82
81
80
8
79
78 77
76 75
74 73
72 71
70
7
69
68 67
66 65
64 63
62 61
60
6
59
58 57
56 55
54 53
52 51
50
5
49
48 47
46 45
44 43
42 41
40
4
39
38 37
36 35
34 33
32 31
30
3
29
28 27
26 25
24 23
22 21
20
2
19
18 17
16 15
14 13
12 11
10
1
J9
CERM805
6.3V20%10UF
2
1 C813
CRITICAL
BGAPCI1510GGU
A5
D13
B6
A9
B2
L8
D4
M11
K9
L3
L12
N13
B11
N11N7M1E1D5C13A7
J3
N10
L1
M9
L2
M8
D8
C2
A8
A6
G3
K3
G1
N1
G10
L10
N12
M10
K10
L9
N9
K7
K1
C11
F12
B8
F2
L11
C1
N2M13K8H4F13D1A11A2
J1
K2
B4
C5
H12
J10
J13
K12
K11
A3
H11
J12
K13
J11
M12
B3
C4
A4
H10
G13
H13
B5
L13
A1
J2
M3
K6
D6
C6
M2
N4
N5
L6
M6
K4
E3
D3
N6
E4
D2
B1
F4
E2
F3
C3
F1
G4
G2
L7
H2
H3
H1
J4
M4
L5
K5
N3
L4
M5
M7
N8
F11
E11
A12
C9
C8
B12
D10
B9
B10
A10
C12
D11
E10
B7
A13
E13
F10
B13
C10
D12
E12
D9
G12
G11
D7
C7
U26
+2_5V_MAIN 402MF
1/16W5%
10K
2
1R762
805CERM10V20%2.2UF
2
1 C783
805CERM10V20%2.2UF
2
1 C776
47
5%1/16WMF402
21
R766
1/16W
402MF
5%47
2
1R348
NO STUFF
1/16WMF
10K
402
5%
2
1R373
6.3V
402CERM
20%0.22UF
2
1 C789
CRITICAL
SSOI
6
5
4
3
9
14
15
2
1
16
87
10
13
12
11
U19
6.3V
402
20%
CERM
0.22UF
2
1 C791
6.3V
402
20%
CERM
0.22UF
2
1 C797
6.3V20%
CERM402
0.22UF
2
1 C790
6.3V
402
20%
CERM
0.22UF
2
1 C796
6.3V20%
CERM402
0.22UF
2
1 C798
402MF
1/16W5%
4721
R750
6.3V20%
CERM402
0.22UF
2
1 C795
402
10V20%
CERM
0.1UF
2
1C773
MF1/16W
5%22
4022
1R767
402MF
1/16W5%
47
NO STUFF
21
R764
17B051-6531
44
CBUS_ADDR<6>
IO_RESET_L CBUS_PCI_RESET_L
CBUS_DET_2_L
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_BVD1_L
CBUS_BVD2_L
CBUS_REG_L
CBUS_INPACK_L
CBUS_WAIT_L
CBUS_RESET_L
CBUS_VS2
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_IOWR_L
CBUS_IORD_L
CBUS_VS1
CBUS_CE2_L
CBUS_DATA<15>
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DET_1_L
CBUS_ADDR<25>
CBUS_ADDR<8>
CBUS_WP_L
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<0>
CBUS_ADDR<1>
CBUS_ADDR<2>
CBUS_ADDR<3>
CBUS_ADDR<4>
CBUS_ADDR<5>
CBUS_ADDR<7>
CBUS_ADDR<12>
CBUS_ADDR<15>
CBUS_ADDR<16>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_READY
CBUS_WE_L
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<9>
CBUS_ADDR<11>
CBUS_OE_L
CBUS_ADDR<10>
CBUS_CE1_L
CBUS_DATA<7>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
PCI1510_VR_EN_L
CBUS_MFUNC3_PD
CBUS_MFUNC2_PD
CBUS_MFUNC1_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_BVD1_L
CBUS_DET_1_L
CBUS_DET_2_L
CBUS_IORD_L
CBUS_IOWR_L
CBUS_OE_L
CBUS_CE1_L
CBUS_WE_L
CBUS_READY
CBUS_RESET_L
CBUS_REG_L
CBUS_BVD2_L
CBUS_WP_L
CBUS_CE2_L
CBUS_INPACK_L
CBUS_WAIT_L
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_DATA<7>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<25>
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_ADDR_16_UF
CBUS_ADDR<15>
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<12>
CBUS_ADDR<11>
CBUS_ADDR<10>
CBUS_ADDR<9>
CBUS_ADDR<8>
CBUS_ADDR<7>
CBUS_ADDR<6>
CBUS_ADDR<5>
CBUS_ADDR<4>
CBUS_ADDR<3>
CBUS_ADDR<2>
CBUS_ADDR<1>
CBUS_ADDR<0>
CBUS_DATA<15>
CBUS_VS1
CBUS_VS2
CBUS_ADDR<16>
CBUS_PCI_PERR_L
CBUS_PCI_SERR_L
PCI_FRAME_L
PCI_IRDY_L
PCI_PAR
CBUS_MFUNC1_PD
CBUS_MFUNC2_PD
CBUS_MFUNC3_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD
CBUS_SUSPEND_PU
CBUS_INT_L
CBUS_PCI_GNT_L
CBUS_PCI_REQ_L
PCI_DEVSEL_L
PCI_TRDY_L
PCI_STOP_L
CLK33M_CBUS
PCI_AD<0>
PCI_AD<1>
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<2>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<31>
PCI_AD<30>
PCI_AD<3>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
CBUS_PCI_IDSEL
PCI_AD<26>
PCI_AD<19>
+VPP_CBUS_SW
CBUS_VPPD1
CBUS_VPPD0
CBUS_VCCD1_L
MAIN_RESET_L
CBUS_PCI_PERR_L
CBUS_SUSPEND_PU
CBUS_PCI_SERR_L
TPS2211_SHDN_L_PU
MAIN_RESET_L
CBUS_MFUNC6_PD
+VCC_CBUS_SW
CBUS_VCCD0_L
39
39
30
30
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
26
26
39
39
39
39
39
39
37
37
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
24
24
30
37
37
37
37
37
37
26
26
37
37
37
37
26
26
26
26
26
26
26
26
26
26
26
37
37
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
20
20
27
26
26
26
26
26
26
24
24
26
26
26
26
24
24
24
24
24
24
24
24
24
24
24
26
26
26
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
18
18
26
39
38
38
39
38
38
39
39
24
24
24
24
24
24
36
12
12
24
24
24
24
12
12
12
12
12
12
12
12
12
12
12
24
24
24
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
38
17
17
38
17
23
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
12
12
12
17
17
17
17
17
17
17
14
12
12
12
12
12
12
9
9
12
12
12
12
9
9
9
9
9
9
9
9
9
9
9
12
12
12
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
17
14
17
17
17
14
17
17
www.kythuatvitinh.com
OE
GND
OUT
VCC
OSC
XIN/CLKINSSCLK
VSSS0S1
FRSEL
XOUT
VDD
VSS VSS
VSSVSS
RAGE_MOBILITY
(2 OF 6)
VDDCI
VSS
(6 OF 6)
RAGE_MOBILITY
VSSVSS
(1 OF 6)
RAGE_MOBILITY
AGP_BUSYB
AD_STBB1
AD_STBB0
AD_STB0
AGPREF
AD_STB1AD30
AD31
AD29
AD28
AD27
AD26
AD25
AD24
AD17
AD14
AD15
AD23
AD22
AD19
AD20
AD21
AD16
AD18
AD6
AD5
AD4
AD13
AD11
AD12
AD10
AD9
AD8
AD7
AD3
CBEB1
CBEB2
CBEB3
AD0
AD1
AD2
CBEB0
PCICLK
FRAMEB
PAR
IRDYB
TRDYB
RSTB
INTAB
GNTB
REQB
DEVSELB
STOPB
MEMVMODE1
MEMVMODE0
TEST_YCLK
TEST_MLCK
D+
D-
VREF
VREFG
MEMTEST
PLLTEST
WBF
ST0
ST1
ST2
SBA5
SBA6
SBA3
SBA4
SBA7
SBA2
STP_AGPB
RBFB
SB_STB
SBA1
SBA0
SUS_STAT
AGPTEST
AGP8X_DETB
RSTB_MSK
DBI_LO
DBI_HI
SB_STBS
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(PLACE R200 CLOSE TO OSC)
(PLACE THE OSCILLATOR AND R189 AND R195
CLOSE TO ATI PIN AJ29)
27M OSC
NC
NC
S0=1;S1=M => -1.5% DOWN-SPREAD
SPREAD SPECTRUM SUPPORT
CLOSE TO ATI M10 VREF PINPLACE VERF VOLTAGE DIVIDER
FOR 2.5 VDDR1MEMVMODE0=1.8VMEMVMODE1=GND
FOR 1.8 VDDR1MEMVMODE0=GNDMEMVMODE1=1.8V
M10 AGP INTERFACENC
(PLACE C1002 CLOSE TO AGPREF PIN)
MAIN_RESET_L IS TOGGLED FOR SLEEP
(PULL-UP to GPU_MEM_IO)
1/16W
47
5%
MF402
21
R53
402
1/16W5%
MF
10K
2
1R54
SM
60-OHM-EMI21
L2
0.01uF20%
CERM402
16V2
1 C64
402CERM
20%16V
0.01uF
2
1 C68
CERM
20%6.3V
805
10uF
2
1 C67
16VCERM
20%
402
0.01uF
2
1 C65
16V
402CERM
20%0.01uF
2
1 C66
16V
402CERM
20%0.01uF
2
1 C69
20K1/16W
402MF
5%
2
1R159
20K5%1/16WMF4022
1R172
402MF1/16W1%45.3
2
1R118
402
0
1/16WMF
5%
21
R158
1/16WMF
10K5%
4022
1R127
5%1/16WMF402
ATI_MEMIO_HI
4.7K
2
1R104
4.7K5%
1/16WMF402
ATI_MEMIO_HI
2
1R70
1K1%
402MF1/16W
2
1R43
402
1%1K
MF1/16W
2
1R44
1/16WMF402
1K1%
2
1R45
1/16WMF402
1K1%
2
1R460.1uF10V20%
CERM402
2
1 C1120%6.3V
10uF
805CERM2
1 C37
SM-1
27.0000M
CRITICAL 14
81
7
G2100K
5%
402MF
1/16W
NO STUFF
2
1R188 805CERM
20%6.3V
4.7uF
2
1 C78
402CERM
0.1uF10V20%
2
1C77SM
FERR-EMI-100-OHM21
L4
+3V_SLEEP
1/16WMF
5%
402
NO STUFF
0
2
1R173
SM
GPU_SS
FERR-EMI-100-OHM21
L3+3V_SLEEP
CRITICAL
SOICY25811
GPU_SS
8
1
2
7
5
3
4
6
U47
0.1uF
CERM10V
402
GPU_SS
20%2
1 C7110uF
805CERM
20%6.3V
GPU_SS
2
1 C70
GPU_SS
MF
01/16W5%
4022
1R181
0
NO STUFF
1/16WMF
5%
4022
1R380
NO STUFF
402
5%
MF1/16W
2
1R37
287
MF402
1%1/16W
2
1R189
1621/16W
402MF
1%
2
1R195
1/16W
402MF
475%
2
1R119
402MF1/16W5%47K
2
1R1385%
1/16WMF402
47K
2
1R126
CERM402
10V20%0.1uF
2
1 C62
1/16W
4.7K
ATI_MEMIO_LO
402MF
5%
2
1R105
4.7K
402MF
5%
ATI_MEMIO_LO
1/16W
2
1R55
GPU_SS
402MF
1/16W5%
021
R200
GPU_SS
MF402
1/16W
335%
2
1R201
0.01uF
CERM402
16V20%
2
1 C63
M10-CSP6464MBBGA
OMIT
G30
N3
N4
N1
N2
M4
L3
M3
L4
K3
K4
J1
J2
H1
H2
B27
A27
D23
C23
D22
C20
D20
C21
D21
C22
A25
B25
A26
B26
AE4
AE3
AD4
AD3
AB4
AB3
AA4
AA3
AD2
AD1
AC2
AC1
AA2
AA1
Y2
Y1
Y4
Y3
W4
W3
U4
U3
T4
T3
W2
W1
V2
V1
T2
T1
R2
R1
G2
G1
F2
F1
D2
D1
C2
C1
J4
J3
H4
H3
F4
F3
E3
E4
B1
A1
B2
A2
B4
A4
B5
A5
D3
C3
D4
C4
D6
C6
D7
C7
A8
B8
A9
B9
A11
B11
A12
B12
C9
D9
C10
D10
C12
D12
C13
D13
A13
B13
A14
B14
A16
B16
A17
B17
C14
D14
C15
D15
C17
D17
C18
D18
C24
D24
C25
D25
C27
D27
C28
D28
B28
A28
A29
A30
C29
C30
D29
D30
E27
E28
F27
F28
H27
H28
J27
J28
E29
E30
F29
F30
H29
H30
J29
J30
AC3
AB1
V3
U1
E1
G3
B3
D5
B10
D11
B15
D16
D26
B30
G28
U44
M10-CSP6464MBBGA
OMIT
R19
R18
R17
R16
T16
U16
V16
W16
T14
T13
T12
T15
R15
P15
N15
M15
B19
A21
P3
M2
P25
F18
AE15
U6
U44
M10-CSP6464MBBGA
CRITICAL
OMIT
AE27
L1
A22
L2
B22
K1
A23
K2
B23
AC4
AB2
V4
U2
E2
G4
A3
C5
A10
C11
A15
C16
C26
B29
G27
G29
P1
D19
R4
A18
R3
A19
P4
B18
P2
C19
AK3
D8
T28
E8
J6
AJ28
AG29
T27
AE29
AF28
AF30
AD28
AC29
AC28
AB29
AC27
AC30
AD27
AD30
AE28
AD29
AD24
AH30
AF29
AE30
AC22
AG30
R28
B6
B7 C8
T30
AH29
AF27
U27
T29
Y25
Y27
AC11
AC10
W28
U29
R30
N27
AG28
K29
K30
U25
Y29
W29
M28
N29
N28
N30
M30
M27
M29
L28
AB30
AB27
L30
AA29
AB28
AA30
AA27
Y30
AA28
W30
W27
V30
V28
L27
V29
V27
U30
U28
R27
R29
P28
P30
P27
P29
L29
K28
U44
?1 IC,ATI,M10,NO HEATSPREADER U44 CRITICAL338S0133
051-6531
4418B
AGP_SB_STB_L
ATI_DBI_LO_PU
ATI_DBI_HI_PU
ATI_RSTB_MSK
AGP8X_DET_PU
GPU_AGP_TEST
AGP_SUS_STAT_L_PU
AGP_SB_STB
AGP_STP_L
AGP_RBF_L
AGP_SBA<0>
AGP_SBA<1>
AGP_SBA<2>
AGP_SBA<3>
AGP_SBA<4>
AGP_SBA<5>
AGP_SBA<7>
AGP_SBA<6>
AGP_ST<2>
AGP_ST<1>
AGP_ST<0>
AGP_WBF_L
ATI_MEMTEST
AGP_ATI_VREFG
AGP_ATI_VREF
GPU_THERM_DM
GPU_THERM_DP
+GPU_MEM
ATI_MEMVMODE1
ATI_MEMVMODE0
AGP_ATI_RESET_L
AGP_INT_L
AGP_REQ_L
AGP_GNT_L
AGP_PAR
AGP_STOP_L
AGP_DEVSEL_L
AGP_IRDY_L
AGP_TRDY_L
AGP_FRAME_L
AGP_CBE<0>
CLK66M_GPU_AGP
AGP_CBE<2>
AGP_CBE<1>
AGP_AD<0>
AGP_CBE<3>
AGP_AD<1>
AGP_AD<3>
AGP_AD<2>
AGP_AD<4>
AGP_AD<5>
AGP_AD<6>
AGP_AD<7>
AGP_AD<8>
AGP_AD<10>
AGP_AD<9>
AGP_AD<11>
AGP_AD<12>
AGP_AD<13>
AGP_AD<15>
AGP_AD<14>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<19>
AGP_AD<20>
AGP_AD<21>
AGP_AD<23>
AGP_AD<22>
AGP_AD<26>
AGP_AD<25>
AGP_AD<24>
AGP_AD<27>
AGP_AD<28>
AGP_AD<29>
AGP_AD<30>
AGP_AD<31>
INT_AGP_VREF
AGP_AD_STB_L<1>
AGP_BUSY_L
AGP_AD_STB<1>
AGP_AD_STB<0>
AGP_AD_STB_L<0>
GPU_VCORE_VDDCI
+GPU_MEM
+3V_ATI_OSC_SLEEP
+3V_GPU
+1_5V_AGP
+3V_GPU
+3V_GPU
MAIN_RESET_L
+1_5V_AGP
GPU_VCORE
+3V_GPU
+1_8V_GPU
ATI_OSC_OE ATI_CLK27M_OSC ATI_CLK27M_OSC_SS
ATI_SSCLK_IN
CY25811_S1
CY25811_S0
ATI_SSCLK_UF
ATI_CLK27M_OSC_SS
ATI_CLK27M_IN
+3V_ATI_SS
38
39
38
21
30
21
38
19
38
38
26
19
38
21
18
21
21
24 18
21
38
38
38
19
16
19
19
20
16
39
19
21
37
37
37
37
37
37
37
37
37
37
37
21
37
37
37
37
37
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
37
37
37
37
21
18
15
18
18
17
15
38
18
20
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
18
14
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
38
18
38
12
12
12
12
14
12
19
12
19
18
19
18
19
38 www.kythuatvitinh.com
B00ST
SW
TG
EXTVCC VCC
INT VIN
SGND PGND
RUN/SS
BG
VFB
ITH
ION
PGOOD
VRNG
FCB
G
D
S
G
D
S
HPD1
DDC3CLK
DDC3DATA
DDC1CLK
DDC1DATA
DDC2CLK
DDC2DATA
BLON
GPIO16
GPIO15
G
R
B
Y_G
R2SET
RSET
H2SYNC
HSYNC
V2SYNC
VSYNC
ZV_LCDDATA5
ZV_LCDDATA4
ZV_LCDDATA3
ZV_LCDDATA2
ZV_LCDDATA6
ZV_LCDDATA15
ZV_LCDDATA14
ZV_LCDDATA13
ZV_LCDDATA12
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA16C_R
DIGON
COMP_B
AUXWIN
ZV_LCDDATA21
ZV_LCDDATA20
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDDATA22
ZV_LCDDATA23
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDCNTL2
ZV_LCDCNTL3
GPIO0
GPIO1
GPIO5
GPIO7
GPIO6
GPIO2
GPIO3
GPIO4
TXOUT_L3N
TXOUT_L2P
TXOUT_L2N
TXOUT_U3P
TXCLK_UN
TXOUT_U2P
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_U3N
TXCLK_UP
TXOUT_U2N
TXOUT_U1P
TXOUT_U0P
TXOUT_U0N
TXOUT_U1N
GPIO8
GPIO12
GPIO10
GPIO11
GPIO9
GPIO14
GPIO13
TX0M
TX2P
TX1P
TX2M
TXCM
TX1M
TX0P
TXCP
XTALIN
TXOUT_L3P
TXCLK_LN
TXCLK_LP
SSOUT
XTALOUT
TESTEN
SSIN
ROMCSB
ZV_LCDDATA1
ZV_LCDDATA0
RAGE_MOBILITY
(3 OF 6)
VSS
VSS
VSS
VSS
VSS
VDDC
(5 OF 6)
RAGE_MOBILITY
VSS
VDD15
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(GPIO0)
(GPIO2)
(GPIO6)
1.2V = 0.8V * (1 + R332 / (R331//R333))
(NO ICT TEST)
1.0V = 0.8V * (1 + R332 / R333)
WHEN VCORE_CNTL HIGH => 1.2V
WHEN VCORE_CNTL LOW => 1.0V
(NO ICT TEST)
NC
(500mA)
(NO ICT TEST)
(NO ICT TEST)
(NO ICT TEST)
(NO ICT TEST)
(NO ICT TEST)
(NO ICT TEST)
NC (PUT ALL CAPs BELOW ATI ASIC)
(GPIO3)
NC
(GPIO1)
NC
M10 CORE PWR/LVDS/TMDS
NC
NC
NC
NC
NC
NC
NC
NC
NC
(GPIO4)
(GPIO5)
GPU VCORE - 1.2VNC
NC
CMF LINE SHOULD BE ROUTED AS 4MIL SURFACE
NC GPU VCORE SUPPLY(NO ICT TEST)
M10 Power Shut down Sequencing
NC
(NO ICT TEST)
TRACE SO THAT IT MAY BE CUT BETWEEN CAPS
TERMINATION NETWORK SHOULD BE CONNECTED AS SHOWNTMDS TERMINATION
6.3V
402
20%0.22uF
CERM2
1 C25210uF
805
20%6.3VCERM2
1 C167
805CERM6.3V20%10uF
2
1 C2190.22uF6.3V20%
402CERM2
1 C2700.22uF6.3V
402CERM
20%2
1 C301
6.3V20%
CERM
0.22uF
4022
1 C3070.22uF
CERM402
6.3V20%
2
1 C329
402CERM
20%6.3V
0.22uF
2
1 C332
0.22uF20%
CERM402
6.3V2
1 C18620%
CERM402
6.3V
0.22uF
2
1 C220
6.3VCERM402
0.22uF20%
2
1 C2530.22uF
402CERM
20%6.3V2
1 C2710.22uF20%6.3VCERM402
2
1 C30220%
CERM402
6.3V
0.22uF
2
1 C31120%
CERM402
6.3V
0.22uF
2
1 C330
CERM
20%
402
0.22uF6.3V2
1 C333
6.3V
402CERM
20%0.22uF
2
1 C1870.22uF6.3V20%
CERM402
2
1 C2210.22uF
CERM
20%6.3V
4022
1 C2546.3V
402CERM
20%0.22uF
2
1 C2820.22uF20%
CERM6.3V
4022
1 C303
6.3V
402
20%
CERM
0.22uF
2
1 C326
6.3VCERM402
20%0.22uF
2
1 C331
6.3V20%
CERM402
0.22uF
2
1 C338
CERM
20%10V
22uF
12102
1 C708
POLY
330UF20%
6.3V
SMD
2
1C719B340LBSMB
2
1
D24
603CERM
20%0.1uF
25V2
1C514
2.2
603MF
1/16W5%
21
R416
603CERM25V
0.1uF20%
2
1C494
603
1
MF1/16W5%
2
1R430576K1%
MF402
1/16W
2
1R339
4.7uF4.7UF
CERM
20%10V
12062
1 C473+5V_MAIN
402
NO STUFF
5%1/16WMF
0
2
1R388
18.2K
GPU_PWRMSR
1%1/16WMF4022
1R451
20K1%
1/16WMF4022
1R351
GPU_PWRMSR
0.1uF
402CERM10V20%
2
1C515
GPU_PWRMSR
10K
5%1/16W
402MF
21
R410
SM
OMIT
21
XW2
CRITICAL
LTC1778SSOP
3
10
8
15
14
6
1
2
13
5
7
11
4
9
16
12
U16
1/16W
05%
MF4022
1R31125V
220pF
402CERM
5%2
1 C451
1206
4.7UF
CERM
20%25V
2
1C766
+PBUS
1M
402
5%1/16WMF
2
1R389
0.1uF
CERM
20%
402
10V2
1 C483470pF
10%50V
CERM402
2
1C448
402MF
1/16W1%
20K
2
1R340
1/16W
402
1%63.4K
MF
NO STUFF
2
1R341
05%1/16WMF4022
1R332
NO STUFF
1/16W
402MF
5%10K
2
1R223
CRITICALSO-8-PWRPKSI7860DPQ51
4.7UF20%25V
CERM1206
2
1C762
POLY
330UF
SMD
6.3V20%
2
1C720
POLY
330UF20%
SMD
6.3V2
1 C721
402
5%0
1/16WMF
2
1R390
1/16W
402MF
5%100K
2
1R316
MF
100K1/16W
5%
402 2
1R306
SOT-363BAS16TW
6 1
DP1
2N3904SM
2
3
1 Q6
2N3904SM
2
3
1 Q5
402MF
1/16W5%
10K
2
1R294
BAS16TWSOT-363
52
DP1
BAS16TWSOT-363
43
DP1
+5V_MAIN
MF402
5%1/16W
10K
2
1R24710K
5%1/16W
402MF
2
1R253
402MF
1%751/16W
2
1R245
751/16W1%
402MF
2
1R249751%
MF402
1/16W
2
1R246
402MF
1%751/16W
2
1R240
1/16W
751%
MF4022
1R248
402
751%1/16WMF
2
1R254
1%
MF1/16W
499
4022
1R257
402MF
7151/16W
1%
2
1R256
5%10K
MF1/16W
4022
1R260
NO STUFF
10K
402
5%
MF1/16W
2
1R261
5%
402MF
10K
NO STUFF
1/16W
2
1R262NO STUFF
5%
MF
10K1/16W
4022
1R265
1/16W
10K
MF402
5%
NO STUFF
2
1R266
1/16W
NO STUFF
5%
402MF
10K
2
1R269
NO STUFF
5%
402MF
10K1/16W
2
1R270
10K
MF
5%
402
1/16W
NO STUFF
2
1R271
NO STUFF
1/16WMF402
5%10K
2
1R272
1/16W5%
MF
10K
4022
1R258
NO STUFF
10K
MF
5%1/16W
4022
1R259
402
5%10K
MF
NO STUFF
1/16W
2
1R273
10K
NO STUFF
1/16WMF402
5%
2
1R274NO STUFF
402MF
10K1/16W5%
2
1R263
5%
MF
1K
402
1/16W
2 1
R229
805CERM
20%6.3V
10uF
2
1 C328
402CERM16V20%0.01uF
2
1 C305
402
20%
CERM16V
0.01uF
2
1 C2990.01uF
402CERM
20%16V2
1 C256
16V20%
CERM402
0.01uF
2
1 C222
CERM402
16V
0.01uF20%
2
1 C3060.01uF
402
20%
CERM16V2
1 C300
402
20%16VCERM
0.01uF
2
1 C2690.01uF16V20%
CERM402
2
1 C232
4.99K1%
1/16WMF4022
1R352
EXT_TMDS
MF402
5%10K1/16W
2
1R228
CRITICAL
SI7892DPSO-8-PWRPK
Q48
0805
FERR-220-OHM21
L24
1/16WMF402
5%100K
2
1R236
402MF
1/16W5%
33K
2
1R203
TSOPSI3446DV
4
36
5
2
1
Q77
1000pF10%25VX7R402
2
1 C166
BAS16TWSOT-363
52
DP6
SOT-363BAS16TW
43
DP6
BAS16TWSOT-363
61
DP6
+2_5V_SLEEP
SM
21
XW21
SM
21
XW20
SM
21
XW22
SM
21
XW24
SM
21
XW23
402MF
5%1/16W
1K
2
1R221
SOT-3632N7002DW
4
5
3
Q80
SOT-3632N7002DW
1
2
6
Q80
5%
402MF1/16W
100K
2
1R307
+5V_MAIN
NO STUFF
0.0022UF10%50VCERM402
2
1 C882
MBR0540SM
2
1D5
402MF1/16W5%10K
2
1R711
GPU_PWRMSR
1.82K1%1/16WMF4022
1R804GPU_PWRMSR
0.1UF20%10VCERM402
2
1 C902
INT_TMDS
5%10K1/16W
MF402 2
1R234
CRITICAL
2.1UH-11ASM
3
2 1
L30
M10-CSP6464MBBGA
OMIT
AK7
AJ7
AH7
AG7
AK6
AJ6
AH6
AH11
AG11
AK10
AJ10
AG6
AH10
AG10
AK9
AJ9
AH9
AG9
AK8
AJ8
AH8
AG8
AK5
AJ5
AG5
AH5
AK4
AJ4
AK23
AJ30
AJ29
AG27
B21
A20
A24
B20
B24
AG25
AG22
AH22
AG20
AH20
AG19
AH19
AG18
AH18
AJ20
AK20
AJ18
AK18
AJ17
AK17
AJ16
AK16
AK12
AJ12
AG21
AH21
AJ19
AK19
AK15
AJ15
AK14
AJ14
AK13
AJ13
AH24
AJ25AJ26
AK25
AE5
AJ24
AK28
AG26
AF11
AG24
AF3
AG3
AH1
AF4
AJ1
AH2
AH3
AK1
M1
AE1
AE2
AF1
AG1
AF2
AG2
AK2
AJ2
AK27
AE13
AH26
AH25
AE12
AF12
AH28
AH27
AK24
AK22
AF13
AK26
AJ27
U44
OMIT
M10-CSP6464MBBGA
G16
G15
AD23
G14
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
G13
AD12
AD11
AD10
AD9
AD8
AD7
AC24
AC23
AC8
AC7
G12
AB24
AB7
AA24
AA7
Y24
Y7
W24
W7
V24
V7
G11
U24
U7
T24
T7
R24
R7
P24
P7
N24
N7
G10
M24
M7
L24
L7
K24
K7
J24
J7
H24
H23
G9
H8
H7
G24
G23
G22
G21
G20
G19
G18
G17
G8
G7
AD26
P6
H6
G6
F6
AF5
V25
W25
N25
M25
F25
AE24
F24
AH4
F23
AE18
AC25
AE17
AF15
W26
AF14
AE14
F14
F13
AG4
AE11
F11
AE10
F10
F7
AE6
AD6
AC6
W6
V6
AF25
AJ3
AB25
R25
G25
F17
AB6
T6
L6
F12 U44
B051-6531
19 44
ATI_TESTEN
ATI_GPIO9_SPN
ATI_GPIO10_SPN
ATI_GPIO8_PD
ATI_GPIO7_SPN
ATI_BUS_CFG<2>
ATI_BUS_CFG<1>
ATI_X1CLK_SKEW<1>
ATI_BUS_CFG<0>
ATI_X1CLK_SKEW<0>
CLKLVDS_LN
CLKLVDS_LP
LVDS_L3P_TP
LVDS_U1N
LVDS_U0N
LVDS_U0P
LVDS_DDC_DATA
LVDS_DDC_CLK
GPU_AUXWIN
GPU_DVOD<7>
GPU_DVOD<6>
GPU_DVOD<2>
GPU_DVOD<0>
GPU_DVOD<1>
INV_ON_PWM
FP_PWR_EN
GPU_DVOD_DE
GPU_DVO_HSYNC
GPU_DVO_VSYNC
1778_TGHIGH_VCORE
HIGH_VCORE_DIV
1778_BG
1778_SHDN_L
1778_ITH
GPU_VCORE_CNTL
1778_VFB
1778_VCC
1778_BST_RC
1778_GND
+GPU_VDD15_NECK
1778_VRNG
1778_FCB
1778_VIN
VCORE_CNTL_RC
+1_5V_AGP_NECK
1778_SHDN_L_D3COLD
SLEEP_L_LS5
DCDC_EN
GPU_VCORE_SEQ
GPU_VCORE_SEQ_L
GPU_VCORE_PWR_SEQ+1_5V_AGP
1778_ITH_RCGPU_CORE_OK
1778_GND
1778_VFB
+1_5V_AGP
+2_5V_SLEEP_NECK1
+GPU_VDD15_UF
GPU_VCORE
ATI_X1CLK_SKEW<1>
ATI_BUS_CFG<0>
ATI_BUS_CFG<2>
+3V_GPU
ATI_AGP_FBSKEW<1>
ATI_BUS_CFG<1>
+1_5V_AGP
GPU_CORE_OK
ATI_AGP_FBSKEW<0>
+GPU_VDD15_UF
+1_8V_PVDD_NECK
+1_8V_ATI_PVDD
GPU_VCORE_NECK
+3V_GPU
1778_ION
+3V_GPU
+1_8V_GPU +3V_GPU
GPU_VCORE_CNTL_L
GPU_VCORE
GPU_HPD
SI_DDC_CLK
SI_DDC_DATA
GPU_DVI_DDC_CLK
GPU_DVI_DDC_DATA
ATI_SSCLK_IN
GPU_VCORE_CNTL_L
GPU_G
GPU_R
GPU_B
ATI_VSYNC
ATI_HSYNC
ATI_RSET
ATI_R2SET
LVDS_U2N
LVDS_U1P
LVDS_U3N_TP
LVDS_U2P
LVDS_U3P_TP
CLKLVDS_UP
CLKLVDS_UN
LVDS_L0N
LVDS_L0P
LVDS_L1N
LVDS_L2N
LVDS_L1P
LVDS_L2P
LVDS_L3N_TP
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<10>
GPU_DVOD<11>
ZV_LCDDATA20_PU
GPU_DVO_CLKP
ATI_AGP_FBSKEW<0>
ATI_AGP_FBSKEW<1>
ATI_GPIO12_SPN
ATI_GPIO11_SPN
HPD_PWR_SNS_EN
ATI_GPIO13_SPN
ATI_TMDS_DP<0>
ATI_TMDS_DN<1>
ATI_TMDS_DN<0>
ATI_TMDS_DP<1>
ATI_TMDS_DN<2>
ATI_TMDS_DP<2>
ATI_TMDS_CLKN
ATI_TMDS_CLKP
ATI_CLK27M_IN
ATI_X1CLK_SKEW<0>
GPU_Y
GPU_C
GPU_COMP
GPU_VCORE
+1_5V_GPU_VDD15
GPU_VCORE_SW
1778_BST
38
38
38
21
21
21
39
19
19
38
19
38
38
38
35
34
18
18
39
21
18
21
21
38 21
39
39
39
39
39
39
39
39
34
33
16
39
16
38
19
16
19
19
21 19
38
39
39
39
39
39
39
39
39
39
39
39
38
37
37
37
37
37
39
39
37
37
37
37
37
37
37
38
38
33
32
15
21
38
38
15
38
19
18
15
21
38
38
18
18
20 18
19
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
36
19
19
19
19
19
19
22
22
22
22
22
22
22
20
20
20
20
20
22
22
20
20
20
38
38
38
19
38
38
19
38
38
38
38
38
27
29
12
38
19
19
19
12
38
19
18
19
19
19
12
19
19
12
19
19
19
38
21
38
12
38
12
18 12
19
18
22
20
20
22
22
18
19
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
20
20
20
20
20
20
20
20
19
19
22
20
20
20
20
20
20
20
20
18
19
22
22
22
18
38
38
38
www.kythuatvitinh.com
PAD
THRML
GND
SDA/DK0SCL/DK1
AGND
PD*EDGE/HTPLG
DEHSYNCVSYNCIDCK+IDCK-
D11D10
D2D3D4D5D6D7D8D9
D1D0
GND
GND
AVCC
PVCC2
PVCC1
VCC
AVCC
VCC
EXT_SWING
VREF
TX1+
TX2-
TX1-
TX2+
TX0+TX0-
TXC-TXC+
MSEN
PGND
AGND
PGND
AGND
CTL3/A2ISEL/RST*
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SIL1162 DVI TRANSMITTER
10
1/16W5%
SM1
EXT_TMDS
32
RP58
SIL1162TSSOP
EXT_TMDS
CRITICAL
21
2
22
3
32
33
41
42
38
39
35
36
49
26
27
46
28
45
29
47
48
25
11
12
20
1
23 4
30
44
19
7
8
9
10
13
14
15
16
5
6
17
18
24
40
34
31
43
37
U5
10K5%
MF402
1/16W
NO STUFF
2
1R88
402MF
1%1/16W
4.99K
EXT_TMDS
2
1R224
10
5%1/16WSM1
EXT_TMDS
41
RP58
3305%
402
1/16WMF
EXT_TMDS
2
1R222
402MF1/16W5%
EXT_TMDS
10K
2
1R212NO STUFF
10K5%1/16WMF4022
1R995%
MF402
10K
NO STUFF
1/16W
2
1R66
SM-1
400-OHM-EMI
EXT_TMDS
21
L14
400-OHM-EMI
SM-1
EXT_TMDS
21
L13
400-OHM-EMI
SM-1
EXT_TMDS
21
L15
10UF20%6.3VCERM805
EXT_TMDS
2
1 C14
10UF20%6.3VCERM805
EXT_TMDS
2
1 C130100PF5%50VCERM402
EXT_TMDS
2
1 C132
1/16W
10
5%
SM1
EXT_TMDS
41
RP59100PF5%50VCERM402
EXT_TMDS
2
1 C165
10UF20%6.3VCERM805
EXT_TMDS
2
1 C129100PF5%50VCERM402
EXT_TMDS
2
1 C131100PF
CERM402
EXT_TMDS
5%50V2
1 C133
100PF5%50VCERM402
EXT_TMDS
2
1 C233100PF5%50VCERM402
EXT_TMDS
2
1 C21810UF20%6.3VCERM805
EXT_TMDS
2
1 C255
5%
SM11/16W
10
EXT_TMDS
32
RP59
+3V_SLEEP
0
603MF
5%1/16W
21
R41
SM1
10
5%1/16W
INT_TMDS
41
RP57
10
5%1/16WSM1
INT_TMDS
41
RP27
INT_TMDS
10
5%1/16WSM1
32
RP57
INT_TMDS
10
5%1/16WSM1
41
RP32
10
5%1/16WSM1
INT_TMDS
32
RP27
10
5%1/16WSM1
INT_TMDS
32
RP32
5%
10
1/16WSM1
EXT_TMDS
32
RP60
10
5%1/16WSM1
INT_TMDS
41
RP28
10
5%1/16WSM1
INT_TMDS
32
RP28
470PF10%50V
402CERM 2
1C79470PF10%50V
402CERM2
1 C87
10
5%1/16WSM1
EXT_TMDS
41
RP60
402MF
1/16W1%
49.921
R204
402MF
1/16W1%
49.921
R214
10
5%1/16WSM1
EXT_TMDS
41
RP61
402MF
1/16W1%
49.921
R220
470PF10%50VCERM402
2
1 C102470PF
10%50V
CERM402
2
1C82
402MF
1/16W1%
49.921
R210
402MF
1/16W1%
49.921
R219
470PF10%50VCERM402
2
1 C89
10
5%1/16WSM1
EXT_TMDS
32
RP61
470PF10%50V
CERM402
2
1C81402MF
1/16W1%
49.921
R211
402MF
1/16W1%
49.921
R218
470PF10%50VCERM402
2
1 C8810%50V
402CERM
470PF
2
1C80
MF402
1/16W1%
49.921
R205
MF402
1/16W5%10K
EXT_TMDS
2
1R202
0.1UF20%
CERM402
EXT_TMDS
10V2
1 C284
1K
402MF1/16W
EXT_TMDS
1%
2
1R231
402MF1/16W1%1K
EXT_TMDS
2
1R232
MF402
EXT_TMDS
5%1/16W
10K
2
1R110
1/16W
0
402MF
5%
EXT_TMDS
21
R237
0
402MF
1/16W5%
NO STUFF
21
R235
1/16W
402
10K5%
MF
NO STUFF
2
1R233
B20 44
051-6531
SI_TMDS_CLKN
SI_TMDS_DN<1>GPU_DVOD<4>
TMDS_D2_CMF
TMDS_D1_CMF
TMDS_D0_CMF
TMDS_CLK_CMF
ATI_TMDS_CLKN
SI_TMDS_DN<2>
GPU_DVO_VSYNC
GPU_DVOD<6>
SI_VREF
+3V_SI_VCC
SI_A2
SI_MSEN
+3V_SI_AVCC
SI_VREF
+1_8V_GPU
EXT_SWING
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<5>
GPU_DVO_HSYNC
MAIN_RESET_L
ATI_TMDS_DN<2> TMDS_DN<2>
ATI_TMDS_DN<1> TMDS_DN<1>
ATI_TMDS_DP<2> TMDS_DP<2>
ATI_TMDS_DP<1> TMDS_DP<1>
ATI_TMDS_DP<0> TMDS_DP<0>
ATI_TMDS_DN<0> TMDS_DN<0>
ATI_TMDS_CLKP TMDS_CLKP
TMDS_CLKN
SI_TMDS_DN<1> TMDS_DN<1>
SI_TMDS_DP<2> TMDS_DP<2>
SI_TMDS_DN<0> TMDS_DN<0>
SI_TMDS_DP<1>
SI_TMDS_DP<0> TMDS_DP<0>
SI_TMDS_CLKP TMDS_CLKP
SI_TMDS_CLKN TMDS_CLKN
GPU_DVO_CLKP
GPU_DVOD<11>
GPU_DVOD_DE
GPU_DVOD<9>
GPU_DVOD<10>
GPU_DVOD<3>
GPU_DVOD<1>
GPU_DVOD<2>
GPU_DVOD<0>
SI_TMDS_DN<2>
SI_TMDS_DP<2>
SI_TMDS_DN<0>
SI_TMDS_DP<0>
SI_TMDS_DP<1>
SI_TMDS_CLKP
+3V_SI_PLLVCC
+3V_GPU_SI
+3V_GPU_SI
TMDS_CLKN
TMDS_DN<0>
TMDS_CLKP
TMDS_DP<0>
TMDS_DN<1>TMDS_DP<1>
TMDS_DN<2>TMDS_DP<2>
TMDS_DN<2>
+3V_GPU_SI
TMDS_DP<1>
SI_EDGE
SI_PD
SI_RST
SI_DDC_CLK
SI_DDC_DATA
39 30 26
38
24
39
39
39
39
39
39
39
39
39
39
39 39
39 39
39 39
39
39
21
18
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37 37
37
37
37
37
37
19 37
37
37
37
17
22
22
22
22
22
22
22
22
22
22
22
22
22
22
36
37
37
37
37
37
37
37
22
22
22
22
22 22
22 22
22
22
20
20 19
19
20
19
19
20
38
38
20
18 19
19
19
19
14
19 20
19 20
19 20
19 20
19 20
19 20
19 20
20
20 20
20 20
20 20
20
20 20
20 20
20 20
19
19
19
19
19
19
19
19
19
20
20
20
20
20
20
38
20
20
20
20
20
20
20 20
20 20
20
20
20
19
19
www.kythuatvitinh.com
CONT NOISE
VIN VOUT
GND
CONT NOISE
VIN VOUT
GND
VDDR1
DVOVMODE
LVDDR_25
LVDDR_25
VSS2DI
VSS1DIVDD2DI
VDD1DI
(4 OF 6)
RAGE_MOBILITY
PVSS
AVSSQ
AVSSN1
AVSSN0
A2VSSQ
A2VSSN0
A2VSSN1
VSSRH0
VSSRH1
VDDR1
A2VDD0
A2VDD1
PVDD
AVDD1
AVDD0
A2VDDQ
VDDRH0
VDDRH1
VDDP
LPVSS
TPVSS
MPVSS
LVSSR0
LVSSR1
LVSSR2
LVSSR3
VDDM
LVDDR_18
LVDDR_18
LPVDD
TPVDD
MPVDD
TXVDDR3
TXVDDR0
TXVDDR1
TXVDDR2
TXVSSR3
TXVSSR2
TXVSSR1
VDDR3
VDDR4
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
LVDS PLL - 1.8V(40mA)
(1800mA)
MEMORY PLL - 1.8V
2.5V
(140mA)
MEMORY I/O
(350mA)
(Total PVDD = 66mA)
3.3V IO SUPPLY
AGP 4X I/O - 1.5V
(Max Current varies, depends on usage)
GPU POWER SOURCES - 1.5V, 1.8V, 2.5V & 3.3V
(AVDD+VDDDI=75mA)
2.5V
1.8V
1.8V
1.5V
M10 SHUT DOWN POWER SEQUENCING
(100mA MAX)
(2mA)
GPU PLL - 1.8V
(20mA)
(AVDD+VDDDI=75mA)
M10 POWER
(21mA)
3.3V
(1200mA)
LVDS/TMDS - 1.8V
LVDS - 2.5V
(180mA)
(20mA)
MEMORY CORE - 2.5V
10V
402CERM
0.1uF20%
2
1 C8530.1uF
CERM
20%10V
4022
1 C84810uF20%6.3V
805CERM2
1 C722
10V20%
CERM402
0.1uF
2
1 C858
10VCERM402
20%0.1uF
2
1 C855
CERM
0.1uF
402
10V20%
2
1 C850
CERM402
10V20%0.1uF
2
1 C875
0.1uF
CERM402
10V20%
2
1 C851
10V
0.1uF
402CERM
20%2
1 C876
6.3V20%10uF
805CERM2
1 C872
0.1uF20%10V
402CERM2
1 C873
10uF20%
805CERM6.3V
2
1 C8710.1uF
CERM402
10V20%
2
1 C543
16V
402CERM
20%0.01uF
2
1 C671
20%10V
402CERM
0.1uF
2
1 C8570.1uF
CERM402
10V20%
2
1 C852
10V
0.1uF
402CERM
20%2
1 C8470.1uF
CERM
20%
402
10V2
1 C874
0.1uF10V
402CERM
20%2
1 C446
CERM10V
402
20%0.1uF
2
1 C420
16VCERM
20%
402
0.01uF
2
1 C447
16V20%
CERM402
0.01uF
2
1 C421
20%
402CERM10V
0.1uF
2
1 C381
402
20%16V
0.01uF
CERM2
1 C382
20%10V
402CERM
0.1uF
2
1 C860
10V
0.1uF
CERM402
20%2
1 C8560.1uF
CERM402
10V20%
2
1 C861
20%16V
0.01uF
CERM402
2
1 C862
10uF6.3V20%
CERM805
2
1 C7150.1uF
CERM402
10V20%
2
1 C672
0.01uF16V
402CERM
20%2
1 C701
0.1uF
402
10V20%
CERM2
1 C866
16VCERM
20%0.01uF
4022
1 C450
402
16VCERM
20%0.01uF
2
1 C426
CERM10V20%0.1uF
4022
1 C425
CERM
0.1uF
402
10V20%
2
1 C383
402
20%16VCERM
0.01uF
2
1 C408
0.1uF
CERM402
20%10V
2
1 C70420%0.1uF
CERM10V
4022
1 C864
16V20%0.01uF
402CERM2
1 C869
0.1uF
CERM402
10V20%
2
1 C435
CERM402
20%16V
0.01uF
2
1 C436
402CERM
20%16V
0.01uF
2
1 C870
402
20%0.01uF
CERM16V
2
1 C437
16VCERM
20%
402
0.01uF
2
1 C868
402
0.01uF16V20%
CERM2
1 C434
402
20%10VCERM
0.1uF
2
1 C85920%10V
402CERM
0.1uF
2
1 C8540.1uF10VCERM402
20%2
1 C849
CERM402
10V20%0.1uF
2
1 C725
0.1uF
402
20%10VCERM2
1 C863
16V
402
20%
CERM
0.01uF
2
1 C364
0.01uF
402
20%
CERM16V
2
1 C363
0.01uF16V20%
CERM402
2
1 C361
16VCERM
20%0.01uF
4022
1 C372
CERM402
20%16V
0.01uF
2
1 C373
CERM402
20%16V
0.01uF
2
1 C362
+1_5V_SLEEP
1/10W
805
0
FF
5%
2
1R722
+2_5V_SLEEP
FF
5%01/4W
1210
ATI_MEMIO_HI
2
1R728
+3V_SLEEP
805FF1/10W5%0
2
1R299
+1_8V_SLEEP
FF
05%
ATI_MEMIO_LO
1/4W
12102
1R729
0.01uF
CERM402
20%16V
2
1 C867
CERM16V
402
20%0.01uF
2
1 C428
402CERM
20%0.01uF16V2
1 C429
05%
805
1/10WFF
2
1R284
+1_8V_SLEEP
+2_5V_SLEEP
16VCERM402
20%0.01uF
2
1 C379402
0.01uF16V20%
CERM2
1 C716
CERM
20%6.3V
805
10uF
2
1 C339
10uF
805
6.3V20%
CERM2
1 C358
402CERM
0.01uF16V20%
2
1 C37420%
805CERM6.3V
10uF
2
1 C360
CERM
10uF
805
6.3V20%
2
1 C359
6.3V20%10uF
805CERM2
1 C415
6.3V
10uF
805
20%
CERM2
1 C409
CERM
20%
805
10uF6.3V
2
1 C411
10uF
805
6.3V20%
CERM2
1 C412
10V
0.1uF
402CERM
20%2
1 C86510uF20%
805CERM6.3V2
1 C438
10uF6.3VCERM805
20%2
1 C413
20%10V
402
0.1uF
CERM2
1 C414
FERR-220-OHM
0402
21
L58
FERR-220-OHM
0402
21
L55
0402
FERR-220-OHM21
L56
0402
FERR-220-OHM21
L57
0402
FERR-220-OHM21
L65
0402
FERR-220-OHM21
L66
FERR-220-OHM
0402
21
L61
0402
FERR-220-OHM21
L62
FERR-220-OHM
0402
21
L60
10uF6.3VCERM805
20%2
1 C380
0805
FERR-220-OHM21
L63
SM
FERR-10-OHM-500MA21
L64
0805
FERR-220-OHM21
L67
FERR-10-OHM-500MA
SM
2 1
L68
FERR-10-OHM-500MA
SM
21
L59
SOT-363BAS16TW
43
DP7
SOT-363BAS16TW
52
DP7
SOT-363BAS16TW
61
DP7
OMIT
SM
21
XW30OMIT
+2_5V_SLEEP_NECK2SM
21
XW27
OMIT
+1_8V_SLEEP_NECKSM
21
XW28
OMIT
+1_5V_SLEEP_NECKSM
21
XW29
+2_5V_SLEEP
+1_8V_SLEEP
+1_5V_SLEEP
+3V_SLEEP
402CERM16V
0.01uF20%
2
1 C878
CERM
20%
805
6.3V
10uF
2
1 C877
CRITICAL
ATI_TPVDD_BYP
SOT-25AMM1571J
INT_TMDS
51
4
2
3
U54
1UF10%6.3VCERM603
INT_TMDS
2
1 C879
CERM402
16V10%0.01UF
INT_TMDS
2
1 C880805CERM6.3V20%10UF
INT_TMDS
2
1 C8810402
FERR-220-OHM
INT_TMDS
21
L69CRITICALSOT-25AMM1571J
51
4
2
3
U55
1UF10%6.3VCERM603
2
1 C889
05%1/10WFF8052
1R721
SM
FERR-10-OHM-500MA
EXT_TMDS
2 1
L16
10uF
CERM805
6.3V20%
2
1 C304
402
10V20%0.1uF
CERM2
1 C327
402
10V20%0.1uF
CERM2
1 C647
EXT_TMDS
0
402MF
1/16W5%
21
R255
INT_TMDS
1/16WMF
5%
402
0
2
1R251
0
603
5%
MF1/16W
INT_TMDS
2
1R268
603MF1/16W5%0
EXT_TMDS
2
1R279
M10-CSP6464MBBGA
OMIT
M6
F20
AF19
AG23
N6
F19
AE8
AF7
AE7
AF6
AE25
AD25
AF10
AF9
AE9
AF8
AF26
AE26
R5
P5
N5
M5
L5
E25
E24
E23
E22
E21
E17
E16
K5
E15
E14
E11
E10
E9
H26
E7
J26
J25
H25
J5
F22
F21
F16
F15
F9
F8
AA6
Y6
R6
K6
H5
G26
AD5
AC5
AB5
AA5
Y5
W5
V5
U5
T5
G5
F5
N26
M26
L26
K26
AA25
K27
Y28
T25
AC26
AB26
AA26
Y26
V26
U26
T26
R26
P26
L25
K25
F26
E26
E20
E19
E18
E13
E12
E6
E5
AF20
AH23
AH15
AH14
AH13
AG15
AG14
AG13
AG12
AJ11AK11
AK30AK29
A6A7
AF18
AH17
AG17
AH16
AF17
AG16
AF16
AE16
AJ21AK21
AH12
AF22
AE23
AE22
AF24
AF23
AJ22
AE20
AE19AJ23
AF21
AE21
U44
B051-6531
21 44
+1_8V_GPU_PNLPLL
+1_5V_AGP_GPU
+1_8V_DVO_F
+1_8V_GPU_PNLIO
+1_8V_GPU_TP_PLL
+1_8V_GPU_MEMPLL
+GPU_MEMCORE
+3V_GPU_FLT
GPU_MEM_IO_FLT
+GPU_MCLK
+1_8V_GPU_AVDDQ
+2_5V_GPU_A2VDD
+1_8V_GPU_PLL
+1_8V_GPU_AVDD
+1_8V_GPU_VDDDI
+2_5V_GPU_PNLIO
ATI_DVODMODE
+GPU_MEM
+1_8V_ATI_PVDD
+1_8V_GPU_TP_PLL
GPU_CORE_OK
+1_8V_ATI_TPVDD
+3V_SLEEP_NECK
+2_5V_GPU
+3V_GPU
+2_5V_GPU
+1_8V_GPU
+1_8V_GPU_VDDDI
+1_8V_GPU
+GPU_MCLK
+GPU_MEM
+1_8V_ATI_PVDD
+1_8V_GPU
+1_8V_GPU_AVDDQ
+1_8V_GPU
+1_5V_AGP
+1_8V_GPU+1_5V_AGP
+GPU_MEM
+GPU_MEM
+2_5V_GPU
+3V_GPU
+1_8V_GPU
+1_8V_GPU
+GPU_MEM
+2_5V_GPU
ATI_PVDD_BYP
+1_8V_ATI_PVDD
+2_5V_GPU
GPU_CORE_OK
+2_5V_GPU_A2VDD
38
38
21
21
38
38
38
38
38
19
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38
38
21
21
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21
21
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21
38
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12
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18
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18
21
18
19
18
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18
12
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www.kythuatvitinh.com
G2
D2S2
G1
S1
D1
G
SD
G
SD
G
SD
G
D
S
G
DS
SYM_VER-1
MINIDIN
S
D
G
32
G
DS
D S
G
LCFILTER
LCFILTER
LCFILTER
SYM_VER-1
SYM_VER-1 SYM_VER-1
32
32
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NOTE: DVI_HPD SHARES Q68 WITH ALS
(+5V_DDC SLEEP)
S-VIDEO/COMP OUT INTERFACE
(55mA requirement per DVI spec)
(TMDS_DN<4>)(TMDS_DN<5>)
PLACE NEAR C5A & C5B
DVI DDC CURRENT LIMIT
SHARES LOGIC WITH KB RESET SIGNALS (PG 28)
INVERTER INTERFACE
DVI POWER SWITCH
no-panel case (development)100K pull-ups are for
NC
LVDS INTERFACE
INVERTER EXPECTS ACTIVE HIGH SIGNAL
VIDEO CONNECTORS
3904 from turning
has active, self-
Pulldown prevents
powered DDC clock
on when DVI monitor
pullup.
Isolation required for DVI power switch
(TMDS_DP<3>)
(TMDS_DP<4>)
(TMDS_DN<3>)
3V LEVEL SHIFTERS
DDC_CLK is isolated from
into DDC_CLK. Since host rails
system is shutdown or asleep..
power key on remote deviceis pressed, 5V will be driven
Power key detect path when
NV17M DURING SHUTDOWN. WHEN
will be low, TP0610 will turnon, driving SOFT_PWR_ON_L low.
Isolation will be disabled as well.device path into DDC_CLK.
As host rails rise, TP0610will turn off, as will remote
(LVDS DDC POWER)
(TMDS_DP<5>)
PLACE NEAR 3, 11 & 19
COMPARATOR ENABLED BY NV17MAP
Power key detect path
HPD will be driven to 5V.on remote device pressed,3.3V. When power keyHPD normally driven towhen system is running.
GPIO.
NC
NC
NC
NC
NC
NC
NEED PULL-DOWN BECAUSE THISSIGNAL IS TRISTATED INITIALLY
Panel has 2K pull-ups
LCD POWER SWITCHES
Place GND shorts at
Place GND shorts atgraphics controller
graphics controller
PLACE CLOSE TO CONNECTORTMDS FILTERING
PLACE CLOSE TO CONNECTORANALOG FILTERING
VGA VSYNC BUFFERS
EXTERNAL VIDEO (DVI) INTERFACE
LCD INTERFACEBECAUSE OF BOARD REAL ESTATE
NOTE: Pulldown for DVI_HPD provided by DVI power switch interface
+5V_MAIN
5%100K1/16W
MF4022
1R317
0.001UF20%
CERM50V
4022
1 C739
CHGND2
0.001UF
CERM
20%50V
4022
1 C749
0.001UF20%50VCERM402
2
1 C746
10UF
805CERM
20%6.3V2
1 C440
FERR-1K-OHM-EMI
SM
12
L33
SM-1
400-OHM-EMI21
L31
+PBUS
+3V_PMU
0.1UF20%10V
CERM402
2
1C552
SC70-6FDG6324L
4
3
2
6
Q7
SC70-6FDG6324L
1
5
6
Q7
402
0.25%50VCERM
3.3PF
2
1 C685
402
3.3PF
CERM50V0.25%
2
1 C676
3.3PF50VCERM
0.25%
4022
1 C684
10K5%1/16WMF4022
1R671
402MF1/16W5%10K
2
1R662
2N7002DWSOT-363
1
2
6
Q38
+3V_SLEEP
SOT-3632N7002DW
4
5
3
Q38
5%
402
100K1/16WMF
2
1R694
402
100pF5%50VCERM2
1 C669
4.7K5%1/16WMF4022
1R655
4.7K5%
1/16WMF402 2
1R661
402
100pF5%50VCERM2
1 C706
0.01UF
CERM50V20%
6032
1 C710
CHGND1
SM-1
400-OHM-EMI21
L23
2N7002DWSOT-363
4
5
3
Q35
0.5AMP-13.2V
SM
21
F1
MBR0530
SM21
D21
CERM50V5%
402
100pF
2
1 C1
SM2N3904
2
3
1 Q441/16WMF402
5%
20K21
R700
0.1UF20%10VCERM402
2
1 C69668.1K
1%1/16W
MF402 2
1R680
CRITICAL
LMC7211SM
2
5
1
3
4U46
402MF
1/16W1%
10K21
R663
402MF
1/16W1%
100K
2
1R681
402
10K1%
1/16WMF
2
1R686
2N7002DWSOT-363
1
2
6
Q41
100K5%
402MF
1/16W
2
1R696
2N3904SM
2
3
1 Q421/16WMF402
5%
10K21
R691
330
402MF
1/16W5%
2
1R688
SMTP0610
2
1
3
Q40
603
20%50V
CERM
0.01UF
2
1C712
CHGND1
CHGND1
SM
FERR-10-OHM-500MA21
L26
3.3UH
0603
21
L25
3.3UH
0603
21
L29
CERM50V20%
603
0.01UF
2
1C717
3.3UH
0603
21
L27
FERR-10-OHM-500MA
SM
21
L28
+3V_SLEEP
+5V_SLEEP
SM
21
XW12
SM
21
XW13
0
402MF
1/16W5%
2
1R7065%1/16WMF402
0
2
1R1
5%1/16WMF402
10021
R670
100
402MF
1/16W5%
21
R649
100
402MF
1/16W5%
21
R650
SM-2MT
CRITICAL
4
3
2
1
6
5
J7SM-1
400-OHM-EMI21
L32
SM165-OHM
CRITICAL
4
32
1
L21
CRITICAL
RT-THMH1177
5
4 3
2 1
1110
98
J15
CHGND40.001uF
20%50V
CERM402
2
1C416
100K5%
1/16WMF4022
1R320
402CERM50V20%
0.001uF
2
1C452
CHGND4
+3V_SLEEP
402MF
1/16W5%
100K
2
1R342
CRITICAL
G-501973F-RT-SM
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
34
33
J6
CHGND4
0.001uF
402CERM50V20%
2 1
C500
CHGND4
0.001uF
402CERM50V20%
2
1C474
FERR-250-OHM
SM
21
L6
+3V_MAIN
603
5%50VCERM
2200pF21
C484
TSOPSI3443DV
4
3 6
5
2
1
Q11
5%
100K
1/16WMF402
21
R391
100K5%1/16WMF4022
1R400
SM2N7002
2
1
3
Q8
74LVC32TSSOP
14
3
2
1
7
U24
680
402MF
1/16W5%
2 1
R690
CHGND5
CHGND2
20%50VCERM603
0.01uF21
C744
F-RT-TH
CRITICAL
QH1112
9
8
7
6
5
4
3
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
36
35
34
33
32
31
C5B C5A
C4
C3
C2
C1
J14
402MF
1/16W5%
021
R724
402MF1/16W5%68K
2
1R705
+PBUSTP0610
SM
2
1
3
Q45 5%1/16WMF402
330
2
1R703
47UF
CERM1210
20%6.3V
2
1C703
SOT-3632N7002DW
4
5
3
Q41
402MF
1/16W5%
100K
2
1R704
402MF
1/16W5%
100K
2
1R213
0.001uF20%50V
CERM402
NO STUFF
2
1C449
CERM50V10%
560PF
4022
1C702
402CERM50V10%
560PF
2
1C718
402
560PF10%50V
CERM 2
1C714
402CERM50V10%
560PF
2
1C707
402
560PF10%50V
CERM 2
1C724
402CERM50V10%
560PF
2
1C713
SM-220MHZ
CRITICAL
43
21
FL2
SM-220MHZCRITICAL
43
21
FL1
CRITICALSM-220MHZ
43
21
FL3
CRITICAL
90-OHM-200MASM
4
32
1
L72
CRITICAL
TMDS_CONN_DN<1>
90-OHM-200MASM
4
32
1
L73
TMDS_CONN_DP<2>
TMDS_CONN_DN<2>
CRITICAL
90-OHM-200MASM
4
32
1
L74
CRITICAL
74AHC1G32SM
VGA_VSYNC_BUF
5
4
2
1
3
U57
CRITICAL
SM
VGA_HSYNC_BUF
74AHC1G325
4
2
1
3
U56
402MF
1/16W5%
3321
R718
402MF
1/16W5%
3321
R714
+3V_MAIN
B051-6531
22 44
GPU_HPD
GPU_DVI_DDC_DATA
VGA_VSYNC
ATI_HSYNC
VGA_HSYNC
VGA_R
VGA_G
GPU_R
GPU_G
GPU_B VGA_B
TMDS_CLKP
TMDS_CLKN TMDS_CONN_CLKN
TMDS_CONN_CLKPTMDS_DN<0>
TMDS_DP<0> TMDS_CONN_DP<0>
TMDS_CONN_DN<0>
TMDS_DN<2>
TMDS_DP<2>
TMDS_DN<1>
TMDS_DP<1> TMDS_CONN_DP<1>
GPU_TV_GND2
GPU_TV_GND1
GPU_COMP
GPU_C
TV_GND2
TV_COMP
GPU_Y
TV_Y
FP_PWR_EN
LCD_DIGON_L
LCD_PWREN_L
+3V_LCD_SW
+3V_LCD
HPD_PWR_SNS_EN
HPD_ON
HPD_PWR_SW
COMP_ENABLEHPD_BASE
SOFT_PWR_ON_L
COMP_DISABLE
DVI_HPD_UF
HPD_4V_REF
DVI_DDC_CLK_UF DVI_TURN_ON
+5V_DDC_SLEEP
DVI_TRUN_ON_ILIM
DVI_TURN_ON_BASE
GPU_DVI_DDC_CLK
DVI_HPD
DVI_DDC_DATA
DVI_DDC_CLK
DDC_CLK_ISO
BRIGHT_PWM
FP_PWR_EN
FP_PWR_EN_L
INV_ON_PWM
BRIGHT_PWM_UF
LVDS_L0P
LVDS_L0N
LVDS_U0N
CLKLVDS_LN
CLKLVDS_LP
LVDS_L2P
LVDS_L2N
LVDS_L1P
LVDS_L1N
LVDS_U0P
LVDS_U1N
LVDS_U1P
LVDS_U2N
LVDS_U2P
CLKLVDS_UN
CLKLVDS_UP
TMDS_CONN_DP<1>
TMDS_CONN_DP<2>
TMDS_CONN_DN<1>
TMDS_CONN_DN<2>
VGA_HSYNC
VGA_B
TMDS_CONN_CLKN
TMDS_CONN_CLKP
VGA_G
DVI_HPD_UF
VGA_R
DVI_DDC_CLK_UF
+5V_INV_UF_SW
+5V_INV_SW
+12_8V_INV
HPD_ON_RC
LVDS_DDC_DATA
LVDS_DDC_CLK
DVI_HPD_DIV
VGA_VSYNC
TMDS_CONN_DN<0>
TMDS_CONN_DP<0>
+5V_DDC_SLEEP
+5V_DDC_SLEEP_UF
TV_C
TV_GND1
ATI_VSYNC
DVI_DDC_DATA_UF
39
39 39
39
39
39
39
39
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39
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39
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30
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37
37
37
37
37
37
39
39
37
37
39
39
39
39
39
39
39
39
39
38
39
22
22
22
19
19
22
19
22
22
22
19
19
19 22
20
20 22
22 20
20 22
22
20
20
20
20 22
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22
22
19
39
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19
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19
19
19
19
19
19
19
22
22
22
22
22
22
22
22
22
22
22
22
38
38
38
19
19
22
22
22
22
38
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www.kythuatvitinh.com
NC
PC4/OCMP2_B/AIN4PC3/ICAP2_B/AIN3
PC1/OCMP1_B/AIN1PC2/MCO/AIN2
PC5/EXTCLK_A/AIN5
PC0/ICAP1_B/AINO
PB3/OCMP2_APB2/ICAP2_APB1/OCMP1_APB0/ICAP1_A
PB6/SCKPB7/SS*
PB5/MISOPB4/MOSI
PA6/SDAIPA7/TDO
PA5/RDIPA4/SCLI
PA1/ICCDATAPA0/ICCCLK
PA2PA3
VDD
RESET*
OSC2OSC1
TEST
VSS
VCC
VSS
E2E1E0 SDA
SCL
WC*
GND
LED3
LED1
LED2EN
SET
Y
B
A
V+
V-
Y
B
A
G
D
S
G
D
S
G
D
S
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
SPIDEY FLEX
XIN
LMU
KB LED DRIVER
NC
NOTE: KEEP L39 CLOSE TO C781
XOUT
SLEEP LED
BOOT BANGER E2PROM
LMU PULL-DOWNS
LMU/BOOTBANGER/SPIDEY
NC
NC
NC
NC
NC
NC
NC
NC
(PMU_PWM)
SHDN_L
MLB - ALS SENSOR
1/ BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)
6/ JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
5/ JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
4/ JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
BOOT BANGING SIGNAL DEFINITION
2/ PMU_HRESET_L (3V INPUT INTO LMU)
3/ BBANG_JTAG_TCK (REGULAR OUTPUT)
KEYBOARD PULLUPS
INPUTS ARE 3V TOLERANT
INPUTS ARE 3V TOLERANT
NC
PULL-UP FOR I2C (IN-CIRCUIT PROGRAMMING)
LOAD CAPACITANCE = 16PF
0.1UF20%10V
402CERM2
1 C663
27PF
CERM50V5%
4022
1 C648
0.1UF20%10V
402CERM2
1 C637
CRITICAL
8.000M
8X4.5MM-SM
21
Y4
27PF5%50V
CERM402
2
1C654
ST72264G2H1
BGA
OMIT
256KX8
A4
B4
B5
A3
F2
E2
F3
E3
F4
D3
A2
A1
B1
B2
C3
D2
E1
F1
E4
F5
F6
E6
C6
D4
A6
A5
B3
C4
E5
D6
D5
D1
C5
C2
C1
B6
U52
SM11/16W5%
10K81
RP53
SM1
10K
5%1/16W
72
RP53
1/16W5%
10K
SM1
72
RP52
10K
5%1/16WSM1
81
RP52
SM1
10K
5%1/16W
63
RP53
SM1
10K
5%1/16W
54
RP53
CRITICALBBANG
16KX8_M24128BSOI
7
4
8
5
6
3
2
1
U32
BBANG
402MF1/16W5%10K
2
1R5330.1UF
CERM402
10V20%
BBANG
2
1 C638
BBANG
402MF1/16W5%10K
2
1R532
+3V_PMU
100K
1/16WMF402
5%
21
R771
25V1/32W5%10K
SM
8
9
2
1
6
4
7
3
10
5
RP43
SM
10K5%
1/32W25V
4
7
3
6
9
8
2
1
10
5
RP42
SOT23-6MAX1916
CRITICAL
3
4
5
6
2
1
U35
SN74AUC1G08SC70-5
BBANG
4
5
3
2
1
U2
NO_BBANG
0
5%1/16WMF402
21
R6
+3V_MAIN
+3V_MAIN
SOT23-6MAX4236EUTT
CRITICAL
2
6
5
1
4
3
U40
+3V_MAIN
1K
1%1/16WMF402
21
R619
402MF
1/16W5%
120K21
R617
0.22UF
20%
CERM402
6.3V
21
C67515K1%
1/16WMF4022
1R615
402MF1/16W1%1K
2
1R618
0.1UF
402CERM10V20%
2
1 C673
402MF
1/16W1%
1K21
R606
402MF
5%5.1M1/16W
2
1R605
16V
402CERM
20%0.01UF
2
1 C670BS520
CRITICAL
TH
21
PD1
10K5%
1/16WMF402
BBANG
2
1R40
BBANG
402MF
1/16W5%
10K
2
1R62
SN74AUC1G08SC70-5
BBANG
4
5
3
2
1
U4
475%1/16WMF4022
1R550
10K5%
1/16WMF402
BBANG
2
1R39
+3V_SLEEP
402MF
1/16W5%
2.2K21
R552
0.1UF
402CERM10V20%
2
1 C6550.1UF20%10VCERM402
2
1 C636
10K5%1/16WSM1
5
4
RP52
+3V_MAIN
1/16W5%
MF402
100
2
1R772
+5V_MAIN
2.2K5%
1/16WMF4022
1R773
2N3906SM
2
3
1
Q74
1/16WMF402
5%
4.7K21
R777
5%1/16WMF402
10K
2
1R776SM-1
400-OHM-EMI
2
1
L52
603CERM50V10%
470pF
2
1C828
2N7002DWSOT-363
1
2
6
Q75
2N7002DWSOT-363
4
5
3
Q75
402
5%1/16WMF
10K
2
1R534
40FLH-SM1-TBF-RT-SM
CRITICAL
9
8
7
6
5
40
4
39
38
37
36
35
34
33
32
31
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
42
41
J24
+3V_MAIN
SM2N3906 2
3
1
Q73
200
5%1/16WMF402
2 1
R770
+3V_MAIN
5%
402MF
1/16W
2002 1
R582
SM2N3906 2
3
1
Q33
SM-1
400-OHM-EMI2 1
L46
0.001UF50VCERM
20%
4022
1 C814
+5V_SLEEP
400-OHM-EMI
SM-1
12
L47
SM-1
400-OHM-EMI2 1
L49
0.001UF
402
20%50VCERM2
1 C816
+3V_PMU
MF1/16W5%
22
402
2 1
R587
0.001UF50VCERM
20%
4022
1 C660
SM-1
400-OHM-EMI1 2
L11
0.001UF
402
20%
CERM50V 2
1C656
400-OHM-EMI
SM-1
21
L48
0.001UF50VCERM
20%
4022
1 C815
402MF
5%01/16W
2
1R568
402MF1/16W5%100K
2
1R598
+3V_PMU
SOT-3632N7002DW
1
2
6
Q35
+3V_MAIN
402MF
1/16W1%
17.4K21
R581
?IC,LMU,P84341S1194 CRITICALU521
23 44051-6531 B
Y4 ALT FOR SIWARD197S0040197S0008
KBD_X<7>
KBD_Y<4>
KBD_CONTROL_L
+5V_TPAD_SLEEP
KBD_X<8>
KBD_X<5>
+3V_HALL_EFFECT
JTAG_CPU_TDI
JTAG_CPU_TRST_L
ST7_SENSOR5_SCK_PU
ST7_SENSOR5_SDA_PU
EEPROM_WP_PD
MAXBUS_SLEEP
KBD_LED2_OUT
TPAD_F_TXD
TPAD_F_RXD
LID_CLOSED_L
KBD_LED1_OUT
PWR_BUTTON_L
KBD_X<0>
KBD_SHIFT_L
KBD_OPTION_L
KBD_COMMAND_L
KBD_FUNCTION_L
KBD_CAPSLOCK_LED
KBD_ID
KBD_Y<7>
KBD_Y<6>
KBD_Y<5>
KBD_Y<3>
KBD_Y<2>
KBD_X<9>
KBD_Y<0>
KBD_Y<1>
KBD_X<1>
KBD_X<2>
KBD_X<3>
KBD_NUMLOCK_LED
KBD_X<4>
KBD_X<6>
PMU_CPU_HRESET_L
CPU_HRESET_L
BBANG_HRESET_L
JTAG_CPU_TCK
BBANG_JTAG_TCK
BBANG_TCK_EN
MAXBUS_SLEEP
KBD_SHIFT_L
KBD_CONTROL_L
KBD_FUNCTION_L
KBD_COMMAND_L
KBD_OPTION_L
KBD_X<1>
KBD_X<0>
KBD_X<8>
KBD_X<7>
KBD_X<6>
KBD_X<9>
KBD_X<2>
KBD_X<4>
KBD_X<3>
KBD_X<5>
KBD_ID
TPAD_TXD
TPAD_RXD
PMU_LID_CLOSED_L
CAPSLOCK_LED
CAPSLOCK_LED_L
SOFT_PWR_ON_L
NUMLOCK_LED
NUMLOCK_LED_L
MLB_PHOTODIODE
GAIN_SETTING2
MLB_ALS_GAIN_SW
MLB_ALS_OP_COMP
MLB_ALS_OP_IN
MLB_ALS_OUT_FB MLB_ALS_OUT
SUTRO_ALS_OUT
MLB_ALS_OUT
ST7_SLEEP_LED_H
JTAG_CPU_TMS
PMU_LID_CLOSED_L
MLB_ALS_GAIN_SW
ST7_KBD_LED_OUT
BBANG_JTAG_TCK
PMU_CPU_HRESET_L
SUTRO_ALS_GAIN_SW
BBANG_HRESET_L
SLEEP
ST7_PB6_PD
ST7_SENSOR4_SDA_PD
INT_I2C_CLK0
ST7_SENSOR4_SCK_PD
INT_I2C_DATA0
ST7_ICP_SEL_PD
ST7_RESET_L
ST7_SENSOR5_SDA_PU
ST7_SENSOR4_SDA_PD
ST7_SENSOR5_SCK_PU
ST7_SENSOR4_SCK_PD
ST7_PB6_PD
ST7_ICP_SEL_PD
INT_I2C_DATA0
INT_I2C_CLK0
EEPROM_ADDR
SLEEP_LED_ISLEEP_LED_L
SLEEP_LED_UF
SLEEP_LED
ST7_OSC2
ST7_XTAL_IN
PMU_SLEEP_LED
PMU_SLEEP_LED_L
SLEEP_LED_SW_L
ST7_SLEEP_LED_H
ST7_KBD_LED_OUT
KBD_LED2_OUT
KBD_LED1_OUT
KBD_LED_EN
KBD_LED_SET
IO_RESET_L
ST7_OSC1
38
38
34
34
23
23
16
16
39
15
15
35
39
39
39
39
30
39
39
39
39
8
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
8
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
34
33
23
23
23
23
39
39
27
30
39
30
39
30
30
39
39
39
7
38
38
39
30
30
30
30
30
30
39
39
39
39
39
30
39
39
30
30
30
30
30
30
7
39
39
7
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
39
39
30
30
39
39
30
13
13
13
13
39
38
38
26
23
30
23
38
23
23
38
5
5
23
23
5
23
39
39
39
23
25
23
23
23
23
23
39
23
30
30
30
30
30
23
30
30
23
23
23
39
23
23
23
5
23
5
23
5
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
30
30
23
30
22
30
23
23
24
23
23
5
23
23
23
23
23
24
23
25
23
23
11
23
11
23
23
23
23
23
23
23
11
11
25
30
23
23
23
23
17
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
INTERNAL I/O CONNECTORS
+5V_HD_SLEEP AND +3V_SLEEP?ANY SEQUENCING REQUIREMENT BETWEEN
BLUETOOTH/LEFT-SIDE USB
EIDE SERIES TERMINATIONPLACE TERMINATORS NEAR INTREPID
NC
NCNC
NC
NCNC
PLACE SERIES R CLOSE TO INTERPID
IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V
OPTICAL DRIVE INTERFACE (EIDE)
PLACE PULLUP RESISTORS CLOSE TO INTREPID
HARD DRIVE INTERFACE (UATA100)
NC
WIRELESS INTERFACE
10K5%
1/16WMF402 2
1R63
402
33
1/16W5%
MF
21
R74
402
5%
MF1/16W
10K
2
1R8
402
22
MF
5%1/16W
21
R685%
402
1/16WMF
2221
R35 MF
5%1/16W
22
402
21
R613
33
1/16W5%
MF402
12
R75
+5V_SLEEP
NO STUFF
10K5%1/16WMF4022
1R411
402MF1/16W5%10K
2
1R442
402MF1/16W5%10K
2
1R458
M-ST-SM1
CRITICAL
9
8
7
6
50
5
49
48
47
46
45
44
43
42
41
40
4
39
38
37
36
35
34
33
32
31
30
3
29
28
27
2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J10
NO STUFF
5%1/16W
MF402
100K
2
1R452
402MF
1/16W5%
20K
2
1R441
402MF1/16W5%10K
2
1R36
MF1/16W5%
402
2221
R32
5%1/16WMF402
8221
R76
5%1/16WMF402
8221
R81
10K
402
1/16WMF
5%
2
1R612
MF1/16W5%
402
2221
R30
MF1/16W5%
402
8221
R116
5%1/16WMF402
2221
R95
402MF
1/16W5%
3321
R31
402MF
1/16W5%
3321
R69
+3V_SLEEP
MF1/16W
10K5%
4022
1R94
82
MF1/16W5%
402
21
R93
10PF
402
5%50VCERM2
1 C86
+3V_SLEEP
SM1
33
5%1/16W
54
RP2
33
5%1/16WSM1
72
RP9
33
5%1/16WSM1
81
RP9
1/16W5%
33
SM1
63
RP9
1/16W5%
33
SM1
81
RP2
1/16W5%
33
SM1
63
RP21/16W5%
33
SM1
54
RP9
33
5%1/16WSM1
72
RP2
1/16W5%
33
SM1
81
RP3
1/16W5%
33
SM1
54
RP41/16W5%
33
SM1
72
RP3
33
5%1/16WSM1
63
RP3
1/16W5%
33
SM1
72
RP4
1/16W5%
33
SM1
72
RP51/16W5%
33
SM1
63
RP4
33
5%1/16WSM1
81
RP5
1/16W5%
33
SM1
54
RP5
1/16W5%
33
SM1
81
RP41/16W5%
33
SM1
54
RP3
33
5%1/16WSM1
63
RP5
SM11/16W5%
3381
RP50
SM11/16W5%
3372
RP13
SM1
33
5%1/16W
54
RP13
1/16W5%
33
SM1
63
RP50
SM1
33
5%1/16W
63
RP49
SM1
33
5%1/16W
63
RP10
SM11/16W5%
3381
RP13
SM11/16W5%
3327
RP10
SM11/16W5%
3327
RP50
SM11/16W5%
3336
RP13
SM11/16W5%
3327
RP49
SM11/16W5%
3345
RP50
1/16W5%
33
SM1
81
RP10
SM11/16W5%
3318
RP49SM1
33
5%1/16W
45
RP10
SM1
33
5%1/16W
63
RP11
SM1
33
5%1/16W
54
RP11
SM1
33
5%1/16W
45
RP49
SM1
33
5%1/16W
81
RP11
SM11/16W5%
3372
RP11
MF1/16W5%22
4021
2R745
+3V_MAIN+5V_MAIN
15K5%1/16WMF4022
1R64
402MF1/16W5%15K
2
1R71
M-ST-SM1
CRITICAL
9
8
7
6
50
5
49
48
47
46
45
44
43
42
41
40
4
39
38
37
36
35
34
33
32
31
30
3
29
28
27
2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J13
54550-1490F-RT-SM
CRITICAL
9
8
7
6
5
4
3
2
14
13
12
11
10
1
16
15
J3
402MF
1/16W5%
10K
2
1R730
+3V_SLEEP
3V_HD_LOGIC
402MF
1/16W5%0
2
1R602
402MF1/16W5%0
5V_HD_LOGIC
2
1R601
F-ST-SM1QT510806-L111
CRITICAL
9
84
83 82
81
80
8
79
78 77
76 75
74 73
72 71
70
7
69
68 67
66 65
64 63
62 61
60
6
59
58 57
56 55
54 53
52 51
50
5
49
48 47
46 45
44 43
42 41
40
4
39
38 37
36 35
34 33
32 31
30
3
29
28 27
26 25
24 23
22 21
20
2
19
18 17
16 15
14 13
12 11
10
1
J20
20K5%
MF1/16W
4022
1R603
MF1/16W
10K5%
4022
1R101
B051-6531
4424
RF_DISABLE_L_SPN
PCI_AD<0>
PCI_AD<2>
PCI_AD<4>
PCI_AD<6>
ROM_OE_L
PCI_CBE<0>
PCI_AD<11>
PCI_AD<13>
PCI_AD<15>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_AD<16>
PCI_AD<18>
PCI_PAR
PCI_AD<20>
PCI_AD<22>
AIRPORT_IDSEL
PCI_AD<24>
PCI_AD<26>
PCI_AD<28>
AIRPORT_PME_L_TP
AIRPORT_PCI_GNT_L
EIDE_OPTICAL_DATA<12>
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_DATA<15>
EIDE_OPTICAL_DMA_RQ
EIDE_OPTICAL_RD_L
EIDE_OPTICAL_DMAACK_L EIDE_OPTICAL_INT
EIDE_OPTICAL_DATA<4>
EIDE_OPTICAL_DATA<5>
EIDE_OPTICAL_DATA<6>
EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_RST_L
NEC_LEFT_USB_PWREN
LEFT_USB_DP
EIDE_OPTICAL_DATA<8>
EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_DATA<11>
+HD_LOGIC_SLEEP
+5V_HD_SLEEP
HD_DATA<4>
HD_CS0_L
HD_ADDR<0>
HD_DMACK_L
HD_DIOR_L
HD_DATA<6>
HD_DATA<7>
HD_RESET_L
PCI_AD<18>
HD_DATA<11>
HD_DATA<1>
HD_DATA<0>
HD_DATA<5>
HD_CS0_L
HD_DATA<14>
HD_DATA<9>
HD_DATA<6>
HD_DATA<12>
HD_DATA<15>
HD_ADDR<2>
HD_ADDR<1>
HD_DATA<13>
HD_DATA<10>
HD_ADDR<0>
HD_DATA<4>
HD_DATA<8>
HD_DATA<2>
HD_DATA<7>
HD_DATA<3>
UIDE_DATA<5>
UIDE_DATA<0>
UIDE_DATA<1>
UIDE_DATA<11>
UIDE_DATA<2>
UIDE_DATA<3>
UIDE_DATA<6>
UIDE_DATA<9>
UIDE_DATA<14>
UIDE_CS0_L
UIDE_DATA<4>
UIDE_DATA<8>
UIDE_DATA<10>
UIDE_ADDR<0>
UIDE_DATA<12>
UIDE_DATA<15>
UIDE_ADDR<1>
UIDE_DATA<13>
UIDE_ADDR<2>
UIDE_IOCHRDY
UIDE_DIOR_L HD_DIOR_L
HD_RESET_L
UIDE_DIOW_L HD_DIOW_L
HD_DMACK_L
EIDE_OPTICAL_ADDR<0>
EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<2>
EIDE_OPTICAL_DATA<1>
EIDE_OPTICAL_DATA<0>
EIDE_OPTICAL_WR_L
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_ADDR<1>
EIDE_OPTICAL_CS0_L
PCI_CBE<3>
PCI_AD<25>
PCI_AD<27>
AIRPORT_PCI_REQ_L
PCI_CBE<2>
PCI_AD<17>
PCI_AD<23>
PCI_AD<21>
PCI_AD<19>
PCI_AD<7>
PCI_AD<8>
ROM_RW_L
PCI_AD<10>
PCI_AD<12>
PCI_CBE<1>
PCI_AD<14>
ROM_CS_L
PCI_AD<1>
PCI_AD<5>
ROM_ONBOARD_CS_L
PCI_AD<3>
UIDE_DATA<7>
PCI_IRDY_L
UIDE_DMACK_L
UIDE_RST_L
HD_IOCHRDY
UIDE_CS1_L HD_CS1_L
HD_DATA<5>
HD_DATA<2>
HD_DATA<3>
HD_DATA<0>
HD_DATA<1>
HD_DMARQ
HD_DATA<15>
HD_DATA<14>
HD_DATA<13>
HD_DATA<12>
HD_DATA<10>
HD_DATA<8>
HD_DATA<9>
HD_DATA<11>
HD_IOCHRDY
HD_ADDR<2>
HD_CS1_L
HD_DIOW_L
HD_INTRQ
LEFT_USB_DM
SUTRO_ALS_GAIN_SW
NEC_LEFT_USB_OVERCURRENT
SUTRO_ALS_OUT
BT_USB_DP
AIRPORT_CLKRUN_L
EIDE_DATA<8> EIDE_OPTICAL_DATA<8>
EIDE_DATA<9> EIDE_OPTICAL_DATA<9>
EIDE_DATA<10>
EIDE_DATA<12> EIDE_OPTICAL_DATA<12>
EIDE_DATA<13> EIDE_OPTICAL_DATA<13>
EIDE_DATA<14> EIDE_OPTICAL_DATA<14>
EIDE_DATA<11> EIDE_OPTICAL_DATA<11>
EIDE_DATA<2> EIDE_OPTICAL_DATA<2>
EIDE_DATA<0> EIDE_OPTICAL_DATA<0>
EIDE_DATA<15> EIDE_OPTICAL_DATA<15>
EIDE_DATA<1> EIDE_OPTICAL_DATA<1>
EIDE_DATA<6> EIDE_OPTICAL_DATA<6>
EIDE_DATA<4> EIDE_OPTICAL_DATA<4>
EIDE_DATA<3> EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<7>
EIDE_CS0_L EIDE_OPTICAL_CS0_L
EIDE_ADDR<2> EIDE_OPTICAL_ADDR<2>
EIDE_DATA<5> EIDE_OPTICAL_DATA<5>
EIDE_ADDR<1> EIDE_OPTICAL_ADDR<1>
EIDE_ADDR<0> EIDE_OPTICAL_ADDR<0>
EIDE_DATA<7>
EIDE_OPTICAL_DMA_RQEIDE_DMARQ
EIDE_OPTICAL_DMAACK_LEIDE_DMACK_L
EIDE_OPTICAL_CS1_LEIDE_CS1_L
EIDE_OPTICAL_RD_LEIDE_RD_L
EIDE_OPTICAL_IOCHRDYEIDE_IOCHRDY
EIDE_OPTICAL_WR_LEIDE_WR_L
EIDE_OPTICAL_INTEIDE_INT
EIDE_OPTICAL_RST_LEIDE_RST_L
PCI_AD<30>
AIRPORT_PCI_INT_L
CLK33M_AIRPORT
MAIN_RESET_L
PCI_AD<31>
PCI_AD<29>
PCI_AD<9>
HD_ADDR<1>
BT_USB_DM
EIDE_OPTICAL_DATA<10>
39
39
39
39
39
39
39
39
39
39
39
37
39
39
39
39
37
39
39
39
39
39
39
39
39
39
39
39
39
39
30
39
39
39
37
37
37
37
39
37
37
37
39
39
39
39
37
26
39
37
39
37
37
37
26
39
37
37
39
37
39
39
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37
37
37
37
39
37
37
37
37
39
37
26
37
37
37
26
26
26
26
37
26
26
26
37
37
37
37
26
24
37
26
37
26
26
26
24
37
26
26
37
26
37
37
26
26
26
26
26
37
26
26
26
26
37
26
20
26
26
26
17
17
17
17
39
26
17
17
17
26
26
26
26
17
17
26
17
26
17
17
17
39
39
39
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
17
39
39
39
39
39
39
39
39
39
26
17
17
26
17
26
26
17
17
17
39
17
17
26
17
39
17
17
17
26
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
17
39
18
17
17
17
39
39
12
12
12
12
12
17
12
12
12
17
17
17
17
12
12
17
12
17
12
12
12
39
37
37
37
37
37
37
37 37
37
37
37
37
37
39
37
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37
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37
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38
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37
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37
37
37
37
12
37
37
37
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37
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37
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37
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37
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37
37
37
37
37
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37
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37
37
37
37
37
37 37
37
37 37
37
37
37
37
37
37
37
37
37
37
17
12
12
39
17
12
17
17
12
12
12
12
12
12
17
12
12
12
12
39
12
37
17
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
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39
39
37
37 37
37 37
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37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37
37 37
37 37
37 37
37 37
37 37
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37 37
37 37
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37 37
37 37
37 37
37 37
37 37
12
39
36
17
12
12
12
37
37
37
39
9
9
9
9
9
12
9
9
9
12
12
12
12
9
9
12
9
12
39
9
9
9
12
24
24
24
24
24
24
24 24
24
24
24
24
24
26
26
24
24
24
24
24
24
38
33
24
24
24
24
24
24
24
24
9
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13 24
24
13 24
24
24
24
24
24
24
24
24
24
24
12
9
9
12
12
9
12
12
9
9
9
9
9
9
12
9
9
9
9
9
9
13
12
13
13
24
13 24
24
24
24
24
24
13
24
24
24
24
24
24
24
24
24
24
24
24
13
26
23
26
23
14
39
13 24
13 24
13
13 24
13 24
13 24
13 24
13 24
13 24
13 24
13 24
13 24
13 24
13 24
24
13 24
13 24
13 24
13 24
13 24
13
24 13
24 13
24 13
24 13
24 13
24 13
24 13
24 13
9
14
12
14
9
9
9
24
14
24
www.kythuatvitinh.com
G
D
S
G
D
S
G
D
S
G
D
S
GND
PWM1/
PWM2/
ADR SELECT/TACH4/
ADR ENABLE#PWM3/
THERM#
TACH3
TACH2SMBALERT#
TACH1XTO
+2.5V/
VCC
SMBALERT#SDASCL
D1+D1-
D2+D2-
G
D
S
G
D
S
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CAPS FOR EMI EXPERIMENTATION ONLY
PLACE XW9 CLOSE TO 5V SWITCHER (U27)
PLACE CLOSE TO BATTERY CHARGER/VCORE
FAN INTERFACE
THERM ISOLATION
SND - INTREPID
FAN CONTROLLER
AUDIO - SNAPPER
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
PLACE UNDERNEATH UPPER RAM
PLACE CAPS AS CLOSE TO THERMISTORS AS POSSIBLEPLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY
PLACE CLOSE TO CPU
MAIN1
MAIN2
ALTERNATE1
ALTERNATE2
NC
DEBUG JUMPERS
MODEM
TO CONNECTORPLACE CLOSE
FAN/MODEM/SOUND/SLEEP LED/DEBUG
DEBUG POWER BUTTON
SERIAL DEBUG INTERFACE
RIGHT FAN (GPU)
SUPPORTS BOTH THE LAST DASH AND Q52 SOFT MODEM
TO CONNECTORPLACE CLOSE
LEFT FAN (CPU)
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
SOUND BOARD (SOUSAPHONE)
CERM10V
0.1UF20%
4022
1C711
1/16WMF
5%
402
10K
2
1R623
+3V_MAIN
+5V_SLEEP
2N3904SM
2
3
1 Q39
+5V_SLEEP
2N3904SM
2
3
1 Q66
1/16WMF
5%
402
10K
2
1R679 SM-2MT
CRITICAL
3
2
1
5
4
J4
SM-2MT
CRITICAL
3
2
1
5
4
J2
+5V_MAIN +3V_MAIN
805CERM6.3V20%10UF
2
1 C469
CERM10V
402
20%0.1UF
NO STUFF
2
1 C47810K
MF1/16W5%
4022
1R405
CERM805
6.3V20%10UF
2
1 C7670.1UF
NO STUFF
20%10VCERM402
2
1 C513
NO STUFF
SM2N3904
2
3
1 Q62
SM2N3904
NO STUFF
2
3
1 Q47
5%
MF1/16W
0
402
21
R719
402MF
0
1/16W5%
21
R725
402MF
5%
0
1/16W
21
R713
0
1/16WMF402
5%
21
R716
0
5%1/16WMF402
NO STUFF
21
R723
NO STUFF
402MF
1/16W5%
021
R726
NO STUFF
0
5%1/16WMF402
21
R710
NO STUFF
0
5%1/16WMF402
21
R717
+5V_MAIN
SERIAL_DEBUG
CRITICAL
SMM-ST-5087
9
8
7
65
4
3
2
101
J16
NO STUFF
603MF
1/16W5%
021
R527
CRITICAL
QT510166-L010F-ST-SM1
9
87
65
43
2
1615
1413
1211
10
1
J8
NO STUFF
603MF
1/16W5%
021
R537
NO STUFF
603MF
1/16W
0
5%
21
R553
TSOP
SI3446DV
436521
Q36
TSOP
SI3446DV
436521
Q37
CERM10V20%
1206
4.7UF
2
1 C135
4.7UF
1206
20%10VCERM2
1 C134
CRITICAL
QT510306-L111F-ST-SM1
9
87
65
4
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
J12
+5V_MAIN
+3V_MAIN
SM
21
XW9
2N7002DWSOT-363
1
2
6
Q26
SOT-3632N7002DW
4
5
3
Q26
100K5%
SM11/16W
2
7
RP44
+5V_MAIN
SM1
100K1/16W5%
1
8
RP44
SOT-3632N7002DW
1
2
6
Q31
SOT-3632N7002DW
4
5
3
Q31
SM11/16W5%100K
5
4
RP44
100K
SM11/16W5%
6
3
RP44
CRITICAL
ADT7460
QSOP
3
9
4
7
616
1
8
5
15
2
10
11
12
13
14
U3
10K
402MF1/16W5%
2
1R42
SOT-3632N7002DW
4
5
3
Q78
2N7002DWSOT-363
1
2
6
Q78
+5V_SLEEP
402MF1/16W5%10K
2
1R293
402MF1/16W5%10K
2
1R295
+3V_MAIN
+5V_SLEEP
100K1/16W
402MF
5%
2
1R689
402MF1/16W5%10K
2
1R695
402MF
5%10K1/16W
2
1R692
402CERM
NO STUFF
0.01UF20%16V
2
1 C895
402CERM16V20%0.01UF
NO STUFF
2
1 C899
20%0.01UF16VCERM402
NO STUFF
2
1 C896
402
NO STUFF
20%
CERM16V
0.01UF
2
1 C897
0.01UF20%16VCERM402
NO STUFF
2
1 C898
0402
FERR-220-OHM21
L82
FERR-220-OHM
0402
21
L77
FERR-220-OHM
0402
21
L80
FERR-220-OHM
0402
INT_AUDIO_TO_SND_F21
L81
0402
FERR-220-OHM21
L76
FERR-220-OHM
0402
21
L78
0.01UF
CERM402
16V20%
NO STUFF
2
1 C900
FERR-220-OHM
0402
21
L79
402CERM16V20%0.01UF
NO STUFF
2
1 C901
2N7002DWSOT-363
4
5
3
Q87
SOT-3632N7002DW
1
2
6
Q87
5%
MF402
1/16W
100K
2
1R811
402
100K
MF1/16W5%
2
1R812
+3V_MAIN
402MF
5%100K1/16W
2
1R813
0.1UF
402CERM10V20%
2
1 C903
1UF
603
10V20%
CERM2
1 C904402MF
1/16W5%
1021
R814
0.001UF20%50VCERM402
2
1 C681
0.001UF20%50VCERM402
2
1 C668
0.001UF20%50VCERM402
NO STUFF
2
1 C678
0.001UF20%50VCERM402
NO STUFF
2
1 C651
NO STUFF
402CERM50V20%0.001UF
2
1 C690NO STUFF
402CERM50V20%0.001UF
2
1 C846
NO STUFF
0.001UF20%50VCERM402
2
1 C905NO STUFF
20%50V
0.001UF
402CERM2
1 C688
4425051-6531 B
SND_AMP_MUTE_F
SND_AGND
INT_AUDIO_TO_SND
THERM1_DP
FANR_TACH
ADT7460_FAN2_PWM
FANL_TACH
ADT7460_FAN1_PWM
ADT7460_VCC
ADT7460_THERM
INT_I2C_CLK2
FANL_GND
FANL_TACH
FANL_PWM
INT_PU_RESET_L
SND_CLKOUT_F
SND_TO_AUDIO_F
SND_HP_MUTE_INV
SND_SYNC_F
SND_TO_AUDIO
SND_AMP_MUTE
SND_HW_RESET_L
SND_SCLK_FSND_SCLK
SND_HW_RESET_L_F
SND_CLKOUT
FANR_GND
FANR_TACH
FANR_PWM
FANR_PWM
COMM_RING_DET_L
SND_HP_MUTE
SND_HP_MUTE_INV
SND_AMP_MUTE
AMP_CONTROL
SND_HP_MUTE_L
AMP_CONTROL
COMM_GPIO_L
COMM_TRXC
COMM_TXD_L
COMM_RXD
COMM_RTS_L
COMM_DTR_L
PWR_BUTTON_L
SND_AMP_MUTE_L
MOD_BITCLK
COMM_SHUTDOWN
MOD_CLKOUT
MODEM_USB_DP
MOD_SYNC
INT_MOD_DTI
COMM_RESET_L
PMU_NMI_BUTTON_L
PMU_RESET_BUTTON_L
ADT7460_ADR_EN_L
ADT7460_VCORE_MON
INT_I2C_DATA1
INT_I2C_CLK1
FANL_PWM
CPU_M_DP
THERM1_DMCPU_M_DM
THERM2_DPSUPPLY_M_DP
THERM2_DMSUPPLY_M_DM
THERM1_DPTHERM1_A_DP
THERM2_DPTHERM2_A_DP
THERM1_DMTHERM1_A_DM
THERM2_DMTHERM2_A_DM
INT_I2C_CLK2
INT_AUDIO_TO_SND_F
SND_HP_SENSE_L
SLEEP
SLEEP_LED
SUPPLY_M_DP
CPU_M_DM
CPU_M_DP
THERM2_A_DM
THERM2_A_DP
SUPPLY_M_DM
SND_CLKOUT_F
THERM1_A_DP
THERM1_A_DM
+3V_PMU_AVCC
THERM_L_OC
THERM_INV
ADT7460_THERM
THERM2_DP
SND_SCLK_F
INT_I2C_DATA2 MOD_DTO
SND_LIN_SENSE_L
INT_I2C_DATA2
SND_AMP_MUTE_F
SND_HW_RESET_L_F
MODEM_USB_DM
THERM1_DP
THERM2_DM
THERM1_DM
SND_TO_AUDIO_F
SND_SYNC_FSND_SYNC
39 35
39
39
39
39
39
39
39
39
33
39
39
39
39
37
39
25
39
39
39
30
39
39
39
39
36
36
39
39
39
30
39
39
39
39
39
39
39
39
39
39
39
39
37
39
39
39
14
14
39
37
37
37
37 37
37 37
37 37
37 37
25
39
30
39
37
37
37
37
38
37
25 39
39
25
37
37
37
37
39
25
25
38
14
25
25
25
25
14
38
25
25
13
25
25
25
25
14
25
14
25 14
25
14
38
25
25
25
14
25
25
25
14
25
14
14
14
14
14
14
23
14
14
14
14
14
14
14
14
30
30
5
13
13
25
25
25 25
25 25
25 25
25 25
25 25
25 25
25 25
14
25
14
23
23
25
25
25
25
25
25
25
25
25
30
30
25
25
25
14 14
14
14
25
25
14
25
25
25
25
25 14
www.kythuatvitinh.com
AVDDVDD
VDD_PCI
AD3
AD4
AD5
AD2
AD0
AD1
VSS
AD6
AD7
AD17
AD16
AD15
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD27
AD26
AD25
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD28
AD29
AD30
AD31
CBE0
CBE1
CBE2
CBE3
PAR
PERR
GNT
DEVSEL
IDSEL
FRAME
IRDY
TRDY
STOP
REQ
SERR
CRUN
SMI
VBBRST
VCCRST
INTA
INTB
INTC
PCLK
PME
LEGC
XT2
DM1
DP1
DM2
DP2
DM3
DP3
RSDM4
RSDM2
RSDP2
RSDM3
RSDP3
RSDP1
XT1/SCLK
RSDM1
DM4
DP4
DM5
DP5
RREF
OCI1
OCI2
OCI4
OCI3
OCI5
RSDP4
RSDM5
RSDP5
PPON1
NC1
NC2
SMC
TEB
NTEST1
PPON2
PPON3
PPON4
PPON5
AVSS(R)
AVSS
SRCLK
SRDTA
SRMOD
NANDTEST
AMC
TEST
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
PLACE NEAR J3
Series Rpaks required tofacilitate NAND-tree testing
(NEC_USB_DBP)
(NEC_USB_DBM)
(NEC_USB_DAP)
(NEC_USB_DAM)
USB 2.0
(PCI_AD<27>)
OD
OD
OD
OD
OD
OD
OUT
OUT
OUT
OUT
OUT
IPD
IPD
IPD
Low/Full/High Speed (External)
BUBBA CONNECTOR
PLACE NEAR J12
SUTRO CONNECTOR
FOR BOTH CBUS AND USB2
SERR_L AND PERR_L
IPD
INTREPID USB CONSTRAINTS
IPD
IPD
Low/Full/High Speed (External)
RIGHT PORT
Tie to GND at ball N11
NEED PULL-UP RESISTORS IN CASE USB 1.0 IS USED FOR PORT POWER
LEFT PORT
HAS DEDICATED PULL-UP
Y7 LOAD CAPACITANCE IS 16PF
402MF
1/16W5%22
NEC_USB
2
1R784
+3V_MAIN
+3V_MAIN
NEC_USB
05%
MF603
1/16W
2
1R796
NEC_USB
402MF
1/16W1%
9.09KNEC_AVSS_F21
R794
SM
FERR-EMI-100-OHM
NEC_USB
21
L54
5%50VCERM
NEC_USB
402
27PF
2
1 C649
NEC_USB
30.0000M
CRITICAL
8X4.5MM-SM
21
Y5
402
NEC_USB
CERM50V5%27PF
2
1 C657NEC_USB
402MF1/16W5%100
2
1R590
RSDP5_TP
RSDM5_TP
RSDP4_TP
RSDM4_TP
RSDP3_TP
NEC_USB
NEC_UPD720101_USB2FBGA
CRITICAL
P8
L9
N2
B2
A2
B14
H14
N14
P10
N1
D8
F11
J11
G4
D12
H12
L12
M11
B13
N13
B1
C8
M4
H3
L13
N8
E2
A3
A12
A13
P12
P3
D7
H4
G12
D13
F13
H13
J13
P2
C9
B8
G1
L8
N7
G3
P9
N9
M9
L6
M7
H1
C14
E14
G14
J12
K13
E13
F12
H11
K14
M14
P11
C6
A9
C10
C11
A11
C12
D9
H2
A8
J4 B9
A10
B10
B11
B12
M8
M6
P6
M10
L7
F4
A7
B7
C7
B3
D6
F3
C13
E12
G13
J14
L14
D14
F14
G11
K12
M13
G2
N6
C3
F1
J3
M2
N11
M12
P13
N12
N10
P7
L1
L2
M1
N3
M3
N4
A6
B6
P4
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
N5
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
P5
M5
U39NEC_USB36
4021%
21
R795
361% 402
NEC_USB
21
R792
NEC_USB
4021% 36
21
R791
NEC_USB
361% 402
21
R790
+3V_MAIN
MF1/16W5%
15K
402
NEC_USB
21
R600
0.1uF20%10VCERM402
NEC_USB
2
1 C665
MF1/16W5%
15K
402
NEC_USB
21
R591
NEC_USB
0.1uF20%
402CERM10V
2
1 C661
SM11/16W5%10K
NEC_USB5
4
RP45
SM1
10K5%1/16W
NEC_USB6
3
RP45
NEC_USB
1/16W5%10K
SM1
7
2
RP45
SM11/16W5%10K
NEC_USB8
1
RP45
5%
47
1/16WSM1
NEC_USB
5
6
7
8
4
3
2
1
RP54
5%
47
1/16WSM1
NEC_USB
5
6
7
8
4
3
2
1
RP55
402MF
1/16W5%
0
NEC_USB
21
R84
INTREPID_USB
0
5%1/16WMF402
21
R78
0
5%1/16WMF402
INTREPID_USB
21
R96
NEC_USB
0
5%1/16WMF402
21
R83
NEC_USB
0
5%1/16WMF402
21
R545
INTREPID_USB
402MF
1/16W5%
021
R554
402MF
1/16W5%
0
INTREPID_USB
21
R530402MF
1/16W5%
0
NEC_USB
21
R540
NEC_USB
MF1/16W5%10K
4021
2R586
SM11/16W5%10K
6
3
RP52
+3V_MAIN
NEC_USB
402MF1/16W5%10K
2
1R783
NEC_USB
1.5K5%1/16WMF4022
1R789
402MF1/16W5%1.5K
NEC_USB
2
1R793
402
10K5%1/16WMF
INTREPID_USB
2
1R53110K5%
MF
INTREPID_USB
402
1/16W
2
1R56
MF1/16W5%
603
0
NEC_USB
21
R286
NEC_USB
20%10VCERM402
0.1uF
2
1 C8410.1uF20%10VCERM
NEC_USB
4022
1 C836NEC_USB
CERM10V20%
402
0.1uF
2
1 C843
NEC_USB
402CERM10V20%0.1uF
2
1 C838NEC_USB
20%10VCERM402
0.1uF
2
1 C834NEC_USB
20%10VCERM402
0.1uF
2
1 C829NEC_USB
402CERM10V20%0.1uF
2
1 C840
NEC_USB
20%10VCERM402
0.1uF
2
1 C842
0.1uF20%10VCERM402
NEC_USB
2
1 C837
0.1uF
NEC_USB
CERM10V20%
4022
1 C830NEC_USB
20%10VCERM402
0.1uF
2
1 C83310uF20%6.3VCERM805
NEC_USB
C845
4.7K5%
NEC_USB
MF1/16W
402 2
1R551
10uF20%6.3VCERM805
NEC_USB
C6670.1uF20%10VCERM402
NEC_USB
2
1 C8440.1uF
402CERM10V20%
NEC_USB
2
1 C839
051-6531 B
4426
ALT FOR SIWARDY5NEC_USB197S0038197S0608
NEC_XT2_R
NEC_RREF
NEC_OCI<3>
NEC_OCI<4>
NEC_OCI<5>
NEC_RIGHT_USB_PWREN
NEC_LEFT_USB_PWREN
NEC_NC2_TP
NEC_NC1_TP
SMC_TP
NEC_NANDTESTEN_TP
SRMOD_TP
SRCLK_TP
TEST_TP
TEB_TP
NTEST1_TP
RSDM3_TP
NEC_PPON4_TP
RIGHT_USB_DP
+3V_NEC_VDD
NEC_AVSS_F
+3V_NEC_VDD
USB_D1M
USB_D1USB_D1M 5 MIL SPACING
USB_D1P
USB_D2M
5 MIL SPACINGUSB_D2USB_D2M
USB_D2P
5 MIL SPACINGUSB_D2USB_D2P
USB_DAM USB_DA 5 MIL SPACING
USB_DAP USB_DA 5 MIL SPACING
5 MIL SPACINGUSB_DCUSB_DCM
5 MIL SPACINGUSB_DCUSB_DCP
NEC_USB_RSDP2
NEC_USB_DBP
NEC_USB_DBM
NEC_USB_DAM
NEC_USB_RSDP1 NEC_USB_DAP
NEC_PCI_PERR_L
NEC_PCI_SERR_L
NEC_USB_DBP
NEC_USB_DBM RIGHT_USB_DM
NEC_USB_DAP LEFT_USB_DP
LEFT_USB_DMNEC_USB_DAM
NEC_PPON3_TP
NEC_AMC_TP
NEC_XT2
NEC_AVDD
NEC_XT1
NEC_IDSEL
PCI_AD<1>
PCI_AD<0>
PCI_AD<4>
PCI_AD<3>
PCI_AD<2>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<21>
PCI_AD<22>
PCI_AD<20>
PCI_AD<23>
PCI_AD<24>
PCI_AD<26>
PCI_AD<25>
PCI_AD<29>
PCI_AD<28>
PCI_AD<30>
PCI_AD<31>
PCI_CBE<0>
PCI_CBE<1>
PCI_CBE<2>
PCI_CBE<3>
PCI_PAR
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_DEVSEL_L
USB2_PCI_REQ_L
USB2_PCI_GNT_L
NEC_PCI_PERR_L
NEC_PCI_SERR_L
NEC_SMI_L_TP
NEC_NANDTESTOUT_TP
NEC_OCI<2>
NEC_OCI<1>
PCI_AD<27>
NEC_PCI_INTA_L
NEC_PCI_INTB_L
NEC_PCI_INTC_L
USB2_PCI_INT_L NEC_PCI_INTA_L
NEC_PCI_INTB_L
NEC_LEGC
NEC_PPON5_TP
NEC_PCI_INTC_L
NEC_IO_RESET_L
NEC_MAIN_RESET_L
NEC_PME_L
IO_RESET_L
PMU_PME_L
MAIN_RESET_L NEC_MAIN_RESET_L
NEC_PME_L
NEC_IO_RESET_L
NEC_CRUN_L
CLK33M_USB2
NEC_USB_RSDM1
NEC_USB_RSDM2NEC_RIGHT_USB_OVERCURRENTNEC_OCI<2>
NEC_LEFT_USB_OVERCURRENTNEC_OCI<1>
5 MIL SPACINGUSB_D1USB_D1P
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
30
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
39
39
37
39
37
37
37
37
37
37
37
39
39
39
39
39
39
39
39
39
39
37
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
37
37
24
37
24
24
24
24
24
24
24
37
37
37
37
37
37
37
37
37
37
24
30
20
39
39
39
39
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
24
24
17
24
17
17
17
17
17
17
17
24
24
24
24
24
24
24
24
24
24
17
27
18
39
39
37
38
38
26
26
26
26
26
26
26
37
37
37
37
37
37 37
37 37
37 37
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
17
17
12
17
12
12
12
12
12
12
12
17
17
17
17
17
17
17
17
17
17
12
23
30
17
36
39
39
26
26
32
24
39
39
39
39
32
26
26
26
14
14
14
14
14
14
14
14
14
14
14
37
26
26
26
37 26
26
26
26
26 32
26 24
24 26
36
38
36 9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
12
12
9
12
9
9
9
9
9
9
9
12
12
12
12
12
12
12
12
12
12
12
12
26
26
26
26
9
26
26
26
14 26
26
26
26
26
26
17
14
14 26
26
26
12
37
37
32 26
24 26
14
www.kythuatvitinh.com
VFB
SW
MODE
RUN
VIN
GND
G
D
S
G
D
S
TX_EN
TXD7TXD6TXD5TXD4
TX_ER
GTX_CLK
125CLK
RX_CLK
TXD0
TXD3TXD2TXD1
TX_CLK
VDDOX
VDDOH
VDDO
DVDD
CTRL10
MDC
CRSCOL
RX_ERRX_DV
RXD7
RXD1RXD2RXD3RXD4RXD5RXD6
RXD0
MDI1-MDI2+MDI2-MDI3+
MDI1+MDI0-MDI0+
AVDD
VSSC
XTAL2
HSDAC-HSDAC+
S_CLK-S_CLK+
XTAL1
S_OUT-S_OUT+
S_IN-S_IN+
COMA
RESET
INT+INT-/
MDIO
LED_LINK1000LED_LINK100
GNDSEL_2.5VSEL_OSC
TRST
RSET
TDOTDI
TCKTMS
CONFIG5CONFIG6
CONFIG4
CONFIG0CONFIG1CONFIG2CONFIG3
LED_TXLED_RX
LED_DUPLEX
LED_LINK10
MDI3-
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_ALT_ITEM
PUT CRYSTAL CIRCUIT CLOSE TO PHY
ASLEEP ON BATTERY (SAVES POWER)PLACES PHY IN "COMA" MODE WHEN
SEL_BDT
001
PLACE CLOSE TO
Short shielded RJ-45
R2EQV = R2A||R2B
R2AR2B
VOUT = 0.8V*(1+R2EQV/R1)
R1
MARVELL 88E1111
Ethernet routing priority:
MDI pairs and all RJ45 pairs
1. Decoupling caps
3. RX SERIES TERMINATION - LOCATE NEAR PHY
2. TX SERIES TERMINATION - LOCATE NEAR LINK
Sandwich each RJ54 pair between chassis grounds
Must maintain 50-ohms trace impedance on all
All differential signals should be close,
via count, and short if possible
parallel, matched lengths, with minimum
10/100/1000 ETHERNET
PLACE RESISTORS CLOSE TO PHY
NC
NC
NC
NC
NC
NC
PLACE ALL SERIES RES CLOSE TO PHY
(000)
(111)
(110)
(111)
(101)
(000)
SEE CONFIG TABLES(BELOW)
(000)
Y3’S LOAD CAPACITANCE IS 20PF
PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96
PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85
PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78
NC
NC
NC
NC
NC CONFIG DEFINITIONS
101110
100
010011
000
111
BIT[2:0]
LED_LINK10
LED_DUPLEXLED_RXLED_TXVSS
VDDO
LED_LINK100LED_LINK1000
PIN
PHYADR[0]PHYADR[3]
BIT[0]
ANEG[1]DIS_125MODE[0]
75/50 OHMMODE[3]
BIT[1]
INT_POL
ENA_XCANEG[2]
MODE[1]
CONFIG INPUTS
DIS_SLEEP
PHYADR[4]PHYADR[1]
BIT[2]
PHYADR[2]ENA_PAUSE
ANEG[0]ANEG[3]
MODE[2]DIS_FC
CONFIG<6>
CONFIG<3>
CONFIG<5>CONFIG<4>
CONFIG<0>CONFIG<1>CONFIG<2>
PIN
PLACE CAPS AT TRANSFORMER PINS 1, 4, 7 & 10
ETHERNET CONNECTOR
49.91%
1/16WMF402 2
1R372
1/16W
402MF
1%49.9
2
1R381
MF1/16W
1%49.9
402 2
1R346
402MF1/16W1%49.9
2
1R355
33pF50V
CERM
5%
4022
1C55533pF
402
5%50V
CERM 2
1C491
MF1/16W5%
402
021
R353
CHGND1
8X4.5MM-SM
CRITICAL
25.0000M21
Y3
402MF
1/16W5%
10K
2
1R345
CHGND1
10%3KVCERM1808
100pF
2
1 C457
49.91%
MF402
1/16W
2
1R413
MF1/16W
1%49.9
4022
1R404
402MF1/16W
49.91%
2
1R42849.91%1/16WMF4022
1R406
CRITICAL
SM
XFR-ENET-1000BT
24
21
18
15
22
19
16
13
23
20
17
14
3
6
9
12
2
5
8
11
1
4
7
10
T1
0.01UF20%16VCERM402
2
1 C4540.01UF
402CERM16V20%
2
1 C4930.01UF
402CERM16V20%
2
1 C505
0.1UF
402CERM10V20%
2
1 C52020%10VCERM402
0.1UF
2
1 C5060.1UF20%10VCERM402
2
1 C4660.1UF
402CERM10V20%
2
1 C488
MF
1%49.9
402
NO STUFF
1/16W
2
1R39349.9
MF1/16W
1%
402
NO STUFF
2
1R403
402
5%1/16WMF
021
R370
5%
402MF1/16W
10K
2
1R335
402MF1/16W5%75
2
1R735
402MF1/16W5%75
2
1R7335%1/16WMF402
75
2
1R382
402MF1/16W5%75
2
1R347
0
MF1/16W5%
402
21
R344
5%1/16W
1.5K
MF4022
1R354
4.99K
402MF1/16W1%
2
1R380
10V20%
2.2uF
CERM805
2
1C755
1K
5%
402MF
1/16W
21
R343
0.01UF
402
20%
CERM16V
2
1 C5040.1UF
CERM
20%10V
4022
1 C4970.01UF16VCERM
20%
4022
1 C4760.1UF
402
10V20%
CERM2
1 C48710uF6.3V20%
805CERM2
1 C754
0.1UF
CERM
20%10V
4022
1 C5010.01UF
402
20%
CERM16V
2
1 C5030.1UF
CERM
20%10V
4022
1 C4530.01UF16VCERM
20%
4022
1 C4720.1UF
402
10V20%
CERM2
1 C46410uF
CERM805
20%6.3V
2
1 C496
SM
FERR-EMI-600-OHM12
L34
+2_5V_MAIN
CRITICAL
LTC3405SOT23-6
4
5
31
6
2
U14CRITICAL
SM1
3.3uH21
L5
665K1/16WMF402
1%
2
1R3345%50V
CERM402
22pF
2
1C471 49.9K1%
402MF1/16W
2
1R361
182K1%
402MF1/16W
2
1R362
NO STUFF
1/16WMF
05%
402 2
1R333
0.01UF16VCERM
20%
4022
1 C5020.1UF
402
10V20%
CERM2
1 C5170.01UF
402
20%
CERM16V2
1 C5110.1UF
CERM
20%10V
4022
1 C4920.01UF
402
20%
CERM16V2
1 C4750.1UF
CERM
20%10V
4022
1 C465
402
5%0
MF1/16W
2
1R319
1N914
SOT23
3 1
D1
+3V_MAIN
6.3V
805CERM
20%10uF
2
1 C486
20%
CERM805
6.3V
10uF
2
1C442
2N7002DWSOT-363
1
2
6
Q15
SOT-3632N7002DW
4
5
3
Q15
88E1111BCC
CRITICAL
54
55
53
48
26
72
66
52
96
88
21
5
7
9
4
20
19
18
17
16
14
12
11
47
46
50
44
49
75
77
81
82
80
79
56
13
3
94
2
86
87
89
90
91
93
92
95
30
28
24 43
42
41
39
34
33
31
29
25
68
69
73
74
76
70
23
38
37
8
97
85
71
67
62
57
15
10
6
1
51
84
58
59
60
61
63
64
65
27
83
78
45
40
36
35
32
22
U49
NO STUFF
5%1/16WMF402
20K21
R435
402MF1/16W5%0
2
1R427
RJ45RT-TH
CRITICAL
8
7
6
5
4
3
2
1
12
11
10
9
J17
402MF
1/16W5%
10K
2
1R371
0.01UF20%16VCERM402
2
1 C477
05%1/16WMF6032
1R465
CHGND1
0
805FF
1/10W5%
NO STUFF
21
R438
197S0603 197S0037 ALT FOR SIWARDALTERNATE Y3
27 44051-6531 B197S0037 ALTERNATE197S0703 Y3
ENET_HSDACM
ENET_VSSC
ENET_HSDACP
+2_5V_MARVELL_AVDD
ENET_COMA
RJ45_DN<0>
LTC3405_SW
ENET_CTAP_CHGND
+1_0V_MARVELL
RJ45_DN<3>
RJ45_DP<3>
RJ45_DN<1>
RJ45_DN<2>
RJ45_DP<2>
RJ45_DP<0>
RJ45_DP<1>
LED_LINK10
LED_LINK100
LED_RX_SPN
ENET_RST_L
ENET_ENERGY_DET
ENET_MDIO
ENET_MDC
ENET_RX_ER
ENET_CRS
ENET_COL
ENET_RX_DV
ENET_PHY_TXD<3>
ENET_PHY_TXD<4>
ENET_PHY_TXD<5>
ENET_PHY_TXD<6>
ENET_PHY_TXD<7>
ENET_PHY_TX_EN
ENET_PHY_TX_ER
CLKENET_PHY_GTX
ENET_PHY_TXD<1>
ENET_PHY_TXD<2>
ENET_PHY_TXD<0>
ENET_LINK_RXD<7>
ENET_LINK_RXD<6>
ENET_LINK_RXD<5>
ENET_LINK_RXD<4>
ENET_LINK_RXD<3>
ENET_LINK_RXD<2>
ENET_LINK_RXD<1>
ENET_LINK_RXD<0>
JTAG_ASIC_TRST_L
JTAG_ASIC_TMS
JTAG_ASIC_TCK
JTAG_ASIC_TDO_TP
MDI_M<3>
MDI_P<3>
MDI_M<2>
MDI_P<2>
MDI_M<1>
MDI_M<0>
AC_IN
SLEEP_L_LS5
CLKENET_PHY_TX
CLKENET_PHY_GBE_REF
CLKENET_PHY_RX
JTAG_ENET_TDI
MDI_P<1>
MDI_P<0>
MDI0_PD MDI1_PD MDI2_PD MDI3_PD
3405_MODE
3405_VFB
RJ45_C3_PD
CLKENET_LINK_TX
CLKENET_LINK_RX
CLKENET_LINK_GBE_REF
ENET_RSET
RJ45_C0_PD
RJ45_C1_PD
RJ45_C2_PD
INT_ENET_RST_L
IO_RESET_L
+2_5V_MARVELL
+2_5V_MARVELL
CLK25M_ENET_XOUT
CLK25M_ENET_XIN
CLK25M_XTAL_IN
35
30
31
34
26
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
37
39
39
39
30
33
36
36
36
23
38
38
38
37
38
38
38
37
37
37
37
37
37
37
14
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
39
37
37
37
37
37
37
29
19
36
36
36
13
37
37
13
13
13
14
17
27
27
36
36
www.kythuatvitinh.com
OE
GND
OUT
VCC
OSC
SYM_VER2
GND
OUTIN
BYP ADJ
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
(SYM_VER1)
VREG_PD
PADTHRML AGND
SM
TESTM
SE
D5D6
RESETZ
D7
DGND
PLLVDD1.8
3.3DVDD
PLLGND
PLL
3.3VDD
D3D4
D1D2
BMODE
PC2
PD
PC1
CPS
PC0
D0
LREQ
LPS
LCLK
3.3AVDD DVDD
1.8
TPA1+TPA1-
PCLK
TPA0-TPA0+
TPA2+TPA2-
C/LKON
CTL0CTL1
CNA
PINT
TPBIAS0TPBIAS1
XOXI
TPBIAS2
R1R0
TPB2-TPB2+
TPB1-TPB1+
TPB0-TPB0+
DS0DS1
ON/OFFGNDVOUT
FBVIN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
IADJ = 30NA AT 25C
R1
IADJ = 30NA AT 25C
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
PHY PIN 50
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
SN0201029PFP
(PC0 IS MSB, PC2 IS LSB)
PHY PIN 40
PHY PIN 21
PHY PIN 61
NC
NC
PHY PIN 38
(TXD-FWB)
(TXD-FWB)
(TXD-FWA)
(TXD-FWA)
(RXD-FWB)
(RXD-FWA)
(RXD-FWA)
NC
NC
TX0
SPEC SAID TO USE 10K
PHY PINS 4,14
PLACE NEAR PHY
0 -> BILINGUAL PORT
DSX STRAP OPTIONS
PHY PIN 25
PHY PINS 72,76
PHY PIN 28
NC
NC
R2
(MAY PROVIDE POWER, OR MAY REQUIRE UP TO 3W)
PWR CLASS = 100
RECEIVES POWERRESET PULSE WHEN PHY FIRSTINTERNAL PULLUP PROVIDESCAPACITOR IN CONJUCTION WITH
(TXD-FWA)
(TXD-FWB)
(RXD-FWA)
(RXD-FWA)
(RXD-FWB)
(RXD-FWB)
(TXD-FWA)
(TXD-FWB)
FW_TPB1N
FW_TPA1P
FW_TPB0N
FW_TPB1P
FW_TPB0P
FW_TPA1N
FW_TPA0N
FW_TPA0P
FIREWIRE
R2
R1
PLACE NEAR PHY
165MA MAX LOAD
1 -> A-ONLY PORT
(RXD-FWB)
RX0
PHY PIN 64
1MA(MAX) BUS HOLDER EACH
NC
1K
MF1/16W
5%
4022
1R445
CERM
20%6.3V
402
0.22UF
2
1C538
5%1/16WSM1
22
5
6
7
8
4
3
2
1RP38
5%1/16WSM1
22
5
6
7
8
4
3
2
1RP37
402MF
1/16W5%
2221
R485
22
5%1/16WMF402
21
R484
402
20%10VCERM
0.1UF
2
1 C808
CERM10V20%
402
0.1UF2
1 C540
16V
0.01UF
402CERM
20%2
1 C650
SM-A
98.304M
CRITICAL
4
3 1
2
G1
05%
MF402
1/16W
2
1R446
402
100K
NO STUFF
5%1/16W
MF2
1R761
402MF
1/16W5%
4721
R758
402MF1/16W5%100
2
1R760
402CERM6.3V20%0.22UF
2
1 C640
603CERM
20%10V
1UF21
C627
CERM
20%10V
1UF
603
21
C629
603
20%10V
1UF
CERM
21
C591
603
20%
1UF
CERM10V
21
C570
1
MF603
5%1/16W
21
R555
603MF
1/16W5%
121
R557
603MF
1/16W5%
121
R494
1
5%1/16WMF603
21
R470CRITICAL
SOT-23-1LTC1761ES5-BYP
51
2
3 4
U36
2.2UF
805CERM10V20%
2
1C641
402MF
1%16.2K1/16W
2
1R574
1/16W1%
MF402
27.4K21
R575
16.2K
402MF1/16W1%
2
1R577
27.4K
402
1%1/16WMF
2
1R57620%10V
CERM805
2.2UF
2
1C642
MF1/16W5%
1
603
21
R547
CERM603
20%10V
1UF
1
2 C810
603CERM
20%10V
1UF
2
1 C628
3.35%1/16WMF6032
1R556
603MF
1/16W5%
3.3
2
1R759
805CERM10V20%2.2UF
2
1 C546
805CERM10V20%2.2UF
2
1 C777
105%1/16W
402MF
2
1R447SM-1400-OHM-EMI
2
1
L7
LT1962-ADJ
CRITICAL
MSOP
5
1
7
6
8
4
3
2
U37
1
5%1/16WMF603
21
R564
CERM402
10V20%0.1UF
2
1 C634
402MF
1/16W1%
56.2
2
1R5161%1/16WMF402
56.2
2
1R509
603CERM
20%10V
1UF
2
1C605
402MF1/16W1%56.2
2
1R49556.2
402MF
1/16W1%
2
1R510
1%
MF402
1/16W
4.99K
2
1R496
402CERM25V5%
220PFC587
603
10V20%
CERM
1UF
2
1 C571
56.21%
1/16WMF4022
1R486
MF402
1%1/16W
56.2
2
1R478
1/16W
56.21%
MF4022
1R522
402MF1/16W1%4.99K
2
1R525
402CERM25V5%
220PFC614
1%1/16WMF402
56.2
2
1R524
1K
402MF1/16W5%
2
1R546
SDM20E40C
SC-59
3
2
1
D14
+5V_SLEEP
402MF
5%1K1/16W
2
1R775
PQFP
CRITICAL
TSB81BA3A
26
27
73
60
54
47
55
56
48
49
41
42
58
59
52
53
45
46
81
78
36
35
75
22
23
31
30
29
28
25
1
77
5
68
67
66
3
80
7
70
69
18
671
65
37
832
33
76
72
64
38
144
20
19
17
16
15
13
12
11
2
10
9
34
79
74
63
57
51
44
39
24
62
61
50
43
40
21
U29
CERM10V20%
402
0.1UF2
1 C80410UF
805CERM6.3V20%
2
1 C65310V
402CERM
20%0.1UF
2
1 C561
MF402
1/16W5%1K
2
1R471
10V
402
20%
CERM
0.1UF
2
1 C539
805CERM6.3V20%10UF
2
1 C58616V
0.01UF
402
20%
CERM2
1 C646
10UF20%6.3V
805CERM2
1 C645
20%10VCERM402
0.1UF
2
1 C577
100UF
SMD-3
10V20%
POLY2
1C818
220uH
SM-3
CRITICAL
21
L51
MBR0540SM
2
1
D20
CRITICAL
SMLM2594
8
7
56
4
U34
10UFN20P20%
2320CERM50V 2
1C635
402K1%
MF402
1/16W
2
1R781
CERM10V20%
402
0.1UF
2
1 C541
22
5%1/16WMF402
21
R469
402
20%10VCERM
0.1UF
2
1 C778
402
6.34K
1%1/16WMF
12
R563
10K5%1/16WMF4021
2R459
1/16WMF402
1K5%
2
1R437
1K
402
1/16W5%
MF2
1R436
1K5%
402MF
1/16W
2
1R444
5%470
402MF
1/16W
2
1R740
1K1/16WMF402
5%
2
1R464
4428B051-6531
SIWARD ALT FOR FW OSCG1197S0052 197S0011 ?
FW_TPB2_PD
FW_XI
FW_TPB1N
+1_95V_FW_DVDD
+1_95V_FW_PLLVDD
FW_CORE_BYP
+1_95V_FW_DVDD_PORT1
+3V_FW_AVDD_PORT0
FW_PORT1_SEL
FW_TPB0P
FW_TPB0N
FW_TPB1P
FW_R1
FW_R0
FW_BIAS1
FW_BIAS0
FW_PINT
FW_PHY_CNTL<0>
FW_PHY_CNTL<1>
FW_LKON
FW_TPA0N
FW_TPA0P
CLKFW_PHY_PCLK
FW_TPA1P
FW_TPA1N
+3V_FW_AVDD_PORT2
+1_95V_FW_DVDD_RX0
+3V_FW_AVDD
+3V_FW_AVDD_PORT1
CLKFW_PHY_LCLK
FW_PHY_LPS
FW_PHY_LREQ
FW_PC_PU
FW_PHY_PD
FW_PC_PD
FW_PHY_DATA<0>
FW_CPS
FW_BMODE
FW_PHY_DATA<4>
FW_PHY_DATA<1>
FW_PHY_DATA<2>
FW_PHY_DATA<3>
+1_95V_FW_PLL400VDD
+1_95V_FW_PLL500VDD
FW_PHY_DATA<5>
FW_PHY_DATA<6>
FW_PHY_DATA<7>
FW_PHY_RESET_L
FW_TESTM
FW_VREG_PD
+1_95V_FW_DVDD_TX0
LM2594_IN
+FW_PWR_OR
+3V_FW_UF
FWPLL_BYP
+FW_PWR_OR
FW_LINK_DATA<0>
FW_LINK_DATA<1>
FW_LINK_DATA<2>
FW_LINK_DATA<3>
FW_LINK_DATA<4>
FW_LINK_DATA<5>
FW_LINK_DATA<6>
+1_95V_FW_DVDD
FW_CORE_ADJ
FWB_TPB0
FW_OSC
+1_95V_FW_DVDD
+1_95V_FW_PLLVDD
FWB_TPB1
+3V_FW
FW_PHY_CNTL<0> FW_LINK_CNTL<0>
CLKFW_PHY_PCLK CLKFW_LINK_PCLK
FW_PHY_CNTL<1> FW_LINK_CNTL<1>
FW_OSC_EN
FW_PLL_ADJ
FW_LINK_DATA<7>
FW_INPUT_PD
+3V_FW
38
38
38
38
37
38
38
37
37
37
37
37
37
37
37
36
37
37
36
37
29
29
37
37
37
37
37
37
37
38
38
38
29
37 37
36 36
37 37
37
29
36
29
28
28
38
38
29
29
29
13
28
28
13
29
29
28
29
29
38
38
38
38
13
13
13
14
37
37
37
37
37
38
38
37
37
37
38
38
28
38
28
13
13
13
13
13
13
13
28
36
28
28
28
28 13
28 13
28 13
13
28
www.kythuatvitinh.com
G
D
SSYM_VER-1
SYM_VER-1
VP
VGND
TPI#
TPO
TPI
TPO#
SYM_VER-2
SYM_VER-2
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
FIREWIRE B - BILINGUAL
AREF
INPUT
PORT POWER SWITCH
SC
VG
VP
TPB
TPB(R)
TPB*
TPA(R)
TPA
ALL LOCAL GROUNDS PER 1394B SPECAREF NEEDS TO BE ISOLATED FROM
SO WHEN A BILINGUAL DEVICE
RUNNING OR WHEN ASLEEP ON AC
(AC)
NC
FIREWIRE PORTS
THERE’S NO DC PATH BETWEENIS PLUGGED TO BETA-ONLY DEVICE,
THEM (TO AVOID GROUND OFFSET ISSUE)
PER 1394B V1.33
LOGIC GROUND FOR SPEED SIGNALING
PORT 1514-0057
PMU_POWER_UP_LSTATE
SLEEP(AC)
(AC)RUN
SHUTDOWN
SHUTDOWN
RUN
(BATT)
(BATT)
1
1
(BATT)SLEEP 1
0
DCDC_ENPOWER_UP
0
0
0
0
1
0
0
1
1
1
1
2.99V +4_6V_BU
OFF
ON
0
1
OFF
ON
ON
+3V_PMU +3V_PMU
AC_IN
1
1
1
0
0
0
OFF(PULL-DOWN RESISTOR)
AND CONNECTION DETECTION CURRENTS
(TPI0R)
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
PORT 0
1
ENABLES PORT POWER WHEN MACHINE IS
BREF
LTC4210_ON
514S0059
FIREWIRE A
BREF SHOULD BE HARD CONNECTED TO
OUTPUTTPA*
MF1/16W5%1M
4022
1R472
16V20%
0.01UF
CERM402
2
1C5880.01UF
402CERM16V20%
2
1 C606
SM
1.5A-24V2 1
F2NDS9407
SOI
CRITICAL
3
2
1
4
8
7
6
5
Q67
SOT-3632N7002DW
4
5
3
Q58
SM
CRITICAL
90-OHM-200MA
4
32
1
L71
CRITICAL
90-OHM-200MASM
4
32
1
L70
SMB
B340B
CRITICAL
21
D29
1394B-Q41F-RT-SM
CRITICAL
9
8
7
6
5
4
3
2
15
14
13
12
11
10
1
J26
SMFERR-250-OHM
2
1
L40
FERR-250-OHMSM
2
1
L50
SM
1.5AMP-33V2 1
F5
0.1UF
805CERM50V20%
2
1 C556
SOT-363BAS16TW
61
DP5
MF
470K5%
402
1/16W
2
1R737
SOT-363BAS16TW
4 3
DP5
BAS16TWSOT-363
52
DP5
NO STUFF
16V
0.01UF
CERM
20%
4022
1C607
CHGND1
1/10W
805
05%
FF1
2 R453
F-RT-TH
CRITICAL
1394A
1
2
5
6
3
4
10987
J23
0.01UF
CERM402
20%16V
2
1 C8050.01UF
16V
402CERM
20%2
1 C807
0.01UF16V
402
20%
CERM2
1 C803
CRITICAL
260-OHM-330MASM1
4
12
3
L43
SM1
CRITICAL
260-OHM-330MA
4
12
3
L44
FF1/10W5%0
8052
1R779
CHGND6
CHGND6
NO STUFF
20%16VCERM402
0.01UF
2
1 C528
+3V_PMU
1/16WMF
5%
402
100K
2
1R736
402MF
1/16W5%
10K2 1
R741
CHGND1
470K5%1/16WMF4022
1R752
1/16WMF402
5%330K
2
1R743
0.01UF16V
402
20%
CERM2
1 C781
+PBUS
SOT-363BAV99DW
3
5
4
D26
BAV99DWSOT-363
6
2
1
D26
BAV99DWSOT-363
3
5
4
D28
SOT-363BAV99DW
6
2
1
D28
SOT-363BAV99DW
3
5
4
D15
BAV99DWSOT-363
6
2
1
D15
BAV99DWSOT-363
3
5
4
D12
BAV99DWSOT-363
6
2
1
D12
CHGND6
SOT-3632N7002DW
1
2
6
Q25
1N5227BSOT23
3
1 D80.001UF20%50VCERM402
2
1 C786
402CERM10V20%0.1UF
2
1 C784
402CERM16V20%
0.01UF
2
1C7740.01UF
402
16V20%
CERM2
1 C792
400-OHM-EMI
SM-1
21
L39
402MF
1/16W5%
10K21
R751
051-6531 B
29 44
+3V_FW_ESD_ILIM
+3V_FW_ESD
FW_VGND0
+3V_FW
+FW_PWR_PORTA
FW_VGND1
FW_TPB1P
FW_TPA1N
FW_TPA1P
FW_TPI1P
FW_PWREN_L
DCDC_EN
AC_IN AC_IN_FW_CNTL
PMU_POWER_UP_L
RUN_OR_AC
POWER_UP
FW_TPI1N
FW_TPO1N
FW_TPO1P
+FW_VP1
FW_PWR_GATE
+FW_SW
+3V_FW_ESD
+FW_PWR_OR
FW_TPO0R
+FW_FUSE
FW_TPB1N
FW_TPA0N_CONN
FW_TPA0P_CONN
FW_TPA0N
+FW_VP0
FW_TPB0N_CONN
FW_TPB0P_CONNFW_TPB0P
FW_TPB0N
FW_TPA0P
39 34 33
31
38
38
37
37
37
39
32
30
33
39
39
39
38
38
39
37
37
37
37
37
38
29
38
28
38
38
28
28
28
37
19
27
30
37
37
37
38
38
29
28
38
38
28
28
38
28
28
28
www.kythuatvitinh.com
P86_XCOUT
AVSSVSS
XINRESETVREFCNVSS
BYTEXOUT
AVCC
P50_WRL_WRP51_WRH_BHE
P52_RD
P65_CLK1P66_RXD1P67_TXD1
P74_TA2OUT_WP75_TA2IN_W
P60_CTS0_RTS0
P57_RDY_CLKOUTP56_ALE
P55_HOLDP54_HLDAP53_BCLK
P61_CLK0P62_RXD0P63_TXD0
P70_TXD2_SDA_TA0OUT
P72_CLK2_TA1OUT_VP73_CTS2_RTS2_TA1IN_V
P100_AN0
P90_TB0IN_CLK3P91_TB1IN_SIN3
P92_TB2IN_SOUT3P93_DA0_TB3INP94_DA1_TB4IN
P95_ANEX0_CLK4P96_ANEX1_SOUT4P97_ADTRG_SIN4
P87_XCIN
P85_NMIP84_INT2P83_INT1P82_INT0
P81_TA4IN_UP80_TA4OUT_U
P77_TA3INP76_TA3OUT
P107_AN7_KI3P106_AN6_KI2P105_AN5_KI1P104_AN4_KI0
P103_AN3P102_AN2P101_AN1
P64_CTS1_RTS1_CTS0_CLKS1
P71_RXD2_SCL_TA0IN_TB5IN
VCC
P01_D1P00_D0
P02_D2P03_D3P04_D4P05_D5P06_D6P07_D7
P10_D8P11_D9P12_D10P13_D11
P21_A1_D1_D0P22_A2_D2_D1P23_A3_D3_D2P24_A4_D4_D3P25_A5_D5_D4
P14_D12
P17_D15_INT5
P15_D13_INT3P16_D14_INT4
P20_A0_D0
P27_A7_D7_D6P26_A6_D6_D5
P30_A8_D7P31_A9P32_A10P33_A11P34_A12P35_A13P36_A14P37_A15
P45_CS1P46_CS2P47_CS3
P44_CS0P43_A19
P40_A16P41_A17P42_A18
32
32
32
RSET*MR*
GND
VCC
S
D
G
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_ALT_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
A29 DETECT CIRCUIT
3.30V2.97V-
0.99V0.33V-
2.97V2.31V-
4
CASE
3
2
1
AIRLINE
A29 (45W)
3.19V-
0.663V
2.661V
2.007V-2.066V
PIN VOLT
3.28V
1.65V-2.31V
ID VOLT
LIMITED FUNCTIONS
FULL FUNCTIONSNO BATTERY CHARGING
RECOGNIZES AS HOOPERLIMITED FUNCTIONS
FULL FUNCTIONSRECOGNIZES AS Q11
RECOGNIZES AS A29
(PMU_AP)
reset. MLB will have a pull-uphave a pulldown for coming out ofCPU_VCORE_HI_OC/PMU_AP should
to +3V_MAIN or +3V_SLEEP, which will act as our pulldown sinceboth are off during PMU reset.
NC
NC
NC
NC
NC
NC
NC
NC (CHARGE_I)
NC
Keep crystal subcircuit close to PMU.
PMU
PMU KEYBOARD RESET CIRCUIT
50MV OF HYSTERSIS
0.589V-
2.558V-
Q11 (65W)
ADAPTER
HOOPER
SYSTEM STATUS RANGE
UNDERVOLTAGE RESET CIRCUIT
Y7’S LOAD CAPACITANCE IS 12.5PF
Keep crystal subcircuit close to PMU.
Q11 ADAPTER DETECTION SCHEME
Y6’S LOAD CAPACITANCE IS 12PF
05%1/16WMF4022
1R785
10M
5%
402MF
1/16W
NO STUFF
21
R7865%
1/16WMF402
1K21
R593
1/16WMF402
1K
5%
21
R572
MF
5%
10M
402
NO STUFF
1/16W
21
R595
05%
1/16WMF4022
1R594
1K1/16WMF402
5%
2
1R765
402MF
1/16W5%
2.2K21
R518
5%
4.7
402MF
1/16W
21
R778
2.2K
5%
MF402
1/16W
21
R513
20%10V
CERM
0.1UF
4022
1C812
CERM50V5%
402
12PF
2
1C664
402
10V20%
CERM
0.1UF
2
1C835
CERM
20%10V
402
0.1UF
2
1C574
12PF
402CERM50V5%
2
1 C832
402
5%50VCERM
12PF
2
1 C831
5%50V
CERM402
12PF
2
1C666
402
10V20%
CERM
0.1UF
2
1C827
CRITICAL
10.0000M
8X4.5MM-SM
21
Y6
SM-1
32.768K
CRITICAL
41
Y7
CRITICAL
FLASM16C62
OMIT
11
13
6212
96
6014
10
98
99
100
1
2
3
4
5
8
9
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
61
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
87
88
89
90
91
92
93
95
79
80
81
82
83
84
85
86
7
6
94
97
U33
10UF
CERM
20%6.3V
8052
1C643
402
10K
5%
MF1/16W
12
R573
402
10K
5%
MF1/16W
12
R584
+5V_SLEEP
+3V_MAIN
402
5%
MF1/16W
10K12
R5961/16WMF
5%
402
100K12
R597
5%
470K
1/16WMF402
12
R788
5%
470K
402MF
1/16W
12
R592
402
100K1%1/16WMF
2
1R501
+3V_PMU
10K
402
5%
MF1/16W
12
R569
10K
1/16WMF
5%
402
12
R535
1/16WMF
5%
402
100K12
R585
5%
MF1/16W
10K
402
21
R583
402MF
1/16W5%
100K21
R544
5%
100K
402MF
1/16W
12
R562
402
5%1/16WMF
470K21
R505
MF1/16W5%
402
10K21
R504
10K
MF1/16W5%
402
21
R492
+3V_PMU
MF1/16W5%
402
1K12
R782
10K
402
5%1/16WMF
12
R787
5%1/16W
100K
SM1
54
RP40
100K
1/16W5%
SM1
63
RP40
100K
1/16W5%
SM1
72
RP40
1/16W5%
10K
SM1
54
RP41
1/16W5%
10K
SM1
63
RP41
SM1
10K
5%1/16W
72
RP41
SM11/16W5%
10K81
RP41
1%
7.15K
402MF
1/16W
12
R7691%
7.15K
402MF
1/16W
12
R768
100K
MF1/16W5%
402
21
R536
TSSOP74LVC32
14
11
12
13
7
U24
TSSOP74LVC32
14
8
9
10
7
U24
+3V_PMU
+3V_PMU
+3V_PMU
TSSOP74LVC32
14
6
5
4
7
U24
SOT143MAX6804
CRITICAL4
23
1
U51
100K
1/16W5%
SM1
81
RP40
MF1/16W1%100K
4022
1R502
402
1%1/16WMF
402K
2
1R503
+3V_SLEEP
CRITICAL
LMC7211SM
2
5
1
3
4U27
127K
402MF1/16W1%
2
1R475
52.3K1%1/16WMF4022
1R491
+3V_PMU
4.7M
5%
402MF
1/16W
21
R476
20%10VCERM402
0.1UF
2
1 C558100K
5%1/16W
MF4022
1R517
2N7002SM
2
1
3
Q22
+3V_PMU
+3V_PMU
30 44051-6531 B
ALT CRYSTAL SIZE197S0704 Y6197S0041
U331 IC,PMU,V81B341S1008
Y6 ALT FOR SIWARD197S0041197S0604
CLK10M_PMU_XOUT
CLK10M_PMU_XOUT_UF
PMU_RESET_L
CLK10M_PMU_XIN
PMU_EPM
PMU_AC_DET
INT_PU_RESET_L
MAIN_RESET_L
INT_RESET_L
IO_RESET_L
PMU_BYTE
PMU_CNVSS
INT_SUSPEND_REQ_L
SLEEP
PMU_POWER_UP_L
SOFT_PWR_ON_L
CHARGE_LED_L
INT_SUSPEND_REQ_L
SLEEP
INT_SUSPEND_ACK_L
CPU_PLL_STOP_OC
PMU_INT_L
KBD_ID
KBD_SHIFT_L
KBD_OPTION_L
KBD_FUNCTION_L
KBD_COMMAND_L
KBD_CONTROL_L
IO_RESET_L
KBD_X<8>
KBD_X<9>
KBD_X<6>
KBD_X<7>
KBD_X<3>
KBD_X<4>
KBD_X<5>
KBD_X<1>
KBD_X<2>
INT_WATCHDOG_L
KBD_X<0>
SOFT_PWR_ON_L
COMM_RING_DET_L
CHARGE_LED_L
PMU_POWER_UP_L
KBD_Y<5>
KBD_Y<6>
KBD_Y<7>
KBD_Y<3>
KBD_Y<4>
KBD_Y<2>
KBD_Y<0>
KBD_Y<1>
PMU_SMB_DATA
PMU_SMB_CLK
PMU_I2C_DATA
PMU_I2C_CLK
PMU_OOPS
THERM_L_OC
PMU_POWERUP_OK
INT_PROC_SLEEP_REQ_L
PMU_BATT1_DET_L_PU
PMU_NMI_L
INT_PEND_PROC_INT
PMU_PME_L
POWER_VALID
CPU_SMI_L
PMU_SLEEP_LED_L
PMU_CHRG_BATT_0
PMU_CHARGE_V
CPU_CLK_EN
SYSTEM_CLK_EN
TPAD_TXD
TPAD_RXD
PMU_NMI_BUTTON_L
PMU_RESET_BUTTON_L
PMU_LID_CLOSED_L
PMU_REQ_L
PMU_CLK
PMU_ACK_L
PMU_TO_INT
PMU_FROM_INT
PMU_CPU_HRESET_L
INT_PU_RESET_L
PMU_INT_NMI
MAIN_RESET_L
INT_RESET_L
CPU_VCORE_HI_OC
PMU_BYTE
PMU_CNVSS
+3V_PMU_AVCC
CLK32K_PMU_XOUT
PMU_BATT_DET_L
PMU_BATT0_DET_L
AC_IN
PMU_AC_IN
CLK32K_PMU_XOUT_UF
CLK32K_PMU_XIN
PMU_NUMLOCK_LED_L
NUMLOCK_LED_L
PMU_CAPSLOCK_LED_L
CAPSLOCK_LED_L
+3V_PMU_AVCC
PMU_EPM
PMU_RESET_BUTTON_L
TPAD_TXD
TPAD_RXD
PMU_OOPS
PMU_POWERUP_OK
PMU_BATT_DET_L
PMU_BATT1_DET_L_PU
PMU_NMI_BUTTON_L
PMU_NMI_L
+3V_PMU_RESET
PMU_KB_RESET_L
PMU_SMB_CLK
PMU_SMB_DATA
PMU_I2C_DATA
PMU_I2C_CLK
SOFT_PWR_ON_L
KBD_CONTROL_L
KBD_SHIFT_L
KBD_OPTION_L
PMU_KB_RESET_IN1
PMU_KB_RESET_IN2
PMU_KB_RESET_L
A29_DET_L
ADAPTER_DET
+4_85V_RAW
PMU_LID_CLOSED_L
POWER_VALID
PMU_PME_L
2_34V_REF
PMU_AC_DET
A29_DETECT
39
39
30
30
26
39
39
26
24
30
35
35
30
24
20
27
33
34
33
27
34
20
34
30
18
30
26
30
33
30
39
30
39
39
39
26
30
39
39
33
30
30
18
30
38
39
31
38
39
30
39
39
39
30
25
17
13
23
30
25
30
23
31
30
25
39
30
30
39
39
30
23
39
39
39
39
39
39
39
39
39
39
23
25
31
30
39
39
39
39
39
39
39
39
31
31
26
30
30
30
30
30
25
17
13
34
30
31
29
30 30
30
30
31
30
39
31
31
23
30
30
30
39
39
38
30
26
30
30
13
14
9
17
30
30
8
23
29
22
30
8
23
8
7
14
23
23
23
23
23
23
17
23
23
23
23
23
23
23
23
23
14
23
22
14
30
29
23
23
23
23
23
23
23
23
30
30
30
30
30
25
30
14
30
30
14
14
30
5
23
31
31
8
14
23
23
25
25
23
14
14
14
14
14
23
13
14
14
9
7
30
30
25
30
27
23
23
25
30
25
23
23
30
30
30
30
25
30
34
30
30
30
30
30
22
23
23
23
30
31
32
23
30
14
30
31
www.kythuatvitinh.com
CSIP
CSIN
BATT
PGND
DLO
LX
DHI
BST
DLOV
LDO
CELLS
GND
CSSNCSSP
REF
CCS
CCI
CCV
IINP
ICHG
ICTL
VCTL
RFIN
ACOK
ACIN
DCIN
CLS
S2
GATE
S1
S3 D4D3
D2
D1
S2
GATE
S1
S3 D4D3
D2
D1
S2
GATE
S1
S3D4D3
D2
D1
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
GNDOUT
PG
RS-
V+
RS+
NC2
NC1
G
D
S G
D
S
G
D
S
G
D
S
S
D
G
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE U23 NEXT TO R460
PLACE R358 CLOSE TO LTC1625
U23 SENSE VOLTAGE DROP ACROSS R460
1MSEC INTEGRATION TIME BATTERY SWITCH-OVER CIRCUIT
ADJUST CURRENT SETTING
WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
(POWER JACK, ETC. ON SEPARATE BOARD)
DC POWER INPUT
TO DC INPUTPLACE CLOSE
For 4.15V cells, VCTL = 0.123 REFIN
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V
CHARGE THROTTLED BY LOW BATTERY VOLTAGE
OD OUTPUT LOW - WHEN AC GREATER THAN 18V
ROUTE LTC1625_ITH CAREFULLY
IF ADAPTER IS OVER 18V,ADJUST CURRENT SETTING
SWITCHER CURRENT CONTROL
_62 REFINICTL
For 4.20V cells, VCTL = 0.245 REFIN
CHG
BATT
I = (0.2048/R ) * (V / V )
VCTL REFIN
BATTERY CHARGER
(+3V_PMU)
(GND)
SWITCHER VOLTAGE CONTROLPMU SELECTS BETWEEN TWO VOLTAGES
GREATER THAN 13.5V DETECT
WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF
NC
NC
NC
REF = 4.096V
BATTERYCONNECTOR
(BATT_IN_PD)
RC TIME IS 480K*10UF @ +3V_PMU
V = CELLS X (4.096 + (0.4096 * V / V ))
DC INRUSH LIMITER
IF A29 ADAPTER USED,
MAX1772QSOP
CRITICAL15
13
4
20
23
2
28
14
10
98
22
21
24
1
27 26
19
18
3
16
7
5
6
25
17
12
11 U31
20%10VCERM603
1UF
2
1 C652
47K5%
402MF
1/16W
2
1R490
402
10K
MF1/16W
5%
2
1R512
SOISI4435DY
CRITICAL
3
2
1
4
8
7
6
5
Q24
+PBUS
SM-25AMP-125V
2
1
F45AMP-125V
SM-2
2
1
F3
402MF1/16W1%1K
2
1R497
1K1%
1/16WMF4022
1R542
+24V_PBUS
1/8WFF
1206
33
5%
21
R571
+BATT
50V20%
CERM
0.01UF
6032
1 C572SOISI4435DY
3
2
1
4
8
7
6
5
Q13
470K1/16WMF402
5%
1
2R374
5%1/16W
MF402
100K
2
1R549
20%50V
CERM805
0.1UF
2
1C4585%
330K1/16W
MF402 1
2R414
20%
CERM16V
0.01UF
4022
1C468
MF1/16W5%
1M
402
21
R394
+3V_PMU
20K
402
1%1/16WMF
1
2R396
1%
402
1/16WMF
102K
2
1R364102K
402
1%1/16W
MF1
2R395
1%1/16W
MF
57.6K
402 1
2R365
402MF
1/16W1%
10K
1
2R375
SI4435DYSOI
3
2
1
4
8
7
6
5
Q16
SOT-3632N7002DW
4
5
3
Q21
1%158K
MF1/16W
4022
1R489
SOT23
1N91431
D10
47K5%
1/16WMF4022
1R746
10K
402MF
1/16W5%
2
1R744
1812
50VCERM
20%2.2UF
2
1 C547
1812
50VCERM
20%2.2UF
2
1 C562
1812
50V20%
CERM
2.2UF
2
1 C563
1812
50V20%
CERM
2.2UF
2
1 C557
1812
50V20%
CERM
2.2UF
2
1 C564
5%1/16W
MF603
1
2
1R543SOT-3632N7002DW
1
2
6
Q27
2N7002DWSOT-363
4
5
3
Q27
CERM
20%25V
603
0.1UF
2
1C624
5%100K1/16W
MF4022
1R561
6.3VCERM805
20%10UF
2
1C593
2N7002DWSOT-363
1
2
6
Q29
5%10K1/16WMF4022
1R363
470K1/16WMF402
5%
1
2R383
2N7002DWSOT-363
4
5
3
Q10
2N7002DWSOT-363
1
2
6
Q10
SOT-3632N7002DW
1
2
6
Q21
402MF1/16W1%10K
2
1R548
SOT-3632N7002DW
4
5
3
Q29
SOT-3632N7002DW
1
2
6
Q30402MF
1/16W
100K5%
2
1R578
SOT-3632N7002DW
4
5
3
Q30
+3V_PMU
50V
805
20%
CERM
0.1UF
2
1C608
1/16W
603
0.1%2.21K
MF2
1R454
FF
0.1%
603
82.5K1/16W
2
1R734
1/16WMF402
1%
1502 1
R358
CRITICAL
SMLMC7211
2
5
1
3
4U15
BAS16TWSOT-363
5 2
DP4
SOT-363
BAS16TW
43DP4
1206
4.7UF
CERM25V20%
2
1 C619
100K
402MF
1/16W5%
2
1R5591206
4.7UF20%25V
CERM 2
1C631
1206
4.7UF
CERM25V20%
2
1C6331206
4.7UF20%25VCERM2
1 C632
4.12K1%
1/16WMF402 2
1R473
10K
402MF
1/16W1%
2
1R487
87438-0833M-RT-SM
CRITICAL
8
7
6
5
4
3
2
1
J18
+BATT
FERR-50-OHM
SM
21
L53
SM
FERR-EMI-100-OHM21
L10
SM
FERR-EMI-100-OHM21
L8
SM
FERR-50-OHM21
L12
87438-0833M-RT-SM
CRITICAL
8
7
6
5
4
3
2
1
J25FERR-EMI-100-OHMSM
1
2
L9
CRITICAL
SO-8IRF7811W
321
4
8765
Q64
CRITICAL
TSSOPMAX4172
8
21
7
64
3
5
U23
0.025
2512MF1W1%
21
R460
10K
1/16WMF402
1%
21
R466
42.2K0.1%1/16W
FF603 2
1R747
FF
0.1%51.1K1/16W
6032
1R739
2N7002DWSOT-363
4
5
3
Q20
0.1%1/16W
FF603
42.2K
2
1R738
4.7
402MF
1/16W5%
2
1R488
MF1/16W
402
1%
1K21
R742
20%10VCERM402
0.1UF21
C771
20%10VCERM402
0.1UF
2
1 C772
+3V_PMU
SOT-363BAS16TW
6 1
DP4
2N7002DWSOT-363
1
2
6
Q2010V20%
CERM603
1UF
2
1 C775
+24V_PBUS
4.7
402MF1/16W5%
2
1R498
+24V_PBUS
6.34K1%
1/16WMF4022
1R749
20%50V
CERM805
0.1UF
2
1C592CRITICAL
LMC7111SOT23-5
2
5
1
3
4U50
SOT-3632N7002DW
4
5
3
Q65
SOT-3632N7002DW
1
2
6
Q65
5%100K1/16W
MF4022
1R748
+3V_PMU
50VCERM
20%
1206
0.47UF
2
1C578
MBRS140T3SM
2
1
D30
NO STUFF
0.1UF20%50VCERM805
2
1 C757
TO-252SUD45P03
CRITICAL
3
1
4
Q76
603-1X7R50V10%0.1UF
2
1 C883
0.0022UF10%
CERM402
50V
NO STUFF
2
1 C906
CERM50V20%
1206
0.47UF
2
1 C579
CERM10V20%
603
1UF
2
1C630
1%1/16W
MF402
100K
2
1R754
402MF
1/16W
12.7K1%
2
1R755 1UF20%50V
1210CERM12
1 C600
10uH
SM1
CRITICAL
21
L420.05
2512MF1W1%
21
R763
1
603MF
1/16W5%
2
1R51120%16VCERM402
0.01UF
2
1 C616CERM
20%25V
603
0.1UF
2
1C8170.1UF
603CERM25V20%
2
1 C802
+3V_PMU
1%1/16W
MF402
27.4K
2
1R567
4.12K1%
1/16WMF4022
1R560
402MF
1/16W1%
10K
2
1R558
48.7K
402MF
1/16W1%
2
1R565
5.23K
402MF1/16W1%
2
1R58020%16V
CERM402
0.01UF
2
1C622
1%1/16W
MF402
1K
2
1R566
SMIRF7805
CRITICAL
321
4
8765
Q63
CRITICAL
SMLMC7211
2
5
1
3
4U38
+3V_PMU
402MF
1/16W1%1K
2
1R526
1/16WMF
100K1%
402 2
1R588
MF
100K
402
1%1/16W
2
1R599
1/16WMF402
1%499K
2
1R579
1/16WMF402
1%100K
2
1R570
CERM16V
0.047uF10%
4022
1 C658
0.1UF20%10VCERM402
2
1 C615
SOT231N914
3
1D9
20%10VCERM402
0.1UF
2
1 C621
1206
4.7UF
CERM25V20%
2
1 C617
1206
4.7UF
CERM25V20%
2
1C618
20%
SM1
25VELEC
33UF2
1 C824
SM
21
XW19
603MF1/16W5%4.7
2
1R774
5%1/16W
402MF
47K
2
1R474
MF
68K5%1/16W
4022
1R499
B051-6531
4431
+BATT_14V_FUSE
+BATT_24V_FUSE
+ADAPTER_SENSE
1772_BST
1772_BST_ESR
1772_GND
ADAPTER_DET
1772_ACOK_L
+BATT_VSNS
1V20_REF
AC_DIV
+ADAPTER
BATT_24V_GATE
1772_IINP
1772_LX1772_ICTL
IAC_FB
IAC_RC_COMP
AC_ENABLE_GATE
1625_COMP
1772_CLS
1772_REF
BATT_NEG
PMU_BATT_DET_L
+BATT_POS
BATT_DATA
BATT_CLK
AC_IN_L_RC
AC_IN_L
1772_DCIN
AC_ENABLE_L
AC_IN
AC_IN_L
CHARGE_LED_L
+BATT_RSNS
BATT_LOWBATT_DIV
1V65_REF
PMU_CHARGE_V
BATTV_LOW
BATTV_HIGH
1772_VCTL
PMU_CHRG_BATT_0
CHARGE_DISABLE
BATT_LOW_L
1772_ICHG
1772_CCV_RC
1772_CCV
1772_DHI
1772_LDO
1772_CELLS
1772_CCS
1772_CSSP
1772_CSSN
1772_DLOV
1772_CCI
PMU_SMB_CLK
PMU_SMB_DATA
AC_IN
BCKFD_PROT_GATE
OVER_18V_ADJ
1772_ACOK_L
CURRENT_THRESHOLD
A29_DETECT
MAX4172_OUT
A29_DETECT
A29_CLS_ADJ
LTC1625_ITH
BCKFD_PROT_EN_L
+BATT_24V_FUSE
1772_ACIN
BATT_14PBUS_EN
A29_CURRENT_ADJ
AC_GTR_18V
ADAPTER_I_REG
BATT_24PBUS_EN
BATT_14V_GATE
+ADAPTER_SW
1772_DLO
1772_CSIN
1772_CSIP
31
31
30
30
38
39
38
38
39
39
39
29
39
29
31
31
38
38
31
38
38
30
31
38
32
32
38
32
38
30
38
39
39
31
38
27
31
30
38
30
30
38
37
37
38
30
30
27
31
30
30
31
38
37
37
www.kythuatvitinh.com
VTAP
IN OUTSENSE
GNDFDBKERR
LP2951
SHUTSHUT
PLUS5VTAP
LP2951
ERRFDBK
GND
SENSEOUTIN
G1
S1
D1
G2
D2S2
BOOST
SW
SGND PGND
TK
VIN
SYNC
RUN/SS
VPROG
ITH
FCB
INTVCC
TG
VOSENSE
BGLTC1625
EXTVCC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ADAPTER OR BATTERY
CONNECT LTC1625 TK PIN AT TOP-SIDE FET
3V_PMU_SENSE
BOOTSTRAP SYSTEM FROM
12.8V PBUS SUPPLY
PMU SUPPLY
24V IS AN OUTPUT FROM BUBBA
NC
BACKUP BATTERY / USB CONNECTOR
NC
(+4_6V_BU)
KEEP VIN/TK LOOP SHORT
WHEN +24V_PBUS IS BELOW ~13.44V,
1625 IS SHUT-OFF
12.8V REGULATOR
+PBUS IS BOTH AN INPUT AND OUTPUT TO BUBBA
PBUS HOLD-UP CAPS
15%
1/16WMF6031
2R412
+PBUS
MF1/16W
1%4.99K
402 1
2R379
CRITICAL
SMIRF7805
321
4
8765
Q59
8.0UH-6.8ASM1
CRITICAL3
2 1
L37
+24V_PBUS
1N914SOT23
3 1
D4
33UF
SM1
25V20%
ELEC2
1 C794
SM-1
35V20%
ELEC
22uF2
1C750
20%
ELEC35V
SM-1
22uF2
1 C82020%
SM-1
35VELEC
22uF2
1 C821
20%
ELECSM-1
35V
22uF2
1C799
22uF20%35V
SM-1ELEC
2
1 C819
33UF
SM1
25V20%
ELEC2
1C765
33UF20%
ELECSM1
25V 2
1C822
33UF
ELEC
20%
SM1
25V2
1 C769
33UF
SM1
25V20%
ELEC2
1C793 33UF20%
ELEC25V
SM1
2
1 C758
CERM
0.1UF20%10V
4022
1 C495
+3V_PMU
SOI-3.3V
CRITICAL6
3
2
18
4
7
5
U25
MF
5%11/16W
6032
1R468
10UF6.3V20%
805CERM2
1 C5840.1UF10V
402
20%
CERM2
1 C553
MF
5%11/16W
6032
1R483
2.2UF20%
CERM10V
8052
1 C568
294K
402
1%
MF1/16W
2
1R521
603
50V
470pF10%
CERM2
1 C613
1/16W
100K1%
MF4022
1R541
SOI
CRITICAL
3
2
6
18
4
7
5
U30
0.1UF
402
10VCERM
20%2
1C5990.1UF
CERM50V20%
8052
1 C625
SM
MBR0540
21
D17
SMMBR0540
2
1
D19
1210FF
1/4W5%
39021
R508
+PBUS
158K1%1/16WMF4022
1R359
402MF1/16W1%16.2K
2
1R360
SMLMC7211
CRITICAL
2
5
1
3
4U21
+3V_PMU
0.1UF
402CERM10V20%
2
1C537
1/16WMF402
1%102K
2
1R443
1/16WMF
10K1%
4022
1R433 1M
402
1%
MF1/16W
21
R432
CRITICAL
SC70-6FDG6324L
1
5
6
Q14
CRITICAL
SC70-6FDG6324L
4
3
2
6
Q14+5V_MAIN
1/16WMF402
5%470K
2
1R426
+24V_PBUS
SM
MBR0520LT
21
D7+5V_MAIN
SM
MBR0520LT
21
D11+BATT
+5V_MAIN
2.25%1/16WMF6032
1R401
4.7UF
1206
10VCERM
20%2
1 C461
05%1/16WMF402
NO STUFF
2
1R402
05%1/16WMF4022
1R392
OMIT
SM
21
XW4
54550-1490F-RT-SM
CRITICAL
9
8
7
6
5
4
3
2
14
13
12
11
10
1
16
15
J11
0.0047UF
402CERM25V10%
NO STUFF
2
1 C554
SO-8
CRITICAL
IRF7811W
321
4
8765
Q60
SMMBRS140T3
2
1
D27
SOT23
1N91431
D18
50V
2.2UF20%
CERM1812
2
1C626
2.2UF50VCERM1812
20%2
1 C604
2.2UF50V
CERM1812
20%2
1C585
2.2UF
1812CERM50V20%
2
1 C569
2.2UF20%50V
CERM1812
2
1C787
2.2UF50VCERM1812
20%2
1 C801
805CERM
20%25V
0.22UF
2
1 C509
20%25V
CERM
4.7UF
12062
1C536
CERM25V20%4.7UF
12062
1 C535
SM
MBR0540
21
D3
CRITICAL
SSOP
8
7
16
15 13
2
14
6
3
9
5
11
4
1
12
10
U18
CERM
5%25V
603
4700pF
2
1C485
603
10%50VCERM
470pF
2
1 C462
0.1UF
805CERM
20%50V 2
1C510
25V5%
CERM603
4700pF
2
1C463
2.2UF20%50V
CERM1812
2
1C644
B051-6531
32 44
NEC_RIGHT_USB_OVERCURRENT
RIGHT_USB_DM
NEC_RIGHT_USB_PWREN
RIGHT_USB_DP
3V_PMU_VTAP
+4_6V_BU
1625_FCB
1625_RUNSS
1625_COMP
COMP_RC
1625_ENABLE_L
1V20_REF
1625_EXTVCC
FB_4_85V_BU
+4_85V_RAW
+ADAPTER
+4_85V_ESR+3V_PMU_ESR
1625_DIV1625_BST
DCDC_EN
1625_VFB
1625_VIN
1625_ENABLE
1625_TG
1625_VSW
1625_BST_ESR
1625_INTVCC
1625_BG
+ADAPTER_ILIM
1625_SGND
+ADAPTER_OR_BATT
39 34
39
39
33
39
37
39
37
38
38
38
38
29
26
26
26
26
33
31
31
38
30
31
38 38
19
38
38
38
38
38
38
www.kythuatvitinh.com
SGND PGND
STBYMD
FCB
FREQSET
SNS1-
PGOOD
VOSNS2
VOUT3.3
VCCVCCEXT INT VIN
TG2
SW2
SNS2-
BG2
SNS2+
BOOST2
ITH2
RUN/SS2SS1
SNS1+
BG1
SW1
BOOST1
TG1
VOSNS1
ITH1
RUN/
G
D
S
G
D
S
G
D
S
G
D
SG
D
S
G
D
S
G
D
S
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
DCDC_EN TRUTH TABLE
SLEEP
220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED
ADDED FOR M10 POWER SEQUENCING
7) SOUND BOARD
9) HARD DRIVE (IF USING 3V LOGIC)
10) WIRELESS (IF POWERING OFF IN SLEEP)
12) PCI PULL-UPS
11) PMU - IIC Pull-ups
8) BOOT BANGER
5) LVDS DDC PULL-UPS
THERE’S NO 10UF INPUT CAP
6) DVI LEVEL SHIFTERS & PULL-UPS & HPD
1) CPU PLL Config Control
+3V_SLEEP LOADS
NC
3.3V/5V REGULATOR
THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
2) INTREPID - IIC AND PCI PULL-UPS
OUTPUT OF +3V_MAIN SWITCHERBECAUSE Q21 IS PLACED AT
3) MAP31 - 3V RAIL (IF USING D3COLD)
3.3V/5V MAIN SUPPLY
DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN
5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L
3V START TO TURN ON ~25MS AFTER DCDC_EN_L
POWERDOWN DELAY IS AROUND 4MS-15.6MS
State
Run
Shutdown
Sleep
1
0
0
+3V_PMU
1
0
10
1
0
+3V_PMU +4_6V_BU
0
+3V_PMU
4) FANS
5) FIREWIRE PHY
3) TRACKPAD
1 (2.99V)
2) DVI
1) OPTICAL DRIVE
SLEEP LEVEL SHIFTER (3V -> 5V)
DCDC_EN_LDCDC_ENPMU_POWER_UP_L
1
VOLTAGE
+5V_SLEEP LOADS
CRITICAL
SSOPLTC3707
124
24
1627
1726
6
9
13
14
3
2
151
28
20
118
21
5
7
22
1825
1923
10
U28
5%101/16WMF4022
1R378
5%
MF1/16W
470K
4022
1R506
SOT-3632N7002DW
1
2
6
Q23
402
16V20%
CERM
0.01UF
2
1 C6232N7002DWSOT-363
4
5
3
Q25402
5%1/16WMF
100K21
R528
1/4W1%
0.005
FF1206
21
R515
SOT-3632N7002DW
4
5
3
Q23
+5V_SLEEP
20%10V
SMD-3
100uF
POLY2
1 C825
0.22UF20%25V
CERM805
2
1C545
20%16V
402
0.01UF
CERM
21
C662+5V_MAIN
TSOPSI3443DV
4
3 6
5
2
1
Q32
SMD-3
10V20%100uF
POLY2
1 C694
SI3443DVTSOP
4
3 6
5
2
1
Q43
402
10V20%
CERM
0.1UF21
C700
CERM
20%6.3V
805
10UF
2
1 C697
402
100K
MF
5%1/16W
21
R589
100K
MF1/16W
402
5%
21
R697
5%
603MF1/16W
2.2
2
1R457
402MF
5%1/16W
100K
2
1R350
SOT-3632N7002DW
4
5
3
Q9
CERM
20%16V
402
0.01UF
2
1 C456402
1/16WMF
5%
100K21
R367
+5V_MAIN
402MF
5%1/16W
100K
2
1R377
SOT-3632N7002DW
1
2
6
Q9
+3V_SLEEP+3V_MAIN
CERM
20%50V
402
0.001uF21
C532
TSOPSI3443DV
4
3 6
5
2
1
Q28
5%50VCERM603
2200pF12
C639
402
1/16WMF
5%
100K21
R368
MF1/16W
100K
402
5%
21
R538
1%113K
402MF
1/16W
2
1R463
MBR0540SM
2
1D6
SM
MBR05402
1D13
603
1/16WMF
5%2.2
2
1R482
SOT231N914
3 1
D16
MF1/16W5%
402
1M21
R523
CERM
20%16V
402
0.01UF
2
1 C609
CERM
20%6.3V
805
10UF
2
1 C659
402MF
1/16W
21.5K1%
2
1R462
402CERM
5%220PF25V2
1 C534
MBRS140T3SM
2
1
D22SMMBRS140T3
2
1
D34
2N7002DWSOT-363
NO STUFF
4
5
3
Q79
SOT-363
NO STUFF
2N7002DW
1
2
6
Q79
MF
5%
402
1/16W
100K
2
1R298
402MF
1/16W5%
100KSLEEP_NET21
R296
+5V_MAIN
402
180pF
CERM50V5%
NO STUFF
2
1 C566
NO STUFF
100K1/16WMF402
5%
2
1R300
IHLP-5050
CRITICAL
4.7UH21
L38
IHLP-5050
4.7UH
CRITICAL
21
L41
NO STUFF
402
100K5%1/16WMF
2
1R308
NO STUFF
470K5%1/16WMF4022
1R309
NO STUFF
100K5%1/16WMF4022
1R310
+3V_SLEEP +5V_MAIN
1206
10V20%
CERM
4.7UF
2
1 C567
NO STUFF
2N7002DWSOT-363
1
2
6
Q81
2N7002DWSOT-363
NO STUFF
4
5
3
Q81
SOI
CRITICAL
SI4888DY
321
4
8765
Q71
402CERM
20%10V
0.1UF
2
1 C612CERM402
16V10%
0.047UF
2
1C533
CERM805
0.22UF20%25V
2
1 C598
NO STUFF
180pF
402CERM50V5%
2
1C590
SI4888DY
CRITICAL
SOI
321
4
8765
Q72
63.4K
402MF1/16W1%
2
1R507
1%1/16WMF402
20K
2
1R51420%16V
CERM402
0.01UF
2
1C560
5%1/16W
MF402
0
2
1R456
402MF1/16W5%47K
2
1R477
402MF1/16W5%20K
2
1R467
10%0.0022UF
CERM50V
4022
1 C611
50V
100PF5%
CERM402
2
1C610 12.7K
402
1%1/16WMF
2
1R519
10%0.0022UF
CERM50V
4022
1C583
SOI
CRITICAL
SI4888DY
3 2 1
4
8 7 6 5
Q61
CERM402
5%50V
100PF
2
1 C5761%
MF402
1/16W
15K
2
1R481
+5V_MAIN
20%
1210CERM10V
22UF
2
1C826
20%
1210CERM10V
22UF
2
1 C811CRITICAL
SI4888DYSOI
3 2 1
4
8 7 6 5
Q52
10VCERM
20%
1210
22UF
2
1 C760
1210
22UF10V
CERM
20%2
1C759
CASE-D4
330UF6.3V20%
TANT2
1C756
SM
2
1
XW8
CERM50V
1812
2.2UF20%
2
1C51620%50V
2.2UF
CERM1812
2
1C508
50VCERM
20%
1812
2.2UF
2
1C7632.2UF
CERM
20%50V
18122
1C77020%
CERM50V
1812
2.2UF
2
1 C78520%
CERM50V
1812
2.2UF
2
1 C779
CERM
20%50V
1812
2.2UF
2
1 C80020%
CERM50V
1812
2.2UF
2
1 C806
5%10
402MF1/16W
2
1R369
6.3V
SMD
330UF20%330UF
POLY2
1 C823
5%1/16W
MF402
10
2
1R5395%
1/16WMF402
10
2
1R529
1/4W1%
0.005
1206FF
21
R731
+24V_PBUS
0.001uF
CERM
20%50V
402
21
C620
5%
MF402
1M1/16W
2
1R4315%1/16WMF402
1M
2
1R520+5V_MAIN +3V_MAIN
33 44051-6531 B
3707_SGND
5V_RSNS
5V_BOOST
5V_SW
+5V_HD_SLEEP
3V_SLEEP_PWREN_L
DCDC_EN
5V_SNSM
5V_BG
5V_VOSNS
SLEEP_LS5_EN_L
5V_SLEEP_PWREN
+3V_SLP_ON
+3V_SLP_OK_L
SLEEP
SLEEP_L_LS5_EN_L
SLEEP_L_LS5 SLEEP_LS5
3707_FCB
SLEEP_LS5
LTC3707_START_RC
3V_BOOST_ESR
3V_SNSM
3V_TG
3V_VOSNS
3V_RUNSS
5V_BOOST_ESR
SLEEP
5V_ITH_RC
5V_HD_PWREN
3V_ITH_RC
3V_ITH
3V_SNSP
+4_6V_BU
DCDC_EN_LPMU_POWER_UP_L
SLEEP
SLEEP
5V_RUNSS
3V_RSNS
5V_ITH
3V_5V_OK
3707_FSET
3707_INTVCC
5V_TG
SLEEP_NET_INV
SLEEP_L_LS5_NET
3V_BOOST
3V_SW
3V_BG
DCDC_EN_L
3707_STBY
5V_SNSP
39
39
39
39
39
35
35
35
35
34
33
35
33
33
33
32
30
34
30
30
30
38
29
25
27
25
38
35 30
25
25
35
38
38
38
24
19
37
23
19 33
33
37
23
37
32
33 29
23
23
38
35
38
35
38
33
37
www.kythuatvitinh.com
D0D1D2D3D4
SKP/SDN
VCC VDD
V+
ILIMFBS
GNDSA/B
REF
TON
CC
BSTDH
LX
DL
GND
VGATE
FBTIME
SYM_VER-2
GNDOESEL
B4
B3A4
A3
A2B2
Y3
Y4
A1B1
VCC
Y2
Y1
G
D
S
G
D
S
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
<D3>
This allows for an offset to the ground sense to adjust the output voltage.
R1NOTE: R310 (R2) NO STUFFED FOR NO OFFSET CASE
FOR V-STEP:
A/B_ =
NC (RFU)
FMAX CONNECTOR
GROUND SENSE VOLTAGE DIVIDER
Keep trace fat and short!!
R2
PLACE C423 CLOSE
<D2> <D1>
Keep trace fat (40-100 mils) and short!!
to GND at bottom-side FET
PLACE THIS SHORT AT
VCORE POWER SEQUENCING
<D4> <D3>
VREF = 2.0V, HENCE VOFFSET = 2.0V * (R1/(R1+R2)) AND VCORE = VDAC + VOFFSET.
VCORE_VPLUS
Connect MAX1717 GND pin 13Keep trace fat and short!!
(VCORE_SNS)
(VCORE_GNDSNS)
CPU core follows CPU I/O voltage
(approx. 7ms delay)
<D1><D2><D4>
MAX1717 VID CAN TAKE 3.3V TO 5.5V INPUTS
TO PINS 15 & 13!!
VCORE SUPPLY
PIN OF 1000uF CAPCLOSEST TO CPU
ROUTE AS DIFFERENTIAL PAIR
Keep trace fat and short!!
<D0>
D1
0
01
101
0
1
10
010
1
00
00
1
0 0
1
00
1
000
00
00 1 1
1
0
11
00
11
1
00
1
111
0
00
1 11
111
1 11
D3
OUTPUT VOLTAGE
D4=1
1.90
1.80 1.1751.2001.2251.250
1.85
2.001.95
1.75
1.275
1.70
1.55
1.40
1.60
0.9751.000
1.0501.0751.100
1.351.30 0.925
0.950
1.025
A B
0
0
1
1
Hi/Fast
1
0
0
1
>= 100K PD
<= 1K PD
>= 100K PU
Lo/Slow
D0D2DACVD4=0
1.65
NO CPUNO CPU
0
1.1251.150
1.501.45
0<= 1K PU
D<4..0>
1
1.175V -> 1.025V
>=100K-ohm -> 1
pull-downs are <=1K, V = V .
If all pull-ups are >=100K and all
When A/B_ is low (slow): <=1K-ohm -> 0
When A/B_ is high (fast): D4-D0 read as-is
SEL = 0; Y1=A1SEL = 1; Y1=B1
1.30V -> 1.10V
402MF
1/16W5%
100K
2
1R398
+5V_MAIN
5%1/16W
MF402
100K
2
1R408
2N3904SM
2
3
1 Q12
2N3904SM
2
3
1 Q17402MF
1/16W5%
10K
2
1R267
SM
21
XW15
7343TANT
20%2V
CRITICAL
220UF2
1C732
SM
2 1
XW3
7343TANT
CRITICAL
220UF2V20%
2
1 C729
+PBUS
SM
MBR05302
1D2
20%
CERM
1UF10V
6032
1 C498
+5V_MAIN
205%
1/16WMF4022
1R349
7343TANT
220UF20%2V
CRITICAL
2
1C733
7343TANT
220UF20%
CRITICAL
2V 2
1C734
7343TANT
CRITICAL
220UF2V20%
2
1 C730
0.1UF
CERM
20%
603
25V2
1 C518
QSOPMAX1717
CRITICAL
12
157
1
8
3
2
9
23
10
11
13
5
4
14
24
17
18
19
20
21
6
22
16
U20
100
5%1/16WMF402
21
R415
SM
21
XW70.001UF
20%50V
CERM402
2
1C521390K
402
5%
MF1/16W
2
1R434
10V20%
CERM603
1UF
2
1C5070
402MF
5%1/16W
2
1R407
220PF
402
25V5%
CERM 2
1C512
1%1/16W
MF402
27.4K
2
1R397
CERM10V20%1UF
6032
1 C459
402MF
1/16W1%
12.7K
2
1R385
402
20%0.01UF
CERM16V
2
1C529
402MF1/16W5%470K
NO STUFF
2
1R337
5%
402
1/16WMF
0
2
1R3250
402MF
5%1/16W
2
1R329470K5%
MF1/16W
4022
1R304
470K
MF1/16W5%
4022
1R336
MF402
1/16W
470K5%
NO STUFF
2
1R330
1/16W
NO STUFF
402MF
5%0
2
1R305
SM
21
XW5
1%1/16W
3.01K
402MF
OMIT
2
1R321
1/16W1%162K
MF
VCORE_OFFSET
6032
1R376
BAS16TWSOT-363
5 2
DP2
BAS16TWSOT-363
4 3
DP2
BAS16TWSOT-363
6 1
DP2
470K
MF
5%1/16W
4022
1R301
MF
66.5K
402
1/16W1%
2
1R448
NO STUFF
402CERM25V10%0.0047uF
2
1 C455
402
0.0047uF10%25V
CERM 2
1C768 MF
5%2.21/4W
1210
NO STUFF
2
1R732
603MF
1/16W
2.2
5%
2 1
R429
10UF20%
CERM805
6.3V 2
1C68910UF
6.3V
805CERM
20%2
1C510UF
20%
CERM805
6.3V 2
1C69910UF6.3V
805CERM
20%2
1C23410UF
20%
CERM805
6.3V 2
1C2
10UF6.3V
805CERM
20%2
1C68010UF
20%
CERM805
6.3V2
1C710UF
6.3V
805CERM
20%2
1C27410UF
20%
CERM805
6.3V2
1C67410UF
20%
CERM805
6.3V2
1C682
10UF6.3V
805CERM
20%2
1C69510UF
20%
CERM805
6.3V2
1C610UF
6.3V
805CERM
20%2
1C11610UF
20%
CERM805
6.3V2
1C1320%
CERM805
6.3V
10UF
2
1C693
10UF6.3V
805CERM
20%2
1C68710UF
20%
CERM805
6.3V2
1C310UF
6.3V
805CERM
20%2
1C410UF
20%
CERM805
6.3V2
1C28510UF
20%6.3V
805CERM 2
1C679
603CERM50V10%
0.0022uFNO STUFF
2
1C7647343TANT
CRITICAL
220UF20%2V2
1 C731
SM1
CRITICAL
1.2UH-18.3A
3
2 1
L36
SMB540C
CRITICAL2
1
D25
+3V_MAIN
MF
5%
402
01/16W
NO STUFF
2
1R3245%
MF402
01/16W
2
1R328
MF402
1/16W5%470K
NO STUFF
2
1R314
402MF1/16W5%470K
2
1R313
1/16W
402MF
5%0
NO STUFF
2
1R303
402MF1/16W5%470K
2
1R297
NO STUFF
402MF1/16W5%470K
2
1R327
402MF
5%470K1/16W
2
1R3231K5%1/16W
402MF
2
1R302
+3V_MAIN
402MF
5%
0
1/16W
21
R366
MF
5%
0
1/16W
NO STUFF
402
21
R384
402
5%1/16W
10K
NO STUFF
MF2
1R322
0
1/16WMF402
5%
21
R318
CERM
20%
402
0.1UF10V2
1 C439
QSOP
CRITICAL
PI3B3257
12
9
7
4
16
1
13
14
10
11
6
5
3
2
8
15
U11
1/16W
0
402MF
5%
NO STUFF
2
1R326
7343TANT
2V
220UF20%
CRITICAL
2
1C728
CRITICAL
TANT16V
CASE-D
20%8.2UF
2
1 C427
16V
CRITICAL
20%
TANTCASE-D
8.2UF2
1 C431
16VTANTCASE-D
20%
CRITICAL
8.2UF2
1 C443
CASE-D
16VTANT
20%
CRITICAL
8.2UF2
1 C430
20%16VTANTCASE-D
CRITICAL
8.2UF2
1 C432
TANTCASE-D
CRITICAL
20%16V
8.2UF2
1 C44120%16VTANT
CRITICAL
CASE-D
8.2UF2
1 C44420%16V
CASE-D
CRITICAL
TANT
8.2UF2
1 C445
CRITICAL
NO STUFF
M-ST-SM-52465-1217
3
2
1
7
8
9
10
11
6
5
4
12
J5
2.05K
NO STUFF
402MF
1/16W1%
21
R315
NO STUFF
402MF
1/16W1%
10021
R312
1/16WMF402
05%
NO_4XVCORE
2
1R288
01/16WMF402
5%
NO_4XVCORE
2
1R289
05%1/16WMF402
NO_4XVCORE
2
1R290
1/16W5%
MF
0
NO_4XVCORE
4022
1R292
SI7860DPSO-8-PWRPK
CRITICAL
321
4
5
Q50
SO-8-PWRPK
CRITICAL
SI7860DP
321
4
5
Q49
7343TANT
CRITICAL
220UF2V20%
2
1 C884
7343TANT
2V
220UF
CRITICAL
20%2
1C885
SOT-3632N7002DW
1
2
6
Q860
402MF
1/16W5%
NO STUFF
21
R806
MF1/16W
402
0
5%
AB_SEL_LOW21
R807
402
100K
5%1/16WMF
21
R805
1/16W
402MF
1%1.5K
2
1R809
NO STUFF
402MF
5%1/16W
100K
2
1R808
+5V_MAIN
SOT-3632N7002DW
4
5
3
Q86
2512MF1W
CRITICAL
0.001
1%
21
R331
SO-8IRF7832
CRITICAL
321
4
8765
Q54SO-8
CRITICAL
IRF7832
321
4
8765
Q55IRF7832SO-8
CRITICAL
321
4
8765
Q53
402MF1/16W
100K1%
2
1R356
RESISTOR ? 1_32_VCORE1 R321114S6343
? 1_30_VCORE1 R321RESISTOR114S4023
B051-6531
34 44
VCORE_SLOW<1>
VCORE_VID<3>
VCORE_GNDDIV
VCORE_SNS
VCORE_GNDSNS
VCORE_SHDN_L
VCORE_VID<1>
CPU_VCORE_SLEEP_F
VCORE_DL
VCORE_LX
VCORE_FB
MAX1717_AB_SEL
MAX1717_AB_SEL
VCORE_VCC
VCORE_CC
VCORE_TIME
VCORE_VID<1> MIN_LINE_WIDTH=10
VCORE_VID<4>
VCORE_FAST<1>
VCORE_FAST<4>
VCORE_FAST<3>
VCORE_VID<2>
VCORE_VGATE
DCDC_EN
SLEEP_L_LS5
CPU_VCORE_PWR_SEQ
CPU_VCORE_SEQ_L
CPU_VCORE_SEQ
CPU_VCORE_HI_OC
VCORE_BST
MAXBUS_SLEEP
VCORE_BOOST
CPU_VCORE_HI_OC
VCORE_FAST<1>
INT_GPIO1_PU
VCORE_TON
VCORE_MUX_EN
CPU_VCORE_SNUB
VCORE_FAST<2>
VCORE_SLOW<3>
VCORE_FAST<2>
MIN_LINE_WIDTH=10VCORE_VID<0> VCORE_GND
MIN_LINE_WIDTH=10VCORE_VID<3>
VCORE_REF
CPU_VCORE_SLEEP
VCORE_DH
VCORE_SLOW<2>
VCORE_FAST<3>
CPU_VCORE_SLEEP
VCORE_GNDA
VCORE_GNDDIV_TEST
VCORE_VID<0>
VCORE_VID<1>
VCORE_VID<2>
VCORE_VID<4>
VCORE_VID<3>+3V_PMU_RESET
SOFT_PWR_ON_L
VCORE_GNDDIV
VCORE_GNDSNS_TESTVCORE_GNDSNS
VCORE_ILIM
VCORE_SEL_ON
VCORE_FAST<4>
VCORE_SLOW<4>
VCORE_SEL_OFF_PU
MIN_LINE_WIDTH=10VCORE_VID<4>
MIN_LINE_WIDTH=10VCORE_VID<2>
VCORE_MUX_SEL
38 23
39
16
33
35
15 39
39
32
33
34
8
34
38
38
30
38
38
39
38
29
27
30
7
30
34
34
23
38
38
34
34
38
34
34
38
38
38
34
34
38
38
38
34
34
34
34
34
34
14
19
19
7
5
38
7
34
14
38
39
34
34
34 38
34
38
5
38
34
5
34
34
34
34
34 30
22
34
34
38
34
34
34
www.kythuatvitinh.com
AGND THRML
NC_28NC_23NC_15
BST2
OUT1
TON
PGOODREF
DL1
LX1
DH1
VCC
BST1
ON2ON1ILIM2ILIM1
OUT2
SKIP
DL2
LX2
PGND
DH2
VDD
V+
FB1 FB2
S
D
G
JUMPER
G
D
S
G
D
S
SW
SGND PGND PADTHERM
SVIN PVIN
PGOOD
VFB
ITHSYNC/MODE
RUN/SSRT
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1.8V SWITCHERCHANGE R424 BACK TO 10K, 1%, AND STUFF 5.11K FOR 1.5V OPERATION
+1_5V_MAIN LOADS
POWER DOWN DELAY 1.5MS TO 3.5MS
CONNECTING 1_5V_FB TO GND, FORCES 1.8V OUTPUT
DIODE PROVIDE PROVIDE QUICK SHUT-DOWN
+1_8V_MAIN LOADS
1.5V/2.5V SWITCHER1) INTREPID CORE
MAX1715_GND
1.5V/1.8V/2.5V SUPPLIES
NC
NC
+2_5V_MAIN LOADS
3) DDR SODIMMS - CORE/IO
4) DDR MUXES
6) PCI1510 CORE
5) CLOCK SLEWING I/O
NC
+2_5V_SLEEP LOADS1) FBCORE/FBIO IF USING D3COLD
+1_5V_SLEEP LOADS1) AGP I/O - IF USING D3COLD2) MAXBUS I/O - IF 1.5V INTERFACE
2) AGP I/O IF USING D3HOT
1) INTREPID PLLS
2) GIGABIT ETHERNET - AVDDL
1) MAP31 - FBCORE/FBIO IF USING D3HOT
CONTINUOUS MODE
2) CPU JTAG & MaxBus Pull-ups
1) MPC7450 - MAXBUS I/O - IF 1.8V INTERFACE
+1_8V_SLEEP LOADS
3) CPU PLL Config Straps
4) OPTIONAL VIDEO MEMORY (M10 PRO ONLY)
2) INTREPID MEMORY I/O
BURST MODE
THERE’S 100K PULL-UP ON PG 31 ALREADY
+2_5V_MAIN
603
20%
CERM10V
1UF
2
1C499
5%
20
1/16WMF402
2 1
R480
+1_8V_SLEEP
+1_8V_MAIN
805
6.3V20%
10UF
CERM 2
1C276
2200pF
5%50VCERM603
12
C235
5%
100K
MF1/16W
402
21
R190
CERM
20%6.3V
805
10UF
2
1C705
603CERM50V5%
2200pF21
C709
402MF
1/16W5%
100K21
R709
+2_5V_MAIN +2_5V_SLEEP
CRITICAL
QSOPMAX1715
2021
4
5
29
69
7
22
141
11
10
28
23
15
1627
12
3
132
1924
1726
1825
8
U22
4.7UH
SM4
CRITICAL
21
L35
IRF7805SM
CRITICAL
3 2 1
4
8 7 6 5
Q57SMIRF7805
CRITICAL
321
4
8765
Q69
1%
402MF1/16W
158K
2
1R4231%
1/16WMF402
158K
2
1R418
BAS16TW
SOT-363
52
DP3
603MF
5%
4.7
1/16W
21
R493
603
5%
4.7
1/16WMF
21
R479
0.1UF20%
CERM25V
6032
1 C575
SMMBRS130LT3
2
1
D23
402MF
1%5.11K1/16W
2
1R425
MF
1%10K
402
1/16W
2
1R424
+1_5V_MAIN
+5V_MAIN
BAS16TW
SOT-363
43
DP3
0.1UF
603CERM
20%25V
2
1 C580
SMD-1
20%
TANT
POSCAPS
150UF6.3V2
1 C751
4.7UH
SM4
CRITICAL
21
L45
1/16W
05%
MF4022
1R420
05%1/16WMF402
NO STUFF
2
1R419
+PBUS
+PBUS
+PBUS
150UF
TANT
20%
SMD-1
POSCAPS
6.3V2
1 C7456.3V
150UF
TANT
20%
SMD-1
POSCAPS
2
1 C782 150UF
SMD-1
20%6.3VTANT
POSCAPS
2
1 C78020%150UF
TANT6.3V
SMD-1
POSCAPS
2
1 C788
CRITICAL
CERM25V20%4.7UF
12062
1 C559CRITICAL
20%25VCERM
4.7UF
12062
1 C582
CERM25V20%
CRITICAL
4.7UF
12062
1C519
CERM25V20%
CRITICAL
4.7UF
12062
1C544
NO STUFF
402MF1/16W5%0
2
1R421
402MF
5%0
1/16W
NO STUFF
2
1R422
MBRS130LT3SM
2
1
D33
20%
CERM
22UF
1206
6.3V2
1 C67715K
402
1%
MF1/16W
2
1R627
603CERM25V5%1000PF
2
1 C683
SM
OMIT
21
XW1
SMOMIT
21
XW6
+1_5V_SLEEP
+1_5V_MAIN
2200pF
603CERM50V5%
2
1 C72610UF
CERM
20%6.3V
8052
1C723
CERM6.3V
10UF20%
8052
1 C80910UF20%6.3VCERM805
2
1 C740
2.2UF
CERM10V20%
8052
1 C6032.2UF
805
20%10VCERM2
1 C581
BAS16TWSOT-363
6 1
DP3
5%1/16WMF402
330K21
R450
0.01UF20%16VCERM402
2
1 C531
TSOPSI3446DV
4
36
5
2
1
Q46
SM2N7002
2
1
3
Q19
100K5%
1/16WMF4022
1R461
603MF
1/16W5%
021
R715
NO STUFF
603MF
1/16W5%
021
R712
SO-8
CRITICAL
IRF7811W
3 2 1
4
8 7 6 5
Q56IRF7811WSO-8
CRITICAL
321
4
8765
Q68
+1_5V_MAIN
+2_5V_MAIN
OPEN
OMIT
21XW11
402MF
1%15.4K1/16W
2
1R616
402MF1/16W1%10K
2
1R672
1/16WMF402
5%100K
2
1R455
1/16WMF402
5%100K
2
1R607
402MF
5%
100K
1/16W
21
R417 2N7002DWSOT-363
1
2
6
Q82
2N7002DWSOT-363
4
5
3
Q82
402X7R25V
1000PF10%
2
1 C886
+5V_MAIN
NO STUFF
X7R25V10%1000PF
4022
1 C887100K
5%1/16WMF402
NO STUFF
21
R610
NO STUFF
1000PF10%25VX7R402
2
1 C888NO STUFF
1/16W
100K
5%
402MF
21
R611
CRITICAL
LTC3412TSSOP
4
17
6
15
14
11
10
1
8
7
5
16
9
2
13
12
3
U58
402
5%50VCERM
100PF
2
1 C890
100K1/16W
402MF
5%
2
1R802
110K1%1/16WMF4022
1R799
75K1%
MF402
1/16W
2
1R800
22PF5%50VCERM402
2
1 C893232K1%1/16WMF4022
1R803
10%
CERM402
50V
470PF
2
1 C892
1/16W5%
MF
4.7M
4022
1R727
NO STUFF
0
MF1/16W
402
5%
2
1R798
MF1/16W
05%
4022
1R797
402
1/16W1%309K
MF2
1R801
CRITICAL
SI6467BDQTSSOP
7632
4
851
Q84
CRITICAL
SI6467BDQTSSOP
7632
4
851
Q85
CRITICAL
1.0UH-3.5A
SM
21
L75
1206CERM6.3V20%22UF
2
1 C894
22UF20%
6.3VCERM1206
2
1C891
2N7002DWSOT-363
1
2
6
Q83
SOT-3632N7002DW
4
5
3
Q83
402MF1/16W5%100K
2
1R810
0.022UF20%16VCERM402
NO STUFF
2
1 C907
402CERM50V10%0.0022UF
NO STUFF
2
1 C908
6.3V20%
1206
22UF
CERM 2
1C93
+1_8V_MAIN
+3V_MAIN
4435B051-6531
2_5V_DL
MAX1715_REF
LTC3412_GND
LTC3412_ITH
LTC3412_RUNSS
LTC3412_VFB_DIV
SLEEP
2_5V_SLEEP_PWREN_L
1_8V_SLEEP_PWREN_L
SLEEP
SLEEP_L_LS5_INV
MAX1715_FB2
1_5V_ILIM
+1_5V_LDO
+1_5V_SLEEP_VIN
MAX1715_ON_RC
1_5V_2_5V_OK
MAX1715_VCC
MAX1715_TON
2_5V_ILIM
MAX1715_GND
2_5V_DH
1_5V_BST 2_5V_BST
1_5V_FB
2_5V_BOOST
1_5V_FB
MAX1715_SKIP
MAX1715_FB2
SLEEP_L_LS5
SLEEP_L_LS5_NET
1_5V_SLEEP_EN_L
DCDC_EN_L
SLEEP_L_LS5_INV
1_5V_BOOST
1_5V_SLEEP_EN_L
SLEEP_L_LS5_INV
1_8V_SW
LTC3412_ITH_RC
LTC3412_VFB
LTC3412_PGOOD
+1_8V_MAIN_LX_F
LTC3412_SYNC
LTC3412_RT
3V_5V_OK
3V_5V_OK_INV
1_5V_DL
3V_5V_OK
2_5V_LX
1_5V_DH
MAX1715_GND
1_5V_LX
39
39
35
35
33
33
34
30
30
33
25
25
38
38
38
27
35
35
38
38
38
23
23
35
35
38
38
38
38
38
38
35
38
38 38
35
38
35
38
35
19
33
35
33
35
38
35
35
38
33
38
33
38
38
35
38 www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SIG_NAME
MAP31
THERE’S ANOTHER 280MIL LEG
CRYSTALS
MARVELLETHERNET
FIREWIRE
SOUND
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
CONTROL
ADDR
GROUP 7
GROUP 2/3
GROUP 4/5
GROUP 6
DDRRAM
GROUP 1
GROUP 0DIGITAL SIGNALS
MAXBUS
MAX_VIAS MAX_EXPOSED_LENGTH STUB_LENGTH NO_TEST PULSE_PARAM
SIGNAL CONSTRAINTS - PAGE 1
PULSE PARAMNET_SPACING_TYPESTUB_LENGTHMAX EXPOSED LENGTHMAX VIASSIG_NAME
CLOCKS INTREPID
SHOULD BE AT MOST 4 VIAS FOR CLK
SHOULD BE AT MOST 4 VIAS FOR CLK
SHOULD BE AT MOST 4 VIAS FOR CLK
TOTAL LENGTH CONTROLLED BY SPREADSHEET
GROUP GROUP
CLOCK LINE CONSTRAINTS
NET_SPACING_TYPE
TOTAL LENGTH CONTROLLED BY SPREADSHEET
B
4436051-6531
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_B1_UF
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_B1_L_UF
200.0000DDRCLK_B1 10 MIL SPACING3SYSCLK_DDRCLK_B1_L
200.0000DDRCLK_B1 10 MIL SPACING3SYSCLK_DDRCLK_B1
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_B0_UF
200.0000DDRCLK_B0 3 10 MIL SPACINGSYSCLK_DDRCLK_B0_L
200.0000DDRCLK_B0 10 MIL SPACING3SYSCLK_DDRCLK_B0
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_A1_UF
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_A1_L_UF
200.0000DDRCLK_A1 10 MIL SPACINGSYSCLK_DDRCLK_A1_L
200.0000DDRCLK_A1 10 MIL SPACING3SYSCLK_DDRCLK_A1
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_A0_UF
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_A0_L_UF
200.0000DDRCLK_A0 10 MIL SPACINGSYSCLK_DDRCLK_A0_L
200.0000DDRCLK_A0 10 MIL SPACING3SYSCLK_DDRCLK_A0
10 MIL SPACINGSYSCLK_CPU_UF
200.0000RAM_WE_L
200.0000RAM_RAS_L
200RAM_DQS_B<7>
2004RAM_DQS_B<6>
4 200RAM_DQS_B<1>
4 200RAM_DQS_B<0>
200RAM_DQS_A<7>
200RAM_DQS_A<6>
4 200RAM_DQS_A<1>
4 200RAM_DQS_A<0>
2004RAM_DQM_B<7>
2004RAM_DQM_B<6>
4 200RAM_DQM_B<1>
4 200RAM_DQM_B<0>
2004RAM_DQM_A<7>
2004RAM_DQM_A<6>
4 200RAM_DQM_A<1>
4 200RAM_DQM_A<0>
200.0000RAM_CAS_L
2004MEM_DQS<7>
2004MEM_DQS<6>
4 200MEM_DQS<1>
200MEM_DQS<0>
2004MEM_DQM<7>
200MEM_DQM<6>
200MEM_DQM<1>
4 200MEM_DQM<0>
200.00003 10 MIL SPACINGINT_REF_CLK_OUT
200.0000 10 MIL SPACINGINT_REF_CLK_IN
200.0000 10 MIL SPACINGINT_PCI_FB_OUT
200.00003 10 MIL SPACINGINT_PCI_FB_IN
10 MIL SPACING3INT_CPUFB_OUT_SHORT
10 MIL SPACING3INT_CPUFB_OUT_NORM
3 10 MIL SPACINGINT_CPUFB_OUT
10 MIL SPACING3INT_CPUFB_LONG
10 MIL SPACING3INT_CPUFB_IN_NORM
200.0000 10 MIL SPACINGINT_CPUFB_IN
200.0000 10 MIL SPACINGINT_AGP_FB_OUT
200.0000 10 MIL SPACING4INT_AGP_FB_IN
10 MIL SPACINGGPU_SSCLK_UF
10 MIL SPACINGGPU_SSCLK_IN
10 MIL SPACINGGPU_FBCLK1_L
10 MIL SPACINGGPU_FBCLK1
10 MIL SPACINGGPU_FBCLK0_L
10 MIL SPACINGGPU_FBCLK0
10 MIL SPACINGGPU_DVO_CLKP
10 MIL SPACINGGPU_CLK27M_UF
10 MIL SPACINGGPU_CLK27M_OUT
200.0000 10 MIL SPACINGFW_XI
200.0000 10 MIL SPACINGFW_OSC
10 MIL SPACING250.0000CPU_TS_L
250.0000CPU_TEA_L
250.0000 10 MIL SPACINGCPU_TA_L
250.0000 10 MIL SPACINGCPU_QREQ_L
250.0000 10 MIL SPACINGCPU_HIT_L
10 MIL SPACINGCPU_DRDY_L_UF
250.0000 10 MIL SPACINGCPU_DRDY_L
250.0000 10 MIL SPACINGCPU_BR_L
250.0000 10 MIL SPACINGCPU_BG_L
250.0000 10 MIL SPACINGCPU_ARTRY_L
250.0000 10 MIL SPACINGCPU_AACK_L
200.0000CLKFW_PHY_PCLK
200.00003 10 MIL SPACINGCLKFW_PHY_LCLK
200.0000 10 MIL SPACING3CLKFW_LINK_PCLK
200.0000CLKFW_LINK_LCLK
200.0000CLKENET_PHY_TX
200.0000CLKENET_PHY_RX
200.00003 10 MIL SPACINGCLKENET_PHY_GTX
200.0000CLKENET_PHY_GBE_REF
200.00003 10 MIL SPACINGCLKENET_LINK_RX
200.0000CLKENET_LINK_GTX
200.00003 10 MIL SPACINGCLKENET_LINK_GBE_REF
200.0000 10 MIL SPACINGCLK66M_GPU_AGP_UF
200.0000 10 MIL SPACING4CLK66M_GPU_AGP
200.0000 10 MIL SPACINGCLK33M_USB2_UF
200.00006 10 MIL SPACINGCLK33M_USB2
200.0000 10 MIL SPACINGCLK33M_CBUS_UF
200.00006 10 MIL SPACINGCLK33M_CBUS
200.0000 10 MIL SPACINGCLK33M_AIRPORT_UF
200.00006 10 MIL SPACINGCLK33M_AIRPORT
250.00005 10 MIL SPACINGCPU_QACK_L
250.00005CPU_GBL_L
10 MIL SPACINGCLK27M_GPU_XOUT
5 250CPU_TT<0..4>
250.00005 10 MIL SPACINGCPU_DBG_L
250 83 MHZ5CPU_ADDR<0..31>
250 83 MHZ5CPU_DATA<32..63>
2505CPU_TSIZ<0..2>
2505CPU_DTI<0..2>
4 167 MHZ200RAM_DATA_B<7..0>
10 MIL SPACINGCLK27M_XTAL_IN
10 MIL SPACINGCLK27M_GPU_XIN
10 MIL SPACINGCLK18M_XTAL_IN
10 MIL SPACINGCLK18M_INT_EXT
10 MIL SPACINGCLK25M_ENET_XIN
4 167 MHZ200RAM_DATA_B<15..8>
10 MIL SPACINGCLK18M_INT_XIN
10 MIL SPACINGCLK18M_INT_XOUT
10 MIL SPACINGCLK25M_ENET_XOUT
4MEM_CAS_L
4MEM_RAS_L
4MEM_WE_L
10 MIL SPACINGNEC_XT1
10 MIL SPACINGNEC_XT2
5RAM_MUXSEL_H
5RAM_MUXSEL_L
83 MHZ2505CPU_DATA<0..31>
4 167 MHZ200MEM_DATA<7..0>
4 167 MHZ200RAM_DATA_A<7..0>
4 167 MHZ200MEM_DATA<15..8>
4 167 MHZ200RAM_DATA_A<15..8>
200 167 MHZ4MEM_DATA<31..16>
200 167 MHZ4RAM_DATA_A<31..16>
200 167 MHZ4RAM_DATA_B<31..16>
200 167 MHZ4MEM_DQS<3..2>
200 167 MHZ4RAM_DQS_A<3..2>
200 167 MHZ4RAM_DQS_B<3..2>
200 167 MHZ4MEM_DQM<3..2>
200 167 MHZ4RAM_DQM_A<3..2>
4 167 MHZ200MEM_DATA<47..32>
200 167 MHZ4RAM_DQM_B<3..2>
4 167 MHZ200RAM_DATA_A<47..32>
4 167 MHZ200RAM_DATA_B<47..32>
4 167 MHZ200MEM_DQS<5..4>
4 167 MHZ200RAM_DQS_A<5..4>
4 167 MHZ200RAM_DQS_B<5..4>
4 167 MHZ200MEM_DQM<5..4>
4 167 MHZ200RAM_DQM_A<5..4>
4 167 MHZ200RAM_DQM_B<5..4>
200 167 MHZ4RAM_DATA_A<55..48>
200 167 MHZ4MEM_DATA<55..48>
200 167 MHZ4RAM_DATA_B<55..48>
200 167 MHZ4MEM_DATA<63..56>
200 167 MHZ4RAM_DATA_A<63..56>
200 167 MHZ4RAM_DATA_B<63..56>
83 MHZ4MEM_ADDR<12..0>
6 200RAM_ADDR<12..0>
4MEM_BA<1..0>
6 200RAM_BA<1..0>
4MEM_CS_L<3..0>
6 200RAM_CS_L<3..0>
4MEM_CKE<3..0>
6 200RAM_CKE<3..0>
3MEM_MUXSEL_H<1..0>
3MEM_MUXSEL_L<1..0>
250.00005CPU_CI_L
250.0000 10 MIL SPACING5CPU_TBST_L
250.00005CPU_WT_L
200.0000 10 MIL SPACING5CLKENET_LINK_TX
200.0000 10 MIL SPACINGSND_CLKOUT
200.0000 10 MIL SPACING7SND_SCLK
200.0000 10 MIL SPACING4SYSCLK_CPU
200.0000 10 MIL SPACING3SYSCLK_DDRCLK_B0_L_UF
39
39
39
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
10
20
8
8
8
8
8
8
8
8
8
8
28
28
27
27
27
18
26
17
24
8
8
8
8
8
8
8
8
11
11
8
10
11
10
11
10
11
11
10
11
11
10
11
10
11
11
11
10
11
11
10
11
11
11
10
11
10
11
11
11
11
11
11
10
10
8
8
8
27
25
25
8
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
8
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
14
14
12
12
8
8
8
8
8
8
12
12
19
28
28
5
5
5
5
5
5
5
5
5
5
28
13
13
13
27
27
13
27
13
13
13
12
12
12
12
12
12
12
12
5
5
5
5
5
6
5
5
10
14
14
27
10
14
14
27
9
9
9
26
26
10
10
6
9
10
9
10
9
10
10
9
10
10
9
10
9
10
10
10
9
10
10
9
10
10
10
9
10
9
10
10
9
9
9
9
9
9
9
9
9
9
5
5
5
13
14
14
5
9
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
STUB_LENGTHDELAY_RULE
DVO
AGP BYTES 2-3
AGP SIDEBAND
AGP CONTROL
AGP
GROUP
AGP BYTES 0-1
SIG_NAME MAX_EXPOSED_LENGTHMAX_VIAS PULSE_PARAMNO_TESTNET_SPACING_TYPE
Digital Signals (cont’d)
PCI
ULTRA ATA-100
OPTICAL
INTREPID
EIDE
ETHERNET MII
ZDIFF = 89.3OHM (USB 1.1)/ 89.4OHM (USB 2.0)ZSINGLE = 51.5OHM (USB 1.1)/ 46.2OHM (USB 2.0)
S = 10MIL (USB 2.0) (SEPERATION OF DIFF TRACES)
W = 4MIL(USB 1.1)/ 5MIL(USB 2.0) (TRACE WIDTH)
S = 5MIL (USB 1.1) (SEPERATION OF DIFF TRACES)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
ER = 4.3 (DIELECTRIC CONSTANT)
INTERNAL LAYER (USB1.1/USB 2.0)
POWER
THERMOSTAT
SUPPLIES
USB
UPPER
LVDSLOWER
FIREWIRE
GROUP
ETHERNET
SIG_NAME DIFFERENTIAL_PAIR MAX_EXPOSED_LENGTH NET_SPACING_TYPE MAX_VIAS
NEED TO MATCH DELAY TO 250
TOTAL UIDE+HD SKEW <500MIL
FIREWIRE MII
SIGNAL CONSTRAINTS - PAGE 2
Differential Signals
SPACING DELETED BECAUSE
OF PHYSICAL CONSTRAINTS
AROUND MARVELL PHY
ER = 4.3 (DIELECTRIC CONSTANT)
S = 10MIL (SEPERATION OF DIFF TRACES)
T = 0.7MIL (TRACE THICKNESS)
B = 12.2MIL (DIST BETW 2 GND PLANES)
W = 3.4MIL (TRACE WIDTH)
ZSINGLE = 53.37OHM
ZDIFF = 107.17OHM
W = 4MIL (TRACE WIDTH)
INTERNAL LAYERER = 4.3 (DIELECTRIC CONSTANT)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
S = 10MIL (SEPERATION OF DIFF TRACES)
ZSINGLE = 51.57OHM
ZDIFF = 99.8OHM
FOR FIREWIRE
TMDS
B051-6531
37 44
200.0000UIDE_RST_L
200.0000UIDE_IOCHRDY 10 MIL SPACING
200.0000UIDE_INTRQ
200.0000UIDE_DMARQ
200.0000UIDE_DMACK_L
200.0000UIDE_DIOW_L
200.0000UIDE_DIOR_L 10 MIL SPACING
UIDE_DATA<7> 200
200.0000UIDE_CS1_L
200.0000UIDE_CS0_L
4TMDS_CONN_CLKP CLKCONN_TMDS 10 MIL SPACING
4TMDS_CONN_CLKN CLKCONN_TMDS 10 MIL SPACING
4TMDS_CLKP CLKTMDS 10 MIL SPACING
4TMDS_CLKN CLKTMDS 10 MIL SPACING
MIN_DAISY_CHAINPCI_TRDY_L
MIN_DAISY_CHAINPCI_STOP_L
MIN_DAISY_CHAINPCI_PAR
MIN_DAISY_CHAINPCI_IRDY_L
MIN_DAISY_CHAINPCI_FRAME_L
MIN_DAISY_CHAINPCI_DEVSEL_L
200.0000HD_RESET_L 5
200.00005 10 MIL SPACINGHD_IOCHRDY
5HD_INTRQ
200.0000HD_DMARQ
200.00005HD_DMACK_L
200.0000HD_DIOW_L 5
200.0000HD_DIOR_L 5 10 MIL SPACING
200.0000HD_CS1_L 5
200.0000HD_CS0_L 5
GPU_DVO_VSYNC
GPU_DVO_HSYNC
EIDE_WR_L
EIDE_RST_L
EIDE_RD_L
EIDE_OPTICAL_WR_L
EIDE_OPTICAL_RST_L
EIDE_OPTICAL_RD_L
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_INT
EIDE_OPTICAL_DMA_RQ
EIDE_OPTICAL_DMAACK_L
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_CS0_L
EIDE_IOCHRDY
EIDE_INT
EIDE_DMARQ
EIDE_DMACK_L
EIDE_CS1_L
EIDE_CS0_L
4CLKLVDS_UP CLKLVDS_U 10 MIL SPACING
4CLKLVDS_UN CLKLVDS_U 10 MIL SPACING
4CLKLVDS_LP CLKLVDS_L 10 MIL SPACING
4CLKLVDS_LN CLKLVDS_L 10 MIL SPACING
250.00006AGP_TRDY_L
250.00006AGP_STOP_L
100.0000 8 MIL SPACING4AGP_SB_STB_L
100.0000 8 MIL SPACINGAGP_SB_STB
250.0000AGP_RBF_L
250.00006AGP_PAR
250.0000AGP_IRDY_L
250.0000AGP_GNT_L
250.0000AGP_FRAME_L
250.0000AGP_DEVSEL_L
100 8 MIL SPACINGAGP_AD_STB_L<1>
1004 8 MIL SPACINGAGP_AD_STB_L<0>
1004 8 MIL SPACINGAGP_AD_STB<1>
1004 8 MIL SPACINGAGP_AD_STB<0>
3V_SNS3V_SNSP
5V_SNS5V_SNSM
5V_SNS5V_SNSP
1772_CSI1772_CSIN
1772_CSI1772_CSIP
1772_CSS1772_CSSN
1772_CSS1772_CSSP
BT_USB_DM BT_USB_D 5 MIL SPACING
BT_USB_DP BT_USB_D 5 MIL SPACING
ENET_COL
ENET_CRS
ENET_LINK_TX_EN
ENET_LINK_TX_ER
ENET_MDC
ENET_MDIO
5ENET_PHY_TX_EN
5ENET_PHY_TX_ER
ENET_RX_DV
ENET_RX_ER
FW_LINK_LREQ
FW_PHY_LREQ
FW_PINT
MIN_LINE_WIDTH=3.410 MIL SPACINGFW_TPA0N FW_TPA0MIN_LINE_WIDTH=3.4
FW_TPA0P FW_TPA0 10 MIL SPACINGMIN_LINE_WIDTH=3.4
FW_TPB0N FW_TPB0 10 MIL SPACINGMIN_LINE_WIDTH=3.4
FW_TPB0P FW_TPB0 10 MIL SPACING
MIN_LINE_WIDTH=3.4FW_TPI1N FW_TPI1 10 MIL SPACING
MIN_LINE_WIDTH=3.4FW_TPI1P FW_TPI1 10 MIL SPACING
MIN_LINE_WIDTH=3.4FW_TPO1N FW_TPO1 10 MIL SPACING
MIN_LINE_WIDTH=3.4FW_TPO1P FW_TPO1 10 MIL SPACING
MIN_LINE_WIDTH=5LEFT_USB_DM LEFT_USB 10 MIL SPACING
MIN_LINE_WIDTH=5LEFT_USB_DP LEFT_USB 10 MIL SPACING
LVDS_L0N LVDS_L0 10 MIL SPACING
LVDS_L0P LVDS_L0 10 MIL SPACING
LVDS_L1N LVDS_L1 10 MIL SPACING
LVDS_L1P LVDS_L1 10 MIL SPACING
LVDS_L2N LVDS_L2 10 MIL SPACING
LVDS_L2P LVDS_L2 10 MIL SPACING
LVDS_U0N LVDS_U0 10 MIL SPACING
LVDS_U0P LVDS_U0 10 MIL SPACING
LVDS_U1N LVDS_U1 10 MIL SPACING
LVDS_U1P LVDS_U1 10 MIL SPACING
LVDS_U2N LVDS_U2 10 MIL SPACING
LVDS_U2P LVDS_U2 10 MIL SPACING
ENET_MDI0MDI_M<0>
MDI_M<1> ENET_MDI1
ENET_MDI2MDI_M<2>
MDI_M<3> ENET_MDI3
MDI_P<0> ENET_MDI0
MDI_P<1> ENET_MDI1
MDI_P<2> ENET_MDI2
MDI_P<3> ENET_MDI3
MODEM_USB_DM MODEM_USB_D 5 MIL SPACING
MODEM_USB_DP MODEM_USB_D 5 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_DAM NEC_USB_DA 10 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_DAP NEC_USB_DA 10 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_DBM NEC_USB_DB 10 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_DBP NEC_USB_DB 10 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_RSDM1 NEC_USB_RSD1 10 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_RSDM2 NEC_USB_RSD2 10 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_RSDP1 NEC_USB_RSD1 10 MIL SPACING
MIN_LINE_WIDTH=5NEC_USB_RSDP2 NEC_USB_RSD2 10 MIL SPACING
MIN_LINE_WIDTH=5RIGHT_USB_DM RIGHT_USB 10 MIL SPACING
MIN_LINE_WIDTH=5RIGHT_USB_DP RIGHT_USB 10 MIL SPACING
RJ45_DP0 10 MIL SPACINGRJ45_DN<0>
RJ45_DN<1> RJ45_DP1 10 MIL SPACING
RJ45_DP2 10 MIL SPACINGRJ45_DN<2>
RJ45_DN<3> RJ45_DP3 10 MIL SPACING
RJ45_DP<0> RJ45_DP0 10 MIL SPACING
RJ45_DP<1> RJ45_DP1 10 MIL SPACING
RJ45_DP<2> RJ45_DP2 10 MIL SPACING
RJ45_DP<3> RJ45_DP3 10 MIL SPACING
THERM1_ALTTHERM1_A_DM
THERM1_ALTTHERM1_A_DP
THERM1THERM1_DM
THERM1THERM1_DP
THERM1_MAINTHERM1_M_DM
THERM1_MAINTHERM1_M_DP
THERM2_ALTTHERM2_A_DM
THERM2_ALTTHERM2_A_DP
THERM2THERM2_DM
THERM2THERM2_DP
THERM2_MAINTHERM2_M_DM
THERM2_MAINTHERM2_M_DP
TMDS_DN<0> TMDS_D0 10 MIL SPACING
TMDS_DN<1> TMDS_D1 10 MIL SPACING
TMDS_DN<2> TMDS_D2 10 MIL SPACING
TMDS_DP<0> TMDS_D0 10 MIL SPACING
TMDS_DP<1> TMDS_D1 10 MIL SPACING
TMDS_DP<2> TMDS_D2 10 MIL SPACING
USB_DEM USB_DE 5 MIL SPACING
USB_DEP USB_DE 5 MIL SPACING
USB_DFM USB_DF 5 MIL SPACING
USB_DFP USB_DF 5 MIL SPACING
5ENET_LINK_RXD<7..0>
5ENET_PHY_TXD<7..0>
ENET_LINK_TXD<7..0>
FW_LINK_DATA<7..0> 5
FW_PHY_DATA<7..0> 5
FW_LINK_CNTL<1..0>
FW_PHY_CNTL<1..0>
MIN_LINE_WIDTH=3.4FW_TPI0N FW_TPI0 10 MIL SPACING
MIN_LINE_WIDTH=3.4FW_TPI0P FW_TPI0 10 MIL SPACING
MIN_LINE_WIDTH=3.4FW_TPO0N FW_TPO0 10 MIL SPACING
MIN_LINE_WIDTH=3.4FW_TPO0P FW_TPO0 10 MIL SPACING
33 MHZEIDE_DATA<15..0>
33 MHZEIDE_ADDR<2..0>
33 MHZEIDE_OPTICAL_DATA<15..0>
33 MHZEIDE_OPTICAL_ADDR<2..0>
100 MHZUIDE_DATA<15..8> 200
100 MHZUIDE_DATA<6..0> 200
100 MHZUIDE_ADDR<2..0> 200
5HD_ADDR<2..0> 100 MHZ200
MIN_DAISY_CHAIN 33 MHzPCI_AD<31..0>
MIN_DAISY_CHAIN 33 MHzPCI_CBE<3..0>
100 66 MHz5AGP_AD<15..0>
100 66 MHz5AGP_AD<31..16>
66 MHz1005AGP_CBE<3..2>
100 66 MHz5AGP_SBA<7..0>
500.0000MIN_LINE_WIDTH=3.4
FW_TPA1N FW_TPA1 10 MIL SPACING
500.0000MIN_LINE_WIDTH=3.4
FW_TPA1P FW_TPA1 10 MIL SPACING
500.0000MIN_LINE_WIDTH=3.4
FW_TPB1N FW_TPB1 10 MIL SPACING
500.0000MIN_LINE_WIDTH=3.4
FW_TPB1P FW_TPB1 10 MIL SPACING
100 66 MHz5AGP_CBE<1..0>
5 250GPU_DVOD<0..11>
5 100 MHZHD_DATA<15..0> 200
3V_SNS3V_SNSM
285.0000AGP_REQ_L
39
39
39
39
39
39
39
26
39
26
26
26
26
26
26
24
26
24
24
24
24
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17
24
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24
39
39
22
22
17
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17
24
24
20
20
24
24
24
39
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24
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24
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18
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18
24
24
27
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29
39
39
39
39
26
26
22
22
22
22
22
22
22
22
22
22
22
22
25
25
32
32
39
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39
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39
39
39
39
22
22
22
22
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22
27
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28
24
24
39
39
24
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24
12
17
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29
18
20
18
13
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13
22
22
20
20
12
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12
12
12
12
24
24
13
13
24
24
24
24
24
19
19
13
13
13
24
24
24
24
24
24
24
24
24
13
13
13
13
13
13
19
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19
19
12
12
12
12
12
12
12
12
12
12
12
12
12
12
33
33
33
31
31
31
31
14
14
13
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13
13
13
13
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13
28
28
28
28
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24
24
19
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19
19
27
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27
27
27
14
14
26
26
26
26
26
26
26
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26
26
27
27
27
27
27
27
27
27
25
25
25
25
25
25
25
25
20
20
20
20
20
20
14
14
14
14
13
13
13
13
28
13
28
13
13
24
24
13
13
13
24
9
12
12
12
12
12
28
28
28
28
12
19
24
33
12
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
CARDBUS
MIN_NECK_WIDTHMIN_LINE_WIDTHVOLTAGEGROUP
REFERENCE
SILICONIMIAGE
ATI M10
88E1111
FW
USB 2.0
SSCGINTREPID
POWER NET CONSTRAINTS
FAN GND
MIN_NECK_WIDTH REDUCED FOR TESTPOINTS
PLLSINTREPIDDDR RAM
CPU
CONTROL
MAX1717
LTC3411
LTC1962INT PLLS
1.5V SWITCHER
MAIN/SLEEP
PMU
ADAPTER
BATTERYCHARGER
LVDS
I/O AREA
TRACKPAD
INVERTER
MAX1715
LTC37075V SWITCHER
3V SWITCHER
MIN_LINE_WIDTHVOLTAGEGROUP SIG_NAME
MIN_NECK_WIDTHMIN_LINE_WIDTHVOLTAGESIG_NAME
14V SWITCHER
GROUP
LTC1625
SIG_NAME
2.5V SWITCHER
LTC1778
SIGNAL CONSTRAINTS - PAGE 3
I/O AREA
I/O AREA
MISCHD
TRACKPAD
HALL EFFECT
VIDEO
KB LED
SOUND
MIN_NECK_WIDTH
CHGND1
CHGND3
CHGND4
CHGND5
CHGND6
I331+1_8V_GPU_VDDDI
I332 GPU_VCORE_VDDCI
+1_8V_GPU_PNLPLLI333
+1_8V_GPU_AVDDI334
+1_8V_GPU_PNLIOI335
+2_5V_GPU_A2VDDI336
+GPU_MCLKI337
+1_8V_GPU_AVDDQI338
I339 +3V_ATI_SS
+3V_ATI_OSC_SLEEPI340
I341 +1_8V_GPU_MEMPLL
I342 +GPU_VDD15_UF+2_5V_SLEEP_NECK1I343
I344 GPU_VCORE_NECK
+1_5V_AGP_NECKI345
+1_8V_PVDD_NECKI346
+3V_SLEEP_NECKI347
I348 +GPU_VDD15_NECK
I349 +1_8V_SLEEP_NECK
I350 +1_5V_SLEEP_NECK
I351 +2_5V_SLEEP_NECK2
I352 +2_5V_GPU
I353 +3V_SI_PLLVCC
I354 +3V_SI_VCCI355 +3V_SI_AVCC
CHGND2
B051-6531
38 44
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12 CHGND1
GNDMIN_NECK_WIDTH=6MIN_LINE_WIDTH=25VOLTAGE=0V
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12 CHGND3
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12 CHGND4
VOLTAGE=0V MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25 CHGND5
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND6
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND2
MIN_LINE_WIDTH=10VOLTAGE=1.8V
VOLTAGE=1.8V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=10VOLTAGE=2.5V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VOLTAGE=2.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=6VOLTAGE=3.3V+3V_SLEEP
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=3.3V+3V_PMU
MIN_LINE_WIDTH=25VOLTAGE=2.5V MIN_NECK_WIDTH=10+2_5V_MAIN
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=12.6V+BATT
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=24V+24V_PBUS
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=2.5V+2_5V_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.8V+1_8V_SLEEP
MIN_LINE_WIDTH=25VOLTAGE=1.8V MIN_NECK_WIDTH=6+1_8V_MAIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=5V+5V_SLEEP
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25+5V_HD_SLEEP
MIN_NECK_WIDTH=15MIN_LINE_WIDTH=25VOLTAGE=0VSND_AGND
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10FANR_GND
MIN_LINE_WIDTH=10VOLTAGE=0VKBD_LED1_OUT
MIN_LINE_WIDTH=25VOLTAGE=0VGPU_TV_GND1
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=12+3V_LCD
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15+5V_DDC_SLEEP_UF
MIN_NECK_WIDTH=10VOLTAGE=5V MIN_LINE_WIDTH=25+5V_INV_UF_SW
VOLTAGE=5V MIN_LINE_WIDTH=10+5V_TPAD_SLEEP
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12ENET_CTAP_CHGND
VOLTAGE=3.3V MIN_LINE_WIDTH=10+3V_PMU_AVCC
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20LTC1962_1V5_VOUT
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20LTC1962_1V5_VIN
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10LTC1962_L3_VOUT
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10LTC1962_L3_VIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20LTC1962_INT_VIN
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10VOLTAGE=1.8V1_8V_SW
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10VOLTAGE=0VLTC3411_GND
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VOLTAGE=3.3VLTC3411_VCC
VOLTAGE=1.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10MAXBUS_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=12.8V1625_VSW
MIN_LINE_WIDTH=10VOLTAGE=24V1625_VIN
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10VOLTAGE=1.2VGPU_VCORE_SW
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=101778_BG
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VOLTAGE=5V1778_BST_RC
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=101778_TG
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VOLTAGE=5V1778_BST
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10VOLTAGE=0V1778_GND
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VOLTAGE=5V1778_VCC
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VOLTAGE=14V1778_VIN
MIN_LINE_WIDTH=8VOLTAGE=1.5V1_5V_FB
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50VOLTAGE=2.5V2_5V_LX
MIN_LINE_WIDTH=25VOLTAGE=1.4V MIN_NECK_WIDTH=10CPU_VCORE_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=5V5V_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=5V5V_RSNS
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V3V_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V3V_RSNS
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10VOLTAGE=5V3707_INTVCC
MIN_LINE_WIDTH=50VOLTAGE=24V MIN_NECK_WIDTH=10+ADAPTER_SW
MIN_LINE_WIDTH=50VOLTAGE=24V MIN_NECK_WIDTH=10+ADAPTER
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=16.8V+BATT_POS
MIN_NECK_WIDTH=10VOLTAGE=12.6V MIN_LINE_WIDTH=25+BATT_14V_FUSE
MIN_LINE_WIDTH=10VOLTAGE=0V1772_GND
MIN_LINE_WIDTH=10VOLTAGE=3.3V+3V_PMU_ESR
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=12.8V+PBUS
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=5V+5V_MAIN
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=3.3V+3V_MAIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V+1_5V_SLEEP
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=1.5V+1_5V_MAIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V+1_5V_LDO
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50VOLTAGE=1.5V1_5V_LX
MIN_LINE_WIDTH=10VOLTAGE=5V1625_EXTVCC
MIN_LINE_WIDTH=10VOLTAGE=5V1625_INTVCC
VOLTAGE=0V MIN_LINE_WIDTH=101625_SGND
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=1.2V1V20_REF
VOLTAGE=0V MIN_LINE_WIDTH=103707_SGND
MIN_LINE_WIDTH=81_8V_VFB
MIN_LINE_WIDTH=8LTC3411_ITH_RC
MIN_LINE_WIDTH=8LTC3411_ITH
MIN_LINE_WIDTH=8LTC3411_SYNC
MIN_LINE_WIDTH=8LTC3411_SHDN
MIN_LINE_WIDTH=81778_ION
MIN_LINE_WIDTH=81778_ITH
MIN_LINE_WIDTH=81778_ITH_RC
MIN_LINE_WIDTH=81_5V_2_5V_OK
MIN_LINE_WIDTH=81778_VFB
MIN_LINE_WIDTH=81778_FCB
MIN_LINE_WIDTH=81778_VRNG
VOLTAGE=5V MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VCORE_VCC
VOLTAGE=1.4V MIN_LINE_WIDTH=200 MIN_NECK_WIDTH=10VCORE_LX
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VCORE_DH
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VCORE_DL
VOLTAGE=5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VCORE_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5VVCORE_BST
MIN_LINE_WIDTH=8VCORE_REF
MIN_LINE_WIDTH=8VCORE_ILIM
MIN_LINE_WIDTH=8VOLTAGE=5VVCORE_TON
MIN_LINE_WIDTH=8VCORE_CC
MIN_LINE_WIDTH=8VOLTAGE=1.4VVCORE_FB
MIN_LINE_WIDTH=8VCORE_TIME
MIN_LINE_WIDTH=8VCORE_VGATE
MIN_LINE_WIDTH=30VOLTAGE=0VVCORE_GND
MIN_LINE_WIDTH=8VOLTAGE=0VVCORE_GNDSNS
MIN_LINE_WIDTH=8VOLTAGE=1.4VVCORE_SNS
MIN_LINE_WIDTH=8VOLTAGE=0VVCORE_GNDDIV
VOLTAGE=5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=102_5V_BST
VOLTAGE=5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=102_5V_BOOST
VOLTAGE=2.5V MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=102_5V_DH
VOLTAGE=2.5V MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=102_5V_DL
VOLTAGE=5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=101_5V_BST
VOLTAGE=5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=101_5V_BOOST
VOLTAGE=1.5V MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=101_5V_DH
VOLTAGE=1.5V MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=101_5V_DL
MIN_LINE_WIDTH=81_5V_ILIM
MIN_LINE_WIDTH=82_5V_ILIM
MIN_LINE_WIDTH=8MAX1715_TON
MIN_LINE_WIDTH=8VOLTAGE=2.0VMAX1715_REF
MIN_LINE_WIDTH=8MAX1715_SKIP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VOLTAGE=5VMAX1715_VCC
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10VOLTAGE=0VMAX1715_GND
MIN_LINE_WIDTH=25VOLTAGE=0V MIN_NECK_WIDTH=10BATT_NEG
MIN_LINE_WIDTH=25VOLTAGE=12.6V MIN_NECK_WIDTH=101772_LX
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=12.6V+BATT_24V_FUSE
VOLTAGE=24V MIN_LINE_WIDTH=10+ADAPTER_OR_BATT
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=12.6V+BATT_RSNS
MIN_LINE_WIDTH=10VOLTAGE=24V1772_DCIN
VOLTAGE=1.25V MIN_LINE_WIDTH=10DDR_VREF
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+3V_INTREPID_USB
MIN_NECK_WIDTH=10VOLTAGE=2.5V MIN_LINE_WIDTH=25+2_5V_INTREPID
MIN_LINE_WIDTH=15VOLTAGE=1.5V MIN_NECK_WIDTH=10+1_5V_INTREPID_PLL
MIN_NECK_WIDTH=6MIN_LINE_WIDTH=15VOLTAGE=1.5V+1_5V_INTREPID_PLL1
MIN_NECK_WIDTH=6MIN_LINE_WIDTH=15VOLTAGE=1.5V+1_5V_INTREPID_PLL3
MIN_NECK_WIDTH=5MIN_LINE_WIDTH=15VOLTAGE=1.5V+1_5V_INTREPID_PLL4
MIN_LINE_WIDTH=15VOLTAGE=1.5V MIN_NECK_WIDTH=5+1_5V_INTREPID_PLL5
MIN_NECK_WIDTH=6VOLTAGE=1.5V MIN_LINE_WIDTH=15+1_5V_INTREPID_PLL8
VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=6+1_5V_INTREPID_PLL6
MIN_LINE_WIDTH=10VOLTAGE=1.25VINT_MEM_VREF
VOLTAGE=0V MIN_LINE_WIDTH=10INT_MEM_REF_H
VOLTAGE=0V MIN_LINE_WIDTH=8UIDE_REF
MIN_LINE_WIDTH=10VOLTAGE=1.25VINT_AGP_VREF
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25+VCC_CBUS_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=5V+VPP_CBUS_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V+1_5V_AGP
VOLTAGE=1.2V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
VOLTAGE=24V MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10+ADAPTER_SENSE
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V+1_5V_SLEEP_VIN
VOLTAGE=4.85V MIN_LINE_WIDTH=10+4_85V_RAW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10VOLTAGE=12.6V+BATT_VSNS
VOLTAGE=1.8V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10+1_8V_GPU_PLL
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15+5V_DDC_SLEEP
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+3V_LCD_SW
MIN_LINE_WIDTH=10VOLTAGE=0VKBD_LED2_OUT
VOLTAGE=0V MIN_LINE_WIDTH=25TV_GND2
VOLTAGE=0V MIN_LINE_WIDTH=25TV_GND1
VOLTAGE=0V MIN_LINE_WIDTH=25GPU_TV_GND2
VOLTAGE=5.4V MIN_LINE_WIDTH=101772_DLOV
VOLTAGE=4.6V MIN_LINE_WIDTH=10+4_6V_BU
MIN_NECK_WIDTH=10VOLTAGE=5V MIN_LINE_WIDTH=25+5V_INV_SW
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=0VFANL_GND
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+5V_SOUND_SLEEP
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10+HD_LOGIC_SLEEP
MIN_NECK_WIDTH=6MIN_LINE_WIDTH=15VOLTAGE=1.5V+1_5V_INTREPID_PLL2
VOLTAGE=1.2V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30GPU_VCORE
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=8+3V_GPU_FLT
MIN_NECK_WIDTH=10VOLTAGE=2.5V MIN_LINE_WIDTH=30+GPU_MEM
MIN_LINE_WIDTH=10VOLTAGE=3.3V MIN_NECK_WIDTH=10
VOLTAGE=1.8V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_GPU
MIN_NECK_WIDTH=10VOLTAGE=2.5V MIN_LINE_WIDTH=25GPU_MEM_IO
VOLTAGE=1.8V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=10VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=2.5VGPU_MEM_IO_FLT
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=2.5V+GPU_MEMCORE
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VOLTAGE=1.5V+1_5V_AGP_GPU
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VOLTAGE=1.5V+1_5V_GPU_VDD15
VOLTAGE=1.8V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10VOLTAGE=1.8V
MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10VOLTAGE=2.5V
MIN_LINE_WIDTH=10VOLTAGE=1.8V
MIN_LINE_WIDTH=25VOLTAGE=12.8V MIN_NECK_WIDTH=10+12_8V_INV MIN_LINE_WIDTH=10VOLTAGE=1.8V
VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=8+2_5V_MARVELL_AVDD
VOLTAGE=1.0V MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25+1_0V_MARVELL
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=8VOLTAGE=1.0VLTC3405_SW
VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+2_5V_MARVELL
MIN_NECK_WIDTH=12VOLTAGE=33V MIN_LINE_WIDTH=100+FW_PWR_PORTA
MIN_NECK_WIDTH=12VOLTAGE=33V MIN_LINE_WIDTH=100+FW_VP1
VOLTAGE=12.8V MIN_LINE_WIDTH=100 MIN_NECK_WIDTH=12+FW_SW
VOLTAGE=12.8V MIN_LINE_WIDTH=100 MIN_NECK_WIDTH=12+FW_FUSE
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10+3V_FW_ESD_ILIM
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_FW_ESD
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10LM2594_IN
MIN_NECK_WIDTH=12VOLTAGE=33V MIN_LINE_WIDTH=100+FW_PWR_OR
MIN_NECK_WIDTH=12VOLTAGE=33V MIN_LINE_WIDTH=100+FW_VP0
MIN_NECK_WIDTH=6VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_FW_AVDD_PORT1
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_FW_AVDD_PORT0
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_FW_AVDD
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=1.95V+1_95V_FW_DVDD_RX0
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=1.95V+1_95V_FW_DVDD_PORT1
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=1.95V+1_95V_FW_PLLVDD
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.95V+1_95V_FW_PLL400VDD
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.95V+1_95V_FW_PLL500VDD
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10+3V_FW
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=1.95V+1_95V_FW_DVDD_TX0
MIN_NECK_WIDTH=12VOLTAGE=0V MIN_LINE_WIDTH=100FW_VGND1
MIN_NECK_WIDTH=12VOLTAGE=0V MIN_LINE_WIDTH=100FW_VGND0
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10+3V_FW_AVDD_PORT2
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.95V+1_95V_FW_DVDD
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10+3V_FW_UF
MIN_LINE_WIDTH=10VOLTAGE=1.8V MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VOLTAGE=2.5V+2_5V_GPU_PNLIO
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=1.8V+1_8V_GPU
VOLTAGE=3.3V MIN_LINE_WIDTH=10
VOLTAGE=2.5V MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=8
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=8
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=8
MIN_LINE_WIDTH=10VOLTAGE=1.5V
VOLTAGE=1.8V MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=20VOLTAGE=1.5V
MIN_LINE_WIDTH=10VOLTAGE=3.3V+3V_HALL_EFFECT
VOLTAGE=4.85V MIN_LINE_WIDTH=10+4_85V_ESR
VOLTAGE=24V MIN_LINE_WIDTH=10+ADAPTER_ILIM
MIN_LINE_WIDTH=10VOLTAGE=5.4V1772_LDO
MIN_LINE_WIDTH=15VOLTAGE=1.5V MIN_NECK_WIDTH=6+1_5V_INTREPID_PLL7
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=1.4VCPU_AVDD
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10VOLTAGE=1.8V+1_8V_ATI_PVDD
MIN_LINE_WIDTH=10VOLTAGE=3.3V MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=10VOLTAGE=3.3V
VOLTAGE=2.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=8+2_5V_CG_MAIN
VOLTAGE=3.3V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=8+3V_CG_PLL_MAIN
MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10+3V_NEC_VDD
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=3.3VNEC_AVDD
MIN_LINE_WIDTH=25VOLTAGE=0V MIN_NECK_WIDTH=10FW_TPO0R
34 23
21
16
19
15
16
18
21
21
8
39
15
14
16
39
19
20
33
39
39
39
30
7
34
32
39
32
39
39
34
39
10
12
18
15
32
39
39
39
39
33
39
39
19
21
18
39
29
29
19
39
21
39
21
18
21
21
21
21
21
21
18
18
21
19
19
19
19
19
21
19
21
21
21
21
20
20
20
39
39
39
39
24
25
25
23
22
22
22
22
23
27
25
14
35
5
32
32
19
19
19
19
19
19
19
19
35
35
5
33
33
33
33
33
31
31
31
31
31
32
39
35
35
32
32
32
31
33
19
19
19
35
19
19
19
34
34
34
34
34
34
34
34
34
34
34
34
14
34
34
34
34
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
31
31
31
32
31
31
11
14
9
8
14
14
14
12
14
12
9
9
13
12
17
17
12
31
35
30
31
21
22
22
23
22
22
22
31
32
22
25
24
14
18
21
18
12
21
21
21
19
22
27
27
27
27
29
29
29
29
29
29
28
28
29
28
28
28
28
28
28
28
28
28
28
29
29
28
28
28
21
18
23
32
32
31
8
5
19
14
14
26
26
29
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
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AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
FUNCTIONAL TEST POINTS
I271
I272
I273
I274
I275
I276
I277
I278
I279
I280
I281
I282
I283
I284
I285
I286
I287
I288
I289
I290
I291
I292
I293
I294
051-6531 B
4439
FUNC_TEST=YES
AIRPORT_CLKRUN_L
FUNC_TEST=YESPCI_AD<12>
FUNC_TEST=YES
JTAG_ASIC_TMS
SND_HP_MUTE_INV
FUNC_TEST=YES
TEST_TP
FUNC_TEST=YES
TEB_TPFUNC_TEST=YES
SRMOD_TPFUNC_TEST=YES
SRCLK_TPFUNC_TEST=YES
FUNC_TEST=YES
EIDE_OPTICAL_ADDR<1>
FUNC_TEST=YES
+1_8V_MAIN
SLEEP
FUNC_TEST=YES
VCORE_MUX_EN
FUNC_TEST=YES
VCORE_VID0FUNC_TEST=YES
FUNC_TEST=YESFW_TPO0R
VCORE_VID1FUNC_TEST=YES
VCORE_VID3
FUNC_TEST=YES
VCORE_VID4
FUNC_TEST=YES
VCORE_VID2
FUNC_TEST=YES
FUNC_TEST=YES
RJ45_DN<1>
FUNC_TEST=YES
RJ45_DP<3>
FUNC_TEST=YES
RJ45_DN<3>
MOD_SYNC
FUNC_TEST=YES
1778_VFB
FUNC_TEST=YES
MOD_DTO
FUNC_TEST=YES
MOD_BITCLK
FUNC_TEST=YES
MOD_CLKOUT
FUNC_TEST=YES
FUNC_TEST=YES
COMM_DTR_L
FUNC_TEST=YES
PWR_BUTTON_L
JTAG_CPU_TRST_L
FUNC_TEST=YES
INT_MOD_DTIFUNC_TEST=YES
FUNC_TEST=YES
ROM_ONBOARD_CS_L
FUNC_TEST=YES
ROM_OE_L
FUNC_TEST=YES
ROM_CS_L
FUNC_TEST=YES
CLK33M_AIRPORT
FUNC_TEST=YES
AIRPORT_IDSEL
FUNC_TEST=YESRJ45_DP<0>
FUNC_TEST=YES
FANL_PWM
FUNC_TEST=YES
KBD_CAPSLOCK_LED
FUNC_TEST=YESFANR_PWM
FUNC_TEST=YES
RJ45_DP<1>
FUNC_TEST=YES
RJ45_DN<0>
FUNC_TEST=YES
BATT_DATA
FUNC_TEST=YES
EIDE_OPTICAL_INT
FUNC_TEST=YES
TPAD_F_TXD
FUNC_TEST=YES
KBD_OPTION_L
FUNC_TEST=YES
PCI_AD<24>
SND_TO_AUDIO
FUNC_TEST=YES
FUNC_TEST=YES
TV_C
FUNC_TEST=YES
VGA_VSYNC
FUNC_TEST=YES
VGA_R
VGA_HSYNC
FUNC_TEST=YES
FUNC_TEST=YES
VGA_G
FUNC_TEST=YES
VGA_B
FUNC_TEST=YES
VCORE_FB
FUNC_TEST=YES
TV_GND2
FUNC_TEST=YES
TV_GND1
FUNC_TEST=YES
TPAD_F_RXD
FUNC_TEST=YES
TMDS_DP<2>
FUNC_TEST=YES
TMDS_DP<1>
FUNC_TEST=YES
TMDS_DP<0>
FUNC_TEST=YES
TMDS_DN<2>
FUNC_TEST=YES
TMDS_DN<1>
FUNC_TEST=YES
TMDS_DN<0>
FUNC_TEST=YES
TMDS_CONN_CLKP
FUNC_TEST=YES
TMDS_CONN_CLKN
SND_SYNC
FUNC_TEST=YES
FUNC_TEST=YES
SND_SCLK
SND_LIN_SENSE_L
FUNC_TEST=YES
FUNC_TEST=YES
SND_HW_RESET_L
FUNC_TEST=YES
ROM_RW_L
FUNC_TEST=YES
RIGHT_USB_DP
FUNC_TEST=YES
RIGHT_USB_DM
FUNC_TEST=YES
RF_DISABLE_L_SPN
FUNC_TEST=YES
PMU_KB_RESET_L
FUNC_TEST=YES
PMU_BATT_DET_L
PCI_STOP_L
FUNC_TEST=YES
PCI_PAR
FUNC_TEST=YES
FUNC_TEST=YES
PCI_IRDY_L
FUNC_TEST=YESPCI_FRAME_L
FUNC_TEST=YES
PCI_DEVSEL_L
FUNC_TEST=YES
PCI_CBE<2>
FUNC_TEST=YES
PCI_CBE<0>
FUNC_TEST=YES
PCI_AD<30>
PCI_AD<28>
FUNC_TEST=YES
PCI_AD<27>
FUNC_TEST=YES
FUNC_TEST=YES
PCI_AD<26>
PCI_AD<25>
FUNC_TEST=YES
FUNC_TEST=YESPCI_AD<23>
FUNC_TEST=YESPCI_AD<22>
FUNC_TEST=YES
PCI_AD<21>
PCI_AD<20>
FUNC_TEST=YES
FUNC_TEST=YESPCI_AD<19>
FUNC_TEST=YESPCI_AD<18>
FUNC_TEST=YESPCI_AD<17>
FUNC_TEST=YES
PCI_AD<16>
FUNC_TEST=YES
PCI_AD<15>
FUNC_TEST=YES
PCI_AD<14>
FUNC_TEST=YESPCI_AD<13>
PCI_AD<11>FUNC_TEST=YES
FUNC_TEST=YES
PCI_AD<10>
FUNC_TEST=YESPCI_AD<9>
FUNC_TEST=YESPCI_AD<8>
FUNC_TEST=YES
PCI_AD<7>
FUNC_TEST=YES
PCI_AD<6>
FUNC_TEST=YES
PCI_AD<5>
FUNC_TEST=YES
PCI_AD<4>
FUNC_TEST=YES
PCI_AD<3>
FUNC_TEST=YES
PCI_AD<2>
FUNC_TEST=YES
PCI_AD<1>
FUNC_TEST=YES
PCI_AD<0>
FUNC_TEST=YES
NEC_RIGHT_USB_PWREN
FUNC_TEST=YES
NEC_RIGHT_USB_OVERCURRENT
FUNC_TEST=YES
NEC_LEFT_USB_PWREN
FUNC_TEST=YES
NEC_LEFT_USB_OVERCURRENT
FUNC_TEST=YES
MODEM_USB_DP
FUNC_TEST=YES
MODEM_USB_DM
FUNC_TEST=YES
MAIN_RESET_L
FUNC_TEST=YES
LVDS_U2P
FUNC_TEST=YES
LVDS_U2N
FUNC_TEST=YES
LVDS_U1P
FUNC_TEST=YES
LVDS_U1N
FUNC_TEST=YES
LVDS_U0P
FUNC_TEST=YESLVDS_L2P
FUNC_TEST=YES
LVDS_L2N
FUNC_TEST=YES
LVDS_L1P
FUNC_TEST=YES
LVDS_L1N
FUNC_TEST=YES
LVDS_L0P
FUNC_TEST=YES
LVDS_L0N
FUNC_TEST=YES
LVDS_DDC_DATA
FUNC_TEST=YES
LVDS_DDC_CLK
FUNC_TEST=YES
LEFT_USB_DP
FUNC_TEST=YESLEFT_USB_DM
FUNC_TEST=YESKBD_Y<7>
FUNC_TEST=YESKBD_Y<6>
FUNC_TEST=YES
KBD_Y<5>
FUNC_TEST=YES
KBD_Y<4>
FUNC_TEST=YES
KBD_Y<3>
FUNC_TEST=YESKBD_Y<2>
FUNC_TEST=YES
KBD_Y<1>
FUNC_TEST=YESKBD_Y<0>
FUNC_TEST=YES
KBD_X<9>
KBD_X<8>
FUNC_TEST=YES
FUNC_TEST=YES
KBD_X<5>
FUNC_TEST=YES
KBD_X<4>
FUNC_TEST=YES
KBD_X<2>
KBD_X<1>
FUNC_TEST=YES
KBD_X<0>
FUNC_TEST=YES
KBD_SHIFT_L
FUNC_TEST=YES
FUNC_TEST=YES
KBD_ID
FUNC_TEST=YES
KBD_FUNCTION_L
FUNC_TEST=YES
KBD_COMMAND_L
FUNC_TEST=YES
JTAG_CPU_TRST_L
FUNC_TEST=YES
JTAG_CPU_TMS
FUNC_TEST=YES
JTAG_CPU_TDO_TP
FUNC_TEST=YES
JTAG_CPU_TDI
FUNC_TEST=YES
JTAG_CPU_TCK
FUNC_TEST=YES
JTAG_ASIC_TRST_L
FUNC_TEST=YES
JTAG_ASIC_TDO_TP
FUNC_TEST=YES
JTAG_ASIC_TDI
FUNC_TEST=YES
JTAG_ASIC_TCK
FUNC_TEST=YES
INT_I2C_DATA1
FUNC_TEST=YES
INT_I2C_DATA0
FUNC_TEST=YES
INT_I2C_CLK1
FUNC_TEST=YES
INT_I2C_CLK0
FUNC_TEST=YES
INT_AUDIO_TO_SND
FUNC_TEST=YES
GPU_VCORE
FUNC_TEST=YES
FW_TPO1P
FUNC_TEST=YESFW_TPO1N
FUNC_TEST=YES
FW_TPI1P
FUNC_TEST=YES
FW_TPI1N
FUNC_TEST=YES
EIDE_OPTICAL_WR_L
FUNC_TEST=YES
EIDE_OPTICAL_RST_L
FUNC_TEST=YESEIDE_OPTICAL_IOCHRDY
FUNC_TEST=YES
EIDE_OPTICAL_DMA_RQ
FUNC_TEST=YES
EIDE_OPTICAL_DATA<14>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<13>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<12>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_DATA<9>
FUNC_TEST=YES
FUNC_TEST=YES
EIDE_OPTICAL_DATA<8>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<7>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<6>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<5>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<4>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<3>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<2>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<1>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<0>
FUNC_TEST=YES
EIDE_OPTICAL_CS1_L
FUNC_TEST=YES
EIDE_OPTICAL_CS0_L
FUNC_TEST=YES
DVI_HPD_UF
FUNC_TEST=YES
DVI_DDC_DATA_UF
FUNC_TEST=YES
DVI_DDC_CLK_UF
FUNC_TEST=YES
DCDC_EN
FUNC_TEST=YES
CPU_VCORE_SLEEP
FUNC_TEST=YES
CPU_SRESET_L
FUNC_TEST=YES
CPU_HRESET_L
FUNC_TEST=YES
CPU_CHKSTP_OUT_L
FUNC_TEST=YES
COMM_TRXC
FUNC_TEST=YES
COMM_SHUTDOWN
COMM_RING_DET_LFUNC_TEST=YES
FUNC_TEST=YES
COMM_RESET_L
FUNC_TEST=YES
CLKLVDS_UP
FUNC_TEST=YES
CLKLVDS_UN
FUNC_TEST=YES
CLKLVDS_LP
FUNC_TEST=YES
CLKLVDS_LN
FUNC_TEST=YES
CBUS_DET_2_L
FUNC_TEST=YES
CBUS_DET_1_L
FUNC_TEST=YES
BT_USB_DP
FUNC_TEST=YES
BRIGHT_PWM
FUNC_TEST=YES
BBANG_HRESET_L
FUNC_TEST=YES
BATT_NEG
FUNC_TEST=YES
AIRPORT_PCI_INT_L
FUNC_TEST=YES
AIRPORT_PCI_GNT_L
FUNC_TEST=YES+12_8V_INV
+5V_TPAD_SLEEP
FUNC_TEST=YES
FUNC_TEST=YES
+5V_INV_SW
FUNC_TEST=YES
+5V_DDC_SLEEP
FUNC_TEST=YES+PBUS
FUNC_TEST=YES
+3V_PMU
FUNC_TEST=YES
+24V_PBUS
FUNC_TEST=YES
PCI_CBE<1>
FUNC_TEST=YES
PCI_CBE<3>
AIRPORT_PCI_REQ_L
FUNC_TEST=YES
FUNC_TEST=YESCOMM_TXD_L
FUNC_TEST=YES
COMM_GPIO_L
FUNC_TEST=YES
+BATT_POS
FUNC_TEST=YES
LID_CLOSED_L
FUNC_TEST=YES
KBD_NUMLOCK_LED
FUNC_TEST=YES
CHARGE_LED_L
FUNC_TEST=YESCOMM_RTS_L
FUNC_TEST=YES
COMM_RXD
FUNC_TEST=YES
RJ45_DP<2>
RJ45_DN<2>
FUNC_TEST=YES
EIDE_OPTICAL_ADDR<0>
FUNC_TEST=YES
FUNC_TEST=YES
SND_HP_SENSE_L
SND_CLKOUT
FUNC_TEST=YES
TV_COMP
FUNC_TEST=YES
TV_Y
FUNC_TEST=YES
INT_I2C_DATA2
FUNC_TEST=YES
FUNC_TEST=YES
INT_I2C_CLK2
FUNC_TEST=YES
CHGND4
LVDS_U0N
FUNC_TEST=YES
FUNC_TEST=YES
SLEEP_LED
FUNC_TEST=YES
PCI_AD<29>
FUNC_TEST=YES
PCI_AD<31>
FUNC_TEST=YES
EIDE_OPTICAL_DMAACK_L
FUNC_TEST=YESKBD_X<7>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<11>
FUNC_TEST=YES
EIDE_OPTICAL_DATA<15>
FUNC_TEST=YES
EIDE_OPTICAL_RD_L
FUNC_TEST=YES
KBD_X<6>
FUNC_TEST=YES
EIDE_OPTICAL_ADDR<2>
FUNC_TEST=YES
SND_AMP_MUTE
FUNC_TEST=YESBT_USB_DM
FUNC_TEST=YES
BATT_CLK
FUNC_TEST=YESADAPTER_DET
SUTRO_ALS_GAIN_SW
FUNC_TEST=YES
SUTRO_ALS_OUT
FUNC_TEST=YES
KBD_LED1_OUT
FUNC_TEST=YES
KBD_LED2_OUT
FUNC_TEST=YES
FANL_GND
FUNC_TEST=YES
FANL_TACHFUNC_TEST=YES
FANR_GNDFUNC_TEST=YES
FUNC_TEST=YES
+3V_HALL_EFFECT
FUNC_TEST=YES
KBD_CONTROL_L
KBD_X<3>
FUNC_TEST=YES
FUNC_TEST=YES
PCI_TRDY_L
30
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
26
37
37
26
35
26
37
37
37
37
37
37
37
26
26
26
26
26
37
37
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
24
34
37
37
26
26
37
24
33
24
26
26
26
26
26
26
26
24
24
24
24
24
26
26
26
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
20
33
26
26
24
24
26
17
30
39
24
24
36
17
37
37
37
37
37
37
36
24
37
37
24
24
24
24
24
24
24
17
17
17
17
17
24
24
24
17
17
17
17
17
17
17
17
17
17
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www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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REV.
APPLE COMPUTER INC.SCALE
NONE
8/4/03
7/28/03
7/22/03
7/9/03
203) CHANGED J12 (SOUND) TO 516S0144 (NEW PIN PLATING SPEC)
201) CHANGED J10 (OPTICAL DRIVE) TO 516S0140 (NEW PIN PLATING SPEC)202) CHANGED J13 (HARD DRIVE) TO 516S0140 (NEW PIN PLATING SPEC)
200) CHANGED J20 (AIRPORT) TO 516S0142 (NEW PIN PLATING SPEC)199) CHANGED J9 (CARDBUS) TO 516S0141 (NEW PIN PLATING SPEC)
117) changed 2.5V_SLEEP FET (U48) and 1.8V_SLEEP FET (U6) to higher current part (Si6467BDQ - 376S0161)
104) add NO STUFF to R300 to complete 3V sequecing on wake from sleep fix
82) CHANGED U55 TO MM1571J FOR COST SAVINGS83) changed L72,L73,L74 to 90 ohm ferrites84) added 10K pullup to +5V_MAIN to SND_HP_MUTE85) repinout Sousaphone connector86) remore redundant pullups on FANL_TACH and FANR_TACH87) added TP to all NC on NEC USB2 part for NAND tree testing
80) updated power constraints with new fan net names
81) change Q58 on pg19 to Q80 to consolidate parts
LEFT FAN (CPU) AND FAN 2 CONNECTS TO THE RIGHT FAN (GPU)
77) moved XW15 to connect to CPU_VCORE_SLEEP_UF (before positioning resistor)
44) move CPU thermal sensor (Q39) to input 1 on fan controller and power supply sensor (Q66) to input 2
REV 0.01 - 03/06/20033/3
3) added jumpers at 1.5V, 1.8V, 2.5V, 3.3V, 5V, and PBUS supply outputs
5) removed dedicated boot banger circuit (U5400,U5200,RP46,U9,U1000)
10) changed Vcore stuffing options to 1.4V/1.025V using analog mux to support slewing
23) ***BOARD RENUMBERED***
29) update sscg/nosscg stuffing option on intrepid boot straps
6/9/03
38) changed Vcore inductor (L36) to molded core part (152S0125)
46) added FET inverters (Q78) to PWM outputs of fan controller (U3) to prevent spinup at boot
61) changed L38 and L41 to 4.7uH (152S0137)62) added Q81, R308, R309, and R310 for power sequencing (no stuff)
69) added 15.4K R616 and 10K R672 for 2.5V switcher feedback divider
98) change R321 to 499ohm to set 5mV Vcore offset
73) changed CPU_VCORE_SLEEP location back to across bypass caps to correct after adding reference resistor
18) added pads for 0 ohm between chassis and digital gnd near ENET connector for EMC
24) integrated M10 pages from Q16 schematic and renumbered them
14) changed R164 (DAC1RSET) to 107 ohm pulldown
17) added pads for 0.1uF cap from +Adapter to digital gnd for EMC
21) REMOVED ALL RELATIVE_PROPAGATION_DELAY AND PROPAGATION_DELAY PROPERTIES TO
13) changed stuffing options for GPU PCI ID to 0x319
12) changed comments to eliminate references to L3 in power supply section11) changed stuffing to set Vcore offset to 0mV by default
1) Initial check-in of Enterprise schematic after conversion to Concept 14.2
76) changed drain/source polarity of Q76 (FET from +BATT to Pbus)
3/10
3/18
3/19
20) removed BOM table for MAP31
7) changed cpu PLL config to 1083/833
9) changed C550 to 138S0536 to limit AVL
16) changed fan controller to ADT746015) added 10K pulldown to U43 pin A21
22) changed CHGND on R616 to CHGND1
31) add Vcore DAC resistors (R288,R289,R290,R292) for no mux case
67) added Q82, R607, R455, R417, and C886 for 1.5V sleep sequencing
35) changed bootrom part number to 341S1255
36) changed C756 to 128S0025 (Sanyo only 6.3V 330uF)
50) changed TMDS data chokes to 90 ohms (155S0128)
53) changed Q48 to Si7892DP (376S0120)
68) added Q83 and 100K R608 for 1.8V sequencing
64) changed L36 to 1.2uH 18.3A (152S0125)
60) changed D18 to 1N914
58) changed R364 to 102K57) changed R416 to 2.2ohms
54) changed D24 to B340LB (371S0132)
3/28
4/10
4/18
4/21
4/28
48) changed TMDS data chokes to 90 ohm (155S0128)
43) move BS1 to bottom side
47) added FET (Q79) for +3V_Sleep for M10 power sequencing
63) changed Q49 and Q50 to Si7860DP (376S0119)
65) added R331 1mohm sense resistor to CPU Vcore66) added C885 and C884 , 1000uF CPU Vcore outpur caps
30) removed D31 between +Batt and 24V_Pbus
78) changed Fan control nets to FanL and FanR from Fan1 and Fan2
49) changed C762 and C766 to 4.7uF 1206 caps
28) update PLL CFG high 0010 1.25GHz27) added RP27,RP28,RP32, and RP57 for TMDS series termination26) added DP7 for M10 power sequencing
19) corrected path to correct for last checkin
low 1011 833MHz
25) updated physical constraints for M10 power nets
42) add 165 ohm chokes on TMDS data pairs at connector (L ,L , and L )
40) added seperate 1_8V_GPU_TPVDD filter and LDO (U54)
71) removed Q44 (5V sound sleep fet)70) changed pinout of sound connector for sousaphone
72) changed Q31 to invert headphone Mute to sousaphone
75) fixed unnamed net (LTC3411_SHDN_SEQ)
52) changed Q51 to Si7860DP (376S0119)51) changed C762 and C766 to 4.7uF 1206
45) added trace from Vcore to fan controller ADC input
41) replace disctrete LCL with single chip LCL filters (155S0154) for VGA (L ,L , and L )
37) add pads for 90 ohm chokes to FWB path close to connector (route through the pads)
34) change I2C pullups (R29 and R102) to 1K33) change C640 and C646 to 0.01uF (Apple # 132S1047) for FW check config32) change intrepid PLL LDO stuffing back to 1.8V main
56) added Q58, R307, and C515 for GPU Vcore control inverter
59) added 0.1uF 50V C883 to RS- of Max4172 (NO stuff)
4/28
74) changed D5 to schottky diode (MBR0540)
4/27
2) added 8 new 10uF vcore caps
39) changed Pbus inductor (L37) to molded core part (152S0126)
PRERPARE FOR CONSTRAINT BACK ANNOTATION
8) changed reset to U56 (clock slewing chip) to MAIN_RESET_L
4) added 8 more 0.1uF vcore byapass caps
6) updated firewire to phy to rev A prt number
3/11
97) change R337 to 470K and remove No Stuff and no stuff R336 to change Vcore DAC to 1.35V/1.15V96) remove NO STUFF on R477 (set 5V and 3.3V switcher in pulse skipping mode)
95) swap INT_AUDIO_TO_SND and SND_TO_AUDIO on Sousaphone connector (J12)
100) no stuff Q79 to disable 3V_SLEEP sequencing to work around wake from sleep bug with M10
*** rev 03 released for EVT ***
*** rev 02 released for EVT ***99) change L72,L73,L74 to 155S0165 (D part for EVT only)
*** rev 01 released for EVT ***
88) added NEC_USB bomoption to 0 ohm resistor on NEC_AVSS_F
94) add CHGND4 and SLEEP_LED functional test points
92) change L30 to 152S0139 (Tokin CPI-1050-2R2) 11A
91) updated various text notes with correct reference designators90) no stuff R322 to eliminate 3V_sleep pump up
93) remove FANR_TACH functional test point
89) repinout Sousaphone connector (J12)
5/7
5/6
5/1
4/28
4/30
79) SWAPPED CONNECTIONS SO THAT OUTPUT 1 FROM FAN CONTROLLER CONNECTS TO
150) changed R205,R218,R211,R219,R210,R220,R204,R214 to 162 ohm 1% (TMDS common-mode termination)
140) modified Vcore offset select circuit with Takashi’s changes - changed Gnd reference to VCORE_GND_SNS
137) changed Q83 into dual (2N7002DW) and added R810 to invert 3V_5V_ON before switching RUN/SS
133) added C902 and R804 to prevent latch-up condition in GPU Vcore circuit when using powermiser
130) added LC filter on SND_AMP_MUTE for EMI (L76 and C898)129) added LC filter on SND_TO_AUDIO for EMI (L82 and C897)
121) NO STUFF R631 to remove MAIN_RESET_L from clock slewing chip
118) added 10K pulldown (R720) on FW_PHY_PD_INT for when R698 is removed
115) added NO STUFF BOM option to R300 to avoid sleep wake problem
112) added U56, U57, R718,R714 for VGA Hsync and VGA Vsync buffering111) added R698 as 0 ohm jumper between FW_PHY_PD and Intrepid110) added R711 as pullup to +3V_GPU on AUXWIN signal from M10 (U44)109) changed SND_HP_MUTE_INV gate/inversion FETS to pullup to +3V_MAIN
102) fixed NO STUFF BOM option for R291
105) changed R376 to 158K and R321 to 2.74K to set CPU_VCORE offset to 35mV
*** rev 04 released for EVT ***
107) removed redundant 3V_GPU pullup R687 (Intrepid side AGP_INT_L pullup)
6/5/03
6/4/03
5/22
5/19/03
175) swapped DN<0> and DP<0> on RP27 for layout
173) changed GPU_MEM_IO to +GPU_MEM to connect ATI Vref to correct memory voltage
170) added R255 and R251 to strap GPU_DVODMODE correctly for 1.8V DVO169) added L16, C304, C327, C647 for filtering GPU VDDR4
166) added R231. R232, and C284 for Vref for U5165) added R235 and R237 as options for MAIN_RESET_L to U5164) added L15, C255, C233, C218 for 3V Vcc filtering for SIL1162 (U5)163) added L13, C14, C129, C131, C133 for 3V PVCC filtering for SIL1162 (U5)162) added L14, C130, C132, and C165 for 3V AVCC filtering for SIL1162 (U5)161) added R41 to create +3V_GPU_SI power for SIL1162 (U5)160) added U5 to use as external TMDS transmitter (DVI)159) changed L30 to 3 pin symbol158) added R234 and INT_TMDS option to maintain internal TMDS capability157) changed R228 to pullup to 1.8V for DVO interface conpatibility
155) removed NO STUFF from C903 (cap on input to second part of THERM_OC_L buffer)
148) changed R612 to 10K to prevent UIDE DMACK from floating149) changed C80,C88,C81,C89,C82,C102,C79,C87 to NO STUFF (TMDS common-mode termination)
151) changed RP27,RP32,RP28,RP57 to 10ohm (TMDS series termination)
*** released for EVT2 6/10/03 ***
154) removed NO STUFF from R638 (pullup on slewing chip FSEL)
156) CHANGED R321 TO 1K FOR VCORE OFFSET OF 12MV (VCORE = 1.30V -30MV/+100MV)
*** released for EVT2 6/13/03 ***
143) added cap on gate of the second FET in Q87 for possible turn on delay (C903)144) changed inner shield of FWB connector J26 to connect to chassis gnd
146) changed R321 to 2.49K to set Vcore offset to +25mV147) added 10 ohm resistor (R814) and 1uF cap (C904) to filter power to ADT7460 (Gary Leo)
152) fixed NO STUFF on R291
131) added LC filter on SND_HW_RESET_L for EMI (L78 and C900)
142) removed redundant pullup on THERM_L_OC (R780)
132) added LC filter on SND_SCLK for EMI (L79 and C901)
134) removed R331 (CPU Vcore positioning resistor)
136) add Vcore offset change circuit to modify offset in low (Q86,R805,R806,R807,R808,R809)
138) rotated J26 (FW B connector)139) changed D29 to B340B (3A part - 371S0159)
6/19/03
6/18/03
6/10/03
6/13/03
6/6/03
6/9/03
168) added RP58, RP59, RP60, RP61 for series termination of SIL1162 TMDS output
189) changed GND reference for input side of Q86 to digital GND (the other FET in Q856 remains on VCORE_GNDSNS
198) NO STUFF’ed C908 (Q56 gate shoot-thru cap)
196) rotated L70 and L71 for layout (PCB symbol problem)
195) changed R321 to 3.01K 1% to set high Vcore offset to 30mV
192) changed R325 to 470K to set the low Vcore to 1.10V191) added R279 to power TMDS PLL from LVDS filter when using external TMDS transmitter
6/25/03
184) No STUFF’ed C651 and C678
188) changed R517 to 100K
6/23/03
114) added NO STUFF BOM option to R223 to correct for sense of GPU_VCORE_CNTL
135) changed C728,C729,C730,C731,C732,C733,C734,C884,C885 to 220uF Rubycon caps (128S0024)
141) added double inverter to buffer THERM _L_OC (added Q87,R811,R812)
145) changed R336 and R325 to 0 ohm to set Vcore VID to 1.3V/1.15V
153) removed NO STUFF from C80,C88,C81,C89,C82,C102,C79,C87 (TMDS common-mode termination)
106) changed both AGP_NV_INT_L and AGP_ATI_INT_L to AGP_INT_L
113) changed L72,L73,L74 to 155S0164 (new high speed part)
116) Intgrated new 1.8V switcher (LTC3412)(U58)(353S0650) and inductor (L75- 152S0142)
108) added R699,R701,R707,R708 as 10k pulldowns to Intrepid USB ports A and C when NEC_USB is stuffed
55) changed L30 to 2.2uH Tokin inductor (152S0139)
*** released for DVT 6/26/03 ***
197) changed Q53,Q54,Q55 to IRF7832 (376S0148) for better thermal performance
194) changed R809 to 1.5K 1% to set low Vcore offset to 10mV193) stuffed Vcore offset switch (R807,R805,R809,Q86)
190) added C908 to prevent gate shoot-thru on Q566/24/03
7/2/03
103) add NO STUFF to R223 to correct startup level of GPU_VCORE_CNTL
6/3/03
120) added R721 as jumper between +2_5V_SLEEP and +2_5V_GPU
128) added LC filter on INT_AUDIO_TO_SND for EMI (L81 and C896)127) added LC filter on SND_CLKOUT for EMI (80 and C899)126) added LC filter on SND_SYNC for EMI (L77 and C895)125) removed gnd caps (C651 and C647) on I2S clock at sound connector (J12)
123) changed I2C 0 and 1 pullups (RP12) to 2.2K to improve rise/fall times (sensor check config errors)124) added CRITICAL flag to new 1.8V switcher (U58), inductor (L75), 1.8V sleep FET (U6), and 2.5V sleep FET (48)
167) added R66, R99, R202, R212, R222, R224, R88, R110, R223 as straps for U5
186) added C906 to prevent shoot-thru on Q64 (currently NO STUFF’ed)185) added C688,C690,C846,C905 for thermal pair filtering at fan controller
183) added R331 as CPU Vcore sense resistor (1 mohm 1% 2512)ADAPTER DETECT CIRCUIT DIVIDERS TO REDUCE SHUTDOWN CURRENT
182) CHANGED R491 TO 52.3K 1%, R475 TO 127K 1%, AND R476 TO 4.7M 5% IN A29
180) changed C890 to 100pF for improved transient response (Takashi)179) NO STUFF’ed C895,C899,C896,C897,C898,C900, and C901 to fix no sound problem
(124S0024 WILL BE DELETED AS A DUPLICATE IN THE LIBRARY)178) CHANGED C728,C731,C734,C733,C730,C732,C729,C885,C885 TO 128S0022
176) corrected un-named nets in TMDS common-mode filters
174) swapped TMDS CLKN and CLKP on RP57 and RP58 for layout
172) added C681, C668, C678, C651 to filter the thermal sensor diff pairs
122) changed FWB connector to new part with extra ground tabs (514S0059)
119) changed R728 and R729 to 1210 0ohm resistors to support switching the entire memory bus between 1.8V and 2.5V
REVISION HISTORY
101) added BOM table to define correct part number for M10 without heatspreader (338S0133)
187) added C907 to prevent shoot-thru on Q68 (currently NO STUFF’ed)
181) Removed bypass traces on FWB chokes and stuffed L70 and L71
177) added physical constriants for new Silicon Image power rails
171) added R268 to connect L16 to +3V_GPU_FLT when not using SIL1162
215) UPDATED CAP MATERIAL TYPES
IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT
ON VCORE
1_32_VCORE (60MV OFFSET)220) CHANGED R321 TO 4.02K 1% FOR 1_30_VCORE (40MV OFFSET) AND TO 6.34K 1% FOR
212) CHANGED 197S0040 TO PRIMARY AND 197S0008 AS ALTERNATE FOR Y4 (LMU)
210) CHANGED 197S0037 TO PRIMARY AND 197S0603 AS ALTERNATE FOR Y3 (ETHERNET)
218) CHANGED 126S0036 FROM ALT TO PRIMARY, REPLACING 126S0035 FOR CPU VCORE INPUT CAPS
IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT
230) CHANGED C883 TO 132S0100 TO CORRECT FOR USE OF OEM PART NUMBER
229) CHANGED C728-C734,C884,C885 TO 128S0022 TO REMOVE DUPLICATE PART NUMBER
228) ADDED 197S0052 AS ALTERNATE FOR G1 (98 MHZ FW OSCILLATOR)
221) CHANGED R304 TO 470K AND R329 AND R325 TO 0 OHM TO CHANGE LOW VID TO 1.05V
222) CHANGED C611 TO 2200PF, C610 TO 100PF, AND R519 TO 12.7K 1% TO INCREASE
223) NO STUFF C590 TO INCREASE IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT224) CHANGED C583 TO 2200PF, C576 TO 100PF, AND R481 TO 15.0K 1% TO INCREASE
225) NO STUFF C566 TO INCREASE IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT
9/4/03
219) CHANGED R99 TO NO STUFF TO FIX I2C ADDRESS OF SIL1162 TMDS TRANSMITTER
*** RELEASED FOR PRODUCTION 7/28/03 ***
217) CHANGED TMDS TERMINATION FROM 2X 162 TO 2X 49.9 OHMS PER PAIR
216) CHANGED FROM 715 PIN TO 667 PIN SYMBOL FOR U44 (M10)
214) ADDED 1_32V_VCORE AND 1_30V_VCORE BOM OPTIONS FOR 2 DIFFERENT CPU VCORE SPECS
213) CHANGED 197S0041 TO PRIMARY AND 197S0604 AS ALTERNATE FOR Y6 (PMU)
211) CHANGED 197S0038 TO PRIMARY AND 197S0608 AS ALTERNATE FOR Y5 (NEC USB2)
209) CHANGED 197S0035 TO PRIMARY AND 197S0004 AS ALTERNATE FOR Y1 (INTREPID)208) REMOVED POWER JUMPERS XW25,XW17,XW16,XW10,XW14,XW18207) CORRECTED C889 TO CONNECT TO INPUT (PIN 1) OF U55
205) ADDED BOM TABLE TO PUT 0 OHM 402 ON L77,L80,L81,L82,L76,L78,L79204) CHANGED J8 (MODEM) TO 516S0143 (NEW PIN PLATING SPEC)
051-6531
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*** Signal Cross-Reference for the entire design ***
+1_0V_MARVELL 27D2< 38B3>
+1_5V_AGP 12C5< 12D1< 12D4< 15D6< 16C8<
18C6< 18D6< 19A8< 19B4<> 19D5<>
21B8< 21D6< 38C3>
+1_5V_AGP_GPU 21C5< 38C3>
+1_5V_AGP_NECK 19B4<> 38B3>
+1_5V_GPU_VDD15 19D3< 38C3>
+1_5V_INTREPID_PLL 8D6< 12D4< 12D8< 14D6<> 38D3>
+1_5V_INTREPID_PLL1 14C3< 38D3>
+1_5V_INTREPID_PLL2 14D3< 38D3>
+1_5V_INTREPID_PLL3 14D3< 38D3>
+1_5V_INTREPID_PLL4 14D3< 38D3>
+1_5V_INTREPID_PLL5 12D3< 38D3>
+1_5V_INTREPID_PLL6 12D6< 38D3>
+1_5V_INTREPID_PLL7 8D5< 38D3>
+1_5V_INTREPID_PLL8 14D3< 38D3>
+1_5V_LDO 35D8< 38D6>
+1_5V_MAIN 38D6>
+1_5V_SLEEP 38D6>
+1_5V_SLEEP_NECK 21A3<> 38B3>
+1_5V_SLEEP_VIN 35D8<> 38D6>
+1_8V_ATI_PVDD 19C5<> 21B6< 21B6< 21D6<> 38C3>
+1_8V_ATI_TPVDD 21D2<>
+1_8V_DVO_F 21B2<
+1_8V_GPU 18A7< 19D8< 20A5< 21A2< 21A6<
21B1< 21B6< 21C8< 21D6< 21D8< 38C3>
+1_8V_GPU_AVDD 21D5< 38C3>
+1_8V_GPU_AVDDQ 21D4< 21D7< 38C3>
+1_8V_GPU_MEMPLL 21B5< 38C3>
+1_8V_GPU_PLL 21D5< 38C3>
+1_8V_GPU_PNLIO 21A5< 38C3>
+1_8V_GPU_PNLPLL 21B5< 38C3>
+1_8V_GPU_TP_PLL 21B4< 21D1<
+1_8V_GPU_VDDDI 21C7< 21D4< 38C3>
+1_8V_MAIN 38D6> 39A2>
+1_8V_MAIN_LX_F 35A4<>
+1_8V_PVDD_NECK 19B5<> 38B3>
+1_8V_SLEEP 38D6>
+1_8V_SLEEP_NECK 21A3<> 38B3>
+1_95V_FW_DVDD 28C4< 28C7<> 28D5< 38A3>
+1_95V_FW_DVDD_PORT1 28D6< 38A3>
+1_95V_FW_DVDD_RX0 28C5< 38A3>
+1_95V_FW_DVDD_TX0 28C5< 38A3>
+1_95V_FW_PLL400VDD 28D5< 38A3>
+1_95V_FW_PLL500VDD 28D5< 38A3>
+1_95V_FW_PLLVDD 28D5< 28D7<> 38A3>
+2_5V_CG_MAIN 14C6< 38A3>
+2_5V_GPU 21A7< 21B6< 21D3< 21D7< 21D8<
38B3>
+2_5V_GPU_A2VDD 21D4< 21D7< 38C3>
+2_5V_GPU_PNLIO 21A5< 38C3>
+2_5V_INTREPID 9A8< 10D3< 10D5< 10D7< 10D8< 15D7<
16B8< 38D3>
+2_5V_MAIN 38D6>
+2_5V_MARVELL 27B8< 27C4<> 38B3>
+2_5V_MARVELL_AVDD 27C4< 38B3>
+2_5V_SLEEP 38D6>
+2_5V_SLEEP_NECK1 19C4<> 38B3>
+2_5V_SLEEP_NECK2 21A3<> 38B3>
+3V_ATI_OSC_SLEEP 18D2< 38C3>
+3V_ATI_SS 18B2< 38C3>
+3V_CG_PLL_MAIN 14C6< 38A3>
+3V_FW 28A3< 28D7<> 29D5< 38A3>
+3V_FW_AVDD 28C6< 38A3>
+3V_FW_AVDD_PORT0 28C6< 38A3>
+3V_FW_AVDD_PORT1 28C6< 38A3>
+3V_FW_AVDD_PORT2 28D6< 38A3>
+3V_FW_ESD 29B3<> 29D2<> 38B3>
+3V_FW_ESD_ILIM 29D4< 38B3>
+3V_FW_UF 28D7<> 38A3>
+3V_GPU 12D1< 18B8< 18C5< 18C7< 18D6<
19C4< 19C5< 19C7< 19D7< 21A6< 21B1<
38C3>
+3V_GPU_FLT 21B2< 38C3>
+3V_GPU_SI 20C4< 20C8< 20D8<
+3V_HALL_EFFECT 23C6<> 38B6> 39C4>
+3V_INTREPID_USB 14C3< 38D3>
+3V_LCD 22B4<> 38B6>
+3V_LCD_SW 22A4<> 38B6>
+3V_MAIN 38D6>
+3V_NEC_VDD 26D7< 26D7< 38A3>
+3V_PMU 38D6> 39A2>
+3V_PMU_AVCC 25A4< 30B6< 30D5<> 38C6>
+3V_PMU_ESR 32A2< 38C6>
+3V_PMU_RESET 30B7< 34A3<>
+3V_SI_AVCC 20C7< 38B3>
+3V_SI_PLLVCC 20C7< 38B3>
+3V_SI_VCC 20C6< 38B3>
+3V_SLEEP 38D6>
+3V_SLEEP_NECK 21A3<> 38B3>
+3V_SLP_OK_L 33B4<>
+3V_SLP_ON 33A5<>
+4_6V_BU 32A3<> 33B6< 38C6>
+4_85V_ESR 32A4< 38C6>
+4_85V_RAW 30B4< 32A4<> 38C6>
+5V_DDC_SLEEP 22D3<> 22D5<> 38B6> 39A2>
+5V_DDC_SLEEP_UF 22D6< 38B6>
+5V_HD_SLEEP 24D1<> 33A7<> 38C6>
+5V_INV_SW 22B2<> 38B6> 39D1>
+5V_INV_UF_SW 22B2<> 38B6>
+5V_MAIN 38D6>
+5V_SLEEP 38D6>
+5V_SOUND_SLEEP 38B6>
+5V_TPAD_SLEEP 23C7<> 38B6> 39C4>
+12_8V_INV 22B1<> 38B6> 39A2>
+24V_PBUS 38D6> 39B2>
+ADAPTER 31D8<> 32B7< 38D6>
+ADAPTER_ILIM 32B6<> 38C6>
+ADAPTER_OR_BATT 32A5<> 38C6>
+ADAPTER_SENSE 31D5<> 38C6>
+ADAPTER_SW 31D6<> 38C6>
+BATT 38D6>
+BATT_14V_FUSE 31D1<> 38C6>
+BATT_24V_FUSE 31B1< 31D2<> 38C6>
+BATT_POS 31A4<> 38C6> 39C3>
+BATT_RSNS 31B2< 38C6>
+BATT_VSNS 31A4< 38C6>
+FW_FUSE 29D7<> 38A3>
+FW_PWR_OR 28B8< 28D8<> 29D5<> 38A3>
+FW_PWR_PORTA 29C5< 38A3>
+FW_SW 29D5<> 38A3>
+FW_VP0 29C2<> 38A3>
+FW_VP1 29A3<> 38A3>
+GPU_MCLK 21C7< 21D4< 38C3>
+GPU_MEM 18A6<> 18B8< 21B4< 21B7< 21C6<
21C8< 21D2< 38C3>
+GPU_MEMCORE 21C5< 38C3>
+GPU_VDD15_NECK 19B5<> 38B3>
+GPU_VDD15_UF 19B5<> 19D4<> 38C3>
+HD_LOGIC_SLEEP 24C2<> 38C6>
+PBUS 38D6> 39B2>
+VCC_CBUS_SW 17B1<> 17B2<> 17D2<> 38D3>
+VPP_CBUS_SW 17B1<> 17B2<> 17D2<> 38C3>
1V20_REF 31C7< 32C8< 38D1>
1V65_REF 31A5<
1_5V_2_5V_OK 35C5> 38B1>
1_5V_BOOST 35C6<> 38C1>
1_5V_BST 35C5<> 38C1>
1_5V_DH 35C5<> 38C1>
1_5V_DL 35B5<> 38C1>
1_5V_FB 35B5< 35B7< 38C1>
1_5V_ILIM 35C5<> 38C1>
1_5V_LX 35B5<> 38C1>
1_5V_SLEEP_EN_L 35C7<> 35D7<>
1_8V_SLEEP_PWREN_L 35A3<>
1_8V_SW 35A5<> 38A1>
1_8V_VFB 38A1>
2_5V_BOOST 35C4<> 38D1>
2_5V_BST 35C4<> 38D1>
2_5V_DH 35C4<> 38D1>
2_5V_DL 35B4<> 38D1>
2_5V_ILIM 35C5<> 38C1>
2_5V_LX 35B4<> 38D1>
2_5V_SLEEP_PWREN_L 35C2<>
2_34V_REF 30A4<
3V_5V_OK 33B4<> 35A8<> 35D6<
3V_5V_OK_INV 35A8<>
3V_BG 33C4<>
3V_BOOST 33C4<>
3V_BOOST_ESR 33D3<>
3V_ITH 33C4<>
3V_ITH_RC 33C3<
3V_PMU_VTAP 32B3<
3V_RSNS 33D2< 38D1>
3V_RUNSS 33C4<
3V_SLEEP_PWREN_L 33A3<>
3V_SNSM 33C4< 37A2>
3V_SNSP 33C4< 37A2>
3V_SW 33C4<> 38D1>
3V_TG 33D4<>
3V_VOSNS 33C4<>
5V_BG 33C5<>
5V_BOOST 33C5<>
5V_BOOST_ESR 33D6<>
5V_HD_PWREN 33A8<>
5V_ITH 33C5<>
5V_ITH_RC 33C6<
5V_RSNS 33D7< 38D1>
5V_RUNSS 33C5<
5V_SLEEP_PWREN 33A8<>
5V_SNSM 33C5< 37A2>
5V_SNSP 33C5< 37A2>
5V_SW 33C5<> 38D1>
5V_TG 33C5<>
5V_VOSNS 33C5<>
1625_BG 32C5<>
1625_BST 32C5<
1625_BST_ESR 32C5<>
1625_COMP 31D2< 32C6<
1625_DIV 32C8<
1625_ENABLE 32D7<>
1625_ENABLE_L 32D6<>
1625_EXTVCC 32D5<> 38D1>
1625_FCB 32C6<
1625_INTVCC 32C5<> 38D1>
1625_RUNSS 32C6<
1625_SGND 32B7<> 38D1>
1625_TG 32C5<>
1625_VFB 32B5<>
1625_VIN 32C6< 38D1>
1625_VSW 32C4<> 38D1>
1772_ACIN 31B5<
1772_ACOK_L 31B5<> 31C4<>
1772_BST 31B4<>
1772_BST_ESR 31C3<
1772_CCI 31B5<>
1772_CCS 31B5<
1772_CCV 31B5<>
1772_CCV_RC 31B5<
1772_CELLS 31B4<
1772_CLS 31A4<
1772_CSIN 31B4<> 37A2>
1772_CSIP 31B4<> 37A2>
1772_CSSN 31C5< 37A2>
1772_CSSP 31C5< 37A2>
1772_DCIN 31B5< 38C6>
1772_DHI 31B4<>
1772_DLO 31B4<>
1772_DLOV 31B4<> 38C6>
1772_GND 31A5<> 38C6>
1772_ICHG 31B5<>
1772_ICTL 31B5<>
1772_IINP 31B5<
1772_LDO 31C4<> 38C6>
1772_LX 31B4<> 38C6>
1772_REF 31B5<>
1772_VCTL 31B5<
1778_BG 19A5<> 38B1>
1778_BST 19A5<> 38B1>
1778_BST_RC 19A4<> 38B1>
1778_FCB 19A5< 38B1>
1778_GND 19A5< 19A7<> 38B1>
1778_ION 19A5< 38B1>
1778_ITH 19A5<> 38B1>
1778_ITH_RC 19A7< 38B1>
1778_SHDN_L 19A6<
1778_SHDN_L_D3COLD 19A7<>
1778_TG 19A5<> 38B1>
1778_VCC 19A5<> 38B1>
1778_VFB 19A2< 19A5< 38B1> 39A1>
1778_VIN 19A5< 38B1>
1778_VRNG 19A5< 38B1>
3405_MODE 27D5<
3405_VFB 27D4<>
3707_FCB 33C5<
3707_FSET 33C5<
3707_INTVCC 33D4<> 38D1>
3707_SGND 33B5<> 38D1>
3707_STBY 33C5<>
A29_CLS_ADJ 31A5<>
A29_CURRENT_ADJ 31C4<>
A29_DETECT 30A2< 31A5<> 31C4<>
A29_DET_L 30A3<
AB_SEL_LOW 34A6<>
AC_DIV 31C8<
AC_ENABLE_GATE 31D6<>
AC_ENABLE_L 31C6<>
AC_GTR_18V 31C4<>
AC_IN 27B8<> 29C7< 30B3< 31C5<> 31C7<>
AC_IN_FW_CNTL 29C7<>
AC_IN_L 31C2<> 31C6<>
AC_IN_L_RC 31C2<>
ADAPTER_DET 30A4< 31D8<> 39C2>
ADAPTER_I_REG 31D3<>
ADT7460_ADR_EN_L 25B3<>
ADT7460_FAN1_PWM 25B3<>
ADT7460_FAN2_PWM 25B3<>
ADT7460_THERM 25A5<> 25B3<>
ADT7460_VCC 25C4<
ADT7460_VCORE_MON 5C8<> 25B4<>
AGP8X_DET_PU 18C6<>
AGP_AD<0> 12D2<> 18C7<>
AGP_AD<15..0> 37D5>
AGP_AD<1> 12C2<> 18C7<>
AGP_AD<2> 12C2<> 18C7<>
AGP_AD<3> 12C2<> 18C7<>
AGP_AD<4> 12C2<> 18C7<>
AGP_AD<5> 12C2<> 18C7<>
AGP_AD<6> 12C2<> 18C7<>
AGP_AD<7> 12C2<> 18C7<>
AGP_AD<8> 12C2<> 18C7<>
AGP_AD<9> 12C2<> 18C7<>
AGP_AD<10> 12C2<> 18C7<>
AGP_AD<11> 12C2<> 18C7<>
AGP_AD<12> 12C2<> 18C7<>
AGP_AD<13> 12C2<> 18C7<>
AGP_AD<14> 12C2<> 18C7<>
AGP_AD<15> 12C2<> 18C7<>
AGP_AD<16> 12C2<> 18C7<>
AGP_AD<31..16> 37D5>
AGP_AD<17> 12C2<> 18C7<>
AGP_AD<18> 12C2<> 18C7<>
AGP_AD<19> 12C2<> 18C7<>
AGP_AD<20> 12C2<> 18C7<>
AGP_AD<21> 12C2<> 18C7<>
AGP_AD<22> 12C2<> 18C7<>
AGP_AD<23> 12C2<> 18C7<>
AGP_AD<24> 12C2<> 18C7<>
AGP_AD<25> 12C2<> 18D7<>
AGP_AD<26> 12C2<> 18D7<>
AGP_AD<27> 12B2<> 18D7<>
AGP_AD<28> 12B2<> 18D7<>
AGP_AD<29> 12B2<> 18D7<>
AGP_AD<30> 12B2<> 18D7<>
AGP_AD<31> 12B2<> 18D7<>
AGP_AD_STB<0> 12A2<> 12B2< 18D6<> 37D5>
AGP_AD_STB<1> 12A2<> 12B2< 18D6<> 37D5>
AGP_AD_STB_L<0> 12A2<> 12B2< 18D6<> 37D5>
AGP_AD_STB_L<1> 12A2<> 12A2< 18D6<> 37D5>
AGP_ATI_RESET_L 18B7<
AGP_ATI_VREF 18B7<
AGP_ATI_VREFG 18B7<
AGP_BUSY_L 12C4<> 12D2< 18D6>
AGP_CBE<0> 12B2<> 18B7<>
AGP_CBE<1..0> 37D5>
AGP_CBE<1> 12B2<> 18B7<>
AGP_CBE<2> 12B2<> 18B7<>
AGP_CBE<3..2> 37D5>
AGP_CBE<3> 12B2<> 18C7<>
AGP_DEVSEL_L 12B2<> 12C2< 18B7<> 37D5>
AGP_FRAME_L 12B2<> 12C2< 18B7<> 37D5>
AGP_GNT_L 12C2< 12D2<> 18B7< 37D5>
AGP_INT_L 14B5<> 18B7<>
AGP_IRDY_L 12B2<> 12C2< 18B7<> 37D5>
AGP_PAR 12B2<> 18B7> 37D5>
AGP_PIPE_L 12A2<> 12B2<
AGP_RBF_L 12A2<> 12C2< 18C6> 37D5>
AGP_REQ_L 12C2< 12D2<> 18B7<> 37D5>
AGP_SBA<0> 12B2< 18C6>
AGP_SBA<7..0> 37D5>
AGP_SBA<1> 12B2<> 18C6>
AGP_SBA<2> 12B2<> 18C6>
AGP_SBA<3> 12B2<> 18C6>
AGP_SBA<4> 12B2<> 18C6>
AGP_SBA<5> 12B2<> 18C6>
AGP_SBA<6> 12B2<> 18C6>
AGP_SBA<7> 12B2<> 18C6<>
AGP_SB_STB 12B2<> 12B2< 18C6<> 37D5>
AGP_SB_STB_L 12A2<> 12A2< 18C6<> 37D5>
AGP_ST<0> 12A2<> 18C6<
AGP_ST<1> 12A2<> 18C6<
AGP_ST<2> 12A2<> 18C6<
AGP_STOP_L 12B2<> 12C2< 18B7<> 37D5>
AGP_STP_L 18C6<
AGP_SUS_STAT_L_PU 18C6<
AGP_TRDY_L 12B2<> 12C2< 18B7<> 37D5>
AGP_WBF_L 12A4<> 12B2< 18B7>
AIRPORT_CLKRUN_L 24C6<> 39C1>
AIRPORT_IDSEL 24C5<> 39B1>
AIRPORT_PCI_GNT_L 12D7<> 24D5<> 39C4>
AIRPORT_PCI_INT_L 14B5<> 14D7< 24D5<> 39C4>
AIRPORT_PCI_REQ_L 12A7< 12D7<> 24D6<> 39D4>
AIRPORT_PME_L_TP 24D5<>
AMP_CONTROL 25C5<> 25D5<>
ATI_AGP_FBSKEW<0> 19C2< 19C7<>
ATI_AGP_FBSKEW<1> 19C2< 19C7<>
ATI_BUS_CFG<0> 19B2< 19C7<>
ATI_BUS_CFG<1> 19B2< 19C7<>
ATI_BUS_CFG<2> 19B2< 19C7<>
ATI_CLK27M_IN 18C1< 19B7<
ATI_CLK27M_OSC 18D2<
ATI_CLK27M_OSC_SS 18B2< 18D1<
ATI_DBI_HI_PU 18C6<>
ATI_DBI_LO_PU 18C6<>
ATI_DVODMODE 21A3<
ATI_GPIO7_SPN 19C7<>
ATI_GPIO8_PD 19C7<>
ATI_GPIO9_SPN 19C7<>
ATI_GPIO10_SPN 19C7<>
ATI_GPIO11_SPN 19C7<>
ATI_GPIO12_SPN 19C7<>
ATI_GPIO13_SPN 19C7<>
ATI_HSYNC 19D5<> 22C8<
ATI_MEMTEST 18A6<>
ATI_MEMVMODE0 18A7<
ATI_MEMVMODE1 18A7<
ATI_OSC_OE 18D3<
ATI_PVDD_BYP 21D6<>
ATI_R2SET 19D6<>
ATI_RSET 19D6<>
ATI_RSTB_MSK 18C6<>
ATI_SSCLK_IN 18B1< 19B7<>
ATI_SSCLK_UF 18B1<>
ATI_TESTEN 19B7<
ATI_TMDS_CLKN 19B7> 20B4<
ATI_TMDS_CLKP 19B7> 20B4<
ATI_TMDS_DN<0> 19B7> 20B4<
ATI_TMDS_DN<1> 19B7> 20A4<
ATI_TMDS_DN<2> 19B7> 20A4<
ATI_TMDS_DP<0> 19B7> 20B4<
ATI_TMDS_DP<1> 19B7> 20A4<
ATI_TMDS_DP<2> 19B7> 20A4<
ATI_TPVDD_BYP 21D1<>
ATI_VSYNC 19D5<> 22C8<
ATI_X1CLK_SKEW<0> 19C2< 19C7<>
ATI_X1CLK_SKEW<1> 19B2< 19C7<>
BATTV_HIGH 31B7<>
BATTV_LOW 31B8<>
BATT_14PBUS_EN 31C1<>
BATT_14V_GATE 31C1<>
BATT_24PBUS_EN 31C2<>
BATT_24V_GATE 31C1<>
BATT_CLK 31A4<> 39C3>
BATT_DATA 31A4<> 39C3>
BATT_DIV 31A5<
BATT_LOW 31A6<>
BATT_LOW_L 31B6<>
BATT_NEG 31A4<> 38C6> 39C3>
BBANG_HRESET_L 23A4< 23C4<> 39C1>
BBANG_JTAG_TCK 23B3< 23C4<>
BBANG_TCK_EN 23B3<
BCKFD_PROT_EN_L 31C6<>
BCKFD_PROT_GATE 31D6<>
BRIGHT_PWM 22A1<> 39A7>
BRIGHT_PWM_UF 22A2<>
BT_USB_DM 14B1< 24B2<> 37B2> 39B6>
BT_USB_DP 14C1< 24B2<> 37B2> 39B6>
CAPSLOCK_LED 23A8<
CAPSLOCK_LED_L 23B8< 30C7<
CBUS_ADDR<0> 17B1<> 17B4>
CBUS_ADDR<1> 17B1<> 17B4>
CBUS_ADDR<2> 17B1<> 17B4>
CBUS_ADDR<3> 17B1<> 17B4>
CBUS_ADDR<4> 17B1<> 17B4>
CBUS_ADDR<5> 17B1<> 17B4>
CBUS_ADDR<6> 17B1<> 17B4>
CBUS_ADDR<7> 17B1<> 17B4>
CBUS_ADDR<8> 17B1<> 17B4>
CBUS_ADDR<9> 17B1<> 17B4>
CBUS_ADDR<10> 17B4> 17C1<>
CBUS_ADDR<11> 17B1<> 17B4>
CBUS_ADDR<12> 17B1<> 17B4>
CBUS_ADDR<13> 17B1<> 17B4>
CBUS_ADDR<14> 17B1<> 17B4>
CBUS_ADDR<15> 17B1<> 17B4>
CBUS_ADDR<16> 17B1<> 17B4<
CBUS_ADDR<17> 17B2<> 17B4>
CBUS_ADDR<18> 17B2<> 17B4>
CBUS_ADDR<19> 17B2<> 17B4>
CBUS_ADDR<20> 17B2<> 17B4>
CBUS_ADDR<21> 17B2<> 17B4>
CBUS_ADDR<22> 17A4> 17B2<>
CBUS_ADDR<23> 17A4> 17B2<>
CBUS_ADDR<24> 17A4> 17B2<>
CBUS_ADDR<25> 17A4> 17B2<>
CBUS_ADDR_16_UF 17B5<>
CBUS_BVD1_L 17B2<> 17C4<
CBUS_BVD2_L 17B2<> 17C4<
CBUS_CE1_L 17C1<> 17C4>
CBUS_CE2_L 17B4> 17C2<>
CBUS_DATA<0> 17A1<> 17A4<>
CBUS_DATA<1> 17A1<> 17A4<>
CBUS_DATA<2> 17A1<> 17A4<>
CBUS_DATA<3> 17A4<> 17C1<>
CBUS_DATA<4> 17A4<> 17C1<>
CBUS_DATA<5> 17A4<> 17C1<>
CBUS_DATA<6> 17A4<> 17C1<>
CBUS_DATA<7> 17A4<> 17C1<>
CBUS_DATA<8> 17A2<> 17A4<>
CBUS_DATA<9> 17A2<> 17A4<>
CBUS_DATA<10> 17A2<> 17A4<>
CBUS_DATA<11> 17A4<> 17C2<>
CBUS_DATA<12> 17A4<> 17C2<>
CBUS_DATA<13> 17A4<> 17C2<>
CBUS_DATA<14> 17A4<> 17C2<>
CBUS_DATA<15> 17A4<> 17C2<>
CBUS_DET_1_L 17C2<> 17C4< 39B8>
CBUS_DET_2_L 17A2<> 17C4< 39B8>
CBUS_INPACK_L 17B2<> 17B4<
CBUS_INT_L 14B5<> 14B7< 17A7<>
CBUS_IORD_L 17B2<> 17C4>
CBUS_IOWR_L 17B2<> 17C4>
CBUS_MFUNC1_PD 17A7< 17A7<>
CBUS_MFUNC2_PD 17A7< 17A7<>
CBUS_MFUNC3_PD 17A7< 17A7<>
CBUS_MFUNC4_PD 17A7< 17A7<>
CBUS_MFUNC5_PD 17A7< 17A7<>
CBUS_MFUNC6_PD 17A7<> 17A7<
CBUS_OE_L 17C1<> 17C4>
CBUS_PCI_GNT_L 12D7<> 17A7<
CBUS_PCI_IDSEL 17B7<
CBUS_PCI_PERR_L 17B7<> 17D7<
CBUS_PCI_REQ_L 12A7< 12D7<> 17A7>
CBUS_PCI_RESET_L 17A7<
CBUS_PCI_SERR_L 17B7> 17D7<
CBUS_READY 17B1<> 17C4<
CBUS_REG_L 17B2<> 17C4>
CBUS_RESET_L 17B2<> 17C4>
CBUS_SUSPEND_PU 17A7< 17D7<
CBUS_VCCD0_L 17C4<>
CBUS_VCCD1_L 17C4<>
CBUS_VPPD0 17C4<>
CBUS_VPPD1 17C5<>
CBUS_VS1 17B2<> 17C4<>
CBUS_VS2 17B2<> 17C4<>
CBUS_WAIT_L 17B2<> 17B4<
CBUS_WE_L 17B1<> 17C4>
CBUS_WP_L 17A1<> 17B4<
CG_ADDRSEL 14B7<
CG_CLKOUT 14B6<>
CG_FSEL 14B7< 14C5<>
CG_LOCK 14B7<>
CG_RESET_L 14B7<
CHARGE_DISABLE 31A7<>
CHARGE_LED_L 30C6<> 30D7< 31D8<> 39D2>
CHGND1 38A6>
CHGND2 38A6>
CHGND3 38A6>
CHGND4 38A6> 39B6>
CHGND5 38A6>
CHGND6 38A6>
CLK10M_PMU_XIN 30B6<
CLK10M_PMU_XOUT 30B6<
CLK10M_PMU_XOUT_UF 30B7<
CLK18M_INT_EXT 14A6<> 36B1>
CLK18M_INT_XIN 14A5< 36B1>
CLK18M_INT_XOUT 14A5<> 36B1>
CLK18M_XTAL_IN 14A5< 36B1>
CLK25M_ENET_XIN 27A7< 36B1>
CLK25M_ENET_XOUT 27A7<> 36B1>
CLK25M_XTAL_IN 27A7<
CLK27M_GPU_XIN 36B1>
CLK27M_GPU_XOUT 36B1>
CLK27M_XTAL_IN 36B1>
CLK32K_PMU_XIN 30B3<>
CLK32K_PMU_XOUT 30B3<>
CLK32K_PMU_XOUT_UF 30B2<>
CLK33M_AIRPORT 12D8< 24D5<> 36C1> 39B1>
CLK33M_AIRPORT_UF 12C7<> 36C1>
CLK33M_CBUS 12D8< 17A7< 36C1>
CLK33M_CBUS_UF 12C7<> 36C1>
CLK33M_USB2 12C8< 26B7< 36C1>
CLK33M_USB2_UF 12C7<> 36C1>
CLK66M_AGP_15V_TP 12C4>
CLK66M_GPU_AGP 12C8< 18B7< 36C1>
CLK66M_GPU_AGP_UF 12C7<> 36C1>
CLKENET_LINK_GBE_REF 13C5< 27C8< 36B1>
CLKENET_LINK_GTX 13C5<> 36A1>
CLKENET_LINK_RX 13D5< 27C8< 36B1>
CLKENET_LINK_TX 13D5< 27D8< 36A1>
CLKENET_PHY_GBE_REF 27C7<> 36B1>
CLKENET_PHY_GTX 13C6< 27C7< 36A1>
CLKENET_PHY_RX 27C7<> 36B1>
CLKENET_PHY_TX 27D7<> 36B1>
CLKFW_LINK_LCLK 13C3<> 36A1>
CLKFW_LINK_PCLK 13C3<> 28C3< 36A1>
CLKFW_PHY_LCLK 13C2< 28B8< 36A1>
CLKFW_PHY_PCLK 28B4> 28C3< 36A1>
CLKLVDS_LN 19B5> 22A4<> 37C2> 39B7>
CLKLVDS_LP 19B5> 22A4<> 37C2> 39B7>
CLKLVDS_UN 19B5> 22A4<> 37C2> 39B7>
CLKLVDS_UP 19B5> 22A4<> 37C2> 39A7>
COMM_DTR_L 14C2> 25D1<> 39B2>
COMM_GPIO_L 14C2<> 25D2<> 39C2>
COMM_RESET_L 14C5<> 25C4<> 39C4>
COMM_RING_DET_L 14B5<> 14C7< 25C3<> 30C6<> 39C4>
COMM_RTS_L 14C2> 25D1<> 39B2>
COMM_RXD 14C2<> 25D1<> 39B2>
COMM_SHUTDOWN 14C5<> 25C4<> 39C4>
COMM_TRXC 14C2<> 25D2<> 39C2>
COMM_TXD_L 14C2<> 25D2<> 39C2>
COMP_DISABLE 22C2<>
COMP_ENABLE 22C1<>
COMP_RC 32C6<
CPU_AACK_L 5A7< 8B6<> 8C2< 36D5>
CPU_ADDR<0> 5C7<> 8D6<>
CPU_ADDR<0..31> 36D5>
CPU_ADDR<1> 5C7<> 8D6<>
CPU_ADDR<2> 5C7<> 8D6<>
CPU_ADDR<3> 5C7<> 8D6<>
CPU_ADDR<4> 5C7<> 8D6<>
CPU_ADDR<5> 5C7<> 8C6<>
CPU_ADDR<6> 5C7<> 8C6<>
CPU_ADDR<7> 5C7<> 8C6<>
CPU_ADDR<8> 5C7<> 8C6<>
CPU_ADDR<9> 5C7<> 8C6<>
CPU_ADDR<10> 5B7<> 8C6<>
CPU_ADDR<11> 5B7<> 8C6<>
CPU_ADDR<12> 5B7<> 8C6<>
CPU_ADDR<13> 5B7<> 8C6<>
CPU_ADDR<14> 5B7<> 8C6<>
CPU_ADDR<15> 5B7<> 8C6<>
CPU_ADDR<16> 5B7<> 8C6<>
CPU_ADDR<17> 5B7<> 8C6<>
CPU_ADDR<18> 5B7<> 8C6<>
CPU_ADDR<19> 5B7<> 8C6<>
CPU_ADDR<20> 5B7<> 8C6<>
CPU_ADDR<21> 5B7<> 8C6<>
CPU_ADDR<22> 5B7<> 8C6<>
CPU_ADDR<23> 5B7<> 8C6<>
CPU_ADDR<24> 5B7<> 8C6<>
CPU_ADDR<25> 5B7<> 8C6<>
CPU_ADDR<26> 5B7<> 8C6<>
CPU_ADDR<27> 5B7<> 8C6<>
CPU_ADDR<28> 5B7<> 8C6<>
CPU_ADDR<29> 5B7<> 8C6<>
CPU_ADDR<30> 5B7<> 8C6<>
CPU_ADDR<31> 5B7<> 8B6<>
CPU_ARTRY_L 5A7<> 8B6<> 8D2< 36D5>
CPU_AVDD 5C3< 38D3>
CPU_BG_L 5C7< 8C2< 8D6<> 36D5>
CPU_BR_L 5C7> 8D2< 8D6< 36D5>
CPU_BUS_VSEL 5C3< 7A6<
CPU_CHKSTP_OUT_L 5B3<> 5C2< 39D8>
CPU_CHKS_L 5A3< 5D2<
CPU_CI_L 5A7> 8B6<> 36D5>
CPU_CLKOUT_SPN 5C3>
CPU_CLK_EN 8A6< 30C4<>
CPU_DATA<0> 6D8<> 8D4<>
CPU_DATA<0..31> 36D5>
CPU_DATA<1> 6D8<> 8D4<>
CPU_DATA<2> 6D8<> 8D4<>
CPU_DATA<3> 6D8<> 8D4<>
CPU_DATA<4> 6D8<> 8D4<>
CPU_DATA<5> 6D8<> 8D4<>
CPU_DATA<6> 6D8<> 8D4<>
CPU_DATA<7> 6D8<> 8D4<>
CPU_DATA<8> 6D8<> 8D4<>
CPU_DATA<9> 6C8<> 8D4<>
CPU_DATA<10> 6C8<> 8D4<>
CPU_DATA<11> 6C8<> 8D4<>
CPU_DATA<12> 6C8<> 8C4<>
CPU_DATA<13> 6C8<> 8C4<>
CPU_DATA<14> 6C8<> 8C4<>
CPU_DATA<15> 6C8<> 8C4<>
CPU_DATA<16> 6C8<> 8C4<>
CPU_DATA<17> 6C8<> 8C4<>
CPU_DATA<18> 6C8<> 8C4<>
CPU_DATA<19> 6C8<> 8C4<>
CPU_DATA<20> 6C8<> 8C4<>
CPU_DATA<21> 6C8<> 8C4<>
CPU_DATA<22> 6C8<> 8C4<>
CPU_DATA<23> 6C8<> 8C4<>
CPU_DATA<24> 6C8<> 8C4<>
CPU_DATA<25> 6C8<> 8C4<>
CPU_DATA<26> 6C8<> 8C4<>
CPU_DATA<27> 6C8<> 8C4<>
CPU_DATA<28> 6C8<> 8C4<>
CPU_DATA<29> 6C8<> 8C4<>
CPU_DATA<30> 6C8<> 8C4<>
CPU_DATA<31> 6C8<> 8C4<>
CPU_DATA<32> 6C8<> 8C4<> 8D8<
CPU_DATA<32..63> 36D5>
CPU_DATA<33> 6C8<> 8C4<> 8D8<
CPU_DATA<34> 6C8<> 8C4<> 8D8<
CPU_DATA<35> 6C8<> 8C4<> 8D8<
CPU_DATA<36> 6B8<> 8C4<> 8D8<
CPU_DATA<37> 6B8<> 8C4<> 8D8<
CPU_DATA<38> 6B8<> 8B4<> 8D8<
CPU_DATA<39> 6B8<> 8B4<> 8D8<
CPU_DATA<40> 6B8<> 8B4<> 8C8<
CPU_DATA<41> 6B8<> 8B4<> 8C8<
CPU_DATA<42> 6B8<> 8B4<> 8C8<
CPU_DATA<43> 6B8<> 8B4<> 8C8<
CPU_DATA<44> 6B8<> 8B4<> 8C8<
CPU_DATA<45> 6B8<> 8B4<> 8B8<
CPU_DATA<46> 6B8<> 8B4<> 8B8<
CPU_DATA<47> 6B8<> 8B4<> 8B8<
CPU_DATA<48> 6B8<> 8A8< 8B4<>
CPU_DATA<49> 6B8<> 8A8< 8B4<>
CPU_DATA<50> 6B8<> 8A8< 8B4<>
CPU_DATA<51> 6B8<> 8A8< 8B4<>
CPU_DATA<52> 6B8<> 8A8< 8B4<>
CPU_DATA<53> 6B8<> 8A8< 8B4<>
CPU_DATA<54> 6B8<> 8A8< 8B4<>
CPU_DATA<55> 6B8<> 8A8< 8B4<>
CPU_DATA<56> 6B8<> 8B3< 8B4<>
CPU_DATA<57> 6B8<> 8B3< 8B4<>
CPU_DATA<58> 6B8<> 8B3< 8B4<>
CPU_DATA<59> 6B8<> 8B3< 8B4<>
CPU_DATA<60> 6B8<> 8B3< 8B4<>
CPU_DATA<61> 6B8<> 8B3< 8B4<>
CPU_DATA<62> 6A8<> 8B3< 8B4<>
CPU_DATA<63> 6A8<> 8B3< 8B4<>
CPU_DBG_L 5C3< 8A4<> 8C2< 36D5>
CPU_DRDY_L 5C3> 8A4< 8C2< 36D5>
CPU_DRDY_L_UF 36D5>
CPU_DTI<0> 5C3< 8A4<>
CPU_DTI<0..2> 36D5>
CPU_DTI<1> 5C3< 8A4<>
CPU_DTI<2> 5C3< 8A4<>
CPU_EDTI 5B2< 5C3<
CPU_EMODE0_L 5A3< 7A4<
CPU_EMODE1_L 5A3< 5C2<
CPU_GBL_L 5A7<> 8B6<> 36D5>
CPU_HIT_L 5A7> 8B6< 8D2< 36D5>
CPU_HRESET_INV 7A7<>
CPU_HRESET_L 5B3< 5C2< 7A5< 7A8< 23A2<> 39C8>
CPU_L1TSTCLK 5B2< 5B3<
CPU_L2TSTCLK 5B3< 5C2<
CPU_LSSD_MODE 5B3< 5C2<
CPU_MCP_L 5B3< 5D2<
CPU_M_DM 25A8< 25B6<
CPU_M_DP 25B6< 25B8<
CPU_PLL_CFG<0> 5C3< 7D3<
CPU_PLL_CFG<1> 5C3< 7D3<
CPU_PLL_CFG<2> 5C3< 7D3<
CPU_PLL_CFG<3> 5C3< 7D3<
CPU_PLL_CFG<4> 5C3< 7D3<>
CPU_PLL_CFGEXT 7D4<>
CPU_PLL_FS00 7C4<>
CPU_PLL_FS01 7C4<
CPU_PLL_FS10 7C4<
CPU_PLL_STOP_BASE 7C7<
CPU_PLL_STOP_OC 7C4<> 7C8<> 30B6<>
CPU_PMONIN_L 5A3< 5C2<
CPU_PULLDOWN 5A2< 5A3< 5A3< 5C7<>
CPU_PULLUP 5A3< 5C2<
CPU_QACK_L 5B3< 8B6<> 36D5>
CPU_QREQ_L 5B3> 8B6< 8C2< 36D5>
CPU_SHD0_L 5A7<> 5D2<
CPU_SHD1_L 5A7<> 5D2<
CPU_SMI_L 5B3< 5C2< 30C4<>
CPU_SRESET_L 5B2< 5B3< 39C8>
CPU_SRWX_L 5A3< 5C2<
CPU_TA_L 5B3< 8A4<> 8D2< 36D5>
CPU_TBEN 5B3< 5D2< 8A6<>
CPU_TBST_L 5A7> 8B6<> 36D5>
CPU_TEA_L 5B3< 8A4<> 8C2< 36D5>
CPU_TSIZ<0> 5A7> 8B6<>
CPU_TSIZ<0..2> 36D5>
CPU_TSIZ<1> 5A7> 8B6<>
CPU_TSIZ<2> 5A7> 8B6<>
CPU_TS_L 5C7<> 8D2< 8D6<> 36D5>
CPU_TT<0> 5A7<> 8B6<>
CPU_TT<0..4> 36C5>
CPU_TT<1> 5A7<> 8B6<>
CPU_TT<2> 5A7<> 8B6<>
CPU_TT<3> 5A7<> 8B6<>
CPU_TT<4> 5A7<> 8B6<>
CPU_VCORE_HI_OC 7B8< 30D4<> 34C8< 34D7<
CPU_VCORE_PWR_SEQ 34D8<>
CPU_VCORE_SEQ 34D8<
CPU_VCORE_SEQ_L 34D8<
CPU_VCORE_SLEEP 5C2< 5D8<> 34C1< 34D2< 38D3> 39B2>
CPU_VCORE_SLEEP_F 34C2<>
CPU_VCORE_SNUB 34B3<
CPU_WT_L 5A7> 8B6<> 36C5>
CSLOT_ADDR3_SPN 13B7>
CSLOT_ADDR4_SPN 13B7>
CSLOT_ADDR5_SPN 13B7>
CSLOT_ADDR6_SPN 13B7>
CSLOT_ADDR7_SPN 13B7>
CSLOT_ADDR8_SPN 13B7>
CSLOT_ADDR9_SPN 13B7>
CSLOT_CE1_L_SPN 13C7>
CSLOT_CE2_L_SPN 13C7>
CSLOT_IORD_L_SPN 13C7>
CSLOT_IOWAIT_L_PU 13C7<
CSLOT_IOWR_L_SPN 13C7>
CSLOT_OE_L_SPN 13C7>
CSLOT_WE_L_SPN 13C7>
CURRENT_THRESHOLD 31C4<
CY25811_S0 18B2<
CY25811_S1 18B2<
DCDC_EN 19A7<> 29C7<> 32B7<> 33B6<> 34C8<>
39C1>
DCDC_EN_L 33B6< 33B7<> 35C7<>
DDC_CLK_ISO 22D4<>
DDR_VREF 11D1< 11D3<> 11D5<> 11D6<> 11D8<>
38D3>
DVI_DDC_CLK 22D4<>
DVI_DDC_CLK_UF 22C5<> 22D3<> 39C7>
DVI_DDC_DATA 22C4<>
DVI_DDC_DATA_UF 22C5<> 39C7>
DVI_HPD 22C4<>
DVI_HPD_DIV 22C3<
DVI_HPD_UF 22C3< 22C5<> 39C7>
DVI_TRUN_ON_ILIM 22D2<
DVI_TURN_ON 22D3<>
DVI_TURN_ON_BASE 22D2<
EEPROM_ADDR 23D4<
EEPROM_WP_PD 23D3<>
EIDE_ADDR<0> 13B7> 24B8<
EIDE_ADDR<2..0> 37B5>
EIDE_ADDR<1> 13B7> 24B8<
EIDE_ADDR<2> 13B7> 24B8<
EIDE_CS0_L 13B7> 24B8< 37B5>
EIDE_CS1_L 13B7> 24B8< 37B5>
EIDE_DATA<0> 13C7<> 24C8<
EIDE_DATA<15..0> 37B5>
EIDE_DATA<1> 13C7<> 24C8<
EIDE_DATA<2> 13C7<> 24C8<
EIDE_DATA<3> 13C7<> 24C8<
EIDE_DATA<4> 13C7<> 24C8<
EIDE_DATA<5> 13B7<> 24B8<
EIDE_DATA<6> 13B7<> 24C8<
EIDE_DATA<7> 13B7<> 24C8<
EIDE_DATA<8> 13B7<> 24D8<
EIDE_DATA<9> 13B7<> 24D8<
EIDE_DATA<10> 13B7<> 24D8<
EIDE_DATA<11> 13B7<> 24D8<
EIDE_DATA<12> 13B7<> 24D8<
EIDE_DATA<13> 13B7<> 24C8<
EIDE_DATA<14> 13B7<> 24C8<
EIDE_DATA<15> 13B7<> 24C8<
EIDE_DMACK_L 13A7<> 24A8< 37B5>
EIDE_DMARQ 13A7< 24B8< 37B5>
EIDE_INT 13A7< 24A8< 37B5>
EIDE_IOCHRDY 13B7< 24A8< 37B5>
EIDE_OPTICAL_ADDR<0> 24A5<> 24B7< 39A4>
EIDE_OPTICAL_ADDR<2..0> 37B5>
EIDE_OPTICAL_ADDR<1> 24A5<> 24B7< 39A4>
EIDE_OPTICAL_ADDR<2> 24A6<> 24B7< 39A4>
EIDE_OPTICAL_CS0_L 24A5<> 24B7< 37B5> 39D4>
EIDE_OPTICAL_CS1_L 24A6<> 24B7< 37B5> 39D4>
EIDE_OPTICAL_DATA<0> 24A5<> 24C7< 39C4>
EIDE_OPTICAL_DATA<15..0> 37B5>
EIDE_OPTICAL_DATA<1> 24A5<> 24C7< 39C4>
EIDE_OPTICAL_DATA<2> 24A5<> 24C7< 39C4>
EIDE_OPTICAL_DATA<3> 24A5<> 24C7< 39C4>
EIDE_OPTICAL_DATA<4> 24A5<> 24C7< 39C4>
EIDE_OPTICAL_DATA<5> 24A5<> 24B7< 39C4>
EIDE_OPTICAL_DATA<6> 24A5<> 24C7< 39C4>
EIDE_OPTICAL_DATA<7> 24A5<> 24C7< 39B4>
EIDE_OPTICAL_DATA<8> 24A6<> 24D7< 39B4>
EIDE_OPTICAL_DATA<9> 24A6<> 24D7< 39B4>
EIDE_OPTICAL_DATA<10> 24A6<> 24D7< 39B4>
EIDE_OPTICAL_DATA<11> 24A6<> 24D7< 39B4>
EIDE_OPTICAL_DATA<12> 24A6<> 24D7< 39B4>
EIDE_OPTICAL_DATA<13> 24A6<> 24C7< 39B4>
EIDE_OPTICAL_DATA<14> 24A6<> 24C7< 39B4>
EIDE_OPTICAL_DATA<15> 24A6<> 24C7< 39B4>
EIDE_OPTICAL_DMAACK_L 24A6<> 24A7< 37A5> 39A4>
EIDE_OPTICAL_DMA_RQ 24A6<> 24B7< 37A5> 39A4>
EIDE_OPTICAL_INT 24A5<> 24A7< 37A5> 39D4>
EIDE_OPTICAL_IOCHRDY 24A5<> 24A7< 37A5> 39D4>
EIDE_OPTICAL_RD_L 24A6<> 24A7< 37B5> 39A4>
EIDE_OPTICAL_RST_L 24A7< 24B5<> 37A5> 39D4>
EIDE_OPTICAL_WR_L 24A5<> 24A7< 37A5> 39D4>
EIDE_RD_L 13A7> 24A8< 37B5>
EIDE_RST_L 13B7> 24A8< 37B5>
EIDE_WR_L 13A7> 24A8< 37B5>
ENET_COL 13C5< 27B7> 37A5>
ENET_COMA 27B7<>
ENET_CRS 13C5< 27B7> 37A5>
ENET_CTAP_CHGND 27A1< 38A6>
ENET_ENERGY_DET 14B5<> 27B7<>
ENET_HSDACM 27A7<>
ENET_HSDACP 27A7<>
ENET_LINK_RXD<0> 13C5< 27C7>
ENET_LINK_RXD<7..0> 37A5>
ENET_LINK_RXD<1> 13C5< 27C7>
ENET_LINK_RXD<2> 13C5< 27C7>
ENET_LINK_RXD<3> 13C5< 27B7>
ENET_LINK_RXD<4> 13C5< 27B7>
ENET_LINK_RXD<5> 13C5< 27B7>
ENET_LINK_RXD<6> 13C5< 27B7>
ENET_LINK_RXD<7> 13C5< 27B7>
ENET_LINK_TXD<0> 13B4< 13D5>
ENET_LINK_TXD<7..0> 37A5>
ENET_LINK_TXD<1> 13B4< 13D5>
ENET_LINK_TXD<2> 13B4< 13D5>
ENET_LINK_TXD<3> 13B4< 13D5>
ENET_LINK_TXD<4> 13B4< 13D5>
ENET_LINK_TXD<5> 13B4< 13D5>
ENET_LINK_TXD<6> 13A4< 13D5>
ENET_LINK_TXD<7> 13A4< 13D5>
ENET_LINK_TX_EN 13D5<> 37A5>
ENET_LINK_TX_ER 13D5<> 37A5>
ENET_MDC 13C5> 27B7< 37A5>
ENET_MDIO 13C5<> 27B7<> 37A5>
ENET_PHY_TXD<0> 13B5< 27C7<
ENET_PHY_TXD<7..0> 37A5>
ENET_PHY_TXD<1> 13B5< 27C7<
ENET_PHY_TXD<2> 13B5< 27C7<
ENET_PHY_TXD<3> 13B5< 27C7<
ENET_PHY_TXD<4> 13B5< 27C7<
ENET_PHY_TXD<5> 13B5< 27C7<
ENET_PHY_TXD<6> 13A5< 27C7<
ENET_PHY_TXD<7> 13A5< 27C7<
ENET_PHY_TX_EN 13D6< 27C7< 37A5>
ENET_PHY_TX_ER 13D6< 27C7< 37A5>
ENET_RSET 27A5<
ENET_RST_L 27B7<
ENET_RX_DV 13D5< 27B7> 37A5>
ENET_RX_ER 13C5< 27B7> 37A5>
ENET_VSSC 27A7<>
EXT_SWING 20A5<>
FANL_GND 25A3<> 38B6> 39B3>
FANL_PWM 25A3<> 25B2<> 39B3>
FANL_TACH 25A3<> 25B2< 39B3>
FANR_GND 25B2<> 38B6> 39B3>
FANR_PWM 25A2<> 25B1<> 39B3>
FANR_TACH 25B2< 25B2<>
FB_4_85V_BU 32A5<
FP_PWR_EN 19C6<> 22A6< 22B3<>
FP_PWR_EN_L 22B3<>
FWB_TPB0 28A3<
FWB_TPB1 28A4<
FWPLL_BYP 28C8<>
FW_BIAS0 28A5<>
FW_BIAS1 28A5<>
FW_BMODE 28B7<
FW_CORE_ADJ 28C8<
FW_CORE_BYP 28C7<>
FW_CPS 28B7<
FW_INPUT_PD 28A7<
FW_LINK_CNTL<0> 13C3<> 28C3<
FW_LINK_CNTL<1..0> 37A5>
FW_LINK_CNTL<1> 13C3<> 28C3<
FW_LINK_DATA<0> 13D3<> 28B8<
FW_LINK_DATA<7..0> 37A5>
FW_LINK_DATA<1> 13D3<> 28B8<
FW_LINK_DATA<2> 13D3<> 28B8<
FW_LINK_DATA<3> 13D3<> 28A8<
FW_LINK_DATA<4> 13C3<> 28A8<
FW_LINK_DATA<5> 13C3<> 28A8<
FW_LINK_DATA<6> 13C3<> 28A8<
FW_LINK_DATA<7> 13C3<> 28A8<
FW_LINK_LREQ 13C3<> 37A5>
FW_LKON 13C3<> 28B5<>
FW_OSC 28A4< 36A1>
FW_OSC_EN 28A3<
FW_PC_PD 28B7<
FW_PC_PU 28B7<
FW_PHY_CNTL<0> 28B4<> 28C3<
FW_PHY_CNTL<1..0> 37A5>
FW_PHY_CNTL<1> 28B4<> 28C3<
FW_PHY_DATA<0> 28B8<>
FW_PHY_DATA<7..0> 37A5>
FW_PHY_DATA<1> 28B8<>
FW_PHY_DATA<2> 28B8<>
FW_PHY_DATA<3> 28A8<>
FW_PHY_DATA<4> 28A8<>
FW_PHY_DATA<5> 28A8<>
FW_PHY_DATA<6> 28A8<>
FW_PHY_DATA<7> 28A8<>
FW_PHY_LPS 13C3<> 28B8<
FW_PHY_LREQ 13C2< 28B8< 37A5>
FW_PHY_PD 14C5< 28B8<
FW_PHY_PD_INT 14A7< 14C5<>
FW_PHY_RESET_L 28A8<
FW_PINT 13C3<> 28B4> 37A5>
FW_PLL_ADJ 28C7<
FW_PORT1_SEL 28B6<
FW_PWREN_L 29C6<>
FW_PWR_GATE 29D6<>
FW_R0 28A5<>
FW_R1 28A5<>
FW_TESTM 28A7<
FW_TPA0N 28B1<> 29C4<> 37D2>
FW_TPA0N_CONN 29C3<>
FW_TPA0P 28B1<> 29C4<> 37D2>
FW_TPA0P_CONN 29C3<>
FW_TPA1N 28B1<> 29A4<> 37C2>
FW_TPA1P 28B1<> 29A4<> 37C2>
FW_TPB0N 28B1<> 29C4<> 37D2>
FW_TPB0N_CONN 29C3<>
FW_TPB0P 28B1<> 29C4<> 37D2>
FW_TPB0P_CONN 29C3<>
FW_TPB1N 28B1<> 29A4<> 37C2>
FW_TPB1P 28B1<> 29A4<> 37C2>
FW_TPB2_PD 28A5<>
FW_TPI0N 37C2>
FW_TPI0P 37C2>
FW_TPI1N 29A3<> 37C2> 39D2>
FW_TPI1P 29A3<> 37C2> 39D2>
FW_TPO0N 37C2>
FW_TPO0P 37C2>
FW_TPO0R 29C2<> 38A3> 39A3>
FW_TPO1N 29A3<> 37C2> 39D2>
FW_TPO1P 29A3<> 37C2> 39D2>
FW_VGND0 29C2<> 38A3>
FW_VGND1 29A3<> 38A3>
FW_VREG_PD 28A7<
FW_XI 28A5<> 36A1>
GAIN_SETTING2 23C7<>
GPU_AGP_TEST 18D6<
GPU_AUXWIN 19C5<>
GPU_B 19D6<> 22D8<
GPU_C 19D6<> 22A8<
GPU_CLK27M_OUT 36C1>
GPU_CLK27M_UF 36C1>
GPU_COMP 19D6<> 22A8<
GPU_CORE_OK 19A6<> 19D4<> 21D2<> 21D7<>
GPU_DVI_DDC_CLK 19C5<> 22D3<>
GPU_DVI_DDC_DATA 19C5<> 22C3<>
GPU_DVOD<0> 19D7<> 20B7<
GPU_DVOD<0..11> 37D5>
GPU_DVOD<1> 19D7<> 20B7<
GPU_DVOD<2> 19D7<> 20B7<
GPU_DVOD<3> 19D7<> 20B7<
GPU_DVOD<4> 19D7<> 20B7<
GPU_DVOD<5> 19D7<> 20A7<
GPU_DVOD<6> 19D7<> 20A7<
GPU_DVOD<7> 19D7<> 20A7<
GPU_DVOD<8> 19D7<> 20A7<
GPU_DVOD<9> 19D7<> 20A7<
GPU_DVOD<10> 19D7<> 20A7<
GPU_DVOD<11> 19D7<> 20A7<
GPU_DVOD_DE 19C7<> 20A7<
GPU_DVO_CLKP 19C7<> 20A7< 36B1>
GPU_DVO_HSYNC 19C7<> 20A7< 37C5>
GPU_DVO_VSYNC 19C7<> 20A7< 37C5>
GPU_FBCLK0 36B1>
GPU_FBCLK0_L 36B1>
GPU_FBCLK1 36B1>
GPU_FBCLK1_L 36B1>
GPU_G 19D6<> 22D8<
GPU_HPD 19C5< 22C3<>
GPU_MEM_IO 38C3>
GPU_MEM_IO_FLT 21C2< 38C3>
GPU_R 19D6<> 22D8<
GPU_SSCLK_IN 36B1>
GPU_SSCLK_UF 36C1>
GPU_THERM_DM 18A6<>
GPU_THERM_DP 18A6<>
GPU_TV_GND1 22B8<> 38B6>
GPU_TV_GND2 22A8<> 38B6>
GPU_VCORE 18A6< 19A3<> 19B5<> 19D4< 38C3>
39B2>
GPU_VCORE_CNTL 19A3<>
GPU_VCORE_CNTL_L 19A4< 19B7<>
GPU_VCORE_NECK 19B5<> 38B3>
GPU_VCORE_PWR_SEQ 19A8<>
GPU_VCORE_SEQ 19A8<
GPU_VCORE_SEQ_L 19A8<
GPU_VCORE_SW 19A4<> 38B1>
GPU_VCORE_VDDCI 18A5< 38C3>
GPU_Y 19D6<> 22B8<
HD_ADDR<0> 24C2<> 24C3<
HD_ADDR<2..0> 37C5>
HD_ADDR<1> 24C2<> 24C3<
HD_ADDR<2> 24B3< 24C1<>
HD_CS0_L 24C2<> 24C3< 37B5>
HD_CS1_L 24B3< 24C1<> 37B5>
HD_DATA<0> 24C2<> 24D3<
HD_DATA<15..0> 37C5>
HD_DATA<1> 24C2<> 24D3<
HD_DATA<2> 24D2<> 24D3<
HD_DATA<3> 24D2<> 24D3<
HD_DATA<4> 24C3< 24D2<>
HD_DATA<5> 24C3< 24D2<>
HD_DATA<6> 24C3< 24D2<>
HD_DATA<7> 24C3< 24D2<>
HD_DATA<8> 24C3< 24D1<>
HD_DATA<9> 24C3< 24D1<>
HD_DATA<10> 24C3< 24D1<>
HD_DATA<11> 24D1<> 24D3<
HD_DATA<12> 24B3< 24D1<>
HD_DATA<13> 24B3< 24D1<>
HD_DATA<14> 24C1<> 24C3<
HD_DATA<15> 24B3< 24C1<>
HD_DIOR_L 24A3< 24C2<> 37B5>
HD_DIOW_L 24A3< 24C1<> 37B5>
HD_DMACK_L 24A3< 24C2<> 37B5>
HD_DMARQ 13C6< 24C2<> 37B5>
HD_INTRQ 13C6< 24C1<> 37B5>
HD_IOCHRDY 24A3< 24C1<> 37B5>
HD_RESET_L 24A3< 24D2<> 37B5>
HIGH_VCORE 19A2<>
HIGH_VCORE_DIV 19A3<
HPD_4V_REF 22C3<
HPD_BASE 22C1<
HPD_ON 22C2<>
HPD_ON_RC 22C2<
HPD_PWR_SNS_EN 19C7<> 22C3<>
HPD_PWR_SW 22C2<>
IAC_FB 31D4<
IAC_RC_COMP 31D4<
INTREPID_ACS_REF 8A6<
INT_AGPPVT 12D4<>
INT_AGP_FB_IN 12C4< 36C1>
INT_AGP_FB_OUT 12C4<> 36C1>
INT_AGP_VREF 12B4< 12D4<> 18D5< 38D3>
INT_AUDIO_TO_SND 14B2< 25D8< 39C6>
INT_AUDIO_TO_SND_F 25D7<> 25D7<
INT_CPUFB_IN 8A6< 8B6< 36D1>
INT_CPUFB_IN_NORM 8A4< 36D1>
INT_CPUFB_LONG 8A4< 36D1>
INT_CPUFB_OUT 8A6<> 8A6< 36D1>
INT_CPUFB_OUT_NORM 8A4< 36D1>
INT_CPUFB_OUT_SHORT 8A5< 36D1>
INT_DDRCLK2_N_TP 9B6<>
INT_DDRCLK2_P_TP 9B6<>
INT_DDRCLK5_N_TP 9B6<>
INT_DDRCLK5_P_TP 9B6<>
INT_ENET_RST_L 14B5<> 27B8<
INT_EXTINT3_PU 14B5<> 14B7<
INT_EXTINT8_PU 14B5<> 14C7<
INT_EXTINT10_PU 14A7< 14B5<>
INT_EXTINT11_PU 14A7< 14B5<>
INT_EXTINT12_PU 14A7< 14B5<>
INT_EXTINT13_PU 14B5<> 14B7<
INT_EXTINT14_PU 14B5<> 14C7<
INT_EXTINT16_PU 14B5<> 14B7<
INT_GPIO1_PU 14C5<> 14C7< 34C8<
INT_GPIO9_PU 14A7< 14B5<>
INT_GPIO12_PU 14B5<> 14B7<
INT_GPIO15_PU 14B5<> 14C7<
INT_I2C_CLK0 11A3<> 11A8<> 13C2< 13C3<> 23D2<
23D4<> 39B8>
INT_I2C_CLK1 13C2< 13C3<> 14B7< 25B4< 39B8>
INT_I2C_CLK2 14A2<> 25C4<> 25D7<> 39C6>
INT_I2C_DATA0 11A3<> 11A8<> 13C2< 13C3<> 23D2<>
23D4<> 39B8>
INT_I2C_DATA1 13B2< 13C3<> 14B7< 25B4<> 39B8>
INT_I2C_DATA2 14A2<> 25C4<> 25C7<> 39C6>
INT_JTAG_TEI 13C2< 13C5<
INT_MEM_REF_H 9B6< 38D3>
INT_MEM_VREF 9A7< 9B6<> 38D3>
INT_MOD_BITCLK_UF 14A3<> 14A7<
INT_MOD_CLKOUT_UF 14A3<> 14B7<
INT_MOD_DTI 14A2< 25C3<> 39B1>
INT_MOD_DTI_UF 14A7<
INT_MOD_DTO_UF 14A3<> 14B7<
INT_MOD_SYNC_UF 14A3<> 14A7<
INT_PCI_FB_IN 12C7< 36C1>
INT_PCI_FB_OUT 12C7<> 36C1>
INT_PEND_PROC_INT 14A5> 30C4<>
INT_PROC_SLEEP_REQ_L 14A5< 30B4<>
INT_PU_RESET_L 13D3< 25D4<> 30A2< 30C4<>
INT_REF_CLK_IN 14A5< 14B5< 36C1>
INT_REF_CLK_OUT 14A5> 14B7< 36C1>
INT_RESET_L 9B3< 13D3< 30C7< 30D4<>
INT_ROM_CS_L 12A6< 12C7>
INT_ROM_OE_L 12A6< 12C7>
INT_ROM_RW_L 12A6< 12C7>
INT_SND_CLKOUT 14A3<>
INT_SND_SCLK 14A3<>
INT_SND_SYNC 14B3<>
INT_SND_TO_AUDIO 14B3<>
INT_SUSPEND_ACK_L 8B6> 30B6<>
INT_SUSPEND_REQ_L 8B6< 30B6<> 30C7<
INT_TST_MONIN_PD 13C2< 13C5<
INT_TST_MONOUT_TP 13C5>
INT_TST_PLLEN_PD 13C5< 13D2<
INT_WATCHDOG_L 14A5> 30C6<>
INV_ON_PWM 19C6<> 22A3<
IO_RESET_L 17A7< 23D6< 26B8< 27B8< 30C6<>
30D7<
JTAG_ASIC_TCK 13C5< 13D2< 27A5< 39D8>
JTAG_ASIC_TDI 13C5< 13D2< 39D8>
JTAG_ASIC_TDO_TP 27A5> 39D8>
JTAG_ASIC_TMS 13C5< 13D2< 27A5< 39D8>
JTAG_ASIC_TRST_L 13C2< 13C5< 27A5< 39D8>
JTAG_CPU_TCK 5B2< 5B3< 23B2> 39C8>
JTAG_CPU_TDI 5B2< 5C3< 23D4<> 39C8>
JTAG_CPU_TDO_TP 5C3> 39C8>
JTAG_CPU_TMS 5B2< 5B3< 23C4<> 39C8>
JTAG_CPU_TRST_L 5A3< 5B3< 23D4<> 39B1> 39C8>
JTAG_ENET_TDI 13C5> 13D2< 27A5<
KBD_CAPSLOCK_LED 23A7<> 39B4>
KBD_COMMAND_L 23A5< 23A7<> 30C6<> 39B4>
KBD_CONTROL_L 23A5< 23A7<> 30A8< 30C6<> 39B4>
KBD_FUNCTION_L 23A5< 23A7<> 30B6<> 39B4>
KBD_ID 23A7<> 23B5< 30B6<> 39C4>
KBD_LED1_OUT 23A5<> 23A7<> 38B6> 39C2>
KBD_LED2_OUT 23A5<> 23A7<> 38B6> 39C2>
KBD_LED_EN 23A5<>
KBD_LED_SET 23A5<
KBD_NUMLOCK_LED 23B7<> 39C3>
KBD_OPTION_L 23A5< 23B7<> 30A8< 30B6<> 39B4>
KBD_SHIFT_L 23A5< 23B7<> 30A8< 30C6<> 39B4>
KBD_X<0> 23A5< 23B7<> 30C6<> 39B4>
KBD_X<1> 23A5< 23B7<> 30C6<> 39B4>
KBD_X<2> 23B5< 23B7<> 30C6<> 39B4>
KBD_X<3> 23B5< 23B7<> 30C6<> 39A4>
KBD_X<4> 23B5< 23B7<> 30C6<> 39A4>
KBD_X<5> 23B5< 23B7<> 30C6<> 39A4>
KBD_X<6> 23B5< 23B7<> 30C6<> 39A4>
KBD_X<7> 23B5< 23B7<> 30C6<> 39A4>
KBD_X<8> 23B5< 23B7<> 30C6<> 39A4>
KBD_X<9> 23B5< 23B7<> 30C6<> 39D3>
KBD_Y<0> 23B7<> 30D6<> 39D3>
KBD_Y<1> 23B7<> 30D6<> 39D3>
KBD_Y<2> 23B7<> 30D6<> 39D3>
KBD_Y<3> 23B7<> 30D6<> 39D3>
KBD_Y<4> 23B7<> 30D6<> 39D3>
KBD_Y<5> 23B7<> 30D6<> 39D3>
KBD_Y<6> 23B7<> 30C6<> 39C3>
KBD_Y<7> 23B7<> 30C6<> 39C3>
LCD_DIGON_L 22A6<
LCD_PWREN_L 22A5<>
LED_LINK10 27B5<>
LED_LINK100 27B5<>
LED_RX_SPN 27B5>
LEFT_USB_DM 24B2<> 26B3< 37A2> 39D1>
LEFT_USB_DP 24B2<> 26A3< 37A2> 39D1>
LID_CLOSED_L 23A7<> 39C4>
LM2594_IN 28D8<> 38B3>
LT1962_INT_ADJ 14D6<
LT1962_INT_BYP 14D6<>
LTC1625_ITH 31D3<>
LTC1962_1V5_VIN 38A1>
LTC1962_1V5_VOUT 38A1>
LTC1962_INT_VIN 14D7<> 38A1>
LTC1962_L3_VIN 38A1>
LTC1962_L3_VOUT 38A1>
LTC3405_SW 27D4<> 38B3>
LTC3411_GND 38A1>
LTC3411_ITH 38A1>
LTC3411_ITH_RC 38A1>
LTC3411_SHDN 38A1>
LTC3411_SYNC 38A1>
LTC3411_VCC 38B1>
LTC3412_GND 35A6<>
LTC3412_ITH 35A6<>
LTC3412_ITH_RC 35A6<
LTC3412_PGOOD 35A4<>
LTC3412_RT 35A6<
LTC3412_RUNSS 35A6<>
LTC3412_SYNC 35A6<>
LTC3412_VFB 35A6<>
LTC3412_VFB_DIV 35A6<
LTC3707_START_RC 33B6<>
LVDS_DDC_CLK 19C5<> 22B5<> 39A7>
LVDS_DDC_DATA 19C5<> 22B5<> 39A7>
LVDS_L0N 19B5> 22B4<> 37C2> 39C7>
LVDS_L0P 19B5> 22B4<> 37C2> 39C7>
LVDS_L1N 19B5> 22B4<> 37C2> 39C7>
LVDS_L1P 19B5> 22B4<> 37C2> 39C7>
LVDS_L2N 19B5> 22B4<> 37C2> 39C7>
LVDS_L2P 19B5> 22B4<> 37C2> 39C7>
LVDS_L3N_TP 19B5>
LVDS_L3P_TP 19B5>
LVDS_U0N 19C5> 22A4<> 37C2> 39B7>
LVDS_U0P 19C5> 22A4<> 37C2> 39B7>
LVDS_U1N 19C5> 22A4<> 37C2> 39B7>
LVDS_U1P 19C5> 22A4<> 37C2> 39B7>
LVDS_U2N 19B5> 22A4<> 37B2> 39B7>
LVDS_U2P 19B5> 22A4<> 37B2> 39B7>
LVDS_U3N_TP 19B5>
LVDS_U3P_TP 19B5>
MAIN_RESET_L 14C7< 17A7< 17D5< 18C8< 20B8<
24D6<> 26B8< 30D4<> 30D7< 39C1>
MAX1715_FB2 35B1< 35B4<
MAX1715_GND 35B5<> 35C5< 38C1>
MAX1715_ON_RC 35C7<>
MAX1715_REF 35B5<> 38C1>
MAX1715_SKIP 35C4< 38C1>
MAX1715_TON 35C5< 38C1>
MAX1715_VCC 35D5< 38C1>
MAX1717_AB_SEL 34A7< 34C6<
MAX4172_OUT 31D4<>
MAXBUS_SLEEP 5A2< 5D1< 5D5< 7B7< 7D8< 8B8< 8C3<
8C8< 8D1< 8D8< 15D8< 16D8< 23B3<
23B3< 34D8< 38D3>
MDI0_PD 27B4<
MDI1_PD 27B4<
MDI2_PD 27B4<
MDI3_PD 27B3<
MDI_M<0> 27B5<> 37D2>
MDI_M<1> 27B5<> 37D2>
MDI_M<2> 27B5<> 37D2>
MDI_M<3> 27B5<> 37D2>
MDI_P<0> 27B5<> 37D2>
MDI_P<1> 27B5<> 37D2>
MDI_P<2> 27B5<> 37D2>
MDI_P<3> 27B5<> 37D2>
MEM_ADDR<0> 9B5< 9D6<>
MEM_ADDR<12..0> 36A5>
MEM_ADDR<1> 9B5< 9D6<>
MEM_ADDR<2> 9B5< 9D6<>
MEM_ADDR<3> 9B5< 9D6<>
MEM_ADDR<4> 9B5< 9D6<>
MEM_ADDR<5> 9B5< 9D6<>
MEM_ADDR<6> 9B5< 9D6<>
MEM_ADDR<7> 9B5< 9D6<>
MEM_ADDR<8> 9B5< 9D6<>
MEM_ADDR<9> 9A5< 9D6<>
MEM_ADDR<10> 9A5< 9D6<>
MEM_ADDR<11> 9A5< 9D6<>
MEM_ADDR<12> 9A5< 9D6<>
MEM_BA<0> 9A5< 9D6<>
MEM_BA<1..0> 36A5>
MEM_BA<1> 9A5< 9C6<>
MEM_CAS_L 9A5< 9C6<> 36A5>
MEM_CKE<0> 9B6<> 9C5<
MEM_CKE<3..0> 36A5>
MEM_CKE<1> 9B6<> 9C5<
MEM_CKE<2> 9B6<> 9C5<
MEM_CKE<3> 9B6<> 9C5<
MEM_CS_L<0> 9C5< 9C6<>
MEM_CS_L<3..0> 36A5>
MEM_CS_L<1> 9C5< 9C6<>
MEM_CS_L<2> 9C5< 9C6<>
MEM_CS_L<3> 9C5< 9C6<>
MEM_DATA<0> 9D8<> 10C7<>
MEM_DATA<7..0> 36C5>
MEM_DATA<1> 9D8<> 10C7<>
MEM_DATA<2> 9D8<> 10C7<>
MEM_DATA<3> 9D8<> 10C7<>
MEM_DATA<4> 9D8<> 10C7<>
MEM_DATA<5> 9D8<> 10C7<>
MEM_DATA<6> 9D8<> 10C7<>
MEM_DATA<7> 9D8<> 10C7<>
MEM_DATA<8> 9D8<> 10C7<>
MEM_DATA<15..8> 36C5>
MEM_DATA<9> 9D8<> 10C7<>
MEM_DATA<10> 9D8<> 10C7<>
MEM_DATA<11> 9D8<> 10C7<>
MEM_DATA<12> 9D8<> 10B7<>
MEM_DATA<13> 9C8<> 10B7<>
MEM_DATA<14> 9C8<> 10B7<>
MEM_DATA<15> 9C8<> 10B7<>
MEM_DATA<16> 9C8<> 10C5<>
MEM_DATA<31..16> 36C5>
MEM_DATA<17> 9C8<> 10C5<>
MEM_DATA<18> 9C8<> 10C5<>
MEM_DATA<19> 9C8<> 10C5<>
MEM_DATA<20> 9C8<> 10C5<>
MEM_DATA<21> 9C8<> 10C5<>
MEM_DATA<22> 9C8<> 10C5<>
MEM_DATA<23> 9C8<> 10C5<>
MEM_DATA<24> 9C8<> 10C5<>
MEM_DATA<25> 9C8<> 10C5<>
MEM_DATA<26> 9C8<> 10C5<>
MEM_DATA<27> 9C8<> 10C5<>
MEM_DATA<28> 9C8<> 10C5<>
MEM_DATA<29> 9C8<> 10B5<>
MEM_DATA<30> 9C8<> 10B5<>
MEM_DATA<31> 9C8<> 10B5<>
MEM_DATA<32> 9C8<> 10C3<>
MEM_DATA<47..32> 36B5>
MEM_DATA<33> 9C8<> 10C3<>
MEM_DATA<34> 9C8<> 10C3<>
MEM_DATA<35> 9C8<> 10C3<>
MEM_DATA<36> 9C8<> 10C3<>
MEM_DATA<37> 9C8<> 10C3<>
MEM_DATA<38> 9C8<> 10C3<>
MEM_DATA<39> 9B8<> 10C3<>
MEM_DATA<40> 9B8<> 10C3<>
MEM_DATA<41> 9B8<> 10C3<>
MEM_DATA<42> 9B8<> 10C3<>
MEM_DATA<43> 9B8<> 10C3<>
MEM_DATA<44> 9B8<> 10C3<>
MEM_DATA<45> 9B8<> 10B3<>
MEM_DATA<46> 9B8<> 10B3<>
MEM_DATA<47> 9B8<> 10B3<>
MEM_DATA<48> 9B8<> 10C1<>
MEM_DATA<55..48> 36B5>
MEM_DATA<49> 9B8<> 10C1<>
MEM_DATA<50> 9B8<> 10C1<>
MEM_DATA<51> 9B8<> 10C1<>
MEM_DATA<52> 9B8<> 10C1<>
MEM_DATA<53> 9B8<> 10C1<>
MEM_DATA<54> 9B8<> 10C1<>
MEM_DATA<55> 9B8<> 10C1<>
MEM_DATA<56> 9B8<> 10C1<>
MEM_DATA<63..56> 36A5>
MEM_DATA<57> 9B8<> 10C1<>
MEM_DATA<58> 9B8<> 10C1<>
MEM_DATA<59> 9B8<> 10C1<>
MEM_DATA<60> 9B8<> 10C1<>
MEM_DATA<61> 9B8<> 10B1<>
MEM_DATA<62> 9B8<> 10B1<>
MEM_DATA<63> 9B8<> 10B1<>
MEM_DQM<0> 9C6<> 10C7<> 36C5>
MEM_DQM<1> 9C6<> 10B7<> 36C5>
MEM_DQM<2> 9C6<> 10C5<>
MEM_DQM<3..2> 36B5>
MEM_DQM<3> 9C6<> 10B5<>
MEM_DQM<4> 9C6<> 10C3<>
MEM_DQM<5..4> 36B5>
MEM_DQM<5> 9C6<> 10B3<>
MEM_DQM<6> 9C6<> 10C1<> 36B5>
MEM_DQM<7> 9C6<> 10B1<> 36A5>
MEM_DQS<0> 9C6<> 10C7<> 36C5>
MEM_DQS<1> 9C6<> 10B7<> 36C5>
MEM_DQS<2> 9C6<> 10C5<>
MEM_DQS<3..2> 36B5>
MEM_DQS<3> 9C6<> 10B5<>
MEM_DQS<4> 9C6<> 10C3<>
MEM_DQS<5..4> 36B5>
MEM_DQS<5> 9C6<> 10B3<>
MEM_DQS<6> 9C6<> 10C1<> 36B5>
MEM_DQS<7> 9C6<> 10B1<> 36A5>
MEM_MUXSEL_H<0> 9B6<> 10A6<
MEM_MUXSEL_H<1..0> 36A5>
MEM_MUXSEL_H<1> 9B6<> 10A4<
MEM_MUXSEL_L<0> 9B6<> 10A6<
MEM_MUXSEL_L<1..0> 36A5>
MEM_MUXSEL_L<1> 9B6<> 10A4<
MEM_RAS_L 9A5< 9C6<> 36A5>
MEM_WE_L 9A5< 9C6<> 36A5>
MLB_ALS_GAIN_SW 23C4<> 23C8<>
MLB_ALS_OP_COMP 23D7<
MLB_ALS_OP_IN 23D7<
MLB_ALS_OUT 23C4<> 23D6<
MLB_ALS_OUT_FB 23D7<>
MLB_PHOTODIODE 23D8<>
MODEM_USB_DM 14B1< 25C3<> 37A2> 39B6>
MODEM_USB_DP 14B1< 25C3<> 37A2> 39B6>
MOD_BITCLK 14A2< 25C3<> 39B1>
MOD_CLKOUT 14A2< 25C4<> 39A1>
MOD_DTO 14A2< 25C4<> 39A1>
MOD_SYNC 14A2< 25C3<> 39A1>
MPIC_CPU_INT_L 5B2< 5B3< 14B5>
NEC_AMC_TP 26A5<
NEC_AVDD 26D6< 38A3>
NEC_AVSS_F 26A5< 26B4<
NEC_CRUN_L 26A7<>
NEC_IDSEL 26B7<
NEC_IO_RESET_L 26B7< 26B7<
NEC_LEFT_USB_OVERCURRENT 24B2<> 26C1< 39D1>
NEC_LEFT_USB_PWREN 24B2<> 26B5<> 39D1>
NEC_LEGC 26A7<
NEC_MAIN_RESET_L 26A7< 26B7<
NEC_NANDTESTEN_TP 26A5<
NEC_NANDTESTOUT_TP 26A4<>
NEC_NC1_TP 26B5<>
NEC_NC2_TP 26B5<>
NEC_OCI<1> 26B5< 26C3<
NEC_OCI<2> 26B5< 26C3<
NEC_OCI<3> 26B5<
NEC_OCI<4> 26B5<
NEC_OCI<5> 26B5<
NEC_PCI_INTA_L 26A7< 26B7>
NEC_PCI_INTB_L 26A7< 26B7>
NEC_PCI_INTC_L 26A7< 26B7>
NEC_PCI_PERR_L 26B7<> 26C8<
NEC_PCI_SERR_L 26B7> 26C8<
NEC_PME_L 26A7> 26B7<
NEC_PPON3_TP 26B5>
NEC_PPON4_TP 26B5>
NEC_PPON5_TP 26B5>
NEC_RIGHT_USB_OVERCURRENT 26C1< 32A7<> 39C1>
NEC_RIGHT_USB_PWREN 26B5<> 32A7<> 39C1>
NEC_RREF 26B5<>
NEC_SMI_L_TP 26A7>
NEC_USB_DAM 26B4< 26C3<> 37B2>
NEC_USB_DAP 26A4< 26C3<> 37B2>
NEC_USB_DBM 26A4< 26C3<> 37B2>
NEC_USB_DBP 26A4< 26C3<> 37B2>
NEC_USB_RSDM1 26C5<> 37B2>
NEC_USB_RSDM2 26C5<> 37B2>
NEC_USB_RSDP1 26C5<> 37B2>
NEC_USB_RSDP2 26C5<> 37B2>
NEC_XT1 26D5< 36B1>
NEC_XT2 26D5<> 36B1>
NEC_XT2_R 26D4<
NTEST1_TP 26B5<
NUMLOCK_LED 23B8<
NUMLOCK_LED_L 23B8< 30C7<
OVER_18V_ADJ 31C3<>
PCI1510_VR_EN_L 17C7<
PCI_AD<0> 9C3< 12D6<> 17C7<> 24B5<> 26D7<>
39B6>
PCI_AD<31..0> 37C5>
PCI_AD<1> 9C3< 12D6<> 17C7<> 24B6<> 26D7<>
39A6>
PCI_AD<2> 9C3< 12D6<> 17C7<> 24C5<> 26D7<>
39A6>
PCI_AD<3> 9C3< 12D6<> 17C7<> 24C6<> 26C7<>
39A6>
PCI_AD<4> 9C3< 12D6<> 17C7<> 24C5<> 26C7<>
39A6>
PCI_AD<5> 9C3< 12D6<> 17C7<> 24C6<> 26C7<>
39A6>
PCI_AD<6> 9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39A6>
PCI_AD<7> 9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
PCI_AD<8> 9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
PCI_AD<9> 9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39D5>
PCI_AD<10> 9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
PCI_AD<11> 9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39D5>
PCI_AD<12> 9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
PCI_AD<13> 9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39C5>
PCI_AD<14> 9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39C5>
PCI_AD<15> 9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39C5>
PCI_AD<16> 9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39C5>
PCI_AD<17> 9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39C5>
PCI_AD<18> 9C3< 12C6<> 17B7<> 24C5<> 24D4<
26C7<> 39C5>
PCI_AD<19> 9C3< 12C6<> 17B7<> 24C6<> 26C7<>
39C5>
PCI_AD<20> 9B3< 12C6<> 17B7<> 24C5<> 26C7<>
39C5>
PCI_AD<21> 12C6<> 17B7<> 24C6<> 26C7<> 39C5>
PCI_AD<22> 12C6<> 17B7<> 24C5<> 26C7<> 39B5>
PCI_AD<23> 12C6<> 17B7<> 24C6<> 26C7<> 39B5>
PCI_AD<24> 9C1<> 12C6<> 17B7<> 24C5<> 26C7<>
39B5>
PCI_AD<25> 9C1<> 12C6<> 17B7<> 24C6<> 26C7<>
39B5>
PCI_AD<26> 9C1<> 12C6<> 17B7<> 24C5<> 26C7<>
39B5>
PCI_AD<27> 9C1<> 12C6<> 17B7<> 24D6<> 26C8<>
39B5>
PCI_AD<28> 9C1<> 12C6<> 17B7<> 24C5<> 26C7<>
39B5>
PCI_AD<29> 9C1<> 12C6<> 17B7<> 24D6<> 26B7<>
39B5>
PCI_AD<30> 9C1<> 12C6<> 17B7<> 24D5<> 26B7<>
39B5>
PCI_AD<31> 9C1<> 12C6<> 17B7<> 24D6<> 26B7<>
39A5>
PCI_CBE<0> 12C7<> 17B7<> 24C5<> 26B7<> 39D4>
PCI_CBE<3..0> 37C5>
PCI_CBE<1> 12C7<> 17B7<> 24C6<> 26B7<> 39D4>
PCI_CBE<2> 12C7<> 17B7<> 24C6<> 26B7<> 39D4>
PCI_CBE<3> 12C7<> 17B7<> 24C6<> 26B7<> 39D4>
PCI_DEVSEL_L 12B7< 12C7<> 17A7<> 24C5<> 26B7<>
37C5> 39A5>
PCI_FRAME_L 12B7< 12C7<> 17B7<> 24C5<> 26B7<>
37C5> 39A5>
www.kythuatvitinh.com
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 42
PCI_IRDY_L 12B7< 12C7<> 17B7<> 24C6<> 26B7<>
37C5> 39A5>
PCI_PAR 12C7<> 17B7<> 24C5<> 26B7<> 37C5>
39D4>
PCI_STOP_L 12A7< 12C7<> 17B7<> 24C5<> 26B7<>
37C5> 39A5>
PCI_TRDY_L 12B7< 12C7<> 17A7<> 24C5<> 26B7<>
37C5> 39A5>
PLL_STOP_L 7C4<> 7C8<>
PMU_ACK_L 14C2< 30C4<>
PMU_AC_DET 30A4< 30B4<>
PMU_AC_IN 30B4<>
PMU_BATT0_DET_L 30B4<>
PMU_BATT1_DET_L_PU 30B4<> 30D2<
PMU_BATT_DET_L 30B3< 30D2< 31A4<> 39C3>
PMU_BYTE 30B6< 30C7<
PMU_CAPSLOCK_LED_L 30C6<>
PMU_CHARGE_V 30C4<> 31B8<>
PMU_CHRG_BATT_0 30C4<> 31A8<>
PMU_CLK 14C2<> 30C4<>
PMU_CNVSS 30B6< 30C7<
PMU_CPU_HRESET_L 23A4< 23C4<> 30C4<>
PMU_EPM 30D2< 30D4<>
PMU_FROM_INT 14C2<> 30C4<>
PMU_I2C_CLK 30B4<> 30C2<
PMU_I2C_DATA 30B4<> 30C2<
PMU_INT_L 14B5<> 14B7< 30B6<>
PMU_INT_NMI 14B5<> 14B7< 30D4<>
PMU_KB_RESET_IN1 30A7<>
PMU_KB_RESET_IN2 30A7<>
PMU_KB_RESET_L 30A6> 30B7< 39B2>
PMU_LID_CLOSED_L 23A8< 23C4<> 30B2< 30C4<>
PMU_NMI_BUTTON_L 25C1< 30C2< 30C4<>
PMU_NMI_L 30C2< 30C4<>
PMU_NUMLOCK_LED_L 30C6<>
PMU_OOPS 30B2< 30B4<>
PMU_PME_L 14B5<> 26B8< 30B2< 30C4<>
PMU_POWERUP_OK 30B4<> 30D2<
PMU_POWER_UP_L 29C7<> 30C6<> 30D7< 33B8<
PMU_REQ_L 14B7< 14C2> 30C4<>
PMU_RESET_BUTTON_L 25B1< 30C4<> 30D2<
PMU_RESET_L 30B6<>
PMU_SLEEP_LED 23C4<>
PMU_SLEEP_LED_L 23C2<> 30C4<>
PMU_SMB_CLK 30B4<> 30C2< 31A3<
PMU_SMB_DATA 30B4<> 30C2< 31A2<
PMU_TO_INT 14C2<> 30C4<>
POWER_UP 29C7<>
POWER_VALID 30B2< 30C4<>
PWR_BUTTON_L 23A7<> 25C2< 39B2>
RAM_ADDR<0> 9B4< 11B5<> 11B6<>
RAM_ADDR<12..0> 36A5>
RAM_ADDR<1> 9B4< 11B3<> 11B8<>
RAM_ADDR<2> 9B4< 11B5<> 11B6<>
RAM_ADDR<3> 9B4< 11B3<> 11B8<>
RAM_ADDR<4> 9B4< 11B5<> 11B6<>
RAM_ADDR<5> 9B4< 11B3<> 11B8<>
RAM_ADDR<6> 9B4< 11B5<> 11B6<>
RAM_ADDR<7> 9B4< 11B3<> 11B8<>
RAM_ADDR<8> 9B4< 11B5<> 11B6<>
RAM_ADDR<9> 9A4< 11B3<> 11B8<>
RAM_ADDR<10> 9A4< 11B3<> 11B8<>
RAM_ADDR<11> 9A4< 11B5<> 11B6<>
RAM_ADDR<12> 9A4< 11B3<> 11B8<>
RAM_BA<0> 9A4< 11B3<> 11B8<>
RAM_BA<1..0> 36A5>
RAM_BA<1> 9A4< 11B5<> 11B6<>
RAM_CAS_L 9A4< 11B5<> 11B6<> 36A5>
RAM_CKE<0> 9A3< 9C4< 11B6<>
RAM_CKE<3..0> 36A5>
RAM_CKE<1> 9A3< 9C4< 11B8<>
RAM_CKE<2> 9A3< 9C4< 11C5<>
RAM_CKE<3> 9A3< 9C4< 11C3<>
RAM_CS_L<0> 9C4< 11B8<>
RAM_CS_L<3..0> 36A5>
RAM_CS_L<1> 9C4< 11B6<>
RAM_CS_L<2> 9C4< 11B3<>
RAM_CS_L<3> 9C4< 11B5<>
RAM_DATA_A<0> 10C8<> 11D8<>
RAM_DATA_A<7..0> 36C5>
RAM_DATA_A<1> 10C8<> 11D8<>
RAM_DATA_A<2> 10C8<> 11D8<>
RAM_DATA_A<3> 10B8<> 11D8<>
RAM_DATA_A<4> 10B8<> 11D6<>
RAM_DATA_A<5> 10B8<> 11D6<>
RAM_DATA_A<6> 10B8<> 11D6<>
RAM_DATA_A<7> 10B8<> 11D6<>
RAM_DATA_A<8> 10B8<> 11D8<>
RAM_DATA_A<15..8> 36C5>
RAM_DATA_A<9> 10C7<> 11D8<>
RAM_DATA_A<10> 10C7<> 11D8<>
RAM_DATA_A<11> 10C7<> 11D8<>
RAM_DATA_A<12> 10C7<> 11D6<>
RAM_DATA_A<13> 10C7<> 11D6<>
RAM_DATA_A<14> 10C7<> 11D6<>
RAM_DATA_A<15> 10C7<> 11D6<>
RAM_DATA_A<16> 10C6<> 11D8<>
RAM_DATA_A<31..16> 36B5>
RAM_DATA_A<17> 10C6<> 11C8<>
RAM_DATA_A<18> 10C6<> 11C8<>
RAM_DATA_A<19> 10B6<> 11C8<>
RAM_DATA_A<20> 10B6<> 11D6<>
RAM_DATA_A<21> 10B6<> 11C6<>
RAM_DATA_A<22> 10B6<> 11C6<>
RAM_DATA_A<23> 10B6<> 11C6<>
RAM_DATA_A<24> 10B6<> 11C8<>
RAM_DATA_A<25> 10C5<> 11C8<>
RAM_DATA_A<26> 10C5<> 11C8<>
RAM_DATA_A<27> 10C5<> 11C8<>
RAM_DATA_A<28> 10C5<> 11C6<>
RAM_DATA_A<29> 10C5<> 11C6<>
RAM_DATA_A<30> 10C5<> 11C6<>
RAM_DATA_A<31> 10C5<> 11C6<>
RAM_DATA_A<32> 10C4<> 11B8<>
RAM_DATA_A<47..32> 36B5>
RAM_DATA_A<33> 10C4<> 11B8<>
RAM_DATA_A<34> 10C4<> 11B8<>
RAM_DATA_A<35> 10C4<> 11B8<>
RAM_DATA_A<36> 10B4<> 11B6<>
RAM_DATA_A<37> 10B4<> 11B6<>
RAM_DATA_A<38> 10B4<> 11B6<>
RAM_DATA_A<39> 10B4<> 11B6<>
RAM_DATA_A<40> 10B4<> 11B8<>
RAM_DATA_A<41> 10D3<> 11B8<>
RAM_DATA_A<42> 10C3<> 11A8<>
RAM_DATA_A<43> 10C3<> 11A8<>
RAM_DATA_A<44> 10C3<> 11B6<>
RAM_DATA_A<45> 10C3<> 11B6<>
RAM_DATA_A<46> 10C3<> 11A6<>
RAM_DATA_A<47> 10C3<> 11A6<>
RAM_DATA_A<48> 10C2<> 11A8<>
RAM_DATA_A<55..48> 36B5>
RAM_DATA_A<49> 10C2<> 11A8<>
RAM_DATA_A<50> 10C2<> 11A8<>
RAM_DATA_A<51> 10C2<> 11A8<>
RAM_DATA_A<52> 10B2<> 11A6<>
RAM_DATA_A<53> 10B2<> 11A6<>
RAM_DATA_A<54> 10B2<> 11A6<>
RAM_DATA_A<55> 10B2<> 11A6<>
RAM_DATA_A<56> 10B2<> 11A8<>
RAM_DATA_A<63..56> 36A5>
RAM_DATA_A<57> 10D1<> 11A8<>
RAM_DATA_A<58> 10C1<> 11A8<>
RAM_DATA_A<59> 10C1<> 11A8<>
RAM_DATA_A<60> 10C1<> 11A6<>
RAM_DATA_A<61> 10C1<> 11A6<>
RAM_DATA_A<62> 10C1<> 11A6<>
RAM_DATA_A<63> 10C1<> 11A6<>
RAM_DATA_B<0> 10C8<> 11D3<>
RAM_DATA_B<7..0> 36C5>
RAM_DATA_B<1> 10C8<> 11D3<>
RAM_DATA_B<2> 10C8<> 11D3<>
RAM_DATA_B<3> 10C8<> 11D3<>
RAM_DATA_B<4> 10C8<> 11D5<>
RAM_DATA_B<5> 10C8<> 11D5<>
RAM_DATA_B<6> 10C8<> 11D5<>
RAM_DATA_B<7> 10C8<> 11D5<>
RAM_DATA_B<8> 10C8<> 11D3<>
RAM_DATA_B<15..8> 36C5>
RAM_DATA_B<9> 10C8<> 11D3<>
RAM_DATA_B<10> 10C8<> 11D3<>
RAM_DATA_B<11> 10C8<> 11D3<>
RAM_DATA_B<12> 10C8<> 11D5<>
RAM_DATA_B<13> 10C8<> 11D5<>
RAM_DATA_B<14> 10C8<> 11D5<>
RAM_DATA_B<15> 10C8<> 11D5<>
RAM_DATA_B<16> 10C6<> 11D3<>
RAM_DATA_B<31..16> 36B5>
RAM_DATA_B<17> 10C6<> 11C3<>
RAM_DATA_B<18> 10C6<> 11C3<>
RAM_DATA_B<19> 10C6<> 11C3<>
RAM_DATA_B<20> 10C6<> 11D5<>
RAM_DATA_B<21> 10C6<> 11C5<>
RAM_DATA_B<22> 10C6<> 11C5<>
RAM_DATA_B<23> 10C6<> 11C5<>
RAM_DATA_B<24> 10C6<> 11C3<>
RAM_DATA_B<25> 10C6<> 11C3<>
RAM_DATA_B<26> 10C6<> 11C3<>
RAM_DATA_B<27> 10C6<> 11C3<>
RAM_DATA_B<28> 10C6<> 11C5<>
RAM_DATA_B<29> 10C6<> 11C5<>
RAM_DATA_B<30> 10C6<> 11C5<>
RAM_DATA_B<31> 10C6<> 11C5<>
RAM_DATA_B<32> 10D4<> 11B3<>
RAM_DATA_B<47..32> 36B5>
RAM_DATA_B<33> 10C4<> 11B3<>
RAM_DATA_B<34> 10C4<> 11B3<>
RAM_DATA_B<35> 10C4<> 11B3<>
RAM_DATA_B<36> 10C4<> 11B5<>
RAM_DATA_B<37> 10C4<> 11B5<>
RAM_DATA_B<38> 10C4<> 11B5<>
RAM_DATA_B<39> 10C4<> 11B5<>
RAM_DATA_B<40> 10C4<> 11B3<>
RAM_DATA_B<41> 10C4<> 11B3<>
RAM_DATA_B<42> 10C4<> 11A3<>
RAM_DATA_B<43> 10C4<> 11A3<>
RAM_DATA_B<44> 10C4<> 11B5<>
RAM_DATA_B<45> 10C4<> 11B5<>
RAM_DATA_B<46> 10C4<> 11A5<>
RAM_DATA_B<47> 10C4<> 11A5<>
RAM_DATA_B<48> 10D2<> 11A3<>
RAM_DATA_B<55..48> 36B5>
RAM_DATA_B<49> 10C2<> 11A3<>
RAM_DATA_B<50> 10C2<> 11A3<>
RAM_DATA_B<51> 10C2<> 11A3<>
RAM_DATA_B<52> 10C2<> 11A5<>
RAM_DATA_B<53> 10C2<> 11A5<>
RAM_DATA_B<54> 10C2<> 11A5<>
RAM_DATA_B<55> 10C2<> 11A5<>
RAM_DATA_B<56> 10C2<> 11A3<>
RAM_DATA_B<63..56> 36A5>
RAM_DATA_B<57> 10C2<> 11A3<>
RAM_DATA_B<58> 10C2<> 11A3<>
RAM_DATA_B<59> 10C2<> 11A3<>
RAM_DATA_B<60> 10C2<> 11A5<>
RAM_DATA_B<61> 10C2<> 11A5<>
RAM_DATA_B<62> 10C2<> 11A5<>
RAM_DATA_B<63> 10C2<> 11A5<>
RAM_DQM_A<0> 10B8<> 11D6<> 36C5>
RAM_DQM_A<1> 10C7<> 11D6<> 36C5>
RAM_DQM_A<2> 10B6<> 11C6<>
RAM_DQM_A<3..2> 36B5>
RAM_DQM_A<3> 10C5<> 11C6<>
RAM_DQM_A<4> 10B4<> 11B6<>
RAM_DQM_A<5..4> 36B5>
RAM_DQM_A<5> 10C3<> 11A6<>
RAM_DQM_A<6> 10B2<> 11A6<> 36B5>
RAM_DQM_A<7> 10C1<> 11A6<> 36A5>
RAM_DQM_B<0> 10C8<> 11D5<> 36C5>
RAM_DQM_B<1> 10C8<> 11D5<> 36C5>
RAM_DQM_B<2> 10C6<> 11C5<>
RAM_DQM_B<3..2> 36B5>
RAM_DQM_B<3> 10C6<> 11C5<>
RAM_DQM_B<4> 10C4<> 11B5<>
RAM_DQM_B<5..4> 36B5>
RAM_DQM_B<5> 10C4<> 11B5<>
RAM_DQM_B<6> 10C2<> 11A5<> 36B5>
RAM_DQM_B<7> 10C2<> 11A5<> 36A5>
RAM_DQS_A<0> 10B8<> 11D8<> 36C5>
RAM_DQS_A<1> 10C7<> 11D8<> 36C5>
RAM_DQS_A<2> 10B6<> 11C8<>
RAM_DQS_A<3..2> 36B5>
RAM_DQS_A<3> 10C5<> 11C8<>
RAM_DQS_A<4> 10B4<> 11B8<>
RAM_DQS_A<5..4> 36B5>
RAM_DQS_A<5> 10C3<> 11A8<>
RAM_DQS_A<6> 10B2<> 11A8<> 36B5>
RAM_DQS_A<7> 10C1<> 11A8<> 36A5>
RAM_DQS_B<0> 10C8<> 11D3<> 36C5>
RAM_DQS_B<1> 10C8<> 11D3<> 36C5>
RAM_DQS_B<2> 10C6<> 11C3<>
RAM_DQS_B<3..2> 36B5>
RAM_DQS_B<3> 10C6<> 11C3<>
RAM_DQS_B<4> 10C4<> 11B3<>
RAM_DQS_B<5..4> 36B5>
RAM_DQS_B<5> 10C4<> 11B3<>
RAM_DQS_B<6> 10C2<> 11A3<> 36B5>
RAM_DQS_B<7> 10C2<> 11A3<> 36A5>
RAM_MUXSEL_H 10A3< 10A5< 10B1<> 10B3<> 36A5>
RAM_MUXSEL_L 10A3< 10A5< 10B5<> 10B7<> 36A5>
RAM_RAS_L 9A4< 11B5<> 11B6<> 36A5>
RAM_WE_L 9A4< 11B3<> 11B8<> 36A5>
RF_DISABLE_L_SPN 24D6<> 39C1>
RIGHT_USB_DM 26A3< 32A7<> 37A2> 39D1>
RIGHT_USB_DP 26A3< 32A7<> 37A2> 39D1>
RJ45_C0_PD 27B2<>
RJ45_C1_PD 27B2<>
RJ45_C2_PD 27B2<>
RJ45_C3_PD 27B2<>
RJ45_DN<0> 27B2<> 37D2> 39B3>
RJ45_DN<1> 27B2<> 37D2> 39B3>
RJ45_DN<2> 27B2<> 37D2> 39A3>
RJ45_DN<3> 27B2<> 37D2> 39A3>
RJ45_DP<0> 27B2<> 37D2> 39B3>
RJ45_DP<1> 27B2<> 37D2> 39B3>
RJ45_DP<2> 27B2<> 37D2> 39A3>
RJ45_DP<3> 27B2<> 37D2> 39A3>
ROM_CS_L 9B3< 12A5< 24B6<> 39B1>
ROM_OE_L 9B3< 12A5< 24C5<> 39B1>
ROM_ONBOARD_CS_L 9B3< 24C6<> 39B1>
ROM_RW_L 9B3< 12A5< 24C6<> 39B1>
ROM_WP_L 9B3<
RSDM3_TP 26C5>
RSDM4_TP 26C5>
RSDM5_TP 26C5>
RSDP3_TP 26C5>
RSDP4_TP 26C5>
RSDP5_TP 26C5>
RUN_OR_AC 29C6<>
SI_A2 20B7<
SI_DDC_CLK 19C5<> 20B7<
SI_DDC_DATA 19C5<> 20B7<
SI_EDGE 20B7<
SI_MSEN 20B5<>
SI_PD 20B7<
SI_RST 20B7<
SI_TMDS_CLKN 20B5<> 20C4<
SI_TMDS_CLKP 20B5<> 20C4<
SI_TMDS_DN<0> 20B5<> 20C4<
SI_TMDS_DN<1> 20B5<> 20C4<
SI_TMDS_DN<2> 20A5<> 20B4<
SI_TMDS_DP<0> 20B5<> 20C4<
SI_TMDS_DP<1> 20B5<> 20C4<
SI_TMDS_DP<2> 20A5<> 20B4<
SI_VREF 20A5< 20A7<
SLEEP 23C4<> 25C6<> 30B6<> 30D7< 33A4<
33A6< 33B3< 33B8<> 35B3< 35D2< 39A1>
SLEEP_LED 23C1< 25C7<> 39B6>
SLEEP_LED_I 23D1<
SLEEP_LED_L 23D2<
SLEEP_LED_SW_L 23C2<>
SLEEP_LED_UF 23C1<
SLEEP_LS5 33A5<> 33A8<
SLEEP_LS5_EN_L 33A5<>
SLEEP_L_LS5 19A7<> 27A8<> 33A5<> 34C8<> 35C8<
SLEEP_L_LS5_EN_L 33A6<>
SLEEP_L_LS5_INV 35A3< 35C2< 35C8<>
SLEEP_L_LS5_NET 33B3<> 35C8<>
SLEEP_NET 33A3<>
SLEEP_NET_INV 33A3<>
SMC_TP 26B5<
SND_AGND 25C7<> 38B6>
SND_AMP_MUTE 25C8< 25D6<> 39A4>
SND_AMP_MUTE_F 25C7< 25D6<>
SND_AMP_MUTE_L 14C5<> 25D5<>
SND_CLKOUT 14B1< 25D8< 36B1> 39D6>
SND_CLKOUT_F 25C7<> 25D7<
SND_HP_MUTE 25C5<>
SND_HP_MUTE_INV 25C5<> 25C6<> 39A4>
SND_HP_MUTE_L 14C5<> 25C4<>
SND_HP_SENSE_L 14B5<> 25D6<> 39C6>
SND_HW_RESET_L 14A7< 14B5<> 25C8< 39C6>
SND_HW_RESET_L_F 25C6<> 25C7<
SND_LIN_SENSE_L 14B5<> 25D6<> 39C6>
SND_SCLK 14B1< 25C8< 36B1> 39C6>
SND_SCLK_F 25C7< 25D7<>
SND_SYNC 14B1< 25D8< 39D6>
SND_SYNC_F 25C7<> 25D7<
SND_TO_AUDIO 14B1< 25D8< 39D6>
SND_TO_AUDIO_F 25D6<> 25D7<
SOFT_PWR_ON_L 22D1< 23A8< 30A8< 30C6<> 30D7<
34A3<>
SRCLK_TP 26A5> 39A4>
SRMOD_TP 26A5< 39A4>
ST7_ICP_SEL_PD 23A2< 23D6<
ST7_KBD_LED_OUT 23A4< 23C4<>
ST7_OSC1 23D5<
ST7_OSC2 23D5<>
ST7_PB6_PD 23B2< 23C4<>
ST7_RESET_L 23D5<>
ST7_SENSOR4_SCK_PD 23B2< 23D4<>
ST7_SENSOR4_SDA_PD 23B2< 23D4<>
ST7_SENSOR5_SCK_PU 23B2< 23D4<>
ST7_SENSOR5_SDA_PU 23B2< 23D4<>
ST7_SLEEP_LED_H 23C2<> 23C4<>
ST7_XTAL_IN 23C5<
STOP_AGP_L 12D2< 12D4<>
SUPPLY_M_DM 25B6< 25B8<
SUPPLY_M_DP 25B6< 25B8<
SUTRO_ALS_GAIN_SW 23C4<> 24B2<> 39C2>
SUTRO_ALS_OUT 23C4<> 24B2<> 39C2>
SYSCLK_CPU 5C3< 8A6< 36D1>
SYSCLK_CPU_UF 8A6<> 36D1>
SYSCLK_DDRCLK_A0 9D4< 11D8<> 36D1>
SYSCLK_DDRCLK_A0_L 9D4< 11D8<> 36D1>
SYSCLK_DDRCLK_A0_L_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_A0_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_A1 9D4< 11A6<> 36D1>
SYSCLK_DDRCLK_A1_L 9D4< 11A6<> 36D1>
SYSCLK_DDRCLK_A1_L_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_A1_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_B0 9D4< 11D3<> 36D1>
SYSCLK_DDRCLK_B0_L 9C4< 11D3<> 36C1>
SYSCLK_DDRCLK_B0_L_UF 9B6<> 9C5< 36D1>
SYSCLK_DDRCLK_B0_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_B1 9D4< 11A5<> 36C1>
SYSCLK_DDRCLK_B1_L 9D4< 11A5<> 36C1>
SYSCLK_DDRCLK_B1_L_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_B1_UF 9B6<> 9D5< 36D1>
SYSCLK_LA_TP 8A6<>
SYSTEM_CLK_EN 14A5< 14B7< 30C4<>
TEB_TP 26A5< 39A4>
TEST_TP 26A5< 39A4>
THERM1_A_DM 25A6< 25A8< 37A2>
THERM1_A_DP 25A6< 25A8< 37A2>
THERM1_DM 25A5< 25B5< 25B5<> 37A2>
THERM1_DP 25A5< 25B5< 25B5<> 37A2>
THERM1_M_DM 37A2>
THERM1_M_DP 37A2>
THERM2_A_DM 25A6< 25A8< 37A2>
THERM2_A_DP 25A6< 25A8< 37A2>
THERM2_DM 25A5< 25B5< 25B5<> 37A2>
THERM2_DP 25A5< 25B5< 25B5<> 37A2>
THERM2_M_DM 37A2>
THERM2_M_DP 37A2>
THERM_INV 25A5<>
THERM_L_OC 25A4<> 30B4<>
TMDS_CLKN 20B3< 20C1< 20C3< 22B7<> 37B2>
TMDS_CLKP 20B3< 20C2< 20C3< 22C7<> 37B2>
TMDS_CLK_CMF 20C1<
TMDS_CONN_CLKN 22B6<> 22C7<> 37B2> 39A8>
TMDS_CONN_CLKP 22C6<> 22C7<> 37B2> 39D7>
TMDS_CONN_DN<0> 22C7<> 22D6<>
TMDS_CONN_DN<1> 22B7<> 22D5<>
TMDS_CONN_DN<2> 22B6<> 22D5<>
TMDS_CONN_DP<0> 22B7<> 22D6<>
TMDS_CONN_DP<1> 22B7<> 22D5<>
TMDS_CONN_DP<2> 22B6<> 22D5<>
TMDS_D0_CMF 20B1<
TMDS_D1_CMF 20B1<
TMDS_D2_CMF 20A1<
TMDS_DN<0> 20B1< 20B3< 20C3< 22C8<> 37B2>
39B8>
TMDS_DN<1> 20A3< 20B1< 20C3< 22B8<> 37B2>
39A8>
TMDS_DN<2> 20A1< 20A3< 20B3< 22B7<> 37B2>
39A8>
TMDS_DP<0> 20B2< 20B3< 20C3< 22B8<> 37B2>
39A8>
TMDS_DP<1> 20A3< 20B2< 20C3< 22B8<> 37B2>
39A8>
TMDS_DP<2> 20A2< 20A3< 20B3< 22B7<> 37B2>
39A8>
TPAD_F_RXD 23A7<> 39C4>
TPAD_F_TXD 23A7<> 39C4>
TPAD_RXD 23A8< 30C2< 30C4<>
TPAD_TXD 23A8< 30B2< 30C4<>
TPS2211_SHDN_L_PU 17C4<
TV_C 22A6<> 39D6>
TV_COMP 22A6<> 39D6>
TV_GND1 22B6<> 38B6> 39A7>
TV_GND2 22A6<> 38B6> 39A7>
TV_Y 22A6<> 39D6>
UIDE_ADDR<0> 13D7<> 24C4<
UIDE_ADDR<2..0> 37C5>
UIDE_ADDR<1> 13D7<> 24C4<
UIDE_ADDR<2> 13D7<> 24B4<
UIDE_CS0_L 13C7<> 24C4< 37C5>
UIDE_CS1_L 13C7<> 24B4< 37C5>
UIDE_DATA<0> 13D7<> 24D4<
UIDE_DATA<6..0> 37C5>
UIDE_DATA<1> 13D7<> 24D4<
UIDE_DATA<2> 13D7<> 24D4<
UIDE_DATA<3> 13D7<> 24D4<
UIDE_DATA<4> 13D7<> 24C4<
UIDE_DATA<5> 13D7<> 24C4<
UIDE_DATA<6> 13D7<> 24C4<
UIDE_DATA<7> 13D7<> 24C4< 37C5>
UIDE_DATA<8> 13D7<> 24C4<
UIDE_DATA<15..8> 37C5>
UIDE_DATA<9> 13D7<> 24C4<
UIDE_DATA<10> 13D7<> 24C4<
UIDE_DATA<11> 13D7<> 24D4<
UIDE_DATA<12> 13D7<> 24B4<
UIDE_DATA<13> 13D7<> 24B4<
UIDE_DATA<14> 13D7<> 24C4<
UIDE_DATA<15> 13D7<> 24B4<
UIDE_DIOR_L 13C7<> 24A4< 37C5>
UIDE_DIOW_L 13C7<> 24A4< 37C5>
UIDE_DMACK_L 13C7<> 24A4< 37C5>
UIDE_DMARQ 13C7<> 37C5>
UIDE_INTRQ 13C7< 37C5>
UIDE_IOCHRDY 13C7< 24A4< 37C5>
UIDE_REF 13C7<> 38D3>
UIDE_RST_L 13C7<> 24A4< 37C5>
USB2_PCI_GNT_L 12C7<> 26B7<
USB2_PCI_INT_L 14B5<> 14C7< 26A8<
USB2_PCI_REQ_L 12A7< 12D7<> 26B7>
USB_D1M 14C1< 26A5> 26B4<
USB_D1P 14C1< 26A4< 26A5>
USB_D2M 14D1< 26A4< 26A5>
USB_D2P 14D1< 26A4< 26A5>
USB_DAM 14B2<> 14D2< 26A5>
USB_DAP 14B2<> 14D2< 26A5>
USB_DBM 14B2<> 14D2<
USB_DBP 14B2<> 14D2<
USB_DCM 14B2<> 14C2< 26A5>
USB_DCP 14B2<> 14C2< 26A5>
USB_DDM 14B2<> 14C2<
USB_DDP 14B2<> 14C2<
USB_DEM 14B2< 14B2<> 37B2>
USB_DEP 14B2<> 14C2< 37B2>
USB_DFM 14B2< 14B2<> 37B2>
USB_DFP 14B2< 14B2<> 37B2>
USB_OC_AB_L 14B2< 14C7<
USB_OC_CD_L 14B2< 14C7<
USB_OC_EF_L 14B2< 14D7<
USB_PWREN_AB_L 14B2<> 14C7<
USB_PWREN_CD_L 14B2<> 14C7<
USB_PWREN_EF_L 14B2<> 14D7<
VCORE_BOOST 34C4<> 38C1>
VCORE_BST 34C5<> 38C1>
VCORE_CC 34B6<> 38B1>
VCORE_CNTL_RC 19A3<>
VCORE_DH 34B5<> 38C1>
VCORE_DL 34B5<> 38C1>
VCORE_FAST<1> 34D3< 34D5<
VCORE_FAST<2> 34D3< 34D5<
VCORE_FAST<3> 34D3< 34D5<
VCORE_FAST<4> 34D3< 34D5<
VCORE_FB 34B5< 38B1> 39A2>
VCORE_GND 34B5<> 38B1>
VCORE_GNDA 34B6<>
VCORE_GNDDIV 34A4< 34B5< 38B1>
VCORE_GNDDIV_TEST 34A3<>
VCORE_GNDSNS 34A2<> 34A4< 38B1>
VCORE_GNDSNS_TEST 34A3<>
VCORE_ILIM 34C6<> 38C1>
VCORE_LX 34B5<> 38C1>
VCORE_MUX_EN 34D5<> 39A2>
VCORE_MUX_SEL 34D5<>
VCORE_REF 34B6<> 38C1>
VCORE_SEL_OFF_PU 34B6<>
VCORE_SEL_ON 34B6<>
VCORE_SHDN_L 34C6<>
VCORE_SLOW<1> 34D6<
VCORE_SLOW<2> 34D6<
VCORE_SLOW<3> 34D6<
VCORE_SLOW<4> 34D6<
VCORE_SNS 34A1<> 38B1>
VCORE_TIME 34B4<> 38B1>
VCORE_TON 34B6< 38C1>
VCORE_VCC 34C6< 38C1>
VCORE_VGATE 14B5< 14B7< 34B4> 38B1>
VCORE_VID0 39A3>
VCORE_VID1 39A3>
VCORE_VID2 39A3>
VCORE_VID3 39A3>
VCORE_VID4 39A3>
VCORE_VID<0> 34A2<> 34B8<
VCORE_VID<1> 34A2<> 34B8< 34D4<>
VCORE_VID<2> 34A2<> 34B8< 34D4<>
VCORE_VID<3> 34A2<> 34B8< 34D4<>
VCORE_VID<4> 34A2<> 34B8< 34D4<>
VGA_B 22C6<> 22D7< 39D7>
VGA_G 22C5<> 22D7< 39D7>
VGA_HSYNC 22C6<> 22C7< 39D7>
VGA_HSYNC_BUF 22C8<>
VGA_R 22C5<> 22D7< 39D7>
VGA_VSYNC 22C5<> 22C7< 39D7>
VGA_VSYNC_BUF 22C8<>
ZV_LCDDATA20_PU 19C7<>
051-6531 B
4442
www.kythuatvitinh.com
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43
*** Part Cross-Reference for the entire design ***
BS1 PCB_STANDOFF 4
C1 CAP 22
C2 CAP 34
C3 CAP 34
C4 CAP 34
C5 CAP 34
C6 CAP 34
C7 CAP 34
C8 CAP 5
C9 CAP 16
C10 CAP 16
C11 CAP 18
C12 CAP 5
C13 CAP 34
C14 CAP 20
C15 CAP 14
C16 CAP 16
C17 CAP 16
C18 CAP 16
C19 CAP 16
C20 CAP 16
C21 CAP 16
C22 CAP 16
C23 CAP 16
C24 CAP 16
C25 CAP 5
C26 CAP 16
C27 CAP 16
C28 CAP 16
C29 CAP 16
C30 CAP 16
C31 CAP 16
C32 CAP 16
C33 CAP 16
C34 CAP 16
C35 CAP 16
C36 CAP 16
C37 CAP 18
C38 CAP 5
C39 CAP 5
C40 CAP 5
C41 CAP 5
C42 CAP 16
C43 CAP 16
C44 CAP 16
C45 CAP 16
C46 CAP 5
C47 CAP 5
C48 CAP 5
C49 CAP 16
C50 CAP 16
C51 CAP 16
C52 CAP 16
C53 CAP 16
C54 CAP 16
C55 CAP 16
C56 CAP 16
C57 CAP 16
C58 CAP 16
C59 CAP 16
C60 CAP 16
C61 CAP 16
C62 CAP 18
C63 CAP 18
C64 CAP 18
C65 CAP 18
C66 CAP 18
C67 CAP 18
C68 CAP 18
C69 CAP 18
C70 CAP 18
C71 CAP 18
C72 CAP 5
C73 CAP 5
C74 CAP 5
C75 CAP 16
C76 CAP 16
C77 CAP 18
C78 CAP 18
C79 CAP 20
C80 CAP 20
C81 CAP 20
C82 CAP 20
C83 CAP 12
C84 CAP 14
C85 CAP 14
C86 CAP 24
C87 CAP 20
C88 CAP 20
C89 CAP 20
C90 CAP 5
C91 CAP 5
C92 CAP 5
C93 CAP 35
C94 CAP 16
C95 CAP 16
C96 CAP 16
C97 CAP 14
C98 CAP 16
C99 CAP 16
C100 CAP 16
C101 CAP 16
C102 CAP 20
C103 CAP 5
C104 CAP 5
C105 CAP 5
C106 CAP 5
C107 CAP 5
C108 CAP 16
C109 CAP 16
C110 CAP 5
C111 CAP 5
C112 CAP 5
C113 CAP 5
C114 CAP 5
C115 CAP 5
C116 CAP 34
C117 CAP 16
C118 CAP 16
C119 CAP 16
C120 CAP 16
C121 CAP 16
C122 CAP 16
C123 CAP 16
C124 CAP 16
C125 CAP 16
C126 CAP 16
C127 CAP 16
C128 CAP 16
C129 CAP 20
C130 CAP 20
C131 CAP 20
C132 CAP 20
C133 CAP 20
C134 CAP 25
C135 CAP 25
C136 CAP 5
C137 CAP 5
C138 CAP 5
C139 CAP 5
C140 CAP 14
C141 CAP 16
C142 CAP 16
C143 CAP 16
C144 CAP 16
C145 CAP 16
C146 CAP 16
C147 CAP 16
C148 CAP 14
C149 CAP 5
C150 CAP 5
C151 CAP 5
C152 CAP 5
C153 CAP 5
C154 CAP 5
C155 CAP 5
C156 CAP 5
C157 CAP 16
C158 CAP 16
C159 CAP 16
C160 CAP 12
C161 CAP 16
C162 CAP 16
C163 CAP 16
C164 CAP 16
C165 CAP 20
C166 CAP 19
C167 CAP 19
C168 CAP 5
C169 CAP 5
C170 CAP 5
C171 CAP 16
C172 CAP 16
C173 CAP 16
C174 CAP 16
C175 CAP 16
C176 CAP 16
C177 CAP 16
C178 CAP 16
C179 CAP 16
C180 CAP 16
C181 CAP 16
C182 CAP 14
C183 CAP 16
C184 CAP 16
C185 CAP 16
C186 CAP 19
C187 CAP 19
C188 CAP 5
C189 CAP 5
C190 CAP 5
C191 CAP 5
C192 CAP 5
C193 CAP 5
C194 CAP 5
C195 CAP 5
C196 CAP 16
C197 CAP 16
C198 CAP 14
C199 CAP 16
C200 CAP 14
C201 CAP 5
C202 CAP 5
C203 CAP 5
C204 CAP 16
C205 CAP 16
C206 CAP 16
C207 CAP 16
C208 CAP 16
C209 CAP 16
C210 CAP 16
C211 CAP 16
C212 CAP 16
C213 CAP 16
C214 CAP 16
C215 CAP 16
C216 CAP 16
C217 CAP 16
C218 CAP 20
C219 CAP 19
C220 CAP 19
C221 CAP 19
C222 CAP 19
C223 CAP 5
C224 CAP 5
C225 CAP 5
C226 CAP 16
C227 CAP 16
C228 CAP 16
C229 CAP 16
C230 CAP 16
C231 CAP 16
C232 CAP 19
C233 CAP 20
C234 CAP 34
C235 CAP 35
C236 CAP 16
C237 CAP 16
C238 CAP 16
C239 CAP 16
C240 CAP 16
C241 CAP 16
C242 CAP 16
C243 CAP 16
C244 CAP 16
C245 CAP 9
C246 CAP 16
C247 CAP 12
C248 CAP 16
C249 CAP 16
C250 CAP 16
C251 CAP 16
C252 CAP 19
C253 CAP 19
C254 CAP 19
C255 CAP 20
C256 CAP 19
C257 CAP 5
C258 CAP 5
C259 CAP 16
C260 CAP 16
C261 CAP 16
C262 CAP 16
C263 CAP 16
C264 CAP 16
C265 CAP 16
C266 CAP 16
C267 CAP 16
C268 CAP 16
C269 CAP 19
C270 CAP 19
C271 CAP 19
C272 CAP 5
C273 CAP 5
C274 CAP 34
C275 CAP 5
C276 CAP 35
C277 CAP 16
C278 CAP 16
C279 CAP 16
C280 CAP 16
C281 CAP 16
C282 CAP 19
C284 CAP 20
C285 CAP 34
C286 CAP 16
C287 CAP 16
C288 CAP 16
C289 CAP 16
C290 CAP 16
C291 CAP 16
C292 CAP 16
C293 CAP 16
C294 CAP 16
C295 CAP 16
C296 CAP 16
C297 CAP 16
C298 CAP 16
C299 CAP 19
C300 CAP 19
C301 CAP 19
C302 CAP 19
C303 CAP 19
C304 CAP 21
C305 CAP 19
C306 CAP 19
C307 CAP 19
C308 CAP 8
C309 CAP 16
C310 CAP 16
C311 CAP 19
C312 CAP 16
C313 CAP 16
C314 CAP 16
C315 CAP 16
C316 CAP 16
C317 CAP 16
C318 CAP 16
C319 CAP 16
C320 CAP 16
C321 CAP 16
C322 CAP 16
C323 CAP 16
C324 CAP 16
C325 CAP 16
C326 CAP 19
C327 CAP 21
C328 CAP 19
C329 CAP 19
C330 CAP 19
C331 CAP 19
C332 CAP 19
C333 CAP 19
C334 CAP 16
C335 CAP 16
C336 CAP 16
C337 CAP 16
C338 CAP 19
C339 CAP 21
C340 CAP 5
C341 CAP 5
C342 CAP 5
C343 CAP 5
C344 CAP 5
C345 CAP 5
C346 CAP 5
C347 CAP 5
C348 CAP 16
C349 CAP 16
C350 CAP 16
C351 CAP 16
C352 CAP 16
C353 CAP 14
C354 CAP 16
C355 CAP 16
C356 CAP 16
C357 CAP 16
C358 CAP 21
C359 CAP 21
C360 CAP 21
C361 CAP 21
C362 CAP 21
C363 CAP 21
C364 CAP 21
C365 CAP 16
C366 CAP 16
C367 CAP 16
C368 CAP 16
C369 CAP 16
C370 CAP 16
C371 CAP 16
C372 CAP 21
C373 CAP 21
C374 CAP 21
C375 CAP 16
C376 CAP 16
C377 CAP 16
C378 CAP 16
C379 CAP 21
C380 CAP 21
C381 CAP 21
C382 CAP 21
C383 CAP 21
C384 CAP 16
C385 CAP 16
C386 CAP 16
C387 CAP 16
C388 CAP 16
C389 CAP 16
C390 CAP 16
C391 CAP 16
C392 CAP 16
C393 CAP 16
C394 CAP 16
C395 CAP 16
C396 CAP 16
C397 CAP 16
C398 CAP 16
C399 CAP 16
C400 CAP 16
C401 CAP 16
C402 CAP 16
C403 CAP 16
C404 CAP 16
C405 CAP 16
C406 CAP 16
C407 CAP 16
C408 CAP 21
C409 CAP 21
C410 CAP 16
C411 CAP 21
C412 CAP 21
C413 CAP 21
C414 CAP 21
C415 CAP 21
C416 CAP 22
C417 CAP 16
C418 CAP 16
C419 CAP 14
C420 CAP 21
C421 CAP 21
C422 CAP 16
C423 CAP 16
C424 CAP 14
C425 CAP 21
C426 CAP 21
C427 CAP_P 34
C428 CAP 21
C429 CAP 21
C430 CAP_P 34
C431 CAP_P 34
C432 CAP_P 34
C433 CAP 14
C434 CAP 21
C435 CAP 21
C436 CAP 21
C437 CAP 21
C438 CAP 21
C439 CAP 34
C440 CAP 22
C441 CAP_P 34
C442 CAP 27
C443 CAP_P 34
C444 CAP_P 34
C445 CAP_P 34
C446 CAP 21
C447 CAP 21
C448 CAP 19
C449 CAP 22
C450 CAP 21
C451 CAP 19
C452 CAP 22
C453 CAP 27
C454 CAP 27
C455 CAP 34
C456 CAP 33
C457 CAP 27
C458 CAP 31
C459 CAP 34
C460 CAP 9
C461 CAP 32
C462 CAP 32
C463 CAP 32
C464 CAP 27
C465 CAP 27
C466 CAP 27
C467 CAP 17
C468 CAP 31
C469 CAP 25
C470 CAP 9
C471 CAP 27
C472 CAP 27
C473 CAP 19
C474 CAP 22
C475 CAP 27
C476 CAP 27
C477 CAP 27
C478 CAP 25
C479 CAP 9
C480 CAP 16
C481 CAP 11
C482 CAP 11
C483 CAP 19
C484 CAP 22
C485 CAP 32
C486 CAP 27
C487 CAP 27
C488 CAP 27
C489 CAP 11
C490 CAP 11
C491 CAP 27
C492 CAP 27
C493 CAP 27
C494 CAP 19
C495 CAP 32
C496 CAP 27
C497 CAP 27
C498 CAP 34
C499 CAP 35
C500 CAP 22
C501 CAP 27
C502 CAP 27
C503 CAP 27
C504 CAP 27
C505 CAP 27
C506 CAP 27
C507 CAP 34
C508 CAP 33
C509 CAP 32
C510 CAP 32
C511 CAP 27
C512 CAP 34
C513 CAP 25
C514 CAP 19
C515 CAP 19
C516 CAP 33
C517 CAP 27
C518 CAP 34
C519 CAP 35
C520 CAP 27
C521 CAP 34
C522 CAP 11
C523 CAP 11
C524 CAP 11
C525 CAP 11
C526 CAP 11
C527 CAP 11
C528 CAP 29
C529 CAP 34
C530 CAP 11
C531 CAP 35
C532 CAP 33
C533 CAP 33
C534 CAP 33
C535 CAP 32
C536 CAP 32
C537 CAP 32
C538 CAP 28
C539 CAP 28
C540 CAP 28
C541 CAP 28
C542 CAP 11
C543 CAP 21
C544 CAP 35
C545 CAP 33
C546 CAP 28
C547 CAP 31
C548 CAP 11
C549 CAP 11
C550 CAP 11
C551 CAP 11
C552 CAP 22
C553 CAP 32
C554 CAP 32
C555 CAP 27
C556 CAP 29
C557 CAP 31
C558 CAP 30
C559 CAP 35
C560 CAP 33
C561 CAP 28
C562 CAP 31
C563 CAP 31
C564 CAP 31
C565 CAP 11
C566 CAP 33
C567 CAP 33
C568 CAP 32
C569 CAP 32
C570 CAP 28
C571 CAP 28
C572 CAP 31
C573 CAP 11
C574 CAP 30
C575 CAP 35
C576 CAP 33
C577 CAP 28
C578 CAP 31
C579 CAP 31
C580 CAP 35
C581 CAP 35
C582 CAP 35
C583 CAP 33
C584 CAP 32
C585 CAP 32
C586 CAP 28
C587 CAP 28
C588 CAP 29
C589 CAP 11
C590 CAP 33
C591 CAP 28
C592 CAP 31
C593 CAP 31
C594 CAP 11
C595 CAP 11
C596 CAP 11
C597 CAP 11
C598 CAP 33
C599 CAP 32
C600 CAP 31
C601 CAP 11
C602 CAP 11
C603 CAP 35
C604 CAP 32
C605 CAP 28
C606 CAP 29
C607 CAP 29
C608 CAP 31
C609 CAP 33
C610 CAP 33
C611 CAP 33
C612 CAP 33
C613 CAP 32
C614 CAP 28
C615 CAP 31
C616 CAP 31
C617 CAP 31
C618 CAP 31
C619 CAP 31
C620 CAP 33
C621 CAP 31
C622 CAP 31
C623 CAP 33
C624 CAP 31
C625 CAP 32
C626 CAP 32
C627 CAP 28
C628 CAP 28
C629 CAP 28
C630 CAP 31
C631 CAP 31
C632 CAP 31
C633 CAP 31
C634 CAP 28
C635 CAP 28
C636 CAP 23
C637 CAP 23
C638 CAP 23
C639 CAP 33
C640 CAP 28
C641 CAP 28
C642 CAP 28
C643 CAP 30
C644 CAP 32
C645 CAP 28
C646 CAP 28
C647 CAP 21
C648 CAP 23
C649 CAP 26
C650 CAP 28
C651 CAP 25
C652 CAP 31
C653 CAP 28
C654 CAP 23
C655 CAP 23
C656 CAP 23
C657 CAP 26
C658 CAP 31
C659 CAP 33
C660 CAP 23
C661 CAP 26
C662 CAP 33
C663 CAP 23
C664 CAP 30
C665 CAP 26
C666 CAP 30
C667 CAP 26
C668 CAP 25
C669 CAP 22
C670 CAP 23
C671 CAP 21
C672 CAP 21
C673 CAP 23
C674 CAP 34
C675 CAP 23
C676 CAP 22
C677 CAP 35
C678 CAP 25
C679 CAP 34
C680 CAP 34
C681 CAP 25
C682 CAP 34
C683 CAP 35
C684 CAP 22
C685 CAP 22
C686 CAP 14
C687 CAP 34
C688 CAP 25
C689 CAP 34
C690 CAP 25
C691 CAP 14
C692 CAP 14
C693 CAP 34
C694 CAP_P 33
C695 CAP 34
C696 CAP 22
C697 CAP 33
C698 CAP 14
C699 CAP 34
C700 CAP 33
C701 CAP 21
C702 CAP 22
C703 CAP 22
C704 CAP 21
C705 CAP 35
C706 CAP 22
C707 CAP 22
C708 CAP 19
C709 CAP 35
C710 CAP 22
C711 CAP 25
C712 CAP 22
C713 CAP 22
C714 CAP 22
C715 CAP 21
C716 CAP 21
C717 CAP 22
C718 CAP 22
C719 CAP_P 19
C720 CAP_P 19
C721 CAP_P 19
C722 CAP 21
C723 CAP 35
C724 CAP 22
C725 CAP 21
C726 CAP 35
C727 CAP 10
C728 CAP_P 34
C729 CAP_P 34
C730 CAP_P 34
C731 CAP_P 34
C732 CAP_P 34
C733 CAP_P 34
C734 CAP_P 34
C735 CAP 10
C736 CAP 10
C737 CAP 10
C738 CAP 10
C739 CAP 22
C740 CAP 35
C741 CAP 10
C742 CAP 10
C743 CAP 10
C744 CAP 22
C745 CAP_P 35
C746 CAP 22
C747 CAP 10
C748 CAP 10
C749 CAP 22
C750 CAP_P 32
C751 CAP_P 35
C752 CAP 10
C753 CAP 10
C754 CAP 27
C755 CAP 27
C756 CAP_P 33
C757 CAP 31
C758 CAP_P 32
C759 CAP 33
C760 CAP 33
C761 CAP 11
C762 CAP 19
C763 CAP 33
C764 CAP 34
C765 CAP_P 32
C766 CAP 19
C767 CAP 25
C768 CAP 34
C769 CAP_P 32
C770 CAP 33
C771 CAP 31
C772 CAP 31
C773 CAP 17
C774 CAP 29
C775 CAP 31
C776 CAP 17
C777 CAP 28
C778 CAP 28
C779 CAP 33
C780 CAP_P 35
C781 CAP 29
C782 CAP_P 35
C783 CAP 17
C784 CAP 29
C785 CAP 33
C786 CAP 29
C787 CAP 32
C788 CAP_P 35
C789 CAP 17
C790 CAP 17
C791 CAP 17
C792 CAP 29
C793 CAP_P 32
C794 CAP_P 32
C795 CAP 17
C796 CAP 17
C797 CAP 17
C798 CAP 17
C799 CAP_P 32
C800 CAP 33
C801 CAP 32
C802 CAP 31
C803 CAP 29
C804 CAP 28
C805 CAP 29
C806 CAP 33
C807 CAP 29
C808 CAP 28
C809 CAP 35
C810 CAP 28
C811 CAP 33
C812 CAP 30
C813 CAP 17
C814 CAP 23
C815 CAP 23
C816 CAP 23
C817 CAP 31
C818 CAP_P 28
C819 CAP_P 32
C820 CAP_P 32
C821 CAP_P 32
C822 CAP_P 32
C823 CAP_P 33
C824 CAP_P 31
C825 CAP_P 33
C826 CAP 33
C827 CAP 30
C828 CAP 23
C829 CAP 26
C830 CAP 26
C831 CAP 30
C832 CAP 30
C833 CAP 26
C834 CAP 26
C835 CAP 30
C836 CAP 26
C837 CAP 26
C838 CAP 26
C839 CAP 26
C840 CAP 26
C841 CAP 26
C842 CAP 26
C843 CAP 26
C844 CAP 26
C845 CAP 26
C846 CAP 25
C847 CAP 21
C848 CAP 21
C849 CAP 21
C850 CAP 21
C851 CAP 21
C852 CAP 21
C853 CAP 21
C854 CAP 21
C855 CAP 21
C856 CAP 21
C857 CAP 21
C858 CAP 21
C859 CAP 21
C860 CAP 21
C861 CAP 21
C862 CAP 21
C863 CAP 21
C864 CAP 21
C865 CAP 21
C866 CAP 21
C867 CAP 21
C868 CAP 21
C869 CAP 21
C870 CAP 21
C871 CAP 21
C872 CAP 21
C873 CAP 21
C874 CAP 21
C875 CAP 21
C876 CAP 21
C877 CAP 21
C878 CAP 21
C879 CAP 21
C880 CAP 21
C881 CAP 21
C882 CAP 19
C883 CAP 31
C884 CAP_P 34
C885 CAP_P 34
C886 CAP 35
C887 CAP 35
C888 CAP 35
C889 CAP 21
C890 CAP 35
C891 CAP 35
C892 CAP 35
C893 CAP 35
C894 CAP 35
C895 CAP 25
C896 CAP 25
C897 CAP 25
C898 CAP 25
C899 CAP 25
C900 CAP 25
C901 CAP 25
C902 CAP 19
C903 CAP 25
C904 CAP 25
C905 CAP 25
C906 CAP 31
C907 CAP 35
C908 CAP 35
D1 DIODE 27
D2 DIODE_SCHOT 34
D3 DIODE_SCHOT 32
D4 DIODE 32
D5 DIODE_SCHOT 19
D6 DIODE_SCHOT 33
D7 DIODE_SCHOT 32
D8 ZENER 29
D9 DIODE 31
D10 DIODE 31
D11 DIODE_SCHOT 32
D12 DIODE_DUAL_6P 29
D13 DIODE_SCHOT 33
D14 DIODE_SCHOT_3P2 28
D15 DIODE_DUAL_6P 29
D16 DIODE 33
D17 DIODE_SCHOT 32
D18 DIODE 32
D19 DIODE_SCHOT 32
D20 DIODE_SCHOT 28
D21 DIODE_SCHOT 22
D22 DIODE_SCHOT 33
D23 DIODE_SCHOT 35
D24 DIODE_SCHOT 19
D25 DIODE 34
D26 DIODE_DUAL_6P 29
D27 DIODE_SCHOT 32
D28 DIODE_DUAL_6P 29
D29 DIODE_SCHOT 29
D30 DIODE_SCHOT 31
D33 DIODE_SCHOT 35
D34 DIODE_SCHOT 33
DP1 DPAK3P 19
DP2 DPAK3P 34
DP3 DPAK3P 35
DP4 DPAK3P 31
DP5 DPAK3P 29
DP6 DPAK3P 19
DP7 DPAK3P 21
F1 FUSE 22
F2 FUSE 29
F3 FUSE 31
F4 FUSE 31
F5 FUSE 29
FL1 FILTER_LC 22
FL2 FILTER_LC 22
FL3 FILTER_LC 22
G1 OSC 28
G2 OSC 18
J1 CON_F1ST_S2MT_SM 14
J2 CON_3RTSM_125 25
J3 CON_F14RT_S2MT_SM 24
J4 CON_3RTSM_125 25
J5 CON_12 34
J6 CON_F30RT_S2MT_SM 22
J7 CON_4RT_WRIB 22
J8 CON_F16ST_D_SMA 25
J9 CON_M80ST_D4MT_SM 17
J10 CON_M50SM_5MM 24
J11 CON_F14RT_S2MT_SM 32
J12 CON_F30ST_D_SM 25
J13 CON_M50SM_5MM 24
J14 CON_F30RT_T6MT_TH1 22
J15 CON_F5RT_MINIDIN_TH 22
J16 CON_10STSM_5087 25
J17 CON_RJ45_SHORT_4MT_TH 27
J18 CON_M8RT_S_SM 31
J19 CON_F200RT_DDRDIMM_SM1 11
J20 CON_F80ST_D4MT_SM 24
J22 CON_F200RT_DDRDIMM_SM2 11
J23 CON_F6RT_S4MT_TH1 29
J24 CON_F40RT_S2MT_SM 23
J25 CON_M8RT_S_SM 31
J26 CON_F9RT_1394B_S6MT_SMA 29
L1 IND 14
L2 IND 18
L3 IND 18
L4 IND 18
L5 IND 27
L6 IND 22
L7 IND 28
L8 IND 31
L9 IND 31
L10 IND 31
L11 IND 23
L12 IND 31
L13 IND 20
L14 IND 20
L15 IND 20
L16 IND 21
L18 IND 14
L21 FILTER_4P 22
L22 IND 14
L23 IND 22
L24 IND 19
L25 IND 22
L26 IND 22
L27 IND 22
L28 IND 22
L29 IND 22
L30 IND_3P 19
L31 IND 22
L32 IND 22
L33 IND 22
L34 IND 27
L35 IND 35
L36 IND_3P 34
L37 IND_3P 32
L38 IND 33
L39 IND 29
L40 IND 29
L41 IND 33
L42 IND 31
L43 FILTER_4P 29
L44 FILTER_4P 29
L45 IND 35
L46 IND 23
L47 IND 23
L48 IND 23
L49 IND 23
L50 IND 29
L51 IND 28
L52 IND 23
L53 IND 31
L54 IND 26
L55 IND 21
L56 IND 21
L57 IND 21
L58 IND 21
L59 IND 21
L60 IND 21
L61 IND 21
L62 IND 21
L63 IND 21
L64 IND 21
L65 IND 21
L66 IND 21
L67 IND 21
L68 IND 21
L69 IND 21
L70 FILTER_4P 29
L71 FILTER_4P 29
L72 FILTER_4P 22
L73 FILTER_4P 22
L74 FILTER_4P 22
L75 IND 35
L76 IND 25
L77 IND 25
L78 IND 25
L79 IND 25
L80 IND 25
L81 IND 25
L82 IND 25
PD1 PHOTODIODE_2P 23
Q1 TRA_2N7002DW 7
Q2 TRA_2N7002DW 7
Q3 TRA_2N7002 7
Q4 TRA_2N3904 7
Q5 TRA_2N3904 19
Q6 TRA_2N3904 19
Q7 TRA_FDG6324L 22
Q8 TRA_2N7002 22
Q9 TRA_2N7002DW 33
Q10 TRA_2N7002DW 31
Q11 TRA_SI3443DV 22
Q12 TRA_2N3904 34
Q13 TRA_SI4435DY 31
Q14 TRA_FDG6324L 32
Q15 TRA_2N7002DW 27
Q16 TRA_SI4435DY 31
Q17 TRA_2N3904 34
Q19 TRA_2N7002 35
Q20 TRA_2N7002DW 31
Q21 TRA_2N7002DW 31
Q22 TRA_2N7002 30
Q23 TRA_2N7002DW 33
Q24 TRA_SI4435DY 31
Q25 TRA_2N7002DW 29 33
Q26 TRA_2N7002DW 25
Q27 TRA_2N7002DW 31
Q28 TRA_SI3443DV 33
Q29 TRA_2N7002DW 31
Q30 TRA_2N7002DW 31
Q31 TRA_2N7002DW 25
Q32 TRA_SI3443DV 33
Q33 TRA_2N3906 23
Q35 TRA_2N7002DW 22 23
Q36 TRA_SI3446DV 25
Q37 TRA_SI3446DV 25
Q38 TRA_2N7002DW 22
Q39 TRA_2N3904 25
Q40 TRA_TP0610 22
Q41 TRA_2N7002DW 22
Q42 TRA_2N3904 22
Q43 TRA_SI3443DV 33
Q44 TRA_2N3904 22
Q45 TRA_TP0610 22
Q46 TRA_SI3446DV 35
Q47 TRA_2N3904 25
Q48 TRA_SI7892DP 19
Q49 TRA_SI7860DP 34
Q50 TRA_SI7860DP 34
Q51 TRA_SI7860DP 19
Q52 TRA_SI4888DY 33
Q53 TRA_IRF7832 34
Q54 TRA_IRF7832 34
Q55 TRA_IRF7832 34
Q56 TRA_IRF7811W 35
Q57 TRA_IRF7805 35
Q58 TRA_2N7002DW 29
Q59 TRA_IRF7805 32
Q60 TRA_IRF7811W 32
Q61 TRA_SI4888DY 33
Q62 TRA_2N3904 25
Q63 TRA_IRF7805 31
Q64 TRA_IRF7811W 31
Q65 TRA_2N7002DW 31
Q66 TRA_2N3904 25
Q67 TRA_NDS9407 29
Q68 TRA_IRF7811W 35
Q69 TRA_IRF7805 35
Q71 TRA_SI4888DY 33
Q72 TRA_SI4888DY 33
Q73 TRA_2N3906 23
Q74 TRA_2N3906 23
Q75 TRA_2N7002DW 23
Q76 TRA_SUD45P03 31
Q77 TRA_SI3446DV 19
Q78 TRA_2N7002DW 25
Q79 TRA_2N7002DW 33
Q80 TRA_2N7002DW 19
Q81 TRA_2N7002DW 33
Q82 TRA_2N7002DW 35
Q83 TRA_2N7002DW 35
Q84 TRA_SI6467BDQ 35
Q85 TRA_SI6467BDQ 35
Q86 TRA_2N7002DW 34
Q87 TRA_2N7002DW 25
R1 RES 22
R2 RES 7
R3 RES 7
R4 RES 7
R5 RES 7
R6 RES 23
R7 RES 14
R8 RES 24
R9 RES 7
R10 RES 7
R11 RES 7
R12 RES 7
R13 RES 7
R14 RES 7
R15 RES 7
R16 RES 7
R17 RES 7
R18 RES 7
R19 RES 7
R20 RES 7
R21 RES 7
R22 RES 7
R23 RES 7
R24 RES 7
R25 RES 7
R26 RES 7
R27 RES 7
R28 RES 14
R29 RES 14
R30 RES 24
R31 RES 24
R32 RES 24
R33 RES 7
R34 RES 13
R35 RES 24
R36 RES 24
R37 RES 18
R38 RES 18
R39 RES 23
R40 RES 23
R41 RES 20
R42 RES 25
R43 RES 18
R44 RES 18
R45 RES 18
R46 RES 18
R47 RES 7
R48 RES 7
R49 RES 14
R50 RES 14
R51 RES 13
R52 RES 13
R53 RES 18
R54 RES 18
R55 RES 18
R56 RES 26
R57 RES 5
R58 RES 5
R59 RES 5
R60 RES 5
R61 RES 5
R62 RES 23
R63 RES 24
R64 RES 24
R65 RES 5
R66 RES 20
R67 RES 14
R68 RES 24
R69 RES 24
R70 RES 18
R71 RES 24
R72 RES 5
R73 RES 5
R74 RES 24
R75 RES 24
R76 RES 24
R77 RES 12
R78 RES 26
R79 RES 5
R80 RES 14
R81 RES 24
R82 RES 12
R83 RES 26
R84 RES 26
R85 RES 5
R86 RES 5
R87 RES 5
R88 RES 20
R89 RES 14
R90 RES 14
R91 RES 14
R92 RES 13
R93 RES 24
R94 RES 24
R95 RES 24
R96 RES 26
R97 RES 5
R98 RES 5
R99 RES 20
R100 RES 14
R101 RES 24
R102 RES 14
R103 RES 12
R104 RES 18
R105 RES 18
R106 RES 5
R107 RES 5
R108 RES 5
R109 RES 5
R110 RES 20
R111 RES 14
R112 RES 12
R113 RES 14
R114 RES 14
R115 RES 14
R116 RES 24
R117 RES 13
R118 RES 18
R119 RES 18
R120 RES 5
R121 RES 8
R122 RES 8
R123 RES 8
R124 RES 13
R125 RES 14
R126 RES 18
R127 RES 18
R128 RES 5
R129 RES 5
R130 RES 5
R131 RES 8
R132 RES 8
R133 RES 8
R134 RES 8
R135 RES 8
R136 RES 8
R137 RES 8
R138 RES 18
R139 RES 5
R140 RES 8
R141 RES 8
R142 RES 8
R143 RES 8
R144 RES 8
R145 RES 13
R146 RES 12
R147 RES 12
R148 RES 5
R149 RES 7
R150 RES 8
R151 RES 8
R152 RES 8
R153 RES 8
R154 RES 13
R155 RES 14
R156 RES 14
R157 RES 12
R158 RES 18
R159 RES 18
R160 RES 5
R161 RES 8
R162 RES 8
R163 RES 8
R164 RES 8
R165 RES 8
R166 RES 8
R167 RES 8
R168 RES 14
R169 RES 12
R170 RES 12
R171 RES 12
R172 RES 18
R173 RES 18
R174 RES 8
R175 RES 8
R176 RES 8
R177 RES 8
R178 RES 8
R179 RES 8
R180 RES 12
R181 RES 18
R182 RES 8
R183 RES 8
R184 RES 8
R185 RES 12
R186 RES 12
R187 RES 12
R188 RES 18
R189 RES 18
R190 RES 35
R191 RES 9
R192 RES 12
R193 RES 12
R194 RES 12
R195 RES 18
R196 RES 8
R197 RES 8
R198 RES 9
R199 RES 9
R200 RES 18
R201 RES 18
R202 RES 20
R203 RES 19
R204 RES 20
R205 RES 20
R206 RES 5
R207 RES 8
R208 RES 8
R209 RES 12
R210 RES 20
R211 RES 20
R212 RES 20
R213 RES 22
R214 RES 20
R215 RES 8
R216 RES 12
R217 RES 12
R218 RES 20
R219 RES 20
R220 RES 20
R221 RES 19
R222 RES 20
R223 RES 19
R224 RES 20
R225 RES 8
R226 RES 8
R227 RES 8
R228 RES 19
R229 RES 19
R230 RES 12
R231 RES 20
R232 RES 20
R233 RES 20
R234 RES 19
R235 RES 20
R236 RES 19
R237 RES 20
R238 RES 9
R239 RES 10
R240 RES 19
R241 RES 5
R242 RES 10
R243 RES 10
R244 RES 14
R245 RES 19
R246 RES 19
R247 RES 19
R248 RES 19
R249 RES 19
R250 RES 9
R251 RES 21
R252 RES 10
R253 RES 19
R254 RES 19
R255 RES 21
R256 RES 19
R257 RES 19
R258 RES 19
R259 RES 19
R260 RES 19
R261 RES 19
R262 RES 19
R263 RES 19
R264 RES 14
R265 RES 19
R266 RES 19
R267 RES 34
R268 RES 21
R269 RES 19
R270 RES 19
R271 RES 19
R272 RES 19
R273 RES 19
R274 RES 19
R277 RES 14
R278 RES 14
R279 RES 21
R281 RES 14
R284 RES 21
R286 RES 26
R287 RES 15
R288 RES 34
R289 RES 34
R290 RES 34
R291 RES 14
R292 RES 34
R293 RES 25
R294 RES 19
R295 RES 25
R296 RES 33
R297 RES 34
R298 RES 33
R299 RES 21
R300 RES 33
R301 RES 34
R302 RES 34
R303 RES 34
R304 RES 34
R305 RES 34
R306 RES 19
R307 RES 19
R308 RES 33
R309 RES 33
R310 RES 33
R311 RES 19
R312 RES 34
R313 RES 34
R314 RES 34
R315 RES 34
R316 RES 19
R317 RES 22
R318 RES 34
R319 RES 27
R320 RES 22
R321 RES 34
R322 RES 34
R323 RES 34
R324 RES 34
R325 RES 34
R326 RES 34
R327 RES 34
R328 RES 34
R329 RES 34
R330 RES 34
R331 RES 34
R332 RES 19
R333 RES 27
R334 RES 27
R335 RES 27
R336 RES 34
R337 RES 34
R338 RES 9
R339 RES 19
R340 RES 19
R341 RES 19
R342 RES 22
R343 RES 27
R344 RES 27
R345 RES 27
R346 RES 27
R347 RES 27
R348 RES 17
R349 RES 34
R350 RES 33
R351 RES 19
R352 RES 19
R353 RES 27
R354 RES 27
R355 RES 27
R356 RES 34
R357 RES 9
R358 RES 31
R359 RES 32
R360 RES 32
R361 RES 27
R362 RES 27
R363 RES 31
R364 RES 31
R365 RES 31
R366 RES 34
R367 RES 33
R368 RES 33
R369 RES 33
R370 RES 27
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R371 RES 27
R372 RES 27
R373 RES 17
R374 RES 31
R375 RES 31
R376 RES 34
R377 RES 33
R378 RES 33
R379 RES 32
R380 RES 27
R381 RES 27
R382 RES 27
R383 RES 31
R384 RES 34
R385 RES 34
R386 RES 9
R387 RES 9
R388 RES 19
R389 RES 19
R390 RES 19
R391 RES 22
R392 RES 32
R393 RES 27
R394 RES 31
R395 RES 31
R396 RES 31
R397 RES 34
R398 RES 34
R399 RES 15
R400 RES 22
R401 RES 32
R402 RES 32
R403 RES 27
R404 RES 27
R405 RES 25
R406 RES 27
R407 RES 34
R408 RES 34
R409 RES 9
R410 RES 19
R411 RES 24
R412 RES 32
R413 RES 27
R414 RES 31
R415 RES 34
R416 RES 19
R417 RES 35
R418 RES 35
R419 RES 35
R420 RES 35
R421 RES 35
R422 RES 35
R423 RES 35
R424 RES 35
R425 RES 35
R426 RES 32
R427 RES 27
R428 RES 27
R429 RES 34
R430 RES 19
R431 RES 33
R432 RES 32
R433 RES 32
R434 RES 34
R435 RES 27
R436 RES 28
R437 RES 28
R438 RES 27
R439 RES 9
R440 RES 11
R441 RES 24
R442 RES 24
R443 RES 32
R444 RES 28
R445 RES 28
R446 RES 28
R447 RES 28
R448 RES 34
R449 RES 11
R450 RES 35
R451 RES 19
R452 RES 24
R453 RES 29
R454 RES 31
R455 RES 35
R456 RES 33
R457 RES 33
R458 RES 24
R459 RES 28
R460 RES 31
R461 RES 35
R462 RES 33
R463 RES 33
R464 RES 28
R465 RES 27
R466 RES 31
R467 RES 33
R468 RES 32
R469 RES 28
R470 RES 28
R471 RES 28
R472 RES 29
R473 RES 31
R474 RES 31
R475 RES 30
R476 RES 30
R477 RES 33
R478 RES 28
R479 RES 35
R480 RES 35
R481 RES 33
R482 RES 33
R483 RES 32
R484 RES 28
R485 RES 28
R486 RES 28
R487 RES 31
R488 RES 31
R489 RES 31
R490 RES 31
R491 RES 30
R492 RES 30
R493 RES 35
R494 RES 28
R495 RES 28
R496 RES 28
R497 RES 31
R498 RES 31
R499 RES 31
R500 RES 9
R501 RES 30
R502 RES 30
R503 RES 30
R504 RES 30
R505 RES 30
R506 RES 33
R507 RES 33
R508 RES 32
R509 RES 28
R510 RES 28
R511 RES 31
R512 RES 31
R513 RES 30
R514 RES 33
R515 RES 33
R516 RES 28
R517 RES 30
R518 RES 30
R519 RES 33
R520 RES 33
R521 RES 32
R522 RES 28
R523 RES 33
R524 RES 28
R525 RES 28
R526 RES 31
R527 RES 25
R528 RES 33
R529 RES 33
R530 RES 26
R531 RES 26
R532 RES 23
R533 RES 23
R534 RES 23
R535 RES 30
R536 RES 30
R537 RES 25
R538 RES 33
R539 RES 33
R540 RES 26
R541 RES 32
R542 RES 31
R543 RES 31
R544 RES 30
R545 RES 26
R546 RES 28
R547 RES 28
R548 RES 31
R549 RES 31
R550 RES 23
R551 RES 26
R552 RES 23
R553 RES 25
R554 RES 26
R555 RES 28
R556 RES 28
R557 RES 28
R558 RES 31
R559 RES 31
R560 RES 31
R561 RES 31
R562 RES 30
R563 RES 28
R564 RES 28
R565 RES 31
R566 RES 31
R567 RES 31
R568 RES 23
R569 RES 30
R570 RES 31
R571 RES 31
R572 RES 30
R573 RES 30
R574 RES 28
R575 RES 28
R576 RES 28
R577 RES 28
R578 RES 31
R579 RES 31
R580 RES 31
R581 RES 23
R582 RES 23
R583 RES 30
R584 RES 30
R585 RES 30
R586 RES 26
R587 RES 23
R588 RES 31
R589 RES 33
R590 RES 26
R591 RES 26
R592 RES 30
R593 RES 30
R594 RES 30
R595 RES 30
R596 RES 30
R597 RES 30
R598 RES 23
R599 RES 31
R600 RES 26
R601 RES 24
R602 RES 24
R603 RES 24
R605 RES 23
R606 RES 23
R607 RES 35
R609 RES 14
R610 RES 35
R611 RES 35
R612 RES 24
R613 RES 24
R614 RES 14
R615 RES 23
R616 RES 35
R617 RES 23
R618 RES 23
R619 RES 23
R621 RES 13
R622 RES 14
R623 RES 25
R624 RES 13
R625 RES 14
R626 RES 13
R627 RES 35
R629 RES 13
R630 RES 13
R631 RES 14
R632 RES 14
R634 RES 14
R636 RES 14
R638 RES 14
R639 RES 8
R640 RES 8
R641 RES 8
R642 RES 8
R643 RES 8
R644 RES 8
R645 RES 8
R646 RES 8
R647 RES 8
R649 RES 22
R650 RES 22
R651 RES 8
R652 RES 8
R653 RES 8
R654 RES 8
R655 RES 22
R656 RES 14
R657 RES 8
R658 RES 8
R659 RES 8
R660 RES 8
R661 RES 22
R662 RES 22
R663 RES 22
R664 RES 8
R665 RES 8
R666 RES 8
R667 RES 8
R668 RES 8
R669 RES 8
R670 RES 22
R671 RES 22
R672 RES 35
R673 RES 8
R674 RES 8
R675 RES 8
R676 RES 8
R677 RES 8
R678 RES 8
R679 RES 25
R680 RES 22
R681 RES 22
R682 RES 14
R683 RES 8
R684 RES 8
R685 RES 8
R686 RES 22
R688 RES 22
R689 RES 25
R690 RES 22
R691 RES 22
R692 RES 25
R693 RES 5
R694 RES 22
R695 RES 25
R696 RES 22
R697 RES 33
R698 RES 14
R699 RES 14
R700 RES 22
R701 RES 14
R702 RES 5
R703 RES 22
R704 RES 22
R705 RES 22
R706 RES 22
R707 RES 14
R708 RES 14
R709 RES 35
R710 RES 25
R711 RES 19
R712 RES 35
R713 RES 25
R714 RES 22
R715 RES 35
R716 RES 25
R717 RES 25
R718 RES 22
R719 RES 25
R720 RES 14
R721 RES 21
R722 RES 21
R723 RES 25
R724 RES 22
R725 RES 25
R726 RES 25
R727 RES 35
R728 RES 21
R729 RES 21
R730 RES 24
R731 RES 33
R732 RES 34
R733 RES 27
R734 RES 31
R735 RES 27
R736 RES 29
R737 RES 29
R738 RES 31
R739 RES 31
R740 RES 28
R741 RES 29
R742 RES 31
R743 RES 29
R744 RES 31
R745 RES 24
R746 RES 31
R747 RES 31
R748 RES 31
R749 RES 31
R750 RES 17
R751 RES 29
R752 RES 29
R753 RES 17
R754 RES 31
R755 RES 31
R756 RES 17
R757 RES 17
R758 RES 28
R759 RES 28
R760 RES 28
R761 RES 28
R762 RES 17
R763 RES 31
R764 RES 17
R765 RES 30
R766 RES 17
R767 RES 17
R768 RES 30
R769 RES 30
R770 RES 23
R771 RES 23
R772 RES 23
R773 RES 23
R774 RES 31
R775 RES 28
R776 RES 23
R777 RES 23
R778 RES 30
R779 RES 29
R781 RES 28
R782 RES 30
R783 RES 26
R784 RES 26
R785 RES 30
R786 RES 30
R787 RES 30
R788 RES 30
R789 RES 26
R790 RES 26
R791 RES 26
R792 RES 26
R793 RES 26
R794 RES 26
R795 RES 26
R796 RES 26
R797 RES 35
R798 RES 35
R799 RES 35
R800 RES 35
R801 RES 35
R802 RES 35
R803 RES 35
R804 RES 19
R805 RES 34
R806 RES 34
R807 RES 34
R808 RES 34
R809 RES 34
R810 RES 35
R811 RES 25
R812 RES 25
R813 RES 25
R814 RES 25
RP1 RPAK4P 14
RP2 RPAK4P 24
RP3 RPAK4P 24
RP4 RPAK4P 24
RP5 RPAK4P 24
RP6 RPAK4P 14
RP7 RPAK4P 14
RP8 RPAK4P 14
RP9 RPAK4P 24
RP10 RPAK4P 24
RP11 RPAK4P 24
RP12 RPAK4P 13
RP13 RPAK4P 24
RP14 RPAK4P 13
RP15 RPAK4P 13
RP16 RPAK4P 13
RP17 RPAK4P 12
RP18 RPAK4P 12
RP19 RPAK4P 12
RP20 RPAK4P 12
RP21 RPAK4P 8
RP22 RPAK4P 12
RP23 RPAK4P 8
RP24 RPAK4P 8 14
RP25 RPAK4P 9
RP26 RPAK4P 9
RP27 RPAK2P 20
RP28 RPAK2P 20
RP29 RPAK4P 14
RP30 RPAK4P 9
RP31 RPAK4P 9
RP32 RPAK2P 20
RP33 RPAK4P 9
RP34 RPAK4P 9
RP35 RPAK4P 9
RP36 RPAK4P 9
RP37 RPAK4P 28
RP38 RPAK4P 28
RP39 RPAK10P2C 17
RP40 RPAK4P 30
RP41 RPAK4P 30
RP42 RPAK10P2C 23
RP43 RPAK10P2C 23
RP44 RPAK4P 25
RP45 RPAK4P 26
RP46 RPAK4P 14
RP47 RPAK4P 14
RP48 RPAK4P 14
RP49 RPAK4P 24
RP50 RPAK4P 24
RP51 RPAK4P 14
RP52 RPAK4P 23 26
RP53 RPAK4P 23
RP54 RPAK4P 26
RP55 RPAK4P 26
RP56 RPAK4P 14
RP57 RPAK2P 20
RP58 RPAK2P 20
RP59 RPAK2P 20
RP60 RPAK2P 20
RP61 RPAK2P 20
SH1 SHLD_3P_EMI 4
SP1 SPKR_CLIP_P84 4
SP2 SPKR_CLIP_P84 4
SP3 SPKR_CLIP_P84 4
SP4 SPKR_CLIP_P84 4
SP5 SPKR_CLIP_P84 4
SP6 SPKR_CLIP_P84 4
T1 XFR_ENET_1000BT 27
U1 SN74AUC1G04 7
U2 SN74AUC1G08 23
U3 ADT7460 25
U4 SN74AUC1G08 23
U5 SIL1162 20
U7 VREG_LT1962 14
U9 CBTV4020 10
U10 CBTV4020 10
U11 PI3B3257 34
U12 CBTV4020 10
U13 CBTV4020 10
U14 LTC3405 27
U15 COMPARATOR_LMC7211 31
U16 LTC1778 19
U17 FEPR_1MX8 9
U18 LTC1625 32
U19 PWR_CNTRL_TPS2211 17
U20 MAX1717 34
U21 COMPARATOR_LMC7211 32
U22 MAX1715 35
U23 AMP_MAX4172 31
U24 7432 22 30
U25 VREG_LP2951 32
U26 PCI1510GGU 17
U27 COMPARATOR_LMC7211 30
U28 LTC3707 33
U29 TSB81BA3A 28
U30 VREG_LP2951 32
U31 MAX1772 31
U32 EEPROM_16KX8_M24128B 23
U33 M16C62 30
U34 VREG_LM2594 28
U35 MAX1916 23
U36 LTC1761 28
U37 VREG_LT1962 28
U38 COMPARATOR_LMC7211 31
U39 UPD720101_FBGA 26
U40 OPAMP_MAX4236EUTT 23
U42 CLK_GEN_CY28512 14
U43 APOLLO_MPC7445_360 5 6
U44 RAGE_MBLTY_M10_CSP64_667 18 19 21
U45 INTREPID 8 9 12 13 14 15
U46 COMPARATOR_LMC7211 22
U47 CLK_GEN_CY25811 18
U49 TRANSCEIVER_88E1111 27
U50 OPAMP_LMC7111 31
U51 MAX6804 30
U52 FEPR_256KX8_ST72264_BGA 23
U54 VREG_MM1571J 21
U55 VREG_MM1571J 21
U56 741G32 22
U57 741G32 22
U58 LTC3412 35
XW1 SHORT 35
XW2 SHORT 19
XW3 SHORT 34
XW4 SHORT 32
XW5 SHORT 34
XW6 SHORT 35
XW7 SHORT 34
XW8 SHORT 33
XW9 SHORT 25
XW11 JUMPER 35
XW12 SHORT 22
XW13 SHORT 22
XW15 SHORT 34
XW19 SHORT 31
XW20 SHORT 19
XW21 SHORT 19
XW22 SHORT 19
XW23 SHORT 19
XW24 SHORT 19
XW27 SHORT 21
XW28 SHORT 21
XW29 SHORT 21
XW30 SHORT 21
XW31 SHORT 5
Y1 CRYSTAL 14
Y3 CRYSTAL 27
Y4 CRYSTAL 23
Y5 CRYSTAL 26
Y6 CRYSTAL 30
Y7 CRYSTAL_4PIN 30
ZT1 HOLE_VIA 4
ZT2 MTGHOLE 4
ZT3 HOLE_VIA 4
ZT4 MTGHOLE 4
ZT5 MTGHOLE 4
ZT6 MTGHOLE 4
ZT7 HOLE_VIA 4
ZT8 HOLE_VIA 4
ZT9 HOLE_VIA 4
ZT10 MTGHOLE 4
ZT11 MTGHOLE 4
ZT12 HOLE_VIA 4
ZT13 HOLE_VIA 4
ZT14 HOLE_VIA 4
ZT15 HOLE_VIA 4
ZT16 MTGHOLE 4
ZT17 HOLE_VIA 4
ZT18 HOLE_VIA 4
ZT19 HOLE_VIA 4
ZT20 HOLE_VIA 4
ZT21 HOLE_VIA 4
ZT22 HOLE_VIA 4
ZT23 HOLE_VIA 4
ZT24 HOLE_VIA 4
ZT25 HOLE_VIA 4
ZT26 HOLE_VIA 4
ZT27 HOLE_VIA 4
ZT28 HOLE_VIA 4
ZT29 HOLE_VIA 4
ZT30 HOLE_VIA 4
ZT31 HOLE_VIA 4
ZT32 HOLE_VIA 4
ZT33 HOLE_VIA 4
ZT34 HOLE_VIA 4
ZT35 HOLE_VIA 4
ZT36 HOLE_VIA 4
ZT37 HOLE_VIA 4
ZT38 HOLE_VIA 4
ZT39 HOLE_VIA 4
ZT40 HOLE_VIA 4
ZT41 HOLE_VIA 4
ZT42 HOLE_VIA 4
ZT43 HOLE_VIA 4
ZT44 HOLE_VIA 4
ZT45 HOLE_VIA 4
ZT46 HOLE_VIA 4
ZT47 HOLE_VIA 4
ZT48 HOLE_VIA 4
ZT49 HOLE_VIA 4
ZT50 HOLE_VIA 4
ZT51 HOLE_VIA 4
ZT52 HOLE_VIA 4
ZT53 HOLE_VIA 4
ZT54 HOLE_VIA 4
ZT55 HOLE_VIA 4
ZT56 HOLE_VIA 4
ZT57 HOLE_VIA 4
ZT58 HOLE_VIA 4
ZT59 HOLE_VIA 4
ZT60 HOLE_VIA 4
ZT61 HOLE_VIA 4
ZT62 HOLE_VIA 4
ZT63 HOLE_VIA 4
ZT64 HOLE_VIA 4
ZT65 HOLE_VIA 4
ZT66 HOLE_VIA 4
ZT67 HOLE_VIA 4
ZT68 HOLE_VIA 4
ZT69 HOLE_VIA 4
ZT70 HOLE_VIA 4
ZT71 HOLE_VIA 4
ZT72 HOLE_VIA 4
ZT73 HOLE_VIA 4
ZT74 HOLE_VIA 4
ZT75 HOLE_VIA 4
ZT76 HOLE_VIA 4
ZT77 HOLE_VIA 4
ZT78 HOLE_VIA 4
ZT79 HOLE_VIA 4
ZT80 HOLE_VIA 4
ZT81 HOLE_VIA 4
ZT82 HOLE_VIA 4
ZT83 MTGHOLE 4
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