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APPENDIX 1

FEATURES OF MICROCONTROLLER 89C51

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APPENDIX 2

ATMEGA8 MICROCONTROLLER CODE

;---------------------------------------------------------------------------------------------

; MOSFET Gating Pulse Generation for the ATMEL ATmega8.

;

; General Description of Approach:

;

; We are using PORTB1, 2, 3, 4 as our output gating signals; It must be noted that on an H-bridge we have defined the following;;; Starting at the top left switch in the H-bridge we have switch G1; Moving counter-clockwise through the switches we have G2, G4, and; Finally G3 as the top right-most switch. As labeled on the H-Bridge PCB.;; SO! Our Gating pulses come from the following PORTB outputs:; Switch G1 = PORTB3 = PIN 17; Switch G2 = PORTB4 = PIN 18; Switch G3 = PORTB2 = PIN 16; Switch G4 = PORTB1 = PIN 15;; At 100% load, G1 and G4 are in phase as well as G2 and G2; There must also be a delay between the turn off of G1 and G4; Into the turn on of G2 and G3. This delay is also seen in the; reverse where G2 and G3 turn off and G1 and G4 turn on.;---------------------------------------------------------------------------------------------.include "m8def.inc"; Interrupt Service Vectors.org 0x000rjmp Reset.org OC1Aaddrrjmp T1comA; timer counter 1 compare match A.org OC1Baddrrjmp T1comB; timer counter 1 compare match B

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; Register definitions for variables.def pwmhi=r16; hi time for main control signal.def pwmlo=r17; lo time for main control signal.def pwmT=r18; Period of control signal.def tf=r19; Delay time for rise and fall.def temp=r20.def temp2=r21; Reset vector - initialize interrupts and service routinesReset:ldi temp, low (RAMEND) ;Set stack ptr to ram endout SPL,templdi temp,high(RAMEND)out SPH, temp; Initialize timercounter1 and interruptsldi temp,(1<<WGM12)+(1<<CS10) ;WGM12 Clear timer on compare toOCIE1Aout TCCR1B, temp ;CS10 no prescale run at clock speedldi temp,(1<<OCIE1A)+(1<<OCIE1B) ;tc1 compare matchA and matchBinterruptsout TIMSK,temp;-------------------------------------------; Control signal values are here for Peroid value correspond to # of CPUcycles; loads max count value for TimerCounter1; this is our period of control waveformldi temp,0x01out OCR1AH,templdi temp,0x90out OCR1AL,temp; This Changes duty cycle change me change me; Loads compare value for duty cycle note must load H before lowldi temp,0x01 ;100% 0x01 15% 0x00out OCR1BH,templdi temp,0x90 ;100% 0x90 15% 0x30out OCR1BL,temp;---------------------------------------------------; Initialize outputsldi temp,(1<<DDB4)|(1<<DDB3)|(1<<DDB2)|(1<<DDB1) ;sets datadirection for pinsout DDRB,temp ;set data direction to outldi tf,0x01seiloop:rjmp loop

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; Rising of Control signalT1comA:sbis PORTB,(PORTB2)rjmp bit2clearnop ;these nop’s make both pulses have equivalent duty cyclenopnopcbi PORTB,(PORTB2) ;Clear G3rcall DELAYsbi PORTB,(PORTB1) ;Set G4retibit2clear:cbi PORTB,(PORTB1) ;Clear G4rcall DELAYsbi PORTB,(PORTB2) ;Set G3reti; Falling of Control signalT1comB:sbis PORTB,(PORTB4)rjmp bit4clearnop ;these nops make both pulses have equivalent duty cyclenopnopcbi PORTB,(PORTB4) ;Clear G2rcall DELAYsbi PORTB,(PORTB3) ;Set G1retibit4clear:cbi PORTB,(PORTB3) ;Clear G1rcall DELAYsbi PORTB,(PORTB4) ;Set G2reti; Delay subroutineDELAY:ldi temp,0x00loopy:inc tempcpse temp,tfrjmp loopyret

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APPENDIX 3

FEATURES OF ARM PROCESSOR LPC2148

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APPENDIX 4

MAIN PROGRAM

*******************MAIN PROGRAM**************************//***********************(PARTIALLY SHOWN) *****************/int main (void){ /* main entry for program */ char cmdbuf [15]; int i; int idx; PINSEL1 = 0x15400000; IODIR1 = 0xFF0000; ADCR = 0x002E0401; init_serial (); T0MR0 = 14999 T0MCR = 3; T0TCR = 1; VICVectAddr0 = (unsigned long)tc0; VICVectCntl0 = 0x20 | 4; VICIntEnable = 0x00000010; VICDefVectAddr = (unsigned long) DefISR; clear_records (); printf ( menu ); while (1) {/* loop forever */

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printf ("\nCommand: "); getline (&cmdbuf[0], sizeof (cmdbuf)); for (i = 0; cmdbuf[i] != 0; i++){ /* convert to upper characters */ cmdbuf[i] = toupper(cmdbuf[i]); } for (i = 0; cmdbuf[i] == ' '; i++); switch (cmdbuf[i]){ /* proceed to command function */ case 'R': if ((idx = read_index (&cmdbuf[i+1])) == WRONGINDEX) break; while (idx != sindex){ /* check end of table */ if (U1LSR & 0x01) { /* check serial interface */ } if (save_record[idx].time.hour != 0xff){ measure_display (save_record[idx]); } } } }}

* * *

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APPENDIX 5

DESIGN OF PI CONTROLLER

Controllers based on the PI approach are commonly used for DC–DC

converter applications. Power converters have relatively low order dynamics

that can be well controlled by the PI method. Ziegler and Nichols conducted

numerous experiments and proposed rules for determining values of KP and

KI based on the transient step response of system.

Figure A5.1 S-shaped reaction curve

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Table A5.1 Ziegler-Nichols tuning rule

It applies to resonant converter with neither integrator nor

dominant complex-conjugate poles, whose unit-step response resemble an S-

shaped curve with no overshoot. This S-shaped curve is called the reaction

curve. The S-shaped reaction curve (shown in Figure A5.1) can be

characterized by two constants, delay time (L) and time constant (T), which

are determined by drawing a tangent line at the inflection point of the curve

and finding the intersections of the tangent line with the time axis and the

steady-state level line. Using the parameters L and T, we can set the values of

KP, KI and KD according to the formula shown in the Table A5.1. These

parameters will typically give a response with an overshoot about 25% and

good settling time. Based on the Ziegler-Nichols Tuning Rule, Proportional

gain Constant (KP) = 0.05 and Integral Time Constant (KI) = 25 are obtained

for the converter under study.

Controller KP KI KD

P LT 0 0

PI LT9.0

227.0

LT 0

PID LT2.1 26.0

LT

T6.0

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APPENDIX 6

DC GAIN CHARACTERISTICS AND OPERATING REGION OF LCC

AND LCL RESONANT CONVERTERS

The quality factor (Q ) and resonant frequency ( of ) of LCC resonant

converter is given below:

21

21

21

21

2

1

CCCCL

f

and

CCCC

LZQ

o

L

(A6.1)

Figure A6.1 shows the DC characteristic of LCC resonant

converter. The major problems of Series Resonant Converter (SRC) are

light-load regulation, high circulating energy and high turn-off current at

nominal input voltage. The major problems of Parallel Resonant Converter

(PRC) are high circulating energy; high turns off current at high input voltage

condition. Compare with SRC, the operating region is much smaller.

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Figure A6.1 DC gain characteristics and operating region of LCCresonant converter

At light load, the frequency doesn't need to change too much to

keep output voltage regulated. So light load regulation problem doesn't exist

in PRC. The LCC resonant tank can be considered as the combination of

Series Resonant Converter and Parallel Resonant Converter thereby

combining the advantages of both. Figure A6.1 shows that the maximum gain,

which is determined by Q, affects the operating range of the switching

frequency regulating the output voltage under line variation.

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From the Figure A6.1, it can be observed that LCC resonant

converters can achieve a narrow switching frequency range with load change.

At light-load conditions, the circulating energy is smaller. The LCC has two

resonant frequencies, series resonant frequency and parallel resonant

frequency. Although operating at the series resonant frequency is desirable for

high efficiency, when doing so, ZVS is lost for certain load conditions. Thus,

the operating region is designed to be on the right-hand side of the parallel

resonant frequency to achieve ZVS at all load conditions. Unfortunately, like

the PRC and SRC, for the LCC, the circulating energy and turn-off current of

the device also increases at nominal input voltage Vin_max. In sum, to deal

with a wide input voltage range, all these traditional resonant converters

encounter some problems. To achieve higher efficiency, LCL resonant

topologies should be considered.

The quality factor (Q ) and resonant frequency ( of ) of the LCL

resonant converter is given below.

CLLfo

)(21

21 and

L

r

ZCL

Q Where,

CCLLL

r

r 21 (A6.2)

The voltage gain of the LCL resonant converter is drawn in

Figure A6.2. LCL-T and LCC Resonant converters encounter problems while

dealing with a wide input voltage range. Meanwhile, at the nominal condition,

the LCL resonant converter operates very close to the resonant frequency,

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which is the best operation point to accomplish high efficiency. In addition,

voltage gains of different Q converge at the series resonant point. The LCL

resonant tank parameters can be optimized to achieve high efficiency for a

wide load range. As a result, holdup time extension capability is

accomplished without sacrificing the efficiency at the nominal condition. The

LCL resonant converter is considered as one of the most desirable topologies

for wide input voltage range.

Figure A6.2 DC gain characteristics and operating region of LCLresonant converter