AP9217
description
Transcript of AP9217
DOC/LP/01/28.02.02
LAB PLAN
AP9217 - ELECTRONICS DESIGN LABORATORY I
Branch: M.E-Applied Electronics Sem: I
LP – AP9217
Revision No:00
Date:10/09/12
Page 1 of 3
List of Experiments
AP9217 ELECTRONICS DESIGN LABORATORY I L T P C 0 0 4 2
1. System design using PIC Microcontroller.
2. Implementation of Adaptive Filters, periodogram and multistage multirate system in DSP
Processor.
3. Simulation of QMF using Simulation Packages.
4. Modeling of Sequential Digital system using VHDL.
5. Modeling of Sequential Digital system using Verilog.
6. Design and Implementation of ALU using FPGA.
7. Simulation of NMOS and CMOS circuits using SPICE.
8. System design using 16- bit Microprocessor.
DOC/LP/01/28.02.02
LAB PLAN
AP9217 - ELECTRONICS DESIGN LABORATORY I
Branch: M.E-Applied Electronics Sem: I
LP – AP9217
Revision No:00
Date:10/09/12
Page 2 of 3
Objective: To study Various Electronic system design.
Ses.No B
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1 Introduction
2 1 2 3 4 1 2 3 4
3 2 3 4 1 2 3 4 1
4 3 4 1 2 3 4 1 2
5 4 1 2 3 4 1 2 3
6 5 6 7 5 6 7 5 6
7 6 7 5 6 7 5 6 7
8 7 5 6 7 5 6 7 5
9 8 9 10 11 8 9 10 11
10 9 10 11 8 9 10 11 8
11 10 11 8 9 10 11 8 9
12 11 8 9 10 11 8 9 10
13 Model practical exam.
DOC/LP/01/28.02.02
LAB PLAN
AP9217 - ELECTRONICS DESIGN LABORATORY I
Branch: M.E-Applied Electronics Sem: I
LP – AP9217
Revision No:00
Date:10/09/12
Page 3 of 5
List of Experiments
S. No TitleCross reference as per syllabus
1. Modeling of Sequential Digital system using VHDL: Counters 4
2. Modeling of Sequential Digital system using VHDL : i)Registers (ii)FSM (Finite State Machine) modeling
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3. Modeling of Sequential Digital system using Verilog :Counters 5
4. Modeling of Sequential Digital system using Verilog :Registers 5
5. Design and Implementation of ALU using FPGA. 6
6. Simulation of NMOS Inverter and CMOS Inverter circuits using SPICE. 7
7. Simulation of CMOS –Basic gates design using SPICE. 7
8. System design using 16- bit Microprocessor.
(i)Interfacing Stepper motor using 8086.
(ii)ADC interfacing using 8086.
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9. System design using PIC Microcontroller. (i)Elevator controller
(ii)Blinking of LEDs with Switches
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10. (i)Implementation of Adaptive Filters, periodogram and multistage multirate system in DSP Processor
(ii) Design of Adaptive Filters, periodogram and multistage multirate system using MATLAB
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11. Simulation of QMF using MATLAB 3
Prepared by Approved bySignature
Name B.Sarala ,M.Anushya Dr. Ganesh vaidyanathan
Designation Assistant professor HOD-ECE
Date