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Annual Report 2011 INFORMATION DEVICE SCIENCE LABORATORY Graduate School of Materials Science Nara Institute of Science and Technology

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Preface This lab is quite new, opening in April, 2009. In our lab, we study next generation devices such as displays or new functional LSIs. We fab-ricate new semiconductor devices based on Si by introducing new materials such as inorganic, organic, and bio-molecular films. Our motto is "Fabricate of world first devices by our hands". Our results have been reported throughout the world. Prof. Yukiharu Uraoka 当研究室は，2009 年から始まった新しい研究室です．研究領域は，ディスプレイや超 LSI とい

った次世代情報機能素子です．シリコン半導体を中心に，無機材料，有機材料，生体超分子な

ど新しい材料を導入して，今までになかった初めての素子を作ります．モットーは，"自分の手

で世界初のデバイスを作る"ことです． 得られた成果は，国内ばかりでなく海外でも積極的に発表しています． 浦岡行治

(From front-left) Shinji ARAKI, Hiroki KAMITAKE, Yukiharu URAOKA, Yana MULYANA, Koji YOSHITSUGU, Haruka YAMAZAKI, Mao TANIGUCHI, Takahiko BAN, Yukiko MORITA, Takuya KONTANI, Takahiro DOE, Yuta MIURA, Min ZHANG, Mai TANI, Li LU, Yoshihiro UEOKA, Masahiro HORITA, Bin ZHENG, Mutsunori UENUMA, Satoshi SAIJO, Takashi NISHIDA, Kosuke OHARA, Yasuhiro KAKIHARA, Mami FUJII, Koji YAMASAKI, Emi MACHIDA, Yasuaki ISHIKAWA. (absent, Kosuke BUNDO, Yumi KAWAMURA, Yosuke TOJO) Preface .............................................................................................................................................. 1 1. People in the laboratory ........................................................................................................... 2 2. Research Progress .................................................................................................................. 5 3. List of Publications .................................................................................................................. 21 4. Collaborations ........................................................................................................................ 33 5. Honor of Awards, and News Releases .................................................................................. 35 6. Excursion & Events ................................................................................................................ 36 7. Dissertation ............................................................................................................................ 37 8. After Graduated Position ........................................................................................................ 38 9. Scientific Instruments and Methods for Analysis ................................................................... 39 10. List of Members ...................................................................................................................... 43 11. Site Plan .................................................................................................................................. 46

Department URL: http://mswebs.naist.jp/english/index.html

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1. People in the laboratory 1.1 Thin Film Transistor Group Members: Mami FUJII, Yumi KAWAMURA, Emi MACHIDA, Koji YAMASAKI, Yoshihiro UEOKA, Mai TANI, Haruka YAMAZAKI, Koji YOSHITSUGU, Masato HIRAMATSU, Masahiro MITANI, Masahiro HORITA, Yasuaki ISHIKAWA Realization of high performance information terminal devices on glass or plastic film is our main objective. We are researching fabrication methods and characterization of silicon thin films by laser-ablation technique and oxide semiconductor materials such as ZnO and InGaZnO. Highly reliable fabrication processing of TFTs with these materials is also our research topic. シリコン薄膜にレーザーを照射させて作製する低温ポリシリコンや，InGaZnO などの酸化物半

導体を用いた TFT を作製し，様々な特性・物性を評価解析することで高性能情報端末を目指し

た研究をしています．

Green Laser Annealing

System on Panel

Flexible Display

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1.2 Bio-Nano-Process Group Members: Kosuke OHARA, Yosuke TOJO, Satoshi SAIJO, Yasuhiro KAKIHARA, Kosuke BUNDOE, Hiroki KAMITAKE, Takahiko BAN, Mutsunori UENUMA, Bin ZHENG Bio-supramolecules have unique character such as, self-organization, and size uniformity at the nano-scale. We are paying a lot of attention to these unique functions of bio-supramolecules in order to enhance performance and/or functionalize transistor and memory devices. Our novel approach, which is blending bio-technology and semiconductor-technology, has already pro-duced high performance memory devices. We have started producing new functionalized de-vices as MEMS and bio-sensors with our novel process. タンパクなどの生体超分子は，もともとナノスケールで均一なサイズであり，自己組織化能力

という優れた性質を持っています．私たちは，このバイオ系材料を，半導体プロセスに生かし

た非常にめずらしい研究を行っています．すでに，この新しいプロセスを使って，ディスプレ

イやメモリなどの作製に成功し，さらなる新しい応用として MEMS やバイオセンサー，太陽電

池の研究も開始しています．

実験風景

手法など Bio-nano-process for electronic devices

Re-RAM

Floating Gate Memory

Ferritin For solar cells

For memory devices

Nano-particles

supramoleculse Removing proteins Poly-Ge thin film

Au NPs Self-assembled Au packing Adsoption on

Si pattern

Si pattern

cross-sectional TEM plane TEM

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1.3 Compound Material Device Group Members: Li LU, Takuya KONTANI, Yuta MIURA, Takahiro DOE, Min ZHANG, Shinji ARAKI, Yana MULYANA, Mao TANIGUCHI, Masahiro HORITA, Takashi NISHIDA, Yasuaki ISHIKAWA We are researching to open the potential of compound material devices. We investigate a lot of printing techniques such as spin-on coating, spray-coating, screen-printing, nanoimprint pro-cessing, etc., and functional materials such as ferroelectric films, inorganic EL particles, gra-phene etc., in order to fabricate novel functionalized devices such as memory devices, transis-tors, sensors, EL devices, optical-switching devices and solar cells. 様々な機能材料（強誘電体や無機 EL 材料、グラフェンなど）の可能性を広げる研究をしていま

す。また、プリント技術を用いたデバイスを作製し，プリンタブルエレクトロニクスの可能性

を探索しています．スピンオンコーティングやスプレーコーティング，スクリーン印刷，ナノ

インプリントプロセスなど，多種にわたるコーティング技術を駆使してメモリーやトランジス

タ，センサー，EL 素子，太陽電池などのデバイス作製研究を行っています．

Inorganic EL films

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2. Research Progress 2.1 Low-temperature Processed High Mobility IZO TFTs by Excimer

Laser annealing Authors: M. FUJII, R. ISHIHARA*, J. VAN DER CINGEL*, M.R.T. MOFRAD*,

M. KASAMI**, K. YANO**, and Y. ISHIKAWA * Delft University of Technology, ** Idemitsu Kosan Co.,Ltd.

Oxide semiconductor films deposited by sputtering have recently attracted considerable

attention in fields of transparent and flexible electronics. In general, the annealing process with about 300oC or more is effective in obtaining good characteristics when the oxide semiconductor films are applied to electronic devices such as thin film transistors (TFTs). In this case, the high temperature in the post-annealing is a serious problem in fabrication of TFTs on the plastic substrates. Excimer laser annealing (ELA) process with short pulses can achieve the annealing and crystallization without thermal damage against the substrate. In this study, we investigated the effects of the ELA on the electrical properties of Indium-Zinc-Oxide (IZO) thin films.

We achieved high mobility IZO-TFTs of 37.7 cm2/Vs without thermal damage to the sub-strate when irradiated laser energy was 30 mJ/cm2 as shown in Fig.1. In this case, the temper-ature on the substrate was calculated as 46.9oC, which is a sufficiently lower temperature than the softening point of polyethylene-terephthalate (PET). Our results could also be attributed to the fact that annealing with the laser reduced the oxygen deficiency. However, TFT performance has deteriorated in high energy annealing. We found that the main cause of IZO TFTs degrada-tion was likely the high conductivity mixed layer of IZO and SiO2, judging from XRR analysis when the IZO was processed with the laser energy density of 97.5 mJ/cm2 or higher (Fig.2, 3). We believe that optimal ELA process enables us to fabricate IZO TFTs on flexible PET film, and produce flexible displays.

Figure 1: Transfer curves of IZO TFTs w/o ELA, with 30 mJ/cm2 ELA, and 97.5 mJ/cm2 ELA. The F represents O2/(Ar+O2) for the deposition of IZO film. The IZO film was deposited by RF magnetron sputtering method at room temperature. The inset is the TFT structure used in this study, and the direction of laser irradiation.

Figure 2: The calculated film structure and the thicknesses using model fitting with XRR spec-trum. Figure 3: The effect of ELA to the IZO/SiO2 film.

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2.2 Analysis of Density of State in a-IGZO Thin Film by C‒V Method Authors: Y. UEOKA, M. FUJII, M. HORITA, and Y. ISHIKAWA

Amorphous InGaZnO (a-IGZO), a type of transparent amorphous oxide semiconductor (TAOS), is expected as a material for thin film transistors (TFTs) for next-generation displays because of high channel mobility (μch) and low temperature process compared with amorphous silicon (a-Si) TFTs. Recently, we reported that μch of TFTs annealed in high pressure water vapor (HPV) was larger than that in typical atmosphere (AT, N2:O2 = 4:1) condition. However, the mechanism of the high performance is not clarified fully. In this study, we analyzed the distribu-tion of density of states (DOS) in a-IGZO thin film by capacitance-voltage (C‒V) method.

The a-IGZO capacitors were fabricated on p-type Si substrates (conductivity = 0.002-0.004 Ωcm) as shown Fig. 1. The a-IGZO layer was deposited on Si substrates with thermally oxidized SiO2 (100 nm) in oxygen with a mixture of argon at room temperature (RT) by radio-frequency (RF) magnetron sputtering. The capacitors were annealed in HPV at 290oC for 2 hours or in AT at 300oC for 2 hours. Finally, ITO electrodes (φ 600 μm) were formed by RF magnetron sput-tering at RT and lift-off process.

DOS is an important parameter to compare the performance of a-IGZO TFTs. In order to realize high performance TFTs, a low DOS is preferable in the band gap because the states behave as electron traps. In this experiment, the C‒V method was performed in order to analyze the DOS in SiO2/a-IGZO structures. The C‒V method uses the difference in the response time for electrons, because electrons in traps can follow low frequency but cannot follow high fre-quency.

Figure 2 shows the IDS‒VDS characteristics of each TFT. The calculated μch with AT was 10 cm2/Vs and that with HPV was 13 cm2/Vs. Figure 3 shows the distribution of DOS from conduc-tion band minimum (Ec) to 0.6 eV calculated from C‒V curves. The DOS with HPV sample ex-hibited a smaller value than that of AT samples around the region below the Ec (Ec−E = 0-0.2 eV). Thus, it is considered that the μch of TFTs after HPV annealing increases due to the decrease of the DOS. From these results, it is believed that HPV annealing is a more promising annealing condition for a-IGZO TFTs.

Figure 1: Structure of a-IGZO capacitor. Right side image is optical microscope view.

Figure 2: IDS-VDS curves with HPV or AT sample. (This is the previously reported results)

Figure 3: Distribution of DOS with HPV or AT sam-ple. In this paper, note that “eV-1cm-3” is used as the units of DOS.

-20 -10 0 10 2010-12

10-11

10-10

10-9

10-8

10-7

10-6

10-5

Gate Voltage (V)

Dra

in C

urre

nt (A

)

AT HPV

W/L = 90/10 µmVDS = 0.1 V

0 0.2 0.4 0.61016

1017

1018

1019

DO

S (/c

m3 eV

)

Ec - E (eV)

AT 0.5 MPa

0.8 MPa 1.2 MPa

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Gate insulator SiO2 or Al2O3 50nm

Source

Ti 150nm

p-type Si (Gate)

DrainZnO 30nm

(a)

(b)

Flatband capacitance

2.3 Low-temperature Preparation of High-quality Thin Films for Device Application by Plasma Assisted Atomic Layer Deposition Authors: Y. KAWAMURA, M. TANI, and M. HORITA

Zinc oxide (ZnO) thin films have attracted significant attention for application in thin film

transistors (TFTs) due to their specific characteristics, such as high mobility and transparency. The atomic layer deposition (ALD) thin film is deposited with alternating exposures of a

source gas and oxidant. The ALD method keeps the fabrication temperature of the ZnO TFTs low. We have reported that plasma assisted ALD (PA-ALD) process is promising for the fabrica-tion of ZnO TFTs at low temperature. In this study, we prepared ZnO thin films for the channel layer and Al2O3 for the gate insulator using PA-ALD, and fabricated bottom-gate-type TFTs. In order to reduce the operating voltage, high-k gate insulators are always used to increase the coupling of the gate electric field to the channel layer. Al2O3 film is a high-k material, which can be deposited at low temperature in our method. In addition, the improvement of the ZnO film quality with the Al2O3 films at low temperature is expected because of continuous deposition in the ALD reactor without exposure to the atmosphere. So there is no chance of contamination from air atmosphere at the interface. We investigated the effect of the preparation conditions of ZnO and Al2O3 films on the electrical properties to improve the ZnO TFT performance.

We investigated the effect of the plasma ignition time on the ZnO TFT characteristics for the deposition of the Al2O3 gate insulator. A diagram of the bottom-gate-type ZnO TFTs fabricated in this study is shown in Fig. 1. The ZnO channel layer was deposited at 300oC and the Al2O3 gate insulator was deposited at 100oC. Figure 2 shows the variation of transfer characteristics of the TFTs with plasma ignition time for the Al2O3 film deposition. The Vth (threshold voltage) of the TFT with the Al2O3 gate insulator deposited by conventional ALD (O3-ALD) shifted toward the negative. This shift was improved (came near zero volt) by the introduction of plasma for the deposition of the Al2O3 gate insulator. To investigate the causes of the changes in the Vth of ZnO TFTs, we performed capacitance-voltage (C-V) measurement and calculated the Vfb (flat-band voltage). The metal-oxide-semiconductor (MOS) capacitors were fabricated with Al2O3 films deposited on p-type Si(100) substrates. Figure 3(a) shows the C-V curves of the MOS capaci-tors with the Al2O3 films deposited by O3-ALD or PA-ALD. The C-V curve shifted toward the positive with the introduction of plasma. The Vth of the ZnO TFTs and the Vfb of the MOS capaci-tors as a function of plasma ignition time are shown in Fig. 3(b). Both the Vth and the Vfb shifted toward the positive with increasing plas-ma ignition time.

On the basis of these results, improvement and control of ZnO TFT performance is possible by optimization of the plasma conditions, and high-performance ZnO TFTs can be obtained by using PA-ALD at a low temperature.

Figure1: Schematic of a bottom-gate type TFT

Figure 2: Transfer characteristics of ZnO TFT with Al2O3 gate insulator. (W/L=20/10 µm,Vd=5 V)

Figure 3: (a) C-V curves of the MOS capacitors with the Al2O3 films deposited by O3-ALD and PA-ALD. (b) Dependence of the Vth of ZnO TFTs and the Vfb of capacitors on the plasma ignition time.

Plasma ignition timefor PA-ALD

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2.4 Research on Production of Low-temperature and High-performance ZnO Thin Film Transistors by Plasma Assisted Atomic Layer Deposi-tion Method Authors: M. TANI, Y. KAWAMURA, and M. HORITA

In recent years, the application of Zinc oxide (ZnO) thin films as an active channel layer in

thin film transistors (TFTs) have received great attention. The ZnO is transparent to visible wavelengths due to the wide band gap (~3.37 eV). The ability to fabricate good quality films over large areas at a low temperature suggests compatibility with plastic or flexible substrates. Fur-thermore, it has been recently reported that the field-effect mobility of ZnO TFTs is higher than that of a-Si:H TFTs. For these features, ZnO films are expected to be applied in next-generation displays. However, there is still a critical issue that has to be solved. Reliability for electrical stress is a serious problem in their mass production.

We have proposed plasma-assisted atomic layer deposition (PA-ALD) of ZnO for TFT channel layers, where the plasma assists the oxidation of metal precursors in the PA-ALD. We reported that the residual carrier concentration was reduced and high performance ZnO TFTs were obtained using PA-ALD at a low temperature less than 300oC.

In this study, we fabricated TFTs using ZnO thin films as the channel layer deposited by PA-ALD at various temperatures. We investigated the effect of the deposition temperature dur-ing PA-ALD on the performance of ZnO TFTs. Our ZnO channel layers by PA-ALD was formed at 100 or 300oC on thermal oxidized SiO2/Si substrates, and fabricated bottom-gate-type ZnO-TFTs to characterize the electrical properties.

The 300oC-ZnO TFTs showed good electrical properties compared with the 100oC and 200oC-ZnO TFTs in field-effect mobility and the on-current (Fig. 1). We found that high perfor-mance for ZnO TFTs required high preferential orientation to the c-axis and low impurities such as carbon and hydrogen (Fig. 2, 3).

Figure 1: Transfer characteristics of ZnO TFTs (Vd = 5 V). The ZnO channel layers were deposited by PA-ALD at 100, 200, and 300oC

Figure 2: XRD patterns of ZnO films deposited by PA-ALD at (a) 300oC, (b) 200oC, (c) 100oC.

Figure 3: SIMS profiles of ZnO films deposited by PA-ALD at (a) Car-bon, (b) Hydrogen.

Vd=5 V,W/L=20/10 µm

I d[A]

Vg[V]

DepositionTemperature

300oC200oC100oC

(a)Deposited at

300oC

(b)Deposited at 200oC

(c)Deposited at 100oC

(002)

(100)

(101)

(a)Carbon profile

ZnO SiO2

Cou

nts

Per S

econ

d

Depth[nm]

Deposition Temperature

300oC200oC100oC

(b)Hydrogen profile

ZnO SiO2

Cou

nts

Per S

econ

d

Depth[nm]

Deposition Temperature

300oC200oC100oC

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2.5 Low-Temperature Crystallization of a-Si by Underwater Laser Annealing Authors: E. MACHIDA, M. HORITA, T. OKUYAMA*, and H. IKENOUE**

* Toyobo Co.,Ltd., ** Kochi National College of Technology.

Low-temperature polycrystalline silicon (poly-Si) is one of the promising materials for real-izing advanced TFTs with high-mobility. For this reason, poly-Si TFT enables us to fabricate a system on panel, which is expected as a high-performance and multi-functional display device. In recent years, several studies have been conducted in order to achieve further low-temperature fabrication of poly-Si TFTs for the use of flexible plastic substrates. We propose the technique of low-temperature annealing using underwater laser annealing (WLA).

The a-Si (50 nm) films on glass or polyethylene terephthalate (PET; glass transition tem-perature = 70oC) substrates were crystallized by WLA or laser annealing in air (LA) where third harmonic wave of Q-switch Nd: YAG laser (λ = 355 nm) was used for annealing. The laser beam has the pulse duration around 4 ns and the repetition rate of 10 Hz. The laser energy density was changed to 245-300 mJ/cm2, and the number of laser beam shots was set to 100 shots/location. After the laser crystallization, the crystallinity of poly-Si was observed by SEM and micro-Raman spectroscopy.

Figure 1 shows SEM images of poly-Si film surface formed by (a) LA or (b) WLA at the laser nergy density of 245 mJ/cm2. The dotted line shows grain boundary. The maximum grain size of both samples was ~220 nm. However, the LA sample contains many small grains less than 100 nm. In contrast, WLA samples have larger and more uniform grains. In the WLA, the flowing water layer prevents the rise in surface temperature during laser annealing, and temperature distribution within the Si film is homogenized as compared to the case of LA. It is thought that the homogenization of the temperature distribution within the Si films leads to a decrease in nucleation density and enhances giant- and uniform-grain growth. Figure 2 shows the Raman spectra of crystallized Si films by WLA at the laser energy density of 300 mJ/cm2. The trans-verse optical (TO) phonon peaks of crystallized Si were clearly observed near the peak of sin-gle-crystalline Si. This result indicates that the crystallization of a-Si on the plastic substrates can also be achieved by using WLA. The crystal fraction of poly-Si/PET is much greater than that of poly-Si/glass substrate. This result suggests the possibility that the poly-Si/PET has bet-ter crystallinity than the poly-Si/glass. Moreover, there was no thermal damage; such as, peeling of Si films or severe shrinkage of PET substrates after laser irradiation. It is expected that sub-strate temperature is low enough to avoid thermal damage. This method is a promising tech-nique for low-temperature crystallization of a-Si films on plastic substrates.

Figure 1: SEM images of poly-Si. The maximum grain size ~ 220 nm.

Figure 2: Raman spectra of crystallized poly-Si by WLA. The laser energy density was 300 mJ/cm2.

200 nm

Grain

200 nm

(a) LA poly-Si

(b) WLA poly-Si

Grain

poly-Si/PET sub.

poly-Si/glass sub.

Single crystalline Si

a-Si

poly-Si/PET sub.

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2.6 Thin-Film Devices Fabrication on Double-Layered Polycrystalline Silicon Films Formed by Green Laser Annealing Authors: K. YAMASAKI, E. MACHIDA, and M. HORITA

Three-dimensional (3D) integration of low temperature poly-Si (LTPS) thin film devices such as thin film transistors (TFTs) and thin film photo diodes (TFPDs) is a promising technology for realization of high-performance and multiple functional devices on large scale substrates. The penetration length of the green laser (λ= 532 nm) for a-Si is ~ 100 nm, which is larger than the standard thickness of precursor Si films (~50 nm). We considered that GLA enables the realization of the crystallization of multi layered Si films.

In this study, we tried to realize the fabrication of thin-film devices on both the upper and lower layers as an application of the double-layered Si films. Assuming device stacking of optical sensors and signal amplifiers, TFTs and TFPDs were fab-ricated on the upper and the lower layers, respec-tively. These multiple functional devices are ap-plied to artificial retinas and displays with the func-tion of luminance correction. Figure 1 shows the cross-sectional device structure of TFTs and TFPDs fabricated in this study.

Figure 2 shows the transfer characteristics and the field-effect mobility of TFTs fabricated on the upper layer. The n-channel [Fig. 2(a)] and the p-channel TFTs [Fig. 2(b)] fabricated on the upper poly-Si layer irradiated at 688 mJ/cm2 show clear transistor operations. The n-channel TFTs show a maximum field-effect mobility of 160 cm2/Vs and the p-channel TFTs show that of 150 cm2/Vs. The field-effect mobility of TFTs increased with increasing laser irradiation energy density.

The output current-voltage characteristics of TFPDs fabricated on the lower layer are shown in Fig. 3. In addition, the current-voltage characteristics of TFPDs in a single logarithmic plot are shown in the inset of Fig. 3. The forward bias current increases from 9 V compared with the reverse bias current. At a bias of 20 V, the forward bias current is two orders of magnitude higher than the reverse bias current. Thus, the TFPDs show rectification properties, suggesting that the TFPDs operate as a p-i-n diode. The output reverse current increased with increasing illumination intensity. These results indicate that the TFPDs achieve optical sensing.

These results indicate the possibility of multiple-layered poly-Si films formed by GLA for three-dimensional structured high-performance and multiple functional devices on large-scale substrates.

Figure 2: Transfer characteristics and field-effect mobility of TFTs fabricated on the upper layer of the double-layered samples: (a) n-channel and (b) p-channel TFTs. W/L=10 µm/ 10 µm.

Figure 3: Output current voltage characteristics of TFPDs under illumination and the current-voltage character-istics of TFPDs of single loga-rithmic plot.

VDS = 0.1 V

Dra

in c

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nt [A

]

(a) (b)

Gate voltage [V]

Fiel

d-ef

fect

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ility

[cm

2 /Vs]

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2000 lx step0 to 10000 lx

5 10 15 200

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A] forward

reverse

Figure 1: Device structure of n- and p-channel TFTs and TFPDs fabricated on the upper and lower layers of double-layered poly-Si films formed by GLA.

N-ch TFT

p-i-n TFPD

P-ch TFT Ti

SiO2

SiO2

Glass sub.

Buffer layer Lower poly-Si

Upper poly-Si

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2.7 Three Dimensional Nanodot-type Floating Gate Memory Fabricated by Bio-LBL Authors: K. OHARA, B. ZHENG, and M. UENUMA

Floating gate memory is the basic structure of flash memory. In particular, floating gate

memory with a nanodot-array as a charge trap site (nanodot-type floating gate memory) has attracted much attention owing to high-reliability and low-voltage operation. We have re-searched the nanodot-type floating gate memory with the nanodot array formed utilizing ferritin. Ferritin, which is a 12-nm cage-shaped protein with 7-nm cavity, can form various types of in-organic metal nanodots and compound semiconductor nanodots in the cavity. We have realized the nanodot array of 8.0 ×1011 cm-2 utilizing ferritin. However, the density of the nanodot array has to be increased over 1012 cm-2 to further improve the memory characteristics of the nano-dot-type floating gate memory. We proposed the nanodot-type floating gate memory with a mul-tilayered nanodot array formed by Bio-Layer-By-Layer (Bio-LBL), as shown in Fig. 1. Titani-um-Binding Ferritin (TBF), which is used for Bio-LBL, can adsorb on only Ti, Ag, and Si. In addi-tion, TBF can form SiO2 by itself, which is called as “biomineralization”. We fabricated the mul-tilayered nanodot array by repeating selective adsorption and biomineralization of TBF.

Figure 2 shows the cross-sectional transmission electron microscopy (TEM) image of the fabricated memory with the multilayered Co nanodots (Co-BND) embedded in a SiO2 layer. The black dots of the TEM image indicate Co nanodots. The TEM image shows that the multilayered Co-BND array for the memory can be formed by Bio-LBL. Figure 3 shows the drain current - gate voltage (ID-VG) characteristic of the memory with multilayered Co-BND array. The ID-VG curve with hysteresis was observed. The hysteresis was caused by charge injection into the Co-BND array. In addition, the width of hysteresis increased with increase in the number of the Co-BND array because the amount of charge injected into the Co-BND array increased by in-creasing the adsorption density of the Co-BND array.

We fabricated a high-performance and high-reliability nanodot-type floating gate memory with a multilayered Co-BND array formed by Bio-LBL. This memory may contribute to realizing high-performance flash memory.

Figure 1: Nanodot-type floating gate memory with multilayered nanodot array formed by Bio-LBL.

Figure 2: Cross-sectional TEM image of the memory.

Figure 3: ID-VG characteristics

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2.8 Resistive Random Access Memory using Iron-oxide Nano Particle Authors: Y. KAKIHARA, B. ZHENG, and M. UENUMA

Recently, a resistive random access memory (ReRAM) has attracted much attention as a

next generation memory due to their simple structure and high scalability. ReRAM is non-volatile, high-speed access memory utilizing two bi-stable resistances of high resistance state and low resistance state. Iron-oxide ReRAM that has good memory properties such as reliable and high-speed resistance-switching of 10 ns. Therefore, iron-oxide based ReRAM is promising for the development of high-density non-volatile memory.

On the other hand, to achieve a high density memory, it is important to reduce the size of memory cells beyond the limit of current lithographic scale. In order to overcome this scaling limit, the bio nano process (BNP) has been studied as a promising bottom-up process using bio-molecules. Ferritin protein is a well researched material for BNP. The ferritin has a spherical cage structure with inner and outer diameters of 7 nm and 12 nm, respectively. Ferritin can crystallize a Fe-oxide nano-particle with the diameter of 7nm; the crystallization is called bio-mineralization. In this study, we demonstrated ReRAM using iron-oxide nano-particles (NP) synthesized by ferritin protein through a solution process (Fig. 1).

We synthesized the Magnetite (Fe3O4) NPs utilizing ferritin protein as shown in Fig. 2. The determined Fe3O4 NP has excellent uniformity in size and a good crystalline structure. We fab-ricated a monolayer type ReRAM using these NPs. Results confirmed the resistive switching behavior in fabricating the ReRAM (Fig. 3). Moreover, we measured the single Fe3O4 NP by Conductive-AFM (C-AFM). The single Fe3O4 NP also showed resistive switching behavior (Fig. 4). This result indicates that the nano particle utilizing BNP can be applied to a nano-scale memory. Therefore, it is possible to reduce the size of memory cells.

Figure 1: Schematics of concept in this study.

Figure 2: TEM image of ferritin with Magnetite (Fe3O4) nano-particle.

Figure 3: I-V characteristic of monolayer type Re-RAM. Inset shows schematic image of memory structure.

Figure 4: I-V characteristic of single iron-oxide NP. The Inset shows schematic image of the C-AFM measurement.

Apo-ferritin Ferritinwith core

Nano dot

Device fabrication

Ferritin protein Nano particle

Resistive Memory

nanowire

nanowire

Nano particle

Reset

Set

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2.9 Crystallization of Amorphous Silicon Thin Films utilizing Self- Assembled Monolayer with Ligand Authors: Y. TOJO and A. MIURA*

* National Chiao Tung University

Recently, low temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) have been utilized as a derive circuit for high quality displays. The performance of TFTs depends on the quality of the poly-Si thin film. Metal induced crystallization is one of the crystallization methods utilizing silicide materials as a metal catalyst, and makes a poly-Si thin film with large grain. For the crystallization of silicon thin films, nickel is widely used due to the lattice constant of nickel silicide, which has the lattice constant little less than the silicon lattice. However, nickel atoms behave as an impurity in the thin film, and increase the off leakage current of TFTs. Meanwhile, a self-assembled monolayer (SAM) is used for the functionalization of a material surface, and it has been reported that a metal complexation was realized by N-(2-aminoethyl)-3-amino-propyltrimethoxysilane (AEAPS). In this study, we propose a crystal-lization process utilizing AEAPS-SAM to obtain a high-quality polycrystalline silicon thin film. As the nucleus of crystallization, a small amount of nickel was adsorbed on the surface of amor-phous silicon (a-Si) utilizing AEAPS-SAM, and we tried to prepare a large grain size poly-Si thin films and TFTs.

AEAPS-SAM was formed on 50 nm-thick a-Si at 100oC for 1 hour by vapor process as shown in Fig.1. Next, a-Si was placed in nickel acetate solution, and nickel ions were captured at AEAPS-SAM as a nickel complex. Successive UV ozone irradiation was performed for the elimination of AEAPS-SAM. For crystallization, a-Si with adsorbed nickel was annealed at 550oC for 24 hours. Figure 2 shows the grain size and Ni concentration dependences on the Ni immersion time. The average grain diameter was increased from 4.6 μm to 43 μm with short-ening of the Ni immersion time. Meanwhile, the Ni concentration in the crystallized silicon thin film was decreased from 1.0×1019 atoms/cm3 to 7.4×1018 atoms/cm3 with shortening of the Ni immersion time. According to these results, the grain diameter could be increased with de-creasing of the Ni adsorption by controlling the Ni immersion time. Finally, we fabricated top gate type TFTs. Figure 3 shows the transfer characteristics of fabricated TFT. Metal contamination by Ni particle was a concern. Although metal contamination by Ni particles used in this method can degrade the device properties, we obtained device properties such as ON/OFF ratio, the sub-threshold slope, and the field effect mobility with following values; 1×107, 0.79 V/dec, and 98 cm2/Vs, respectively. This indicates that metallic impurities in the film can be kept very low by our process.

We proposed the a-Si crystallization process utilizing AEAPS-SAM, and it was confirmed that the Ni adsorption by AEAPS-SAM, and several tens of micron size of crystalline grains were observed. Furthermore, the TFT characteristic was able to be improved by preparation of poly-Si thin film with very low metallic impurities. Therefore we can conclude that this method is promising for the preparation of high performance TFTs.

Figure 1: AEAPS-SAM

Figure 2: Ni immersion time dependence on the average grain diameter and Ni concentration in silicon layer

Figure 3: Transfer characteristics of poly-Si TFT without and with AEAPS-SAM at Vd = 0.1 V; (W/L = 10 μm/5 μm)

14

2.10 Low-Temperature Crystallization of a-Ge using Cu Nanoparticles Authors: K. BUNDO and M. UENUMA

Germanium (Ge) is one of the promising materials to realize advanced TFT with

high-mobility at low-temperature processing. For this reason, Ge channel TFT enables the fab-rication the SoP (System on Panel), which is expected as a high-performance and mul-ti-functional display device. Metal induced lateral crystallization (MILC), which is a low-temperature crystallization process using metals as catalysts, has the problem of metal impurities. To solve this problem, we have developed crystallization using metal nanoparticles synthesized within cage-shape proteins (ferritins). This technique enables the reduction of metal impurities, changing nucleation density and control the location of the starting point of crystal grain growth in the case of crystallization of a-Si. In this work, the validity of features in this technique for Ge was investigated.

As a preparation, a 50 nm-thick amorphous Ge (a-Ge) was deposited on 100 nm-thick SiO2 / p-Si substrate at room temperature by heating K-cell included Ge. Secondly, Cu-ferritin solu-tion was dropped on a-Ge substrate. After 10 minutes waiting, the solution was removed by centrifugation. Figure 1 shows the SEM images of the a-Ge surface with or without Cu-ferritin. Approximately 7 nm white dots due to Cu nanoparticles (NPs) were observed on the surface of Ge with Cu ferritins. Figure 2 shows the Raman spectrum of a-Ge after annealing at between 250oC and 400oC for 10 hours in N2 ambient. The peak at 300 cm-1 originating from TO phonon of Ge-Ge bond was observed for the annealed sample with Cu NPs. From these results, it is confirmed that the a-Ge was crystallized by introducing Cu NPs at 300oC. Figure 3 shows TEM images of poly-Ge fabricated with 0.3 µg/ml Cu-ferritin solution. It is found that maximum grain size reached 20 nm, and crystallization happened from Ge surface to back side. Figure 4 shows SIMS intensity of Cu concentration in poly-Ge fabricated with Cu NPs or Cu film. In the case of poly-Ge with Cu NPs, Cu concentration decreased more than that of the sample with Cu film. Moreover, the concentration also decreased with decreasing ferritin concentration. It decreased over one order of magnitude compared with poly-Ge fabricated with Cu film. These results show high-quality poly-Ge was realized using our novel process.

Figure 1: SEM images of a-Ge surface; (a) without Cu-ferritins, (b) with Cu-ferritins.

Figure 2: Raman spectrum of a-Ge after anneal from 250oC to 400oC for 10 hours in N2.

Figure 3: TEM images of poly-Ge fabricated with 0.3 µg/ml Cu-ferritin solution; (a) planar image, (b) cross-sectional image.

Figure 4: Metal impurities compared with Cu pattern and Cu NPs using SIMS analysis.

Raman Shift (cm-1)

Inte

nsity

(arb

.uni

ts)

400 ℃

350 ℃

325 ℃300 ℃

275 ℃250 ℃

a-Ge

1.0E+19

1.0E+20

1.0E+21

0 0.2 0.4

MILC1021

1019

1020

Cu co

ncen

trat

ion

(ato

ms/

cm3 )

0 0.2 0.4Ferritin concentration (mg/ml)

15

2.11 Application of Plasmonics to Solar Sells Authors: S. SAIJO, B. ZHENG, I. YAMASHITA, and Y. ISHIKAWA

Photovoltaic devices are well known as a low-cost, environmentally friendly energy source.

To increase industrial market of photovoltaics, however, we need to reduce the fabrication cost of photovoltaic modules and improve the efficiency. This research aims any improvement of the conversion efficiency with a low cost process by applying a plasmon effect: increasing the light absorption between metallic nano particle and a dielectric film.

In this research, gold nano particles were located on the solar cell’s surface by a bio-nano process. The bio-nano process is a technology which utilizes the crystallization of the protein. There are many benefits in the bio-nano process. First, the metallic nano particles don’t ag-gregate, and are separated by proteins. Second, when the uniformly sized-nano particles are wrapped by the protein, we can locate the size-controlled nano particles on the substrate. Third, the protein can bind with a specific substrate depending on the specific peptide. From these benefits, the size-controlled metallic nano particles can be located to an arbitrary place in the bio-nano process (Fig.1). We utilized the ferritin protein in this research.

At the surface of the metallic nano particle, there is the strong electrical field which im-proves the light absorption. The electrical field enhancement is called the plasmon effect. Gen-erally, the solar cell efficiency depends on the light absorption, therefore the effect of the plas-mon is possible to contribute to improve the light absorption of the solar cell. There are three ways to improve the solar cell efficiency with the plasmon effect. The first way is changing the place of nano particles. Figure 2 shows the image of the plasmon effect at the top surface of substrate. The nano particles at the top surface enhanced light scattering. The nano particles embedded in the semiconductor increase light absorption in a specific light wavelength range. The nano particles on the bottom surface induce surface plasmon polariton, leading to increas-ing light absorption. The second way is changing the material of nano particles. The light ab-sorbance spectrum is different for each material. The third way is changing the shape and size of nano particles.

Figure 3 is the scanning electron microscope (SEM) image at the surface of crystal Si solar cell. The white dots refer to the gold nano particles. We achieved the fabrication of dense and uniformly-sized gold nano particles on the crystal Si solar cell, expecting higher light absorption. We will report the plasmon effect on crystal Si solar cells, thin film Si solar cells, and dye sensi-tized solar cells.

Figure 1: Concept of bio-nano process to in-troduce plasmon effect on some devices.

Figure 2: Plasmonic solar cell in the case of introduc-tion to the surface

Figure 3: SEM image at the surface of crystal Si solar cell.

16

2.12 Low-Temperature High-performance InZnO Thin-film Transistors using Wet-process

Authors: L. LU and T. NISHIDA

Zinc oxide (ZnO)-based materials, such as ZnO, indium ZnO (IZO), indium gallium ZnO and zinc tin oxide, have attracted significant attention for the application of thin film transistors (TFTs) due to their excellent optical and electrical properties. For the fabrication of these thin films, vacuum processes, such as, sputtering, pulsed laser deposition, and plasma enhanced chemical vapor deposition were preferred. Vacuum-deposition methods require expensive equipment and result in high manufacturing costs. An alternative technique, the wet-process deposition method, is very likely to be used in the future mass-production of thin film oxides because of its low cost, simplicity, high throughput, and accurate control of composition for mul-ticomponent thin films. However, in order to obtain high performance, high annealing tempera-tures (400oC or more) are commonly required to decompose the organic additives as well as the crystallization of the semiconducting oxides to obtain high properties of TFTs by the use of or-ganic precursors for the fabrication of wet-processed thin films.

In this research, we used an aqueous precursor with the composition ratio of In to Zn at around 4 to 1 to fabricate InZnO TFTs. The fabrication temperature of IZO thin films were 300oC. The bottom-gated structure for TFT fabrication was adopted, a heavily doped p-type silicon wafer was used as a gate electrode. The thicknesses of the thermally grown 50 nm SiO2 thin films were used as the gate insulator. Pt/Ti films were deposited using electro-beam evaporation and were patterned via a typical lift-off process to form source and drain electrodes on the IZO channel layer. The channel width/length of the IZO/STA TFT, were about 500/50 µm.

The electrical performance of the fabricated TFTs was measured in the dark at room tem-perature using a precision semiconductor parameter analyzer (Agilent 4156C). Output and transfer characteristics of the TFTs are depicted in Fig. 1. Very clear pinch off state was obtained, as shown in the output diagram (Fig. 1(a)). Low off-currents of 10-14 and 10-13 A were obtained at drain voltages (Vds) of 0.1 and 5 V, as shown in the transfer diagram (Fig. 1(b)). These off-currents were much lower than many other wet-processed ZnO-based TFTs. A very low turn-on voltage of 0.5 V was obtained. The saturation state of the TFTs was observed at a Vds of lower than 5 V. Calculated field effect mobility (µ) of the TFT were 13.6 cm2/(V⋅s) (Vds=0.1 V) and 11.4 cm2/(V⋅s) (Vds=5 V) in the linear and saturation region. No higher µ values were reported until now at such a low fabrication temperature of 300oC and the low off-current state for wet-processed IZO TFTs. The calculated subthreshold voltage (S) value and threshold voltage (Vth) were 0.17 V/decade and 3.1 V. The on/off current ratio exceeded 109. Clockwise hysteresis with the ∆Vth of 3.0 V was found for the TFT, as shown in the inserted figure in Fig. 1(b). The interface trap density was calculated using N=Ci∆Vth/q, where Ci is the capacitance per unit area of the SiO2, q is the elementary charge. Obtained value was 1.3×1012 cm-2, which showed a good interface, was obtained.

Figure 1: (a) Output and (b) transfer characteristics of aqueous precursor derived IZO TFTs.

1.00E-14

1.00E-12

1.00E-10

1.00E-08

1.00E-06

1.00E-04

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-10 0 10 20 30

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)

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2.13 Low Temperature Processed Oxide Thin Film Transistors (TFTs) by Solution Process Authors: Y. MIURA, L. LU, and T. NISHIDA

Oxide semiconductor TFTs show higher mobility than a-Si TFTs, and are transparent in the

visible light region. In addition, it is possible to fabricate by low temperature less than a-Si TFT fabrication process. Thus, oxide TFTs are expected to become the switching devices for next-generation flexible displays. Especially, zinc oxide (ZnO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO) have been studied actively for those motivations.

Oxide semiconductor thin films have usually been fabricated by a vacuum process; for example, sputtering and pulse laser deposition. The vacuum process has the problem of high equipment costs. To overcome this problem, we have fabricated oxide semiconductor thin films by a Chemical Solution Deposition (CSD) process. The CSD process has advantages like non-vacuum and very simple processing (Fig. 1). Thus, low cost process is achievable. In addi-tion, CSD has high versatility for material selection.

In this study, we fabricated oxide semiconductor TFTs for next-generation flexible display by the CSD process. Usually, a high temperature annealing has been required of more than 700oC for thermal decomposition at CSD process. We have fabricated IGZO TFTs by organic solvent-based precursor solution and we have obtained switching characteristic by annealing over 700oC. Especially, we have found that high temperature annealing over 800°C produced higher performance TFTs (Fig. 2). The cause was the impurities (carbon and hydrogen) de-creasing by the high temperature annealing. So the impurities in the film have to be reduced as much as possible.

We attempted a novel precursor solution to achieve low temperature process. We selected water-based precursor solution. Thermal decomposition temperature of this precursor solution is much lower than the organic solvent-based precursor solution. We fabricated IZO TFTs by water-based precursor solution, and obtained considerably good characteristics (Fig.3, Table. 1) even using low temperature annealing around 300oC. In this way, we successfully achieved high performance oxide TFTs by solution process. These results enable us to expect the realization of switching devices by oxide semiconductor for next-generation flexible display by ink-jet or other solution process.

Fig. 1: CSD process by spin coating.

Table 1: IZO-TFT characteristics utilized water-based precursor solution.

Figure 2: Transfer characteristic of fabricated TFT utilized organic sol-vent-based precursor solution. (700oC~1000oC annealing)

Figure 3: Characteristics of fabricated TFT utilized water-based precursor solution; (a) out-put characteristic, (b) transfer character-istic.

18

2.14 Effect of High Pressure Water Vapor Annealing on the Optical Properties of ZnS-based Inorganic EL Phosphor Authors: T. KONTANI, M. TANIGUCHI, M. HORITA, and N. TAGUCHI*

* Image Tech Inc.

ZnS-based inorganic electroluminescence (EL) has been widely studied for next generation display and illumination devices. In the inorganic EL devices (Fig. 1), which are generally fabri-cated by screen printing methods, the improvement of the luminescence property of ZnS phosphor is the main issue researched. We have researched the atomization effect on ZnS-EL luminance, and already achieved 6 times higher luminance compared with non-atomized ZnS-EL. In order to improve the luminance more, however, the passivation of surface defects introduced by atomization is one of the key issues, since those defects enhances non-radiative recombination for carriers. Therefore it is required to suppress the non-radiative recombination at the surface of phosphors, resulting in brighter luminance. In this study, we investigated the effect of High Pressure water Vapor annealing (HPV, Fig. 2) on ZnS phosphor as the passivation process.

For the phosphor annealed in HPV ambience under the specific conditions, the photolu-minescence intensity was enhanced and the luminance of EL devices also became brighter (Fig. 3, 4). We found that the HPV annealing under the specific condition was effective in ZnS phosphor to achieve higher luminance in EL devices. It is expected that HPV annealing under the optimum condition leads to the improvement of luminance of EL devices more.

Figure 1: Cross-sectional view of EL device.

Figure 2: Schematic of High Pressure water Vapor annealing system.

Figure 3: Photoluminescence spectra of ZnS phosphor before and after HPV.

Figure 4: Luminance-voltage characteristics of the EL devices using ZnS phosphor after HPV and before HPV.

Sample (ZnS phosphor) Hot-plate

Thermo-couple

Thermo meter

Valve for pressure relief

Leak-valve

Pressure gauges

Container for leaked gas

19

2.15 Nano-patterning of ZnO using Quick Gel-Nanoimprint Process Authors: M. ZHANG and Y. ISHIKAWA

Nano-structure devices utilizing photonic crystal and quantum dots exhibit unique proper-

ties such as slow light, carrier multiplication, and are thus expected to have various applications; for example, photovoltaic cells, optical switches, and flat panel displays. Nanoimprint lithography (NIL) has attracted considerable attention as a next generation lithography method, due to its high resolution, high throughput, and low cost. Moreover, some researchers have reported on the thermal NIL process using a sol-gel method for fabrication of a functional device. However, such traditional processing requires a treatment with a long period (>1 h) in order to volatilize the organic solvent in the solution during imprinting. Furthermore, it causes an error in the size of a mold by thermal expansion during the imprinting process with heating. To overcome these problems, we proposed gel-nanoimprint process with prior prebaking for gelation control of im-printed material. In this study, we examined the gel-nanoimprint process as a quick nano-patterning method for zinc oxide (ZnO) films.

Figure 1 shows the nano-patterning process of ZnO thin film by the gel-nanoimprint using a PDMS mold. First, ZnO precursor solution was spin-coated on glass substrate. Second, the sample was prebaked at 220oC for 5 min to evaporate the solvent. Subsequently, the gel-nanoimprint was performed using the PDMS mold. The PDMS mold has nano-pillar patterns with a diameter of 264 nm, a period of 750 nm and a height of 200 nm. Finally, the ZnO thin film was annealed at 400oC for 1h in oxygen ambient to make pyrolysis reaction.

Figure 2 shows SEM micrographs of the ZnO patterns on the glass substrate. The obtained ZnO patterns have a feature of a diameter of 244 nm, a period of 748 nm, and a height of 195 nm. In the thermal NIL process, the dimensions of ZnO patterns have been decreased by 16% and 48% in the horizontal- and perpendicular-directions. The gel-nanoimprint provided much lower shrinkage properties compared to the thermal NIL process. The shrinkage ratio of ZnO patterns were 8% and 3% in the horizontal- and perpendicular-directions, respectively. These results show the gel-nanoimprint is a promising process to fabricate of a lot of applications having nano-structure utilizing a sol-gel solution.

Figure 1: Schematics of process comparison between conventional thermal NIL and proposed Gel-NIL process

Figure 2: Nano-patterning process of ZnO thin film by gel-nanoimprint

Figure 3: SEM image of the ZnO patterns on the glass substrate. (a) top view, (b) cross sectional view

> 1h process + 1h pyrolysis

②PDMS mold

Quick imprint①ZnO

Heating

evaporation【Gel-NIL】 【Conventional】

PDMS mold

Heating

Imprint

ZnO, Glass substrate

ZnO spin-coating (2,000 rpm / 30 sec.)

Drying (220oC / 5 min.)

Imprinting (Pres.:0.21 MPa / 5 min.)

Pyrolysis (400oC / 1 h./ O2)

(a)

(b)

20

2.16 Particle Diameter Control in Nano-Scale by Electro Spray Deposition Method Authors: T. DOE and Y. ISHIKAWA

Printing techniques have a great possibility for the fabrication of flexible and large-area

devices. Electro-spray deposition (ESD) method is one spray process to prepare functional nanoparticles via a dry and simple aerosol process as shown Fig. 1. The ESD method produces micro/nano-droplets by the applied high-voltage. When the optimal high voltage is applied, the spray solution which is inserted to the spray nozzle, forms a circular cone shape at the nozzle tip. The optimal spray configuration is called “Cone-jet mode”, and a stable spray configuration produces micro/nano-scale droplets continuously. The semiconductor nano-particles are formed from the nano-droplets combined with the evaporation and pyrolysis. Lenggoro, et al. reported the fabrication of zinc sulfide (ZnS) nano-particles which had 20 nm for a diameter by ESD method. For the appearance of the quantum confinement effect, small ZnS nano-particles below 10 nm in diameter are required. We introduced a fabrication process of ZnS nano-particles with diameters below 10nm by the ESD, and the method to downsize the nano-particle diameter was performed taking into account the semi-theoretical and experimental analysis. As a spraying precursor solution, the complex solution containing Zn(NO3)2 and SC(NH2)2 was prepared. The glass nozzle contains the precursor solution, and generates micro/nano-droplets in ESD method. We controlled the applied voltage to obtain the Cone-jet mode by microscope observations and current measurements. After spraying, deposited precursor particles on the substrate were cal-cinated in N2 atmosphere and converted to ZnS nano-particles.

The precise diameter of nano-particles was measured from TEM observed images, shown in Fig. 2. We also extracted the size distribution through fitting with a lognormal function. The dependence of the average particle diameter indicates a proportional relation with the second root of the solution flow rate as shown in Fig. 3. This behavior is explained by the Gaňán-Calvo’s equation, which contains the solution parameters and the flow rate. The semi-theoretical analy-sis using the solution parameters roughly corresponded to the experimental results. From these results, we can expect that smaller nano-particles can be fabricated using either the smaller flow rate and/or higher conductivity solution. We obtained nano-particles with a minimum average size of 9.7 nm and 3.1 nm for the FWHM of a fitted curve by controlling the applied voltage at 1.50 kV. We obtained ZnS nano-particles whose size reached to the domain of quantum effect by controlling the applied voltage. We also found that the semi-theoretical equation which is reported in micrometer scale droplets, could explain the dependence of nanometer scale parti-cle sizes on the solution flow rate in this study. This research opens a possibility of producing a quantum dot material through dry and printing process.

Figure 1: Schematic of ESD system, and research objective.

Figure 2: TEM image of ZnS nanoparticles. The inset shows the distribution of nano-particle’s diameter. The average diameter was esti-mated by fitting with a lognormal function.

Figure 3: Dependence of av-erage particle diameter on solution flow rate.

21

3. List of Publications (published 04/2011~ 03/2012)

Academic Journals

1 B. Zheng, N. Zettsu, M. Fukuta, M. Uenuma, T. Hashimoto, K. Gamo, Y. Uraoka, I. Yam-ashita, and H. Watanabe; “Versatile Protein-Based Bifunctional Nano-Systems (Encap-sulation and Directed Assembly): Selective Nanoscale Positioning of Gold Nanoparti-cle-Viral Protein Hybrids”, Chem. Phys. Lett., 506, 76, (2011). (Collaboration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

2 Y. Tojo, A. Miura, I. Yamashita, and Y. Uraoka; “Positional Control of Crystal Grains in Silicon Thin Film Utilizing Cage-Shaped Protein”, Jpn. J. of Appl. Phys., 50, 04DL12, (2011). (Collaboration with Nat'l Chial Tung Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

3 Y. Kawamura, N. Hattori, N. Miyatake, M. Horita, and Y. Uraoka; “ZnO Thin Films Fabri-cated by Plasma-Assisted Atomic Layer Deposition”, Jpn. J. of Appl. Phys., 50, 04DF05, (2011). (Collaboration with Mitsui Eng. & Shipbld. Co., Ltd.)

4 K. Ohara, Y. Tojo, I. Yamashita, T. Yaegashi, M. Moniwa, M. Yoshimaru, and Y. Uraoka; “Floating Gate Memory with Biomineralized Nanodots Embedded in HfO2”, IEEE Trans. Nanotech., 10, 576, (2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST and STARC)

5 M. Uenuma, K. Kawano, B. Zheng, N. Okamoto, M. Horita, S. Yoshii, I. Yamashita, and Y. Uraoka; “Resistive Random Access Memory Utilizing Ferritin Protein with Pt Nanoparti-cles”, Nanotechnology, 22, 215201, (2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

6 I. Hanasaki, Y. Isono, B. Zheng, Y. Uraoka, and I. Yamashita; “Adsorption Density Control of Ferritin Molecules by Multistep Alternate Coating ”, Jpn. J. of Appl. Phys., 50, 065201, (2011). (Collaboration with Kobe Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

7 B. Zheng, M. Uenuma, K. Iwahori, N. Okamoto, Y. Ishikawa, Y. Uraoka, and I. Yamashita; “Sterically Controlled Docking of Gold Nanoparticles on Ferritin Surface by DNA Hybridi-zation”, Nanotechnology, 22, 275312, (2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

8 I. Hanasaki, T. Tanaka, Y. Isono, B. Zheng, Y. Uraoka, and I. Yamashita; “Location and Density Control of Carbon Nanotubes Synthesized Using Ferritin Molecules ”, Jpn. J. of Appl. Phys., 50, 075102, (2011). (Collaboration with Kobe Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

9 K. Ohara, B. Zheng, M. Uenuma, Y. Ishikawa, K. Shiba, I. Yamashita, and Y. Uraoka; “Three-Dimensional Nanodot-Type Floating Gate Memory Fabricated by Bio-Layer-by-Layer Method”, Appl. Phys. Exp., 4, 085004, (2011). (Collaboration with Cancer Inst. JFCR and Mesoscopic Mater. Sci. Lab., NAIST)

10 M. Fujii, Y. Ishikawa, M. Horita, and Y. Uraoka; “Unique Phenomenon in Degradation of Amorphous In2O3-Ga2O3-ZnO Thin-Film Transistors under Dynamic Stress”, Appl. Phys. Exp., 4, 104103, (2011).

11 L. Lu, T. Nishida, M. Echizen, K. Uchiyama, and Y. Uraoka; “Voltage Linearity and Leak-age Currents of Crystalline and Amorphous SrTa2O6 Thin Films Fabricated by Sol-Gel Method”, Ferroelectrics, 421, 82, (2011). (Collaboration with Tsuruoka Nat'l Col. Tech.)

12 M. Uenuma, B. Zheng, T. Imazawa, M. Horita, T. Nishida, Y. Ishikawa, H. Watanabe, I. Yamashita, and Y. Uraoka; “Metal-Nanoparticle-Induced Crystallization of Amorphous Ge Film Using Ferritin”, Appl. Surf. Sci., 258, 3410, (2011). (Collaboration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

22

13 I. Inoue, B. Zheng, K. Watanabe, Y. Ishikawa, K. Shiba, H. Yasueda, Y. Uraoka, and I. Yamashita; “A Novel Bifunctional Protein Supramolecule for Construction of Carbon Nanotube-Titanium Hybrid Material ”, Chem. Comm., 47, 12649, (2011). (Collaboration with Ajinomoto Co., Inc., Mesoscopic Mater. Sci. Lab., NAIST, and Cancer Inst. JFCR)

14 T. Hashimoto, K. Gamo, M. Fukuta, B. Zheng, N. Zettsu, I. Yamashita, Y. Uraoka, and H. Watanabe; “Control of Selective Adsorption Behavior of Ti-Binding Ferritin on a SiO2 Substrate by Atomic-Scale Modulation of Local Surface Charges”, Appl. Phys. Lett., 99, 263701, (2011). (Collaboration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

15 L. Lu, T. Nishida, M. Echizen, K. Uchiyama, and Y. Uraoka; “Capacitance-Voltage and Leakage-Current Characteristics of Sol-Gel-Derived Crystalline and Amorphous SrTa2O6 Thin Films”, Thin Solid Films, 520, 3620, (2012). (Collaboration with Tsuruoka Nat'l Col. Tech.)

16 M. Uenuma, B. Zheng, K. Kawano, M. Horita, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Guided Filament Formation in NiO-Resistive Random Access Memory by Embedding Gold Nanoparticles”, Appl. Phys. Lett., 100, 083105, (2012). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

17 Y. Kawamura, M. Tani, N. Hattori, N. Miyatake, M. Horita, Y. Ishikawa, and Y. Uraoka; “Low-Temperature-Processed Zinc Oxide Thin-Film Transistors Fabricated by Plas-ma-Assisted Atomic Layer Deposition”, Jpn. J. of Appl. Phys., 51, 02BF04, (2012). (Col-laboration with Mitsui Eng. & Shipbld. Co., Ltd.)

18 T. Nishida, K. Fuse, M. Furuta, Y. Ishikawa, and Y. Uraoka; “Crystallization Using Bio-mineralized Nickel Nanodots of Amorphous Silicon Thick Films Deposited by Chemical Vapor Deposition, Sputtering and Electron Beam Evaporation”, Jpn. J. of Appl. Phys., 51, 03CA01, (2012). (Collaboration with Kochi Univ. Tech.)

19 K. Yamasaki, E. Machida, M. Horita, Y. Ishikawa, and Y. Uraoka; “Thin Film Devices Fab-ricated on Double-Layered Polycrystalline Silicon Films Formed by Green Laser Anneal-ing”, Jpn. J. of Appl. Phys., 51, 03CA03, (2012).

20 L. Lu, Y. Miura, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Low-Operating-Voltage Solution-Processed InZnO Thin-Film Transistors Using High-k SrTa2O6”, Jpn. J. of Appl. Phys., 51, 03CB05, (2012). (Collaboration with Tsuruoka Nat'l Col. Tech.)

21 T. Doe, Y. Ishikawa, M. Horita, T. Nishida, and Y. Uraoka; “Control of ZnS Nanoparticles by Electro-Spray Deposition Method”, Jpn. J. of Appl. Phys., 51, 03CC02, (2012).

International Conference and Symposium

1 T. Doe, M. Horita, T. Nishida, Y. Ishikawa, and Y. Uraoka; “Fabrication of Semiconductor Nanoparticles Using Electro Spray Deposition Method”, Proc. 2011 Int'l Meeting for Fu-ture of Electron Devices, Kansai, A-1 (p.32), (Osaka, Japan, May, 2011).

2 K. Yamasaki, E. Machida, M. Horita, Y. Ishikawa, and Y. Uraoka; “Thin Film Transistors and Photo Diodes Fabricated on Double-Layered Polycrystalline Silicon Films Formed by Green Laser Annealing”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, B-4 (p.46), (Osaka, Japan, May, 2011).

3 Y. Kawamura, M. Tani, M. Horita, Y. Ishikawa, and Y. Uraoka; “Low Temperature Pro-cessed ZnO Thin Film Transistors Fabricated by Plasma Assisted Atomic Layer Deposi-tion”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, PB-5 (p.84), (Osaka, Japan, May, 2011).

4 M. Tani, Y. Kawamura, M. Horita, Y. Ishikawa, and Y. Uraoka; “Preparation of ZnO Thin Films by Plasma-Assisted Atomic Layer Deposition for the Application to Thin Film Tran-

23

sistors”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, PB-6 (p.86), (Osaka, Japan, May, 2011).

5 T. Kontani, S. Horiguchi, M. Horita, Y. Ishikawa, N. Taguchi, and Y. Uraoka; “Impact of Atomization Treatment on ZnS Phosphor for Inorganic EL”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, PB-10 (p.94), (Osaka, Japan, May, 2011). (Collabo-ration with Image Tech Inc.)

6 Y. Kakihara, M. Uenuma, N. Okamoto, K. Kawano, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Application of Endohedral Iron-Oxide Ferritin to Resistive Memory”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, PC-3 (p.104), (Osaka, Japan, May, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

7 T. Nishida, K. Asahi, Y. Miura, L. Lu, M. Echizen, Y. Yoneda, H. Kimura, Y. Ishikawa, and Y. Uraoka; “Fabrication of PbTiO3 and Pt Self-Organized Nanocrystal Array Structure on Atomically Flat Sapphire”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, PC-4 (p.106), (Osaka, Japan, May, 2011). (Collaboration with Jpn. Atomic Energy Agency and Nat'l Inst. Mater. Sci.)

8 K. Bundo, T. Imazawa, M. Uenuma, Y. Ishikawa, H. Watanabe, I. Yamashita, and Y. Uraoka; “Low-Temperature Crystallization of Amorphous Ge Thin Films Using Metal Na-noparticles”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, PC-9 (p.116), (Osaka, Japan, May, 2011). (Collaboration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

9 L. Lu, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Characteristics of Solution-Processed TFTs with In4ZnOx/SrTa2O6 Thin Films”, Proc. 2011 Int'l Meeting for Future of Electron Devices, Kansai, PC-11 (p.120), (Osaka, Japan, May, 2011). (Collab-oration with Tsuruoka Nat'l Col. Tech.)

10 T. Kontani, S. Horiguchi, M. Horita, Y. Ishikawa, N. Taguchi, and Y. Uraoka; “Effect of Phosphor Atomization on Luminance of Inorganic EL Devices Prepared by Microwave Sintering”, Proc. 18th Int'l Workshop on Active-Matrix Flatpanel Displays and Devices, P-3 (p.93), (Kyoto, Japan, Jul, 2011). (Collaboration with Image Tech Inc.)

11 K. Yamasaki, E. Machida, M. Horita, Y. Ishikawa, and Y. Uraoka; “Thin Film Devices Fab-ricated on Double-Layered Polycrystalline Silicon Films Formed by Green Laser Anneal-ing”, Proc. 18th Int'l Workshop on Active-Matrix Flatpanel Displays and Devices, P-9 (p.121), (Kyoto, Japan, Jul, 2011).

12 T. Nishida, K. Fuse, M. Furuta, Y. Ishikawa, and Y. Uraoka; “Crystallization Using Bio-minerallized Ni Nanodots of Amorphous Si Thick Films Prepared by CVD and Sputtering Deposition”, Proc. 18th Int'l Workshop on Active-Matrix Flatpanel Displays and Devices, P-11 (p.129), (Kyoto, Japan, Jul, 2011). (Collaboration with Kochi Univ. Tech.)

13 L. Lu, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Interface Effect of High-k SrTa2O6/Gate Electrode on the Characteristics of Solution Processed InZn4Ox Thin-Film Transistors”, Proc. 18th Int'l Workshop on Active-Matrix Flatpanel Displays and Devices, P-15 (p.145), (Kyoto, Japan, Jul, 2011). (Collaboration with Tsuruoka Nat'l Col. Tech.)

14 T. Doe, M. Horita, T. Nishida, Y. Ishikawa, and Y. Uraoka; “Fabrication of ZnS Nanoparti-cles Using Electro Spray Deposition Method”, Proc. 18th Int'l Workshop on Active-Matrix Flatpanel Displays and Devices, P-24 (p.181), (Kyoto, Japan, Jul, 2011).

15 L. Lu, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Interface Effect of High-k SrTa2O6/Gate Electrode on the Characteristics of Solution Processed Thin Film Transistors”, Abst. The 20th IEEE Int'l Symp. on the Applications of Ferroelectrics, Int'l Symp. on Piezoresponse Force Microscopy & Nanoscale Phenomena in Polar Materials, AR491, (Vancouver, Canada, Jul, 2011). (Collaboration with Tsuruoka Nat'l Col. Tech.)

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16 T. Nishida, M. Echizen, L. Lu, K. Asahi, Y. Yoneda, H. Kimura, Y. Ishikawa, and Y. Uraoka; “Fabrication of PbTiO3 and Pt Self-Organized Nanocrystal Array Structure for High Den-sity Ferroelectric Memories”, Abst. Int'l Symp. on Integrated Functionalities 2011, 97 (p.97), (Cambridge, UK, Aug, 2011). (Collaboration with Jpn. Atomic Energy Agency and Nat'l Inst. Mater. Sci.)

17 Y. Kawamura, M. Tani, M. Horita, Y. Ishikawa, and Y. Uraoka; “Preparation of Zinc Oxide Thin Films by Atomic Layer Deposition for the Application to Thin Film Transistors”, Abst. Int'l Display Research Conf. EuroDisplay 2011, P43 (p.68), (Arcachon, France, Sep, 2011).

18 Y. Kawamura, M. Tani, N. Hattori, N. Miyatake, M. Horita, Y. Ishikawa, and Y. Uraoka; “Low Temperature Processed Zinc Oxide Thin Film Transistors by Plasma Assisted Atomic Layer Deposition”, Proc. 2011 Int'l Conf. on Solid State Devices and Materials, A-5-2 (p.593), (Nagoya, Japan, Sep, 2011). (Collaboration with Mitsui Eng. & Shipbld. Co., Ltd.)

19 M. Fujii, R. Ishihara, T. Chen, J. Cingel, M. R. T. Mofrad, M. Kasami, K. Yano, M. Horita, Y. Ishikawa, and Y. Uraoka; “Effects of Excimer Laser Annealing of Oxide Semiconductor Films”, Proc. 2011 Int'l Conf. on Solid State Devices and Materials, A-5-3 (p.594), (Na-goya, Japan, Sep, 2011). (Collaboration with Delft Univ. Tech. and Idemitsu Kosan Co,. Ltd.)

20 M. Uenuma, B. Zheng, T. Imazawa, N. Okamoto, M. Horita, T. Nishida, Y. Ishikawa, H. Watanabe, I. Yamashita, and Y. Uraoka; “Nanoparticle-Induced Crystallization of Amor-phous Ge Film Using Ferritin”, Proc. 2011 Int'l Conf. on Solid State Devices and Materials, P-11-13 (p.428), (Nagoya, Japan, Sep, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST and Osaka Univ.)

21 M. Uenuma, K. Ohara, B. Zheng, I. Yamashita, and Y. Uraoka; “Biological Process for Nano Functional Structures and Devices”, Abst. Int'l Workshop on Quantum Nanostruc-tures and Nanoelectronics 2011, P-44 (p.74), (Tokyo, Japan, Oct, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

22 Y. Uraoka, Y. Tojo, K. Ohara, Y. Ishikawa, and I. Yamashita; “[Invited] Next Generation Display Fabricated by Bio Nano Process”, Proc. The 11th Int'l Meeting on Information Display, 39-1 (p.284), (Seoul, Korea, Oct, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

23 Y. Tojo, A. Miura, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Poly-Si Thin Films Fabrication by Crystallization Using Silane Coupling Treatment”, Proc. The 11th Int'l Meeting on In-formation Display, 39-3 (p.288), (Seoul, Korea, Oct, 2011). (Collaboration with Nat'l Chial Tung Univ. and Mesoscopic Mater. Sci. Lab., NAIST)

24 E. Machida, M. Horita, Y. Ishikawa, Y. Uraoka, and H. Ikenoue; “Crystallinity of Polycrys-talline Silicon Formed by Underwater Laser Annealing”, Proc. The 11th Int'l Meeting on Information Display, 39-4 (p.290), (Seoul, Korea, Oct, 2011). (Collaboration with Kyushu Univ.)

25 M. Fujii, Y. Ishikawa, M. Horita, and Y. Uraoka; “Transient Analysis of the Dynamic Stress Degradation in a-IGZO TFTs”, Proc. The 11th Int'l Meeting on Information Display, P1-84 (p.705), (Seoul, Korea, Oct, 2011).

26 Y. Ishikawa, T. Doe, M. Horita, T. Nishida, and Y. Uraoka; “Nano Order Size ZnO Particles Fabricated by Electro Spray Pyrolysis”, Abst. 24th Int'l Mircoprocsses and Nanotechnol-ogy Conf., 27P-11-59, (Kyoto, Japan, Oct, 2011).

27 T. Doe, Y. Ishikawa, M. Horita, T. Nishida, and Y. Uraoka; “Downsizing to Quantum Dots Range of Zinc Sulfide Particles Using Electro Spray Pyrolysis Route”, Abst. 2011 GIST/NCTU/NAIST Joint Symp. on Advanced Materials, P-10 (p.28), (Gwangju, Korea, Nov, 2011).

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28 K. Ohara, B. Zheng, M. Uenuma, I. Yamashita, and Y. Uraoka; “Three-Dimensional Nanodot-Type Floating Gate Memory with Multi-Layered Nanodot Array Formed by Bio-LBL”, Proc. Int'l Symp. on Advanced Nanodevices and Nanotechnology 2011, P1-17 (p.66), (Hawaii, USA, Dec, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

29 M. Uenuma, B. Zheng, K. Kawano, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Application of Gold Nanoparticle to ReRAM”, Proc. International Symposium on Advanced Nanodevices and Nanotechnology 2011, P1-18 (p.68), (Hawaii, USA, Dec, 2011). (Col-laboration with Mesoscopic Mater. Sci. Lab., NAIST)

30 N. Taguchi, M. Susaki, M. Taniguchi, and Y. Uraoka; “Characteristics of EL Devices by External Sintering ZnS-Phosphors Sealed in Vacuum-Tube”, Proc. The 18th Int'l Display Workshops, PHp-12L (p.779), (Nagoya, Japan, Dec, 2011). (Collaboration with Image Tech Inc. and Kochi Nat'l Col. Tech.)

31 B. Zheng, M. Uenuma, Y. Uraoka, and I. Yamashita; “Bioconjugates Containing Ferritin and Metal Nanoparticles”, Proc. 2nd Int'l Conf. on Advanced Material Research, R0155 (p.833), (Chengdu, China, Jan, 2012). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST)

32 M. Fujii, Y. Ueoka, H. Yamazaki, M. Horita, Y. Ishikawa, and Y. Uraoka; “Improvement of a-IGZO TFT Performance by High Pressure Vapor Annealing”, Abst. 8th Int'l Thin-Film Transistor Conf., Ox6 (p.48), (Lisbon, Portugal, Jan, 2012).

33 L. Lu, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Temperature Effect of Solution-Processed InZnO Thin Film Transistors”, Abst. 8th Int'l Thin-Film Tran-sistor Conf., Ox11 (p.53), (Lisbon, Portugal, Jan, 2012). (Collaboration with Tsuruoka Nat'l Col. Tech.)

34 Y. Kawamura, L. Lu, K. Yoshitsugu, M. Tani, Y. Ishikawa, and Y. Uraoka; “Effects of Gate Insulator on Thin Film Transistor with ZnO Channel Layer Deposited by Plasma Assisted Atomic Layer Deposition”, Abst. 8th Int'l Thin-Film Transistor Conf., Ox18 (p.60), (Lisbon, Portugal, Jan, 2012).

35 E. Machida, M. Horita, Y. Ishikawa, Y. Uraoka, T. Okuyama, and H. Ikenoue; “Super Low-Temperature Crystallization of Polycrystalline Silicon Thin Films by Underwater La-ser Annealing”, Abst. 8th Int'l Thin-Film Transistor Conf., Oral Session 5-5 (p.29), (Lisbon, Portugal, Jan, 2012). (Collaboration with TOYOBO Co., Ltd. and Kyushu Univ.)

36 H. Yamazaki, M. Fujii, Y. Ueoka, Y. Ishikawa, M. Fujiwara, E. Takahashi, and Y. Uraoka; “High Reliability a-InGaZnO Thin Film Transistors with Low Hydrogen SiNx Gate Insula-tors”, Abst. 8th Int'l Thin-Film Transistor Conf., Oral Session 7-3 (p.36), (Lisbon, Portugal, Jan, 2012). (Collaboration with Nissin Electric)

Domestic Conference and Symposium (All proceedings were written in Japanese)

1 L. Lu, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, T. Shiosaki, and Y. Uraoka; “Characteristics of Solution-Processed TFTs with In4ZnOx/SrTa2O6 Thin Films”, Proc. 28th The Meeting on Ferroelectric Materials and Their Application, 26-T-12 (p.73), (Co-op Inn Kyoto, May, 2011). (Collaboration with Tsuruoka Nat'l Col. Tech.) (“溶液法で作製した In4ZnOx/SrTa2O6薄膜トランジスタの特性”, 第 28 回強誘電体応用会

議)

2 M. Horita, K. Yamasaki, E. Machida, Y. Ishikawa, and Y. Uraoka; “Simultaneous Crystal-lization of Double-Layered Si Thin Films and Fabrication of Thin Film Devices”, Proc. IEICE Silicon Devices and Materials, SDM2011-68 (p.103), (Nagoya Univ., Jul, 2011). (“グリーンレーザーによる積層構造シリコン薄膜の同時結晶化と薄膜デバイスへの応用”, 電子情報通信学会 シリコン材料・デバイス研究会)

26

3 Y. Uraoka, Y. Tojo, Y. Ishikawa, and I. Yamashita; “Raman Spectroscopic Imaging of Sili-con Thin Film for High Performance Display”, Abst. JSAP, the 72nd Fall Meeting, 29p-ZB-2 (p.30), (Yamagata Univ., Aug, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“高性能ディスプレイの実現に向けたシリコン薄膜のラマン分光分析”, 第 72 回秋季応用

物理学関連連合講演会)

4 T. Nishida, K. Asahi, Y. Yoneda, K. Tamura, D. Matsumura, H. Kimura, Y. Ishikawa, and Y. Uraoka; “Growth of Pt Atomically Flat Layer on Sapphire Substrate for Electrical Meas-urement of Ferroelectric Nanocrystal (II)”, Abst. JSAP, the 72nd Fall Meeting, 30a-P2-7 (p.09-007), (Yamagata Univ., Aug, 2011). (Collaboration with Jpn. Atomic Energy Agency and Nat'l Inst. Mater. Sci.) (“強誘電体ナノ結晶評価のためのサファイア上への Pt 原子レベル平坦層の形成 (II)”, 第72 回秋季応用物理学関連連合講演会)

5 S. Kumagai, I. Yamashita, Y. Uraoka, and M. Sasaki; “Improving Mechanical Characteris-tics of Si Thin Film by Metal-Induced Lateral Crystallization”, Abst. JSAP, the 72nd Fall Meeting, 30p-E-5 (p.22-020), (Yamagata Univ., Aug, 2011). (Collaboration with Toyota Technological Inst. and Mesoscopic Mater. Sci. Lab., NAIST) (“Ni フェリチンを用いた金属誘起横方向結晶成長による Si 薄膜機械特性の向上”, 第 72回秋季応用物理学関連連合講演会)

6 J. Masuyama, S. Horiguchi, T. Kontani, M. Susaki, N. Taguchi, and Y. Uraoka; “Electro-luminescence of CuCl2 Added ZnS Phosphor Prepared by Microwave-Heating Method”, Abst. JSAP, the 72nd Fall Meeting, 31a-P5-24 (p.14-168), (Yamagata Univ., Aug, 2011). (Collaboration with Osaka Prefecture Univ. Col. Tech., Kochi Nat'l Col. Tech., and Image Tech Inc.) (“マイクロ波加熱法により作製された CuCl2添加 ZnS 蛍光体の EL 発光”, 第 72 回秋季応

用物理学関連連合講演会)

7 T. Nonaka, W. Shichida, Y. Uraoka, N. Taguchi, and S-I. Yamamoto; “Emission Evaluation of Inorganic EL Devices with Multi-Planar Electrodes Array”, Abst. JSAP, the 72nd Fall Meeting, 31a-P5-28 (p.14-172), (Yamagata Univ., Aug, 2011). (Collaboration with Ryu-koku Univ. and Image Tech Inc.) (“平面電極構造をもつ分散型無機 EL 素子の発光特性”, 第 72 回秋季応用物理学関連連合

講演会)

8 Y. Miura, L. Lu, M. Echizen, T. Nishida, M. Horita, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Characteristics of Oxide TFT with High-k Gate Insulator”, Abst. JSAP, the 72nd Fall Meeting, 31p-C-5 (p.06-018), (Yamagata Univ., Aug, 2011). (Collaboration with Tsu-ruoka Nat'l Col. Tech.) (“high-k 材料をゲート絶縁膜に用いた酸化物 TFT の特性”, 第 72回秋季応用物理学関連連

合講演会)

9 M. Uenuma, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Characterization of Bipolar Resistive Switching in NiO”, Abst. JSAP, the 72nd Fall Meeting, 31p-ZK-9 (p.06-165), (Yamagata Univ., Aug, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“バイポーラ型 NiO 抵抗変化メモリの特性評価”, 第 72 回秋季応用物理学関連連合講演

会)

10 T. Nishida, Y. Miura, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Electrical Properties of (BaxSr1-x)Ta2O6 Thin Films Fabricated by Low-Temperature Processes”, Abst. JSAP, the 72nd Fall Meeting, 1a-C-2 (p.06-028), (Yamagata Univ., Sep, 2011). (Collaboration with Tsuruoka Nat'l Col. Tech.) (“(BaxSr1-xTa2O6)高誘電薄膜の低温作製と電気的特性”, 第 72 回秋季応用物理学関連連合

27

講演会)

11 M. Tani, Y. Kawamura, M. Horita, Y. Ishikawa, and Y. Uraoka; “Preparation of ZnO Thin Films by Plasma Assisted Atomic Layer Deposition for the Application to Thin Film Tran-sistors”, Abst. JSAP, the 72nd Fall Meeting, 1a-N-2 (p.21-028), (Yamagata Univ., Sep, 2011). (“プラズマ ALD 法による ZnO 薄膜の形成および薄膜トランジスタへの応用”, 第 72 回秋

季応用物理学関連連合講演会)

12 M. Fujii, R. Ishihara, T. Chen, J. Cingel, M. R. T. Mofrad, M. Kasami, K. Yano, Y. Ishikawa, and Y. Uraoka; “Effects of Excimer Laser Annealing on Oxide Semiconductor Thin Films”, Abst. JSAP, the 72nd Fall Meeting, 1a-N-9 (p.21-035), (Yamagata Univ., Sep, 2011). (Collaboration with Delft Univ. Tech. and Idemitsu Kosan Co,. Ltd.) (“酸化物半導体薄膜へのエキシマレーザアニール効果”, 第 72 回秋季応用物理学関連連合

講演会)

13 K. Watanabe, I. Inoue, B. Zheng, H. Yasueda, Y. Ishikawa, Y. Uraoka, and I. Yamashita; “Nano-Controlled Fabrication of Photoactive Materials by Cage-Shaped Mutant Protein”, Abst. JSAP, the 72nd Fall Meeting, 1a-V-15 (p.12-342), (Yamagata Univ., Sep, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST and Ajinomoto Co., Inc.) (“変異球殻状タンパク質を用いた光触媒ナノ構造作製”, 第 72 回秋季応用物理学関連連合

講演会)

14 K. Yamasaki, E. Machida, M. Horita, Y. Ishikawa, and Y. Uraoka; “Simultaneous Crystal-lization of Double-Layered Polycrystalline Silicon Films by Green Laser Annealing for Three-Dimensional Integrated Devices”, Abst. JSAP, the 72nd Fall Meeting, 1p-M-7 (p.13-138), (Yamagata Univ., Sep, 2011). (“三次元デバイス応用に向けたグリーンレーザーアニールによる積層構造多結晶シリコン薄膜の同時結晶化技術”, 第 72 回秋季応用物理学関連連合講演会)

15 A. Aono, H. Ikenoue, E. Machida, M. Horita, Y. Ishikawa, and Y. Uraoka; “Observation of Cavitation Bubble Generated by Underwater Laser Annealing for Defect Inactivation of LTPS-TFTs”, Abst. JSAP, the 72nd Fall Meeting, 1p-M-8 (p.13-139), (Yamagata Univ., Sep, 2011). (Collaboration with Kochi Nat'l Col. Tech. and Kyushu Univ.) (“水中レーザーアニールによる LTPS-TFT 欠陥不活性化処理中に生成される気泡の挙動観察”, 第 72 回秋季応用物理学関連連合講演会)

16 K. Bundo, M. Uenuma, Y. Ishikawa, H. Watanabe, I. Yamashita, and Y. Uraoka; “Low-Temperature Crystallization of Amorphous Germanium Thin Films Using Cu Nano-particles”, Abst. JSAP, the 72nd Fall Meeting, 1p-M-10 (p.13-141), (Yamagata Univ., Sep, 2011). (Collaboration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST) (“Cuナノ粒子を用いたa-Ge薄膜の低温結晶化”, 第72回秋季応用物理学関連連合講演会)

17 K. Ichikawa, M. Matsue, H. Akamatsu, K. Yamasaki, M. Horita, Y. Ishikawa, and Y. Uraoka; “Investigation of Two Layers Simultaneous Crystallized LTPS-TFT Flash Memory Using High-k Materials”, Abst. JSAP, the 72nd Fall Meeting, 1p-M-15 (p.13-146), (Yam-agata Univ., Sep, 2011). (Collaboration with Kobe City Col. Tech.) (“High-k 材料を用いた 2 層同時結晶化低温 poly-Si TFT フラッシュメモリの特性評価”, 第72 回秋季応用物理学関連連合講演会)

18 B. Zheng, M. Uenuma, I. Yamashita, and Y. Uraoka; “Novel Gold Nanoparticle Assem-blies by Using DNA-Modified Ferritin”, Abst. JSAP, the 72nd Fall Meeting, 1p-V-2 (p.12-344), (Yamagata Univ., Sep, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“DNA修飾フェリチンを用いた新規金ナノ粒子集合体の作製”, 第72回秋季応用物理学関

連連合講演会)

28

19 M. Fukuta, M. Uenuma, B. Zheng, N. Okamoto, I. Yamashita, Y. Uraoka, and H. Watanabe; “Selective Adsorption of Ti-Binding Ferritins with Alanine Substitution Mutants in the Absence of Surfactant Agents”, Abst. JSAP, the 72nd Fall Meeting, 1p-V-10 (p.12-352), (Yamagata Univ., Sep, 2011). (Collaboration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST) (“界面活性剤非存在下でのTi認識ペプチド修飾フェリチン選択吸着の実現”, 第 72回秋季

応用物理学関連連合講演会)

20 T. Hashimoto, B. Zheng, M. Fukuta, K. Gamo, N. Zettsu, I. Yamashita, Y. Uraoka, and H. Watanabe; “Atmospheric Pressure He Plasma Assisted Protein Removal in Ferritin Pro-tein-Based Encapsulation/Transport Process for Plasmonic Device Fabrication”, Abst. JSAP, the 72nd Fall Meeting, 1p-V-11 (p.12-353), (Yamagata Univ., Sep, 2011). (Collab-oration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST) (“フェリチンタンパク質によるプラズモニックデバイス作製プロセスにおける大気圧 Heプラズマ応用タンパク質除去技術の検討”, 第 72 回秋季応用物理学関連連合講演会)

21 K. Ohara, B. Zheng, M. Uenuma, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Floating Gate Memory with Multilayered Bio-Nanodot Array”, Abst. JSAP, the 72nd Fall Meeting, 1p-V-12 (p.12-354), (Yamagata Univ., Sep, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“Bio-LBL 法による積層ナノドット型フローティングゲートメモリの作製”, 第 72 回秋季

応用物理学関連連合講演会)

22 Y. Kakihara, M. Uenuma, N. Okamoto, K. Kawano, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Application of Iron-Oxide Nanoparticles to Resistive Memory”, Abst. JSAP, the 72nd Fall Meeting, 1p-V-13 (p.12-355), (Yamagata Univ., Sep, 2011). (Collab-oration with Mesoscopic Mater. Sci. Lab., NAIST) (“酸化鉄ナノ粒子の抵抗変化メモリ応用”, 第 72 回秋季応用物理学関連連合講演会)

23 S. Miyachi, S. Kumagai, I. Yamashita, Y. Uraoka, and M. Sasaki; “Improving MEMS De-vice by Crystallization of Si Thin Film Using Ni Ferritin”, Abst. JSAP, the 72nd Fall Meet-ing, 1p-V-14 (p.12-356), (Yamagata Univ., Sep, 2011). (Collaboration with Toyota Tech-nological Inst. and Mesoscopic Mater. Sci. Lab., NAIST) (“Ni フェリチンを用いた Si 薄膜の結晶化による MEMS デバイス特性の向上”, 第 72 回秋

季応用物理学関連連合講演会)

24 I. Inoue, I. Yamashita, Y. Uraoka, and H. Yasueda; “Construction of Advanced Photoac-tive Materials by Application of a Novel Caged-Shaped Protein CDT1 through Bio Nano Process”, Abst. Society for Biotechnology, Japan, 63rd Annual Meeting , 1S3p03 (p.12), (Tokyo Univ. Agri. and Tech., Sep, 2011). (Collaboration with Ajinomoto Co., Inc. and Mesoscopic Mater. Sci. Lab., NAIST) (“バイオナノプロセス技術による光触媒素子構造へ向けて”, 第 63 回日本生物工学会大

会)

25 Y. Uraoka, M. Uenuma, B. Zheng, and Y. Ishikawa; “Next Generation Devices Fabricated by Bio Nano Process”, Abst. Society for Biotechnology, Japan, 63rd Annual Meeting , 1S3p05 (p.13), (Tokyo Univ. Agri. and Tech., Sep, 2011). (“生体超分子を利用した次世代情報機能素子の研究”, 第 63 回日本生物工学会大会)

26 Y. Kawamura, M. Tani, M. Horita, Y. Ishikawa, and Y. Uraoka; “Low Temperature Fabrica-tion of Zinc Oxide Thin Films Transistors by Using Atomic Layer Deposition”, Abst. 8th Thin Film Materials & Devices Meeting, 4P39 (p.86), (Ryukoku Univ. Avanti Kyoto Hall, Nov, 2011). (“原子層堆積法による酸化亜鉛薄膜トランジスタの低温形成”, 薄膜材料デバイス研究会

第 8 回研究集会)

27 K. Bundo, M. Uenuma, Y. Ishikawa, H. Watanabe, I. Yamashita, and Y. Uraoka;

29

“Low-Temperature Crystallization of Amorphous Germanium Thin Films Using Cu Nano-particles”, Abst. 8th Thin Film Materials & Devices Meeting, 5P08 (p.173), (Ryukoku Univ. Avanti Kyoto Hall, Nov, 2011). (Collaboration with Osaka Univ. and Mesoscopic Mater. Sci. Lab., NAIST) (“Cu ナノ粒子を用いた a-Ge 薄膜の低温結晶化”, 薄膜材料デバイス研究会第 8 回研究集

会)

28 M. Zhang, L. Lu, M. Horita, T. Nishida, Y. Ishikawa, and Y. Uraoka; “Development of Gel-Nanoimprint Process for Quick Patterning”, Abst. 8th Thin Film Materials & Devices Meeting, 5P34 (p.213), (Ryukoku Univ. Avanti Kyoto Hall, Nov, 2011). (“短時間パターニングを目指したゲル－ナノインプリントプロセスの開発”, 薄膜材料デ

バイス研究会第 8 回研究集会)

29 Y. Kakihara, M. Uenuma, N. Okamoto, K. Kawano, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Application of FeOx Nanoparticles to Resistive Memory”, Abst. 8th Thin Film Materials & Devices Meeting, 5P38 (p.218), (Ryukoku Univ. Avanti Kyoto Hall, Nov, 2011). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“酸化鉄ナノ粒子の抵抗変化メモリ応用”, 薄膜材料デバイス研究会第 8 回研究集会)

30 L. Lu, Y. Miura, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Effect of Gate Electrode on the Characteristics of InZnO Thin Film Transistors Using High-k Material of SrTa2O6”, Abst. 8th Thin Film Materials & Devices Meeting, 5P42 (p.222), (Ryukoku Univ. Avanti Kyoto Hall, Nov, 2011). (Collaboration with Tsuruoka Nat'l Col. Tech.) (“High-k 材料 SrTa2O6を用いた InZnO 薄膜トランジスタの電気特性におけるゲート電極材料の影響”, 薄膜材料デバイス研究会第 8 回研究集会)

31 M. Tani, Y. Kawamura, M. Horita, Y. Ishikawa, and Y. Uraoka; “Deposition Temperature Dependence on Characteristics of ZnO Thin Film Transistors by Plasma Assisted Atomic Layer Deposition”, Abst. 8th Thin Film Materials & Devices Meeting, 5P40 (p.220), (Ryukoku Univ. Avanti Kyoto Hall, Nov, 2011). (“プラズマ原子層堆積法により形成した ZnO 膜をチャネルとした薄膜トランジスタの特性における堆積温度依存性”, 薄膜材料デバイス研究会第 8 回研究集会)

32 T. Kontani, M. Taniguchi, M. Horita, N. Taguchi, Y. Ishikawa, and Y. Uraoka; “Effect of High Pressure Water Vapor Annealing on the Optical Properties of ZnS-Based Inorganic EL Phosphor”, Proc. IEICE Silicon Devices and Materials, SDM2011-132 (p.1), (NAIST, Dec, 2011). (Collaboration with Image Tech Inc.) (“ZnS系無機 EL蛍光体の発光特性に対する高圧水蒸気熱処理の効果”, 電子情報通信学会

シリコン材料・デバイス研究会)

33 T. Itakura, H. Yamada, Y. Uraoka, I. Yamashita, and S-I. Yamamoto; “Basic Characteris-tics of Distributed Inorganic EL Panels with Multi-Planar Electrodes Array”, Proc. IEICE Silicon Devices and Materials, SDM2011-133 (p.7), (NAIST, Dec, 2011). (Collaboration with Ryukoku Univ., Kyoto Univ., and Mesoscopic Mater. Sci. Lab., NAIST) (“平面電極を用いた分散型無機 EL パネルの基本特性”, 電子情報通信学会 シリコン材

料・デバイス研究会)

34 T. Nonaka, Y. Uraoka, N. Taguchi, and S-I. Yamamoto; “Selective Nanoscale Positioning of Co Nanoparticles on Ti and SiO2 Surfaces”, Proc. IEICE Silicon Devices and Materials, SDM2011-137 (p.29), (NAIST, Dec, 2011). (Collaboration with Ryukoku Univ. and Image Tech Inc.) (“Ti 電極上コバルトナノ粒子の位置選択性制御”, 電子情報通信学会 シリコン材料・デバ

イス研究会)

35 M. Zhang, S. Araki, L. Lu, M. Horita, T. Nishida, Y. Ishikawa, and Y. Uraoka; “Fabrication of 2D Photonic-Crystal by ZnO Using Gel-Nanoimprint Process”, Proc. IEICE Silicon De-

30

vices and Materials, SDM2011-140 (p.43), (NAIST, Dec, 2011). (“ゲル－ナノインプリントプロセスによる ZnO－2 次元フォトニック結晶の作製”, 電子

情報通信学会 シリコン材料・デバイス研究会)

36 Y. Ishikawa; Abst. 15th NAIST Science and Technology Seminar, 5 (p.41), (NAIST, Dec, 2011). (“エレクトロスプレー法による半導体ナノ粒子作製プロセス”, 第15回NAIST科学技術セ

ミナー)

37 T. Nishida, L. Lu, M. Echizen, K. Uchiyama, Y. Ishikawa, and Y. Uraoka; “Properties of Solution-Processed TFTs with IGZO/SrTa2O6 Thin Films”, Abst. Material Research Soci-ety, Japan, the 21st Academic Symp., D-P22 (p.ABS-D27), (Yokohama Kaikou Memorial Museum, Dec, 2011). (Collaboration with Tsuruoka Nat'l Col. Tech.) (第 21 回日本 MRS 学術シンポジウム)

38 T. Nishida, L. Lu, M. Echizen, K. Uchiyama, H. Kimura, Y. Ishikawa, and Y. Uraoka; “Voltage Linearity of (Ba,Sr)TaxOy and (Ba,Sr)TixOy Thin Films”, Abst. Material Research Society, Japan, the 21st Academic Symp., E-P13 (p.ABS-E11), (Yokohama Kaikou Me-morial Museum, Dec, 2011). (Collaboration with Tsuruoka Nat'l Col. Tech. and Nat'l Inst. Mater. Sci.) (第 21 回日本 MRS 学術シンポジウム)

39 T. Ban, Y. Kakihara, M. Uenuma, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Fabrication of Resistive Memory Using Ta-Oxide Nano-Particles”, Proc. The 17th Workshop on Gate Stack Technology and Physics, P29 (p.225), (TORAY Comprehensive Training Center, Jan, 2012). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“酸化タンタルナノ粒子を用いた抵抗変化メモリの作製”, ゲートスタック研究会-材料・

プロセス・評価の物理- 第 17 回研究会)

40 H. Kamitake, K. Ohara, M. Uenuma, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Nanodot-Type Floating Gate Memory with High-Density Nanodot Array Formed Utilizing Listeria Ferritin”, Proc. The 17th Workshop on Gate Stack Technology and Physics, P31 (p.217), (TORAY Comprehensive Training Center, Jan, 2012). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“リステリアフェリチンを利用したナノドット型フローティングゲートメモリの作製”, ゲートスタック研究会-材料・プロセス・評価の物理- 第 17 回研究会)

41 H. Yamazaki, M. Fujii, Y. Ueoka, M. Fujiwara, E. Takahashi, Y. Ishikawa, and Y. Uraoka; “Effect of Hydrogen Contents in Gate Insulators on a-InGaZnO Thin Film Transistors”, Abst. JSAP, the 59th Spring Meeting, 15a-GP3-3 (p.06-092), (Waseda Univ., Mar, 2012). (Collaboration with Nissin Electric) (“アモルファス InGaZnO 薄膜トランジスタにおけるゲート絶縁膜中水素量が信頼性に与える影響”, 第 59 回春季応用物理学関連連合講演会)

42 Y. Kawamura, M. Tani, M. Horita, Y. Ishikawa, and Y. Uraoka; “Fabrication and Reliability Evaluation of Thin Film Transistors with ZnO Channel Layer Deposited by Plasma As-sisted Atomic Layer Deposition”, Abst. JSAP, the 59th Spring Meeting, 15p-GP2-10 (p.21-010), (Waseda Univ., Mar, 2012). (“プラズマ ALD 法による ZnO 薄膜トランジスタの作製および信頼性評価”, 第 59 回春季

応用物理学関連連合講演会)

43 M. Fujii, R. Ishihara, T. Chen, J. Cingel, M. R. T. Mofrad, M. Kasami, K. Yano, Y. Ishikawa, and Y. Uraoka; “Improvement of the IZO TFTs Characteristics Using Excimer Laser An-nealing”, Abst. JSAP, the 59th Spring Meeting, 15p-GP2-13 (p.21-013), (Waseda Univ., Mar, 2012). (Collaboration with Delft Univ. Tech. and Idemitsu Kosan Co,. Ltd.) (“エキシマレーザーアニールを用いた IZO TFTの特性”, 第 59回春季応用物理学関連連合

講演会)

31

44 M. Fujii, Y. Ueoka, H. Yamazaki, M. Horita, Y. Ishikawa, and Y. Uraoka; “Effect of High Pressure Water Vapor Annealing for Improvement of IGZO TFTs”, Abst. JSAP, the 59th Spring Meeting, 15p-GP2-14 (p.21-014), (Waseda Univ., Mar, 2012). (“高圧水蒸気熱処理による a-IGZO TFT 特性改善効果”, 第 59 回春季応用物理学関連連合

講演会)

45 H. Kamitake, K. Ohara, M. Uenuma, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Nanodot-Type Floating Gate Memory with High-Density Nanodot Array Formed Utilizing Listeria Ferritin”, Abst. JSAP, the 59th Spring Meeting, 16p-A1-17 (p.13-189), (Waseda Univ., Mar, 2012). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“リステリアフェリチンを利用したナノドット型フローティングゲートメモリ”, 第 59 回

春季応用物理学関連連合講演会)

46 L. Lu, Y. Miura, T. Nishida, M. Echizen, Y. Ishikawa, K. Uchiyama, and Y. Uraoka; “Effect of Gate Electrode on the Characteristics of InZnO Thin Film Transistors Using High-k Material”, Abst. JSAP, the 59th Spring Meeting, 16p-B3-9 (p.09-001), (Waseda Univ., Mar, 2012). (Collaboration with Tsuruoka Nat'l Col. Tech.) (“High-k 材料を用いた InZnO 薄膜トランジスタの電気特性におけるゲート電極材料の影響”, 第 59 回春季応用物理学関連連合講演会)

47 B. Zheng, M. Uenuma, Y. Uraoka, and I. Yamashita; “Construction of Au Nanoparti-cle/Ferritin Satellite Nanostructures”, Abst. JSAP, the 59th Spring Meeting, 16p-F1-7 (p.12-380), (Waseda Univ., Mar, 2012). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“金/フェリチンサテライト構造の作製”, 第 59 回春季応用物理学関連連合講演会)

48 T. Ban, Y. Kakihara, M. Uenuma, B. Zheng, Y. Ishikawa, I. Yamashita, and Y. Uraoka; “Fabrication of Resistive Memory Using Ta-Oxide Nanoparticles”, Abst. JSAP, the 59th Spring Meeting, 16p-F6-4 (p.06-145), (Waseda Univ., Mar, 2012). (Collaboration with Mesoscopic Mater. Sci. Lab., NAIST) (“酸化タンタルナノ粒子を用いた抵抗変化メモリの作製”, 第 59 回春季応用物理学関連連

合講演会)

49 E. Machida, M. Horita, Y. Ishikawa, Y. Uraoka, T. Okuyama, and H. Ikenoue; “Crystalliza-tion to Polycrystalline Silicon Thin Films by Underwater Laser Annealing at Super Low-Temperature”, Abst. JSAP, the 59th Spring Meeting, 17a-A6-5 (p.13-131), (Waseda Univ., Mar, 2012). (Collaboration with TOYOBO Co., Ltd. and Kyushu Univ.) (“水中レーザーアニールによる多結晶シリコン薄膜の超低温結晶化”, 第 59 回春季応用物

理学関連連合講演会)

50 S. Tomita, M. Kobayashi, K. Sawada, K. Shiba, H. Yanagi, I. Yamashita, and Y. Uraoka; “Meta-molecules Using a Complex of Gold Nanoparticles and Tobacco Mosaic Virus”, Abst. JSAP, the 59th Spring Meeting, 17a-B9-11 (p.03-231), (Waseda Univ., Mar, 2012). (Collaboration with Quantum Mater. Sci. Lab., NAIST, Cancer Inst. JFCR, SPring-8, and Mesoscopic Mater. Sci. Lab., NAIST) (“金ナノ粒子・タバコモザイクウイルス複合体によるカイラルメタ分子”, 第 59 回春季応

用物理学関連連合講演会)

51 K. Ichikawa, M. Matsue, H. Akamatsu, K. Yamasaki, Y. Kawamura, M. Horita, and Y. Uraoka; “Investigation of Low Temperature Poly-Si TFT Flash Memory Using Deposited Al2O3 Thin Film by ALD Method for the Control Oxide”, Abst. JSAP, the 59th Spring Meeting, 17p-A6-6 (p.13-143), (Waseda Univ., Mar, 2012). (Collaboration with Kobe City Col. Tech.) (“ALD 法により堆積した Al2O3薄膜をコントロール酸化膜に用いた低温 poly-Si TFT フラッシュメモリの特性評価”, 第 59 回春季応用物理学関連連合講演会)

52 T. Kontani, M. Taniguchi, M. Horita, N. Taguchi, Y. Ishikawa, and Y. Uraoka; “Effect of High

32

Pressure Water Vapor Annealing on the Optical Properties of ZnS Phosphor for Inorganic EL Devices”, Abst. JSAP, the 59th Spring Meeting, 17p-E2-1 (p.14-201), (Waseda Univ., Mar, 2012). (Collaboration with Image Tech Inc.) (“無機 EL デバイス用 ZnS 蛍光体の発光特性に対する高圧水蒸気熱処理の効果”, 第 59 回

春季応用物理学関連連合講演会)

53 M. Uenuma, B. Zheng, Y. Ishikawa, and Y. Uraoka; “Reduction of Forming Voltage in NiO-ReRAM”, Abst. JSAP, the 59th Spring Meeting, 17p-F6-2 (p.06-175), (Waseda Univ., Mar, 2012). (“NiO-ReRAM におけるフォーミング電圧の低減”, 第 59 回春季応用物理学関連連合講演

会)

54 S. Araki, M. Zhang, T. Doe, L. Lu, M. Horita, T. Nishida, Y. Ishikawa, and Y. Uraoka; “De-velopment of Quick Patterning Method Using Gel-Nanoimprint Process”, Abst. JSAP, the 59th Spring Meeting, 18a-A2-3 (p.07-061), (Waseda Univ., Mar, 2012). (“ゲル-ナノインプリントによる短時間パターニング法の開発”, 第 59 回春季応用物理学

関連連合講演会)

55 T. Nonaka, W. Shichida, Y. Uraoka, N. Taguchi, and S-I. Yamamoto; “Development of Inorganic EL Devices with Hybrid Structure”, Abst. JSAP, the 59th Spring Meeting, 18a-GP8-13 (p.14-232), (Waseda Univ., Mar, 2012). (Collaboration with Ryukoku Univ. and Image Tech Inc.) (“ハイブリッド構造を用いた無機 EL の開発”, 第 59 回春季応用物理学関連連合講演会)

56 T. Doe, S. Araki, M. Horita, T. Nishida, Y. Ishikawa, and Y. Uraoka; “Particle Diameter Control in Nano Scale by Electro Spray Deposition Method”, Abst. JSAP, the 59th Spring Meeting, 18p-B3-7 (p.09-023), (Waseda Univ., Mar, 2012). (“静電噴霧法を用いたナノスケール領域における粒子サイズ制御法”, 第 59 回春季応用物

理学関連連合講演会)

57 T. Itakura, H. Yamada, Y. Uraoka, I. Yamashita, and S-I. Yamamoto; “Selective Nanoscale Positioning of Co Nanoparticles on Ti Electrodes”, Abst. JSAP, the 59th Spring Meeting, 18p-B3-8 (p.09-024), (Waseda Univ., Mar, 2012). (Collaboration with Ryukoku Univ., Kyoto Univ., and Mesoscopic Mater. Sci. Lab., NAIST) (“Ti 電極上に配置したコバルトナノ微粒子の固体表面吸着”, 第 59 回春季応用物理学関連

連合講演会)

Patents 1 井之上一平, 安枝寿, 鄭彬, 石河泰明, 山下一郎, 浦岡行治; “多孔質構造体及びその製造

方法”, 特願 2011-173229.

33

4. Collaborations 4.1 Projects CREST(Competitive Funding for Team-based Basic Research) – JST(Japan Science and

Technology) during 2008-2012 Research Area: Creation of Nanosystems with Novel Functions through Process Inte-gration (プロセスインテグレーションによる次世代システムの創製)

Research Theme: Highly Functional Nano System Fabricated by Bio Frontier Process（生体超分子援用フロンティアプロセスによる高機能化ナノシステム） Collaboration: Osaka University, Kobe University, Toyota Technological Institute, The Cancer Institute of Japanese Foundation for Cancer Research

先端的研究支援事業(from NAIST) Research Theme: ナノインプリント技術によるエネルギー低消費社会の創成 Collaboration: Nihhon Univ., Ryukoku Univ., Quantum Material Sci. Lab. (NAIST), Ul-trafast Photonics Lab. (NAIST)

Funds in 2011

Eight projects which were accepted from JSPS funds were promoted.

Four projects received donated funds.

Ten projects were promoted with private companies.

Funds from NAIST in 2011 Six projected which were accepted from NAIST internal competitive funds were

promoted. Two projects which were accepted in internal competitive founds for a fusional area

of three graduate schools in NAIST were promoted.

34

4.2 Joint research (2011/04 ~ 2012/03) Kochi National College of Technology

Research Theme: Novel laser ablation technique of low T poly-Si films

Ajinomoto Co., Inc., from 2010 Research Theme: Fabrication and evaluation of dye-sensitized solar cell utilizing Bio-nano technology

Daicel Co., from 2011

Research Theme: Characterization

Idemitsu Kosan Co., Ltd. from 2009 Research Theme: Characterization of TFT utilized oxide semiconductor

Image Tech Inc. Research Theme: Development of flexible inorganic EL devices

Mitsui Engineering & Shipbuilding Co., Ltd. from 2009- Research Theme: Application of thin films deposited by ALD method

Nissan Chem. Ind., Ltd. Research Theme: Evaluation of material reliability

Nisshin Electric Co., Ltd. Research Theme: Evaluation of TFT reliability Sumitomo Electric Industries, Ltd., from 2009

Research Theme: Fabrication and evaluation of TFT used oxide semiconductors

Panasonic Co. Research Theme: Fabrication of electronic devices through Bio-Nano-Process

4.3 Internship / Lab Stay (2011/04 ~2012/03)

Two students participated in a lab stay program.

Mr. Kawahara from Wakayama national college of tech. (during Aug. 1 ~ 5) Mr. Tsugawa from Anan national college of tech. (during Sep. 26 ~ Oct. 14)

35

5. Honor of Awards, and News Releases (2011/04 ~ 2012/04) 5.1 Awards

Yasuhiro KAKIHARA, IEEE, EDS, Kansai Chapter, International Meeting for Future of Electron Devices, Kansai (IMFEDK) 2011, Student Paper Award “Application of Endohedral Iron-oxide Ferritin to Resistive Memory” (2011/5/20)

Yumi KAWAMURA, IEEE, EDS, Kansai Chapter, International Meeting for Future of Electron Devices, Kansai (IMFEDK) 2011, Student Paper Award “Low Temperature Processed ZnO Thin Film Transistors Fabricated by Plasma As-sisted Atomic Layer Deposition” (2011/5/20)

Mami FUJII, International Conference of Solid State Devices and Materials (SSDM) 2011, Young Researcher Award “The Unique Phenomenon in the Amorphous In2O3-Ga2O3-ZnO TFTs Degradation under the Dynamic Stress” (2011/9/30)

Emi MACHITA, Graduate School of Materials Science, NAIST, Students’ Research Evaluation Meeting 2011, Best Student Presentation Award “Super Low-Temperature Crystallization of Polycrystalline Silicon Thin Films by Un-derwater Laser Annealing” (2011/11/10)

Yasuhiro KAKIHARA, Graduate School of Materials Science, NAIST, 2011, Best Master-course Students Award (2012/3/24)

5.2 News Releases Our achievement of stacked nano dot –type floating gate memory utilizing supra-molecules supported by CREST was pressed on Nikkei Shinbun, Sankei Shinbun, and Nikkan Kogyo Shinbun (2011/8/8).

36

6. Excursion & Events Excursion (Jul.29 ~ 30)

Master course first-grade students plan an excursion as a first task in their laboratory’s activity. This year’s concepts were “Healing”, “Creativity” and “Gourmet”.

Kashiko-jima and ISE area gave us really peaceful mind, and stimulated our creativity for next challenge in each research, as well as our appetite!. Sports & Events

This Institute usually organizes several sports events, such as soft-ball, a re-lay-race with cos-play and table tennis. Our students have aggressively joined every event with making up their own team. And internal events in our lab were also frequently held. We enjoyed every event thanks the students’ dedicated preparations. Usually the quality becomes much better than their studies.

37

7. Dissertation 7.1 Doctor course (2011)

At last, this laboratory produced students graduated from doctor course in this year.

7.2 Master Course (2011)

柿原 康弘 (Yasuhiro KAKIHARA) バイオナノプロセスを用いた微小抵抗変化メモリの研究

紺谷 拓哉 (Takuya KONTANI)

無機 EL ディスプレイの実現に向けた新規熱処理プロセスによ

る ZnS 蛍光体作製

谷 真衣 (Mai TANI)

プラズマ原子層堆積法を用いた酸化亜鉛薄膜トランジスタの

プロセス低温化及び高性能化に関する研究

張 敏 (Min ZHANG)

光スイッチの応用に向けたゲル－ナノインプリントプロセス

による ZnO フォトニック結晶の作製

土江 貴洋 (Takahiro DOE)

プリンテッドデバイスの実現に向けた静電噴霧熱分解法にお

ける半導体ナノ粒子のサイズ制御

分銅 衡介 (Kosuke BUNDO)

硫化銅を内包したフェリチンタンパクによる非晶質ゲルマニ

ウム薄膜の低温結晶化

三浦 祐太 (Yuta MIURA)

化学溶液堆積法による ZnO 系酸化物 TFT の低温作製および特

性改善に関する研究 Every thesis was written by Japanese.

小原 孝介 (Kosuke OHARA) 生体超分子を利用した次世代半導体メモリの研究

東條 陽介 (Yosuke TOJO)

自己組織化金属触媒による半導体薄膜の新規結晶化手法に関

する研究

藤井 茉美 (Mami FUJII)

次世代ディスプレイ実現に向けた酸化物半導体薄膜トランジ

スタの高性能化技術

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8. After Graduated Position

In March of 2012, 10 Students (3 from doctor course, and 7 from master course) graduated from our laboratory.

Their working places after graduation are as follows: Hitachi Zosen Co., Mitsui Eng. &

Shipbuilding Co.,Ltd., Mitsubishi Elec. Co., OG Co., Omron Co., Panasonic Co., Rohm Co.,Ltd., Sumitomo Electric Industries Ltd., Toyoda Gosei Co.,Ltd., and our doctor course (1 student).

In addition, our alumni are working in Denso Co., Shikoku Electric Power Co., Inc., Sumitomo

Electric Industries Ltd., Tokyo Electron AT Limited, Toyota Motor Co., ULVAC Inc., Sandisk Co., Sekisui Chemical Co. Ltd., Iwatani Co., Yokogawa Electric Co., Ministry of Defense (Japan).

We hope they continue their great performance in their work place, and contribute to society, not only in Japan, but also globally.

39

9. Scientific Instruments and Methods for Analysis 9.1 Material Formation

Material Deposition Method Application Contact Insulative films SiO2, SiNx

[SiO2] RF Magnetron sputter-ing , Thermal oxidation furnace (dry, pyrogenic), CVD from TEOS [SiNx] P-CVD with SiH4, NH3

Passivation for solar cells, TFTs Gate-insulator for TFTs

Horita Ishikawa

Amorphous Si RF Magnetron sputtering Electron beam evaporator P-CVD with SiH4

Low T poly-Si Horita Ishikawa

Polycrystalline Si

Laser crystallization (green laser: 532nm)

Low T poly-Si Horita

Oxide semicon-ductors (InGaZnO, ZnO, In2O3)

RF magnetron sputtering Plasma-assisted atomic layer deposition system (RF) Spin-coating (sol-gel type)

Transparent TFTs Ishikawa Horita

Ferroelectric ceramics

RF magnetron sputtering, Spin-coating (sol-gel type)

Fe-RAM Nishida

Metal (Ti, Mo, Pt, Ni, etc.)

Electron beam evaporator, Resistive heating evaporator, RF magnetron sputtering

Electrode for elec-tronic devices

Horita

Transparent conductive films (ITO)

RF magnetron sputtering (3 elements system)

Electrode of solar cell, Transparent TFTs

Horita

Nano particles of semiconductors (ZnS, FeS2 etc.)

Electro spray coating EL device, photo - detector, solar cell

Ishikawa

9.2 Simulation Tools

Name Functions Application Contact ATLAS (SILVACO Inc.)

Device simulation Electronic devices (TFT, solar cell, etc.)

Ishikawa

UTMOST IV (SILVACO Inc.)

Parameter extraction of the deivices

Transistors Ishikawa

FullWAVE BandSOLVE DiffractMOD

(Rsoft design)

Electro-magnetical field simu-lation

Solar cells, Optical switch, plasmon ef-fect

Ishikawa

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9.3 Process Methods

Method Material Application Contact Photolithography system

Semiconductor materials, metal films

TFTs, device pattern-ing

Horita

Electron beam lithography

Semiconductor materials, glass, ceramics

TFTs, device pattering, mold for NIL

Horita

Nanoimprint lithography (UV)

Plastic resin (PMMA, PDMS etc.), ZnO, SOG

Photonic crystal, AR layer for solar cell

Ishikawa

Inductive-coupled plasma reactive ion etching

Semiconductor materials TFTs, device pattern-ing

Horita

Anneal furnace (Thermal, RTA)

Semiconductor materials, Ferroelectric ceramics, EL materials

Fe-RAM, EL devices, TFTs

Horita Nishida

Sintering oven (heating mantle)

Semiconductor materials Dye-sensitized solar cells

Ishikawa

Dry oven Semiconductor materials Dye-sensitized solar cells

Ishikawa

Screen printing All-manual Semi-auto (Newlong DP320)

Inorganic EL (ZnS) TiO2 paste

EL device Dye-sensitized solar cells

Horita

Ultraviolet ozone generator

Semiconductor materials Bio-nano process ZnO TFT with sol-gel process

Uenuma

High pressure va-por anneal

Semiconductor materials (InGaZnO, poly-Si, etc.)

TFTs Ishikawa Horita

Almost all equipment for material formation and the fabrication process systems are installed

in our own clean-room (class 10,000, area: 200m2) and the clean-rooms of the institute (large clean-room: class 1,000, area: 230m2, yellow-room: class 100, area: 20m2, clean-room for bio-nano process: class 1,000, area: 100m2).

41

9.4 Structural Material Analysis

Method Material Application Contact Photoelectron spec-troscopy (XPS) (Shimazu, KRATOS AX-IS-165)*

Semiconductor sur-faces, transparent semiconductors (ZnO, InGaZnO etc.)

Chemical bonding of materials

Horita

Secondary ion mass spectroscopy (SIMS) (ULVAC-PHI, ADEPT-1010)*

Compositional analysis of thin films

Chemical composition, depth profiling

Horita

Atomic force micro-scope (AFM, -conductive, -Kelvin-probe) (Shimazu, SPM9600)

Low T poly-Si, trans-parent semiconductors (ZnO, IGZO, etc.)

Surface roughness, electrical profile, poten-tial profile, structure

Horita

Transparent electronic microcopy (300kV/200kV) (JEOL, JEM-3100FEF)* (JEOL, JEM-2200FS)*

Structural analysis of thin films and nano-dot devices

High resolution structur-al analysis

Horita Uenuma

Field emission scan-ning electronic mi-croscopy (FE-SEM) Energy dispersive X-ray analysis (JEOL, JSM-7400F, JSM-6301F, JED-2001FN)*

Thin film poly-Si Ferroelectric ceramics EL material (ZnS), nano particle

Structure, chemical composition

Horita Uenuma

X-ray diffractmetry (Rigaku, RINT-TTRⅢ/NM, R-AXIS, DS3C)* (PHILIPS X’Pert MRD)

Thin film poly-Si Ferroelectric ceramics EL material (ZnS)

Phase analysis Nishida

X-ray fluorescence analysis (PHILIPS MagiX Pro)

Semiconductor films, metal films, devices

Surface morphology Nishida

Nomarski microscope (Nikon Eclipse LV 100D)

Semiconductor films, metal films, devices

Surface morphology Horita

Laser Microscope (KEYENSE VK-9510)*

Semiconductor films, metal films, devices

Surface morphology Horita

Stylus profiler (KLA-Tencor, AS-500)*

Semiconductor films, metal film, devices

Film thickness, surface roughness

Horita

Film thickness meas. (FILMETRICS F20-UV)*

Semiconductor films, metal films, devices

Thin film thickness Horita

* : common facilities of the institute

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9.5 Analysis of Optical Properties

Method Materials Application Contact Photoluminescence (280-800nm) (JASCO, FP-6300)

EL materials (ZnS) Nano-dot materials

Band structure, Size of nano-particles

Horita

FT-IR spectroscopy (HORIBA, FT-730)*

Thin film materials Surface bonding structure

Ishikawa

Spectroscopic ellip-sometry (HORIBA UVISEL ER)*

Thin film materials (SiO2, ZnO, poly-Si etc.)

Surface bonding structure

Ishikawa

Raman spectroscopy (JASCO, NRS-2100)*

Thin film materials Crystallinity Horita

* : common facilities of the institute 9.6 Analysis of Electrical Properties

* : common facilities of the institute

Method Materials Application Contact Emission microscope (Hamamatsu, PHEMOS 200)

Thin film poly-Si Oxide semiconductor

Analysis of TFT’s op-eration characteristics

Horita

Electronic characteri-zation by semicon-ductor analyzer (at room T, high T(~ 400K), low T(~ 10K)) (HP-4156B, Agilent-4156C)

Thin film poly-Si, Oxide semiconductor, nano-dot devices

Electronic properties of TFTs, sensors, solar cells, ferroelectric ce-ramics

Uenuma Horita

C-V characteristics (C-V meter) (HP-4280A. 4284A, 41501B)

Thin film poly-Si C-V properties of TFTs, sensors, solar cells,

Uenuma Horita

Hysteresis-loop meas-urement system for magnetic materials (home-made)

Ferroelectric ceramics Coercivity, characteri-zation of ferroelectric materials

Nishida

Hall-effect measure-ment system (low T (10K) ~

high T (400K)) (Keithlay,RESITEST-8300)*

Thin film poly-Si Oxide semiconductors

Carrier mobility, carrier density

Horita

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10. List of Members (as of 2012/04)

Name Title M:Ms. course D:Dr. course

Tel (+81-743-72…)

e-mail (…@ms. naist.jp)

Work contents

Staffs

Yukiharu URAOKA Ph.D. Eng. 6060 uraoka Organizer - Professor, SOP, TFT, Memory, etc.

Yasuaki ISHIKAWA Ph.D. Eng. 6061 yishikawa Associate Professor, Flexible / Printed de-vices (TFT, solar cells, sensors)

Takashi NISHIDA Ph.D. Eng. N/A tnishida Assistant Professor, Ferroelectric materials and devices promoted as Assoc. Prof. at Fukuoka Univ., (2012.4~)

Masahiro HORITA Ph.D. Eng. 6063 horita Assistant Professor, TFT, EL device fabrica-tion toward flexible dis-play

Mutsunori UENUMA Ph.D .Eng. 6063 uenuma Assistant Professor, Memory devices utiliz-ing BNP

Bin ZHENG Ph.D. 6074 zhengbin Assistant Professor, DNA operation, BNP

Yukiko MORITA - 6069 morita Secretary

Fuyuko TAKAO - 6069 takao-f@ ad.naist.jp Secretary

Students

Emi MACHIDA

Ms. Eng. (D-3rd)

6064 m-emi Low T poly Si TFTs us-ing underwater laser annealing

Haruka YAMAZAKI Ms-2nd

6064 y-haruka Development of highly reliable IGZO TFTs

Hiroki KAMITAKE Ms-2nd

6064 k-hiroki High-density nano-dot-type floating memory by BNP

Koji YAMASAKI Ms. Eng. (D-2nd)

6064 y-koji Fabrication of 3D - low T poly-Si

Koji YOSHITSUGU Ms-2nd

6064 yo-koji Al2O3 passivation by ALD method for HEMT

44

Name Title M:Ms. course D:Dr. course

Tel (+81-743-72…)

e-mail (…@ms. naist.jp)

Work contents

Kosuke OHARA Ph.D. Eng. (graduate)

N/A N/A Nano metal dots em-bedded floating memory devices uti-lizing BNP

Kosuke BUNDO Ms. Eng. (graduate)

N/A N/A MILC process for poly-Ge crystallization by BNP

Li LU Ms. Eng. (D-3rd)

6064 l-li (BaSr)Ta2O6/ZnO films with sol-gel method

Mai TANI Ms. Eng. (graduate)

N/A N/A Low T ZnO TFTs using ALD method

Mami FUJII Ph.D. Eng. (graduate)

N/A N/A Fabrication and char-acterization of IGZO TFTs

Mao TANIGUCHI B.S. N/A N/A Evaluation of stress induced ZnS particles.

Min ZHANG Ms. Eng. (graduate)

N/A N/A Highly accuracy in NIL process with sol-gel precursors

Satoshi SAIJO Ms. Eng. (D-2nd)

6064 s-satoshi Plasmonic solar cell utilizing BNP technol-ogy

Shinji ARAKI Ms-2nd

6064 a-shinji Nanostructure fabrica-tion by NIL process

Takahiko BAN Ms-2nd

6064 b-takahiko

Ta2O5 ReRAM using BNP

Takahiro DOE Ms. Eng. (D-1st)

6064 d-takahiro ZnS and ZnO nano particles and their de-vices

Takuya KONTANI Ms. Eng. (graduate)

N/A N/A Effect of passivation and thermal treatment for ZnS in EL lumi-nance

Yasuhiro KAKIHARA Ms. Eng. (graduate)

N/A N/A Fe3O4 ReRAM using BNP

Yana MULYANA Ms-2nd

6064 y-mulyana Graphen TFT for bi-osensors

Yoshihiro UEOKA Ms. Eng. (D-2nd)

6064 u-yoshihiro

Electrical analysis for IGZO TFTs and their functionalization

Yosuke TOJO Ph.D. Eng. (graduate)

N/A N/A Self-aligned poly-Si films utilizing BNP

45

Name Title M:Ms. course D:Dr. course

Tel (+81-743-72…)

e-mail (…@ms. naist.jp)

Work contents

Yumi KAWAMURA Ms. Eng. (D-3rd)

6064 k-yumi Improvement of ZnO TFTs deposited by ALD

Yuta MIURA Ms .Eng. (graduate)

N/A N/A Fabrication of trans-parent oxide (ZnO) de-vices by solution pro-cess

Doctor course students from industry Masato HIRAMATSU (Toshiba Mobile Dis-play Co., LTD.)

Ms.Eng. (D-2nd)

- - Large grain Poly-Si process

Masahiro MITANI (Sharp Co.)

Ms.Eng. (D-2nd)

- - Carrier collection in large grain poly-Si TFT

Visiting Researchers (during 04/2011-03/2012) Ippei INOUE (Ajinomoto Co. Inc.)

Ph.D. - - BNP Engineering

Masashi KASAMI (Idemitsu Kosan Co. LTD.)

Ph.D. Phys. - - Oxide semiconductor devices

Miki MIYANAGA (Sumitomo Elec. Ind. LTD.)

- - - Oxide semiconductor materials

Nozomu HATTORI (Mitsui Eng. Ship. Co. LTD.)

Ph.D. Phys. - - Fabrication method of oxide semiconductors

Yasuhiko SHINODA (Toyoda Gosei Co., LTD.)

Ph.D. - - BNP Engineering

Tetsuo FUKAMI (Panasonic Co.)

- - - Oxide semiconductor devices

Tomoaki IZUMI (Panasonic Co.)

- - - Oxide semiconductor devices

46

11. Site Plan

Address: Takayama 8916-5, Ikoma, Nara 630-0192, JAPAN

TEL/FAX: +81-743-72-6069 (secretary)

Access information: http://mswebs.naist.jp/english/access/index.html

IDS (Information Device

Science) Lab