Analog Electronics II Week 4 Chp 2 (Dc Biasing) Cont'
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Transcript of Analog Electronics II Week 4 Chp 2 (Dc Biasing) Cont'
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8/14/2019 Analog Electronics II Week 4 Chp 2 (Dc Biasing) Cont'
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LOGO
Mohd Shawal JadinMohd Shawal Jadin
ANALOG ELECTRONICS II
FET DC BIASING- Review & ContinueFET DC BIASING- Review & Continue
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ANALOG ELECTRONICS II - BEE2233 FKEE UMP
Learning Objectives
1
2
Describe various configuration of FET biasing1
Analyze various configuration of FET biasing.2
Upon completion of the chapter the student
should be able to:
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Group Discussion
Form a group of 5-6Write : your group and
members nameAnswer all questions in 7minutes for eachquestion
10 marks per question +
bonusANALOG ELECTRONICS II - BEE2233 FKEE UMP
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Find:
VGSQ, IDQ
VG
VD
VDS
VS
IG
Example 1
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ANALOG ELECTRONICS II - BEE2233 FKEE UMP
Calculate the value of VDS
Example 2
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ANALOG ELECTRONICS II - BEE2233 FKEE UMP
What is the new
value of RD
when there is 7
V across VDS?
Example 3
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Given the valuesof VDQ and IDQ for
this circuit,
determine therequired values
of RD
and RS
.
Example 4
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Determine thequiescent values
of ID and VGS.
Example 5
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o age- v er asCalculations
ANALOG ELECTRONICS II - BEE2233 FKEE UMP
Using Kirchhoff's Law:
Rearranging and using ID
=IS:
Again the Q point needsto be established by
plotting a line that
intersects the transfer
curve.
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Voltage-Divider Q-point
ANALOG ELECTRONICS II - BEE2233 FKEE UMP
1. Plot the line: By plotting two points: VGS
= VG, I
D=0 and V
GS= 0, I
D= V
G/R
S
2. Plot the transfer curve by plotting IDSS, VP and calculated values of ID.3. Where the line intersects the transfer curve is the Q point for the circuit.
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o age- v er asCalculations
ANALOG ELECTRONICS II - BEE2233 FKEE UMP
Using the value of ID at the Q-point, solve forthe other variables in the Voltage-Divider
Bias circuit:
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Test yourself..
Find IDQ and VGSQ
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Exercise..
Determine Q-point for JFET
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Exercise..For what value of R
Dis the
voltage across VDS zero?
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Depletion-Type MOSFETs
ANALOG ELECTRONICS II - BEE2233 FKEE UMP
Depletion-typeMOSFET bias circuits
are similar to JFETs.
The only difference is
that the depletion-Type MOSFETs can
operate with positive
values of VGS
and
with ID
values that
exceed IDSS
.
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The dc analysisSame as the FET calculations
Plotting the transfer characteristics of the device Plotting the at a point that VGS exceeds the 0V or more
positive values Plotting point when VGS=0VandID=0A The intersection between Shockley characteristics and
linear characteristics defined the Q-point of the MOSFET
The problem is that how long does thetransfer characteristics have to be draw? We have to analyze the input loop parameter relationship. As RS become smaller, the linear characteristics will be in
narrow slope therefore needs to consider the extend oftransfer characteristics for example of voltage dividerMOSFET,
The bigger values of VP the more positive values we shoulddraw for the transfer characteristics
SDGGS
RSGSG
RIVV
VVV
=
= 0
A l i th MOSFET i it f
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Analyzing the MOSFET circuit forDC analysis
How to analyze dcanalysis for theshown network?
It is a . Typenetwork Find VG or VGS Draw the linear
characteristics Draw the transfer
characteristics Obtain VGSQ and IDQ
from the graph
intersection
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Plot line for VGS = VG, ID = 0 and ID =VG/RS, VGS = 0.
Plot the transfer curve by plottingIDSS, VP and calculated values of ID.
5. Where the line intersects the transfer
curve is the Q-point.
Use the ID at the Q-point to solve for
the other variables in the voltage-divider bias circuit. These are the
same calculations as used by a JFET
circuit.
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When RS changethe linear characteristics will change..
Plot line for VGS = VG, ID = 0
and ID = VG/RS, VGS = 0 Plot the transfer curve by
plotting IDSS, VP and
calculated values of ID.
Where the line intersects thetransfer curve is the Q-
point.
Use the ID at the Q-point to
solve for the other variablesin the voltage-divider bias
circuit. These are the same
calculations as used by a
JFET circuit.
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LOGO
Mohd Shawal JadinMohd Shawal Jadin