Analog Electronics Constant GM Circuit
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Transcript of Analog Electronics Constant GM Circuit
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NORTH CAROLINA A&T STATE UNIVERSITY
Project 1: Constant GM
CircuitAnalog Electronics - Fall 2013Monique Kirkman-Bey
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Table of ContentsConstant GM Circuit ...................................................................................................................................... 2
Corner Analysis ............................................................................................................................................. 3
TT ............................................................................................................................................................... 3
SS ............................................................................................................................................................... 5
SF ............................................................................................................................................................... 7
FF ............................................................................................................................................................... 9
Summary of Corner Analysis Findings ..................................................................................................... 10
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Constant GM Circuit
Figure 1: Constant-Gm Circuit
Instance Name Instance Value Hand Calculation Value
V0 1.8V
TN8 2.14 m / 1 m 2.24 m / 1 m
TN6 3.64 m / 1 m 3.64 m / 1 m
TN7 5 m / 1 m 4.49 m / 1 m
TN5 0.22 m / 10 m Set to minimum size
R0 980 1 K
R2 8 K 2 K
R3 1.28 K 1.28 K
R5 1 K
TP6, TP7, TP8,
TP10, TP11, TP1250 m / 1 m 50 m / 1 m
You will see that most of my hand calculated values were close to the simulated values. My largest
variance occurred in the calculated value of the resistor for the startup circuit. I expected a VDSvoltage
of approximately 1.6 V, which would have led to a 0.2 V drop across that resistor. However, I ended up
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with a 0.9 V VDSvoltage across the resistor in my startup circuit. Due to this, I needed to increase my
resistor to 8 K to get. This is 4 times the anticipated value.
Corner Analysis
TT
Figure 2: Typical NMOS, Typical PMOS DC Analysis Results
Above, it can be seen that the output current is 49.7 A. With a 1K resistive load, the output voltage is
0.0497 V.
Given the simulated values, the output resistance for the typical NMOS and typical PMOS is 0.74 M.
This varies from my calculated output resistance of 0.4 M. This boasts a large error of 45.95%!
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Figure 3: Typical NMOS, Typical PMOS - Voutvs. Time
Given an initial condition of 0V at the startup node, the rise time of the circuit is 714.2 ns.
Figure 4: Typical NMOS, Typical PMOS - Sensitivity to supply voltage
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Above, the circuits sensitivity to the supply voltage is evaluated. With a 10% decrease in supply voltage,
I get a 12% decrease in output voltage.
SS
Figure 5: Slow NMOS, Slow PMOS - DC Analysis Results
You can see that there was a slight change in the output voltage using slow NMOS and slow PMOS. Vout
decreased to 49.22 A and Voutdecreased to 0.00492 mV. The routalso changed and is now 0.81 M.
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Figure 6: Slow NMOS, Slow PMOS - Voutvs Time
SS rise time = 830.5 ns
Figure 7: Slow NMOS, Slow PMOS - Supply Voltage Sensitivity Analysis
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With slow PMOS and slow NMOS, a 10% change in supply voltage leads to a 12.5% change in output
voltage.
SF
Figure 8: Slow NMOS, Fast PMOS - DC Analysis Results
You can see that with the slow NMOS and fast MPOS, the output current crosses the 50 A mark. The
output voltage increased to 0.05092 V and the routis 0.77 M.
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Figure 9: Slow NMOS, Fast PMOS - Voutvs Time
SF Rise time = 803.3 ns
Figure 10: Slow NMOS, Fast PMOS - Supply Voltage Sensitivity Results
Using a Slow NMOS and Fast PMOS a 10% change in supply voltage yields an 11.9% change in output
voltage.
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FF
Figure 11: Fast NMOS, Fast PMOS - DC Analysis
Using fast devices, the output voltage is the lowest. It is 0.0485 V and the output current is simply
48.5A. The output resistance is 0.79 M.
Figure 12: Fast NMOS, Fast PMOS - Vout vs Time
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FF rise time = 541.8 ns
Figure 13: Fast NMOS, Fast PMOS - Supply Voltage Sensitivity Analysis
For these devices, a 10% change in supply voltage yields an 11.8% change in output voltage.
Summary of Corner Analysis Findings
TypicalNMOS,
Typical PMOS
Slow NMOS,
Slow PMOS
Typical NMOS,
Typical PMOS
Fast NMOS,
Fast PMOS
Iout 49.7 A 49.22 A 80.92 48.5 A
Rout 0.74 M 0.83 M 0.77 M 0.79 M
Supply Voltage Sensitivity 1:1.2 1:1.25 1:1.19 1:1.18
Rise Time 714.2 ns 830.5 ns 803.3 ns 541.8 ns