Analog Electronics - Miunapachepersonal.miun.se/~amiyou/AE/Lecture4.pdf · Electronic Devices, 9th...
Transcript of Analog Electronics - Miunapachepersonal.miun.se/~amiyou/AE/Lecture4.pdf · Electronic Devices, 9th...
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
Analog Electronics
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
BJT Structure
The BJT has three regions called the emitter, base, and
collector. Between the regions are junctions as indicated.
B
(base)
C (collector)
n
p
n
Base-Collector
junction
Base-Emitter
junction
E (emitter)
B
C
p
n
E
p
npn pnp The base is a thin lightly
doped region compared to the
heavily doped emitter and
moderately doped collector
regions.
The pn junction joining the base region
and the emitter region is called the base-
emitter junction.
The pn junction joining the base region
and the collector region is called the base-
collector junction
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
BJT Operation
In normal operation, the base-emitter is forward-biased
and the base-collector is reverse-biased.
npn
For the pnp type, the voltages
are reversed to maintain the
forward-reverse bias. –
+ –
+
–
+
+
BC reverse-
biased
–
BE forward-
biased
–
+
+
–
–
BC reverse-
biased
+
BE forward-
biased
–
+
pnp
For the npn type shown, the
collector is more positive
than the base, which is more
positive than the emitter.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
BJT Currents
IE IE
IC
IB
IC
IBn
p
n
p
n
p
+
– +
–
–+
IE
IC
IB
+
–
+
IE
IC
IB
+
–
–
npn pnp
The direction of conventional current is in the direction of the arrow
on the emitter terminal. The emitter current is the sum of the
collector current and the small base current. That is, IE = IC + IB.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
BJT Parameters
Two important parameters, βDC (dc current gain) and
αDC are introduced and used to analyze a BJT circuit.
DC Beta (βDC )
Ratio of DC collector current and
DC base current.
βDC == IC/IB
DC Alpha (αDC )
Ratio of DC collector current to the
DC emitter current.
αDC == IC/IE
VBB forward bias the base-
emitte jumction and VCC reverse
bias the base-collector junction
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
Transistor DC Model
BJT in un-saturation mode is a current controlled current
source.
Input circuit is a forward-biased
diode through which there is base
current.
The output circuit is dependent
current source. The value of o/p
current is dependent on base
current.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
BJT Circuit Analysis
Currents and voltages in BJT
IB : dc base current
IE: dc emitter current
IC: dc source current
VBE: dc voltage at base wrt. emitter
VCE: dc voltage at collector wrt.
emitter.
VCB: dc voltage at collector wrt.
Base.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The collector characteristic curves show the relationship
of the three transistor currents.
The curve shown is for a fixed
based current. The first region is
the saturation region.
BJT Characteristics
IC
B
C
A
0 0.7 V VCE(max)
VCE
Saturation
region
Active region
Breakdown
region
As VCE is increased, IC increases
until B. Then it flattens in region
between points B and C, which
is the active region.
After C, is the breakdown
region.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The collector characteristic curves illustrate the relationship of the
three transistor currents.
0
IC
VCE
IB6
IB5
IB4
IB3
IB2
IB1
IB = 0Cutoff region
By setting up other values of
base current, a family of
collector curves is developed.
bDC is the ratio of collector
current to base current.
BJT Characteristics
It can be read from the curves.
The value of bDC is nearly the
same wherever it is read.
CDC
B
I
Ib
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
What is the bDC for the transistor shown?
Choose a base current near the
center of the range – in this
case IB3 which is 30 mA.
IC
VCE
IB6
IB5
IB4
B3I
IB2
B1I
IB = 0
= 10 Am
= 20 Am
= 30 Am
= 0
= 60 Am
= 40 Am
= 50 Am
10.0
8.0
6.0
4.0
2.0
0
(mA)
Read the corresponding
collector current – in this case,
5.0 mA. Calculate the ratio:
CDC
B
5.0 mA
30 A
I
Ib
m 167
BJT Characteristics
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
Cutoff
In a BJT, cutoff is the condition in which there is no base
current, which results in only an extremely small leakage
current (ICEO) in the collector circuit. For practical work, this
current is assumed to be zero.
IB = 0 –
+
–
+ICEO
RC
VCCVCE ≅VCC
RB
In cutoff, neither the base-emitter
junction, nor the base-collector
junction are forward-biased.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
Saturation
In a BJT, saturation is the condition in which there is
maximum collector current. The saturation current is
determined by the external circuit (VCC and RC in this case)
because the collector-emitter voltage is minimum (≈ 0.2 V)
In saturation, an increase of base
current has no effect on the
collector circuit and the relation
IC = bDCIB is no longer valid.
–
+ –
+
VCC
VBB
VCE = VCC – IC RC
RB
RC
IB
IC
–
+
– +When the base-emitter junction
is forward biased and there is
enough base current to produce
maximum collector current, the
transistor is saturated
IC(SAT) =VCC –VCE(SAT) /RC
IB(min) = IC(SAT) βDC
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
DC Load Line
the transistor. It is drawn by
connecting the saturation
and cutoff points.
The transistor characteristic
curves are shown superimposed
on the load line. The region
between the saturation and
cutoff points is called the
active region.
The DC load line represents the circuit that is external to
0
IC
VCE
IB = 0 Cutoff
VCE(sat) VCC
IC(sat)
Saturation
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
DC Load Line
What is the saturation current and
the cutoff voltage for the circuit?
Assume VCE = 0.2 V in saturation. –
+ –
+VCC
15 V
VBB
3 V
RC
RB
βDC = 200
220 kW
3.3 kW
CCSAT
C
0.2 V 15 V 0.2 V
3.3 k
VI
R
W4.48 mA CO CCV V 15 V
Is the transistor saturated? B
3.0 V 0.7 V10.45 A
220 kI m
W
IC = b IB = 200 (10.45 mA) = 2.09 mA Since IC < ISAT, it is not saturated.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
Data Sheets
Data sheets give manufacturer’s specifications for maximum operating
conditions, thermal, and electrical characteristics. For example, an
electrical characteristic is bDC, which is given as hFE. The 2N3904 shows
a range of b’s on the data sheet from 100 to 300 for IC = 10 mA.
ON Characteristics
DC current gain ( IC = 0.1 mA dc, VCE = 1.0 V dc)
( IC = 1.0 mA dc, VCE = 1.0 V dc)
( IC = 10 mA dc, VCE = 1.0 V dc)
( IC = 50 mA dc, VCE = 1.0 V dc)
( IC = 100 mA dc, VCE = 1.0 V dc)
2N39032N3904
2N39032N3904
2N39032N3904
2N39032N3904
2N39032N3904
hFE2040
3570
50100
3060
1530
––
––
150300
––
––
–
Characteristic Symbol Max UnitMin
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
Data Sheets
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
DC and AC Quantities
The text uses capital letters for both AC and DC currents and voltages
with rms values assumed unless stated otherwise.
DC Quantities use upper case roman subscripts. Example: VCE.
(The second letter in the subscript indicates the reference point.)
AC Quantities and time varying signals use lower case italic
subscripts. Example: Vce.
Internal transistor resistances are indicated as lower case
quantities with a prime and an appropriate subscript. Example: re’.
External resistances are indicated as capital R with either a
capital or lower case subscript depending on if it is a DC or ac
resistance. Examples: RC and Rc.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
BJT Amplifiers
A BJT amplifies AC signals by converting some of the DC power from
the power supplies to AC signal power. An ac signal at the input is
superimposed in the dc bias by the capacitive coupling. The output ac
signal is inverted and rides on a dc level of VCE.
–
+
–
+
VCC
VBB
RB
RC
Vb
Vc
r ′e
Vin
VCE
Vc
VBB
Vin
0
0
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
BJT Switches
A BJT can be used as a switching device in logic circuits to turn on or
off current to a load. As a switch, the transistor is normally in either
cutoff (load is OFF) or saturation (load is ON).
In cutoff, the transistor
looks like an open switch.
In saturation, the transistor
looks like a closed switch.
RB
0 V
RC IC = 0
+VCC
RC
C
E
+VCC
IB = 0–
+RB
RC IC(sat)
+VCC
RC
C
E
+VCC
IB
+VBB
IC(sat)
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The FET
The idea for a field-effect transistor (FET) was first
proposed by Julius Lilienthal, a physicist and inventor. In
1930 he was granted a U.S. patent for the device.
His ideas were later refined and
developed into the FET. Materials
were not available at the time to
build his device. A practical FET
was not constructed until the
1950’s. Today FETs are the most
widely used components in
integrated circuits.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
n
p p
n
The JFET
The JFET (or Junction Field Effect Transistor) is a normally
ON device. For the n-channel device illustrated, when the
drain is positive with respect to the source and there is no
gate-source voltage, there is current in the channel.
When a negative gate voltage is
applied to the FET, the electric
field causes the channel to
narrow, which in turn causes
current to decrease. +
–
–
+
RD
D
S
GVDD
VGG
p p
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The JFET
As in the base of bipolar transistors, there are two types of
JFETs: n-channel and p-channel. The dc voltages are
opposite polarities for each type.
The symbol for an n-channel JFET is
shown, along with the proper polarities of
the applied dc voltages. For an n-channel
device, the gate is always operated with a
negative (or zero) voltage with respect to
the source.
RD
VDD
VGG
+
–
+
–
Gate
Source
Drain
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The JFET
There are three regions in the characteristic curve for a JFET
as illustrated for the case when VGS = 0 V.
Between A and B is the Ohmic
region, where current and voltage
are related by Ohm’s law.
From B to C is the active (or
constant-current) region where
current is essentially independent
of VDS.
Beyond C is the breakdown
region. Operation here can
damage the FET. VP
0A
B C
ID
IDSS
VDS
Ohmic region
Active region
(constant current)
(pinch-off voltage)
Breakdown
VGS = 0
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The JFET
When VGS is set to different values, the relationship between
VDS and ID develops a family of characteristic curves for the
device.
VGS = 0
ID
IDSS
VDS
VGS = –1 V
VGS = –2 V
VGS = –4 VVGS = VGS(off) = –5 V
VGS = –3 V
VP = +5 V
Notice that Vp is
positive and has the
same magnitude as
VGS(off).
Pinch-off Voltage
IDSS
VGS(off).
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
ID
IDSS
0VGS(off)
–VGS
The JFET
A plot of VGS to ID is called the transfer or transconductance
characteristic curve. The transfer curve is a is a plot of the
output current (ID) to the input voltage (VGS).
The transfer curve is based on the
equation 2
GSD DSS
GS(off)
1V
I IV
By substitution, you can find other
points on the curve for plotting the
universal curve.
IDSS
2
0.3 VGS(off) 0.5 VGS(off)
IDSS
4
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The input resistance of a JFET is given by:
Summary
JFET Input Resistance
GSN
GSS
I
VR
I
Compare the input resistance of a 2N5485 at 25 oC and at 100 oC.
The specification sheet shows that for VGS = 20 V, IGSS – 1 nA at 25 oC and 0.2 mA at 100 oC.
At 25 oC,
where IGSS is the current into the reverse biased gate.
GSN
GSS
20 V
1 nAI
VR
I 20 GW!
JFETs have very high input resistance, but it drops when the temperature
increases.
At 100 oC, GSN
GSS
20 V
0.2 μAI
VR
I 100 MW
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
JFET Biasing
Self-bias is simple and effective, so it is the most common
biasing method for JFETs. With self bias, the gate is
essentially at 0 V.
Summary
RD
IS+
–
RSRG
VG = 0 V
+VDD
An n-channel JFET is illustrated. The current
in RS develops the necessary reverse bias that
forces the gate to be less than the source.
Assume the resistors are as shown and the
drain current is 3.0 mA. What is VGS?
= +12 V
1.5 kW
330 W
1.0 MW
VG = 0 V; VS = (3.0 mA)(330 W) = 0.99 V
VGS = 0 – 0.99 V = 0.99 V
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
You can use the transfer curve to obtain a reasonable value
for the source resistor in a self-biased circuit.
Summary
ID
0–VGS
10 mA
8.0
6.0
4.0
2.0
(mA)
1234
What value of RS should you use
to set the Q point as shown?
375 W
JFET Biasing
Q The Q point is approximately at
ID = 4.0 mA and VGS = 1.25 V.
GSS
D
1.25 V
3.0 mA
VR
I
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
Voltage-divider biasing is a combination of a voltage-divider
and a source resistor to keep the source more positive than
the gate.
Summary
JFET Biasing
RD
RSR2
+VDD
R1
VG
VS
ID
IS
VG is set by the voltage-divider and is independent
of VS. VS must be larger than VG in order to
maintain the gate at a negative voltage with
respect to the source.
Voltage-divider bias helps stabilize the bias for
variations between transistors.
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The metal oxide semiconductor FET uses an insulated gate
to isolate the gate from the channel. Two types are the
enhancement mode (E-MOSFET) and the depletion mode
(D-MOSFET).
The MOSFET
An E-MOSFET has no
channel until it is induced by
a voltage applied to the gate,
so it operates only in
enhancement mode. An n-
channel type is illustrated
here; a positive gate voltage
induces the channel.
VGG–
+
RD
–
+VDD
n
n
++++
––––
ID
Induced
channeln
n
SiO2
Source
p substrateGate
Drain
E-MOSFET
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The D-MOSFET has a channel that can is controlled by the
gate voltage. For an n-channel type, a negative voltage
depletes the channel; and a positive voltage enhances the
channel.
Summary
The MOSFET
A D-MOSFET can
operate in either
mode, depending on
the gate voltage.
D-MOSFET
––––––
n
nVGG
+
–
RD
–
+VDDp
++++++
n
nVGG–
+
RD
–
+VDDp
––––––
++++++
operating in D-mode operating in E-mode
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
MOSFET symbols are shown. Notice the broken line
representing the E-MOSFET that has an induced channel.
The n channel has an inward pointing arrow.
Summary
The MOSFET
n channel p channel
D D
G G
S S
E-MOSFETs
n channel p channel
D D
G G
S S
D-MOSFETs
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The transfer curve for a MOSFET is has the same parabolic
shape as the JFET but the position is shifted along the x-axis.
The transfer curve for an n-channel E-MOSFET is entirely in
the first quadrant as shown.
Summary
The MOSFET
ID
0 VGS(th) +VGS
The curve starts at VGS(th), which is a
nonzero voltage that is required to have
channel conduction. The equation for
the drain current is
2
D GS GS(th)I K V V
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The D-MOSFET can be operated in either mode. For the n-
channel device illustrated, operation to the left of the y-axis
means it is in depletion mode; operation to the right means is
in enhancement mode.
The MOSFET
As with the JFET, ID is zero at VGS(off).
When VGS is 0, the drain current is
IDSS, which for this device is not the
maximum current. The equation for
drain current is 2
GSD DSS
GS(off)
1V
I IV
ID
0V
I
GS(off)
DSS
–VGS
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
E-MOSFETs can be biased using bias methods like the BJT
methods studied earlier. Voltage-divider bias and drain-
feedback bias are illustrated for n-channel devices.
MOSFET Biasing
+VDD
R2
RDR1
+VDD
RDRG
Voltage-divider bias Drain-feedback bias
© 2012 Pearson Education. Upper Saddle River, NJ, 07458.
All rights reserved. Electronic Devices, 9th edition
Thomas L. Floyd
The simplest way to bias a D-MOSFET is with zero bias. This
works because the device can operate in either depletion or
enhancement mode, so the gate can go above or below 0 V.
MOSFET Biasing
Zero bias, which can only be used for the D-MOSFET
+VDD
RG
VG = 0 V
VGS = 0
RD
IDSS
+VDD
RG
RD
Cac
input