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Module: Electronics II Module Number: 650321 Electronic Devices and Circuit Theory, 9th ed., Boylestad and Nashelsky

Lecturer: Dr. Omar Daoud Part I 1

Philadelphia University Faculty of Engineering

Communication and Electronics Engineering

Amplifier Circuits

Multistage Amplifier Analysis:

- Cascaded Systems: Based on the two-port approach, the multistage amplifier is clearly shown

in the figure below. Each of these stages could be one of the previously studied BJT, FET transistor amplifiers.

The loaded voltage gain of an amplifier is always less than the no-load level. From the Figure shown above let the under loaded system voltage gain

isTvA , where

nT vvvvv AAAAA 321

= . Then the total current gain could be

found asL

iv

ii

Lo

i

oi R

ZA

ZVRV

IIA

TT

1×−=−

== .

The no-load parameters can be used to determine the loaded gains as

follows:

Fig. 5.76 Two-port system

Fig. 5.77 Substituting the internal elements for the two-port system of Fig. 5.76

Fig. 5.80 Including the effects of the source resistance Rs.

Fig. 5.79 Applying a load to the two-port system of Fig. 5.77.



Applying the voltage-divider rule to the output circuit of Fig 5.79 results

in

oL

Lv

ov

oL

Livo

RRRA

ViVA

RRRVAV

NL

NL

+==⇒

+=

The fraction of the applied signal reaching the input terminals of the

amplifier of Fig 5.80 is also determined by the voltage-divider rule again

si

iv

s

ov

ivvo

si

isi

RRRA

VVA

VAAVRR

RVVNLs

NL

+==⇒

==+

=

and

At the existence of both of Rs and RL

oL

L

si

iv

s

ov RR

RRR

RAVVA

NLs +×

+==

, the voltage gain equation will be

modified as:

For the current gain

L

sivi

L

ivi

is

s

i

isi

RRRAAand

RRAA

RRV

RVII

ss

+−=

−=⇒

+===

The larger the source resistance and/or smaller the load resistance, the less the overall gain of an amplifier

Ex. For the given single-stage amplifier, with RL=4.7 kΩ and Rs=0.3 kΩ, determine: (a) Avs, (b) Av , (c) Ai. The two-port parameters for the fixed-bias configuration are Zi=1.071kΩ, Zo=3kΩ, and AvNL

=-280.11.



Ex: The two-stage system of the given Fig. employed a transistor emitter-follower configuration prior to a common-base configuration to ensure that the maximum percent of the applied signal appears at the input terminals of the common-base amplifier. In this Fig., the no-load values are provided for each system, with the exception of Zi and Zo for the emitter-follower, which are the loaded values. For the given configuration, determine: (a) The loaded gain for each stage. (b) The total gain for the system, Av and Avs. (c) The total current gain for the system. (d) The total gain for the system if the emitter-follower configuration were removed.



Ex.: For the given RC-coupled BJT amplifier given below, calculate the

following a) the no-load voltage gain and the output voltage

b) the overall gain if a 10-kΩ load is applied to the second stage and compare it to the

results of (a) c) the input impedance of the first stage and the output once of the second stage.



Note: The name of RC-coupled is derived from the fact that the coupling capacitor is combined with the input

impedance of the next stage to perform the load on the stage itself. The coupling capacitor prevents the two

stages from DC viewpoint.

Solution

a) The DC analysis of both transistors gives

V108651025106.34

106.3446.338

5.62.2

3.1025.62.665)//////(//

5.64

26 and A,20A4V4

V7.47.415

1520

363

3

21

)(

)(

2

2

1

−− ×=×××=×=⇒

×≅

−=−=−=

−=−==

−=−=

Ω====⇒==

==

=

+=

ivo

v

e

cv

e

eic

e

Lcv

eE

BE

EE

BEBE

B

VAV

Ak

rRA

rrRRZR

rRRA

mmrIIm

RVI

-VVV

V

NLT

NLT

β

µβ

b) The overall gain with the 10kΩ load applied is

33 104.28106.342.210

10)(

×≅××+

=+

==oL

Lv

i

ov ZR

RAVVA

NLTT

c) The input impedance of the first stage

Ω== 6.953//// 211 ei rRRZ β

Whereas the output impedance for the second stage is

Ω== kRZ co 2.22



Ex. 8.16: Calculate the dc

bias, voltage gain, input

impedance, output

impedance, and resulting

output voltage for the

cascade amplifier shown in

the Fig. 8.49. Calculate the

load voltage if 10-kΩ load

is connected across the

output.

Solution: Using the dc biasing techniques to find the Q-values,

• plot the curve of the Shockley equation 2

1

−=

P

GSDSSD V

VII

• plot the dc load line from the GS loop, in this case VGS=-ISR

From these two plots VS

GSQ=-1.9V and IDQ

•

=2.8mA.

mSVV

VIg

P

GS

P

DSSm 6.212

=

−=

The two JFET stages are CS, thus the voltage gain for each of them is

( )

4.3824.6

24.6//

2

21 =

−=−=

−=−≅==−=Tv

Dmv

DmGiLDmv ARgA

RgRRRRgA

The input impedance Zi=RG=3.3MΩ

The output impedance Zo=RD=2.4kΩ assuming that rd is ∞

The resulting output voltage Vo= AvVi

310=+

=oL

LoL ZR

RVV

=384mV

The output voltage across the load resistor

mV

Ex. 8.17: For the cascade

amplifier of Fig.8.50, use the

dc bias calculated in the

previous examples to

calculate input impedance,

Fig. 8.49 Cascade amplifier circuit for Example 8.16.

Fig. 8.50 Cascaded JFET-BJT amplifier for Example 8.17



output impedance, voltage gain and resulting output voltage.

Solution:

( ) ( )

Ω=Ω=≅=

=

−=−=

−=−==−=

kZMZ

VAV

ArRA

RgrRRRRgA

o

i

ivo

v

e

Cv

DmeLDmv

T

2.23.3

V6.0

1.59946.338

77.15.953////////

2

1 21 β

- Cascoded Systems: • The cascode configuration has one of two configurations. In each case

the collector of the leading stage is connected to the emitter of the

following stage.

• The arrangements provide relatively high-input impedance with low

voltage gain for the first stage to ensure minimum input Miller

capacitance, whereas the following CB stage provides an excellent

high-frequency response.

Fig. 5.86: Cascode configuration.

Fig.5.87: Practical cascode circuit for Example 5.19.



Ex. 5.19: Calculate the no-load voltage gain for the cascode configuration of

Fig. 5.87.

Solution: Applying the voltage-divider rule to find the Base voltages,

Ω==

=

+++

=

==⇒=−=

=

++=

8.68.3

26

V8.108.66.57.4

6.57.418

A8.31.125.4V27.47.0V95.4

8.66.57.47.418

2

11

e

B

EBEB

r

V

mk

IVVV

Note: The loading on the first transistor is the input of the second one. The

result is the replacement of RC with the input impedance of a CB configuration

(RC=re

• For the first stage (CE), the voltage gain could be calculated as:

).

11

−=−=e

cv r

RA

• While the voltage gain for the second stage (CB) is

2652

==e

cv r

RA

• The overall no-load gain is

26521

−== vvv AAAT

Note: The CE stage provides higher input impedance than can be expected from the CB

stage.

Power Amplifier Classes:

- Class-A Power Amplifier :

• The output signal varies for a full 360° of the cycle. Thus, this requires the Q-point to be biased at a level so that at least half the signal swing of the



output may vary up and down without going to a high-enough voltage to be limited by the supply voltage level or too low to approach the lower supply level, or 0 V in this description.

• It has a very poor efficiency, especially with small input signals, when

very little ac power is delivered to the load. In fact, the maximum efficiency of a class A circuit, occurring between 25% to 50% which is based on the circuit configuration. This is due to that it uses a good amount of power to maintain bias, even with no input signal and the dc bias is at the half of the supply voltage level.

• There are two types of configuration:

1) Series-Fed

- In this type we can use the simple fixed-bias circuit connection as shown in the Fig,

Main Specifications:

- To be used as a power transistor, it is used in the range of a few to tens of Watts,

- β<100, - Capable of handling large power or

current while not providing much voltage gain,

- It is not the best choice to be used as a large-signal amplifier because of its poor power efficiency.

DC Bias Operation:

- The importance of the dc bias is to determine the operating point (the intersection of the dc bias value of IB with the dc load line).

- The quiescent-point values could be calculated as

CCCCCE

BCB

CCB

RIVV

IIR

VI

−=

=⇒−

= β7.0

- If the dc bias collector current is set at one-half the possible signal swing (between 0 and VCC/RC), the largest collector current swing will be possible.

- If the quiescent collector–emitter voltage is set at one-half the supply voltage, the largest voltage swing will be possible. With the Q-point set at this optimum bias point.

AC Operation:

Fig. 12.3 Transistor characteristic showing load line and Q-point.

Fig. 12.4 Amplifier input and output signal variation.



- An input ac signal is applied to the amplifier, thus the output will vary from its dc bias operating voltage and current as shown in the Fig. 12.4.

- A small input signal will cause the base current to vary above and below the dc bias point, which will then cause the collector current (output) to vary from the dc bias point set as well as the collector–emitter voltage to vary around its dc bias value.

- As the input signal is made larger, the output will vary further around the established dc bias point until ??? (either the current or the voltage reaches a limiting condition; for the current this limiting condition is either zero current at the low end or VCC/RC at the high end of its swing. For the collector–emitter voltage, the limit is either 0 V or the supply voltage, VCC

).

- The power into an amplifier is provided by the supply. With no input signal, the dc current drawn is the collector bias current, ICQ, The power then drawn from the supply is

Power Considerations:

Pi(dc)= VCCICQ - Even with an ac signal applied, the average current drawn from the supply remains

the same, so that it represents the input power supplied to the class A series-fed amplifier.

- The larger the input signal, the larger the output swing, up to the maximum set by the circuit.

Output Power:

- The ac power delivered to the load (RC) can be expressed in a number of ways. a) Using rms signals:

b) Using peak signals:

c) Using peak-to-peak signals:



- The efficiency of an amplifier represents the amount of ac power delivered (transferred) from the dc source.

Efficiency:

- Maximum efficiency could be calculated as follows: • The maximum power output can be calculated as

C

CCaco

C

CCC

CCCE

RVP

RVI

VV

8

2

)( max

max

max

=

=

=

• The maximum power input can be calculated using the dc bias current set to one-half the maximum value:

C

CCC

CC

CCCCCdci RVR

VVIVP

22

2

)( maxmax=×=×=

• The maximum efficiency is

The maximum efficiency of a class A series-fed amplifier is thus seen to be 25%. Since this maximum efficiency will occur only for ideal conditions of both voltage swing and current swing, most series-fed circuits will provide efficiencies of much less than 25%.

Ex. Calculate the input power, output power, and efficiency of the amplifier circuit in the given Fig. below for an input voltage that result in a base current of 10 mA peak.



Solution: The Q-point can be determined to be

2) Transformer-Coupled

- A form of class A amplifier having maximum efficiency of 50% uses a transformer to couple the output signal to the load as shown in Fig.

Main Specifications:



a) Operation of Amplifier Stage:

- The transformer (dc) winding resistance determines the dc load line for the circuit. Typically, this dc resistance is small (ideally=0Ω) and, as shown in the given Fig., a 0Ω dc load line is a straight vertical line.

DC Load line

- A practical transformer winding resistance would be a few ohms, but only the ideal case will be considered in this discussion.

- There is no dc voltage drop across the 0Ω dc load resistance, and the load line is drawn straight vertically from the voltage point, VCEQ = VCC.

b)

- The ac power developed across the transformer primary can be calculated

using

Signal Swing and Output AC Power

- The output ac power can also be determined using the voltage delivered to the load.

The ac power calculated is that developed across the primary of the transformer. Assuming an ideal transformer (a highly efficient transformer has an efficiency of well over 90%), the power delivered by the secondary to the load is approximately that calculated using the previous Eq.

• The voltage delivered to the load can be calculated



• The power across the load can then be expressed as

• The output ac power then calculated using

where the load current

Ex. Calculate the ac power delivered to the 8Ω speaker for the given circuit. The circuit component values result in a dc base current of 6 mA, and the input signal (Vi) results in a peak base current swing of 4 mA.



- The input (dc) power obtained from the supply is calculated from the supply dc voltage and the average power drawn from the supply:

Efficiency:

Pi(dc) = VCCICQ



- For the transformer-coupled amplifier, the power dissipated by the

transformer is small (due to the small dc resistance of a coil) and will be ignored in the present calculations. Thus the only power loss considered here is that dissipated by the power transistor

PQ = Pi(dc) - Po(ac)

(as a heat) and calculated using.

- For a class A transformer-coupled amplifier, the maximum theoretical efficiency goes up to 50%. Based on the signals obtained using the amplifier, the efficiency can be expressed as

The larger the value of VCEmax and the smaller the value of VCEmin, the closer the efficiency approaches the theoretical limit of 50%.

Ex. For the circuit in the previous example, calculate the dc input power, power dissipated by the transistor, and efficiency.

Solution:

Ex. Calculate the efficiency of a transformer-coupled class A amplifier for a supply of 12 V and outputs of:

(a) V(p) = 12 V. (b) V(p) = 6 V. (c) V(p) =2 V.

Solution:



- Class-B Power Amplifier

• A class B circuit provides an

output signal varying over one-half the input signal cycle, or for 180° of signal.

• The dc bias point for class B is therefore at 0 V, with the output then varying from this bias point for a half-cycle.

• Obviously, the output is not a faithful reproduction of the input if only one half-cycle is present. Two class B operations—one to provide output on the positive-output half-cycle and another to provide operation on the negative-output half-cycle are necessary. The combined half-cycles then provide an output for a full 360° of operation (This type of connection is referred to as push-pull operation

• Class B operation, with no dc bias power for no input signal, can be shown to provide a maximum efficiency that reaches 78.5%.

).

Input (DC) Power:

The amount of this input power can be calculated using Pi(dc) = VCCIdc

where Idc is the average or dc current drawn from the power supplies. Note: In class B operation, the current drawn from a single power supply has

the form of a full-wave rectified signal, while that drawn from two power supplies has the form of a half-wave rectified signal from each supply.

In either case, the value of the average current drawn can be expressed as

Then the dc power input results in

Output (AC) Power: The output power can be calculated as



Efficiency:

(using I(p)=VL(p)/RL). The previous equation shows that the larger the peak voltage, the higher the circuit efficiency, up to a maximum value when VL(p)=VCC, this maximum efficiency then being

Power Dissipated by Output Transistor:

The power dissipated (as heat) by the output power transistors is the difference between the input power delivered by the supplies and the output power delivered to the load.

P2Q= Pi(dc) - Po(ac)

where P2Q is the power dissipated by the two output power transistors. The dissipated power handled by each transistor is then half of the P2Q.

Ex. For a class B amplifier providing a 20-V peak signal to a 16Ω load (speaker) and a power supply of VCC = 30 V, determine the input power, output power, and circuit efficiency.



Maximum Power Considerations:

For class B operation, the maximum output power is delivered to the load when VL(p) = VCC:

The corresponding peak ac current I(p) is then

so that the maximum value of average current from the power supply is

Using this current to calculate the maximum value of input power results in

The maximum power dissipated by the two output transistors occurs when the output voltage across the load is

for a maximum transistor power dissipation of

Ex. For a class B amplifier using a supply of VCC=30 V and driving a load of 16Ω, determine the maximum input power, output power, and transistor dissipation.



Ex. Calculate the efficiency of a class B amplifier for a supply voltage of VCC =24 V with peak output voltages of:

(a) VL(p) = 22 V. (b) VL(p) = 6 V.

- Class-AB Power Amplifier :

• An amplifier may be biased at a dc level above

the zero base current level of class B and above one-half the supply voltage level of class A; this bias condition is class AB. This is to reduce the crossover distortion that happened in class B.

• Class AB operation still requires a push-pull connection to achieve a full output cycle, but the dc bias level is usually closer to the zero base current level for better power efficiency, as described shortly.

• For class AB operation, the output signal swing occurs between 180° and 360° and is neither class A nor class B operation.

• The average power supplied by each source and the average power dissipated in each transistor are larger than the one for class B, which results in less power efficiency.

- Each transistor draws current for a half-cycle, then the dc current is

Power Considerations:

π

Cdc

II =

Then the input power delivered by the source is

π

CCCdcCCdci

IVIVP ==)(

- The ac output power could be calculated as

422)()(

CCCCCEQpacooormsaco

IVIvPivP =×=⇒=



Efficiency:

- Class-C Power Amplifier :

The output of a class C amplifier is biased for operation at less than

180° of the cycle and will operate only with a tuned (resonant) circuit, which provides a full cycle of operation for the tuned or resonant frequency. This operating class is therefore used in special areas of tuned circuits, such as radio or communications.

The power dissipated of the transistor is low because it is ON for a small percentage only of the input cycle.

A common emitter class C amplifier with a resistive load is shown in the given figure.

The Basic Concept of Operation:

It is biased below cutoff with the negative VBB supply. The ac source has a peak value that is slightly greater than VBB+VBE

During this short interval the transistor is turned ON and then the ideal maximum collector current is I

so that the base voltage exceeds the barrier potential of the BE-junction for a short time near the positive peak of each cycle.

C(sat) and the ideal minimum collector voltage is VCE(sat)

.

If the output swings over the entire load, the maximum collector current is I

The Power Dissipation:

C(sat) and the ideal minimum collector voltage is VCE(sat), therefore the power dissipation during the ON could be defined as



PD(ON)= IC(sat) V

)sat()sat()()( CECon

onDon

avgD VITt

PTt

P

=

=

CE(sat)

Ex. A Class C amplifier is driven by a 200kHz signal. The transistor is ON for 1µs, and the amplifier is operating over 100 percent of its load line. If the IC(sat)=100mA and VCE(sat)

( )( ) 4mV0.2V100mAs5s15

2001

)( =

=⇒==

µµµ avgDPs

kHzT

=0.2V, what is the average power dissipation? Solution:

The resistively loaded Class C power amplifier is of no value in linear applications. ???? (

Tuned Operation:

The output is not a replica of the input

). Thus, class C with parallel resonant circuit appears as shown in the figure.

The short pulse of collector current on each cycle of the input initiates and sustains the oscillation of the tank circuit so that the output sinusoidal voltage is produced.



The resonant frequency of the circuit is determined by the formula of

LCfr π2

1= .

The current pulse charges the capacitor to approximately VCC. After the pulse, the capacitor quickly discharges, thus charging the inductor. Then, after the capacitor completely discharges, the inductor's magnetic field collapses and then quickly recharges C to near VCC in a direction opposite to the previous charge (This completes one half-cycle of the oscillation

).

The capacitor discharges again, increasing the inductor's magnetic field. The

inductor then quickly recharges the capacitor back to a positive peak slightly less than the previous one??? (due to energy loss in the winding resistance), which completes one full cycle and then the peak-to-peak voltage is therefore approximately equal to 2VCC

.

Note: The amplitude of each successive cycle of the oscillation is less than that of

the previous cycle ??? (Because of energy loss in the resistance of tank circuit) and the oscillation will eventually die out. However, the regular recurrence of the collector pulse re-energizes the resonant circuit and sustains the oscillation at constant amplitude.



When the tank circuit is tuned to the frequency of the input signal, re-energizing occurs on each cycle of the tank. A class C amplifier operates as a frequency multiplier. By tuning the resonant tank circuit to higher harmonics.



The voltage developed across the tank circuit has a peak-to-peak value of approximately 2V

Maximum Output Power and Efficiency:

CC

( )C

CC

C

CC

C

rmsout R

VR

VR

VP

2707.0 222

===

, the maximum output power can be expressed as:

where RC

The total power that must be supplied to the amplifier is

is equivalent parallel resistance of the collector tank circuit and represents the parallel combination of the coil resistance and the load resistance.

PT=Pout+P

1 approachesclosely efficiency C class the , )()(

⇒>>+

= avgDoutavgDout

out PPwhenPP

Pη

D(avg) Therefore, the efficiency is

- Class-D Power Amplifier :

• This operating class is a form of amplifier operation using pulse (digital) signals, which are on for a short interval and off for a longer interval.

• Using digital techniques makes it possible to obtain a signal that varies over the full cycle (using sample-and-hold circuitry) to recreate the output from many pieces of input signal.

• The major advantage of class D operation is that the amplifier is on (using power) only for short intervals and the overall efficiency can practically be very high.

• Class D operation can achieve power efficiency over 90% and provides the most efficient operation of all the operating classes.

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