Alberto Annovi for the Fast Tracker collaboration Istituto Nazionale di Fisica Nucleare

Alberto Annovifor the Fast Tracker collaboration

Istituto Nazionale di Fisica NucleareLaboratori Nazionali di Frascati

A hardware track finder for the ATLAS trigger.

Fast Tracker

11th ICATPP Conference onAstroparticle, Particle, Space Physics,

Detectors and Medical Physics Applications

11th ICATPP, October 7th, 2009 Alberto Annovi 2

Outline

• The Fast Tracker for ATLAS level 2

• Physics motivations

• Fast Tracker internals

• Fast Tracker performances

• A pixel clustering algorithm for FTK


109

107

105

103

10

10-1

10-3

σ Even

ts/s

w

ith L

= 1

034 c

m-2

s-1

TRIGGER @ HADRON COLLIDERS

Hard Life!

Pile-up:

CDF: ~7 events @3 1032 cm-2

396 ns interbunch

LHC:~25 events @1034 cm-2s-1

25 ns interbunchA few hundreds events at SLHC

p

event + underlying event + pile-up

p

S1/2 (TeV)RARE

EVENTS

B charmless decays

B0->K


30 minimum bias events + H->ZZ->4

Tracks with Pt>2 GeV

Where is the Higgs?

FTK

30 minimum bias events + H->ZZ->4

Tracks with Pt>2 GeV

Where is the Higgs?

Help!

What does FTK? Find tracks pT>1 or 2 GeV


SVT

Fast Track (FTK)

LHC

Builds on the Silicon Vertex Trigger experience

For SVT see G. Punzi plenary talk (Monday)

Fast tracking in pixel and SCT det.

11th ICATPP, October 7th, 2009 6Alberto Annovi

Total # of readout channels:PIXELS: 80 millionsSCT: 6 millions


Where could we insert FTK?

PIPELINE

LVL1LVL1

CALO MUON TRACKERCALO MUON TRACKER

BufferMemory

ROD

BufferMemory

FEFE

Raw dataROBs

2nd output

1st output

Fast Track(Road Finder+GigaFitter)

Fast Track(Road Finder+GigaFitter)

Track dataROB

Track dataROB

high-qualitytracks:Pt>1 GeV

Event rate up to 100 kHz

Very low impact on DAQ

No changeto LVL2

Fast network connectionFast network connection

CPU FARM (LVL2 Algorithms)CPU FARM (LVL2 Algorithms)

Alberto Annovi 8

• R&D Proposal to work on TDR: approved Feb 2008• Preparing the TDR (2009) to be approved 2010 for SLHC Phase I

• Expected inst. luminosity: 1034 – 3*1034 (and 1035 later on) • staging is being considered to take data with FTK also before the Phase I shutdown:

•it is very important to learn at lower luminosities before going up to SLHC •early impact on physics : lepton isolation, b-tagging and tau-tagging studies

(Zbb; Ztau tau)

Argonne National Lab : J. Proudfoot and J. ZhangUniv. of Chicago : A. Boveia, E. Brubaker, F. Canelli, M. Dunford, A. Kapliy, Y.K. Kim, C. Melachrinos, M. Shochet, and J. TuggleUniv. and INFN Ferrara : L. TripiccioneINFN Frascati : A. Annovi, M. Beretta, and P. LaurelliUniv. of Illinois at Urbana-Champaign : H. DeBerg, A. McCarn, M. Neubauer, and S. WolinHarvard Univ. : M. Franklin, C. Mills, and M. MoriiUniv. and INFN of Pisa : E. Bossini, V. Cavasinni, F. Crescioli, M. Dell’Orso, P. Giannetti, M. Piendibene, G. Punzi, F. Sarri, I. Vivarelli, G. Volpi, and L. SartoriWaseda University : N. Kimura and K. Yorita

FTK collaboration & schedule


Physics motivations

B-tagging: FTK vs offline


Measuring the Z0 bbbar for:• b-jet calibration• improve top mass resolution• bbbar resonances (e.g. Higgs)

Z0 bbbar for b-jet calibration

I.Vivarelli et al.

(No-pile-up)

ATL-PHYS-PUB-2006-006


Higher efficiency for bbH/A 4 b-jets

(not

90%

eff

ic. f

or t

rue

Pt)

“w/o FTK”: assumes that level-2 execution time limits level-1 jet rate to a few hundred Hz., e.g. only jet threshold sharpening at level 2 & no b-tagging.

w/ FTK

w/o FTK

4-Jet Trigger Rate @2x104-Jet Trigger Rate @2x103333

Careful study of the 4-jet L1 trigger cross sections:


– At lower mass, the signal is badly sculpted by the non-FTK jet threshold

– Larger discovery region with FTK

Signal dijet mass distribution at the trigger

Higher efficiency for bbH/A 4 b-jets

e/ isolation @ high luminosity


Lepton identification: primary vertices fast identification Isolation with tracks of Pt>Threshold and from right vertex

z

Calorimetric isolation suffers from high event multiplicity!

Isolation with tracks has little sensitivity to pile-up events it becomes easy with FTK


Tracking in 2 steps

Roads1. Find low resolution

track candidates called “roads”. Solve most of the combinatorial problem.

2. Then track fitting inside roads.Thanks to 1st step it is much easier.Excellent results with linear approximation!

Pattern recognition w/ Associative Memory

http://www.pi.infn.it/%7Eorso/ftk/IEEECNF2007_2115.pdf

IEEE Trans. On Nucl. Sci., vol. 53, pp. 2428-2433 (2006)


The Event

...

The Pattern Bank

Pattern matching

Associative Memory (AM)see L. Sartori talk Tuesday


1/2

AM

1/2

AM

Divide into sectors

6 buses 40MHz/bus (to be increased)

ATLAS Pixels + SCT

Feeding FTK @ 100kHz event rate

Pixel barrel SCT barrel Pixel disks

11 Logical Layers: full coverage

• 8 regions each with• 6 sub-regions ( towers)

• ~25o, ~1.7 • bandwidth for up to 3*10E34 cm-2s-1

Allow a small overlapfor full efficiency

11th ICATPP, October 7th, 2009 17

Track dataROB

Track dataROB

Raw dataROBs

~Offline quality Track parameters

…

HITS

Inside Fast-TrackPixels & SCT

DataFormatter

(DF)50~100 KHzevent rate

RODsRODscluster findingsplit by layer

cluster findingsplit by layer

overlap regions

overlap regions

Remove duplicate trks

S-links

Alberto Annovi

DataOrganizer

AM brd

Track Fitter

DataOrganizer

AM brd

Track Fitter

6x towers

The pattern bank for pattern matching

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Pattern bank size strongly depends on superstrip size.It is a compromise between coarser superstrips = fewer patterns but many more fits

Sing

le m

uon

effici

ency

>100M patterns/region with AMchip + tree search processor (TSP)

50M patterns/region with future AMchip

90%

88%

11th ICATPP, October 7th, 2009 Alberto Annovi

Bank size (M patterns/region)

4M patterns/region use current AMchip


1. Two smaller FTKs in cascade (a` la CDF): 8 SCT layers fitted first, then 3 pixels layer + SCT fitted segment

2. Two Half-SS shifted banks used in parallel to improve SS resolution

1. New algorithm inserted between the AM and the TF: The Tree Search Processor (TSP) - NIM A287 (1990) 436-438

http://www.pi.infn.it/~paola/Tree_search_algorithm.pdf

SS lsb-bit=0SS lsb-bit=1

Same SS #

Blue is SSYellow is SS-1

Blue is SS+1, Yellow is SS.

2 roads found by blue AM

1 road found by yellow AM

Comparing the 2 outputs andrejecting the roads not found byboth AM banks, cleaner output

Different SS definitions on each layer

FTK #1(as XFT @CDF)Find SCT segments

FTK # 2(as SVT @CDF)links pixel hits

To SCT segments

,pt,z,d ofSCT segments

CDF

XFT in COT

SVX

Studying different architectures: optimize AM useRedundancy for high luminosity

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Algorithm: NIM A287 (1990) 436-438 http://www.pi.infn.it/~paola/Tree_search_algorithm.pdfTree Search Processor: NIM A 287, 431 (1990), http://www.pi.infn.it/~orso/ftk/NIMA287_431.pdf

IEEE Toronto, Canada, November 8-14 1998 http://www.pi.infn.it/~paola/TSP_v14.pdf

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3 4

THIN ROAD

FAT ROADFound by AM (default SS for example or even larger)

1 2 3 4

5 6 7 8

Depth 0

Depth 1

Depth 2

PATTERN

BLOCK

PARENTPATTERN

Advantages: pattern bank saved in dense RAMs high degree of parallelism


How much workload for the GF?


Full simulation: WH events @1034 cm-1 s-1

Million of fits

<fits/event> ~ 200kBarrel onlyRegion 0

http:

//w

ww

.pi.i

nfn.

it/%

7Eor

so/ft

k/IE

EECN

F200

7_21

15.p

dfGF upgrade for SVT: 1 fit/nswith a Xilinx Virtex 5 FPGA(XC5VSX95T)

Doable with a few FPGAs/region

AMchip : 3.8M patterns/region+ TSP : 108M patterns/region

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A hardware architecture able to digest WH lnubb + 1034 pileup @ 75kHz event rate

SUPERBins

DO + TF

HIT

s

ROADS

12 L

SUPERBins

DO + TF

HIT

s

ROADS

12 L

….….……..

Tower 0 Tower 5

TRACKS TRACKS

TRACKS MERGING + HW

Tracks to Level 2

1000 hit/ev/layer corrected for overlaps between region→ 1000/3=330/ev. Dividing in 6 towers (with 100% contingency for tower overlap)→ 330 * 75 kHz = 25 MHz OK even for current AMchip!

~6500 <Roads>/ev → 3600 for RW reduction → 600/ev if divided in 6 engines→ 600 * 75 kHz = 45 MHz →1 Road each 22 ns

400 k <Fits>/ev. → 66 k <Fits>/ev. in 6 engines→ 66 k * 75 kHz → 5 G<fits>/s → 5 fit/ns

1 FTK -region : 6 towers


11th ICATPP, October 7th, 2009

23

CUSTOMBACKPLANE

Hit

Warr

ior

FTK INPUT

12 AM boards

Today technology:3.8 106 Patterns today

Amchip100M patterns TSP

For 2014(?) installation:O(50 106 ) Patterns for 90 nm ??Giga patterns future TSP

DO

+TF

-1

AM

2+

TSP

AM

3+

TSP

DO

+TF

-2

AM

4+

TSP

AM

5+

TSP

DO

+TF

-3

AM

6+

TSP

AM

7+

TSP

DO

+TF

-4

AM

8+

TSP

AM

9+

TSP

DO

+TF

-0

AM

0+

TSP

AM

1+

TSP

DO

+TF

-5

AM

10+

TS

P

AM

11+

TS

PC

PU

vm

eFTK

Outputtracks

All found tracks

8x core crate layout (TSP option)

1 tower

Alberto Annovi

Tracking quality on single muon events


• We compare FTK-reconstructed tracks with an offline algorithm (IPAT)

• Resolutions are wrt all truth tracks with pt > 1 GeV and |η| < 2.5

• Performances are comparable


November 2008: nopile-up – full coverage raw hits

Single muons

0 2 4 6 8 10 12 14 16 PT [GeV]

FTK proposal: no pile-up barrel only – space points

WH 10**34 pile-up

Alberto Annovi

σFTK = σoffline 30μm⊕


RO

RI

RSle

adin

g P T

tr

ack

Jet a

xis

|| < 0.8 for jet1033 Lumi

Fakes as a function of jet Fakes as a function of jet Pt

iPat Tracks

FTK Sim Tracks

-jet efficiency rejection

SingleProng (1,0)

Alberto Annovi

Efficiency vs. Efficiency vs. pT

end end


d

phi

d

SVT: Online beamline fit & correction

Subtracted

Raw

x

y

d

<d> = Ybeamcos – Xbeamsin

L. Ristori et al.

Also used to monitor beam profile.Useful information for accelerator people! htt

p://

ww

w-c

df.fn

al.g

ov/c

dfno

tes/

cdf7

208_

bw_o

nlin

e.ps

Nuc

l.Ins

trum

.Met

h.A5

18:5

32-5

36,2

004

end end

Pixel clustering for the Fast TracKer• Pixel clustering device for the ATLAS FastTracKer processor

– 1st application & design motivationhttp://twiki.cern.ch/twiki/bin/view/Atlas/FastTracker

• Main challenge: input rate 160Gibts– 132 S-link fibers from all pixel RODs

• Running at 1.2 Gbits (total 160Gbits) • 32bit words at 40MHz, 1 hit/word

– Use hits at 40MHz as benchmark• Focus on clustering quality for level-2

• Illustrate a general clustering strategyLevel-2

Event buffers

Fast TracKerinput stage

PixelDetector

clusteringdevice

50~100 kHzevent rate

Detectorinterface

Detectorinterface

132S-links FTK reconstructs

tracks for level 2


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The problem

• Clustering is a 2D problem1. Associate hits from same cluster

– Loop over hit list– Time increases with occoupancy &

instantneous luminosty– Non linear execution time

2. Calculate cluster properties – e.g. center, size, shape …

• Goal: execution time linear with number of hits– Not a limiting factor even at

highest inst. Luminosity

3 9 7

1 13 15

4 8 6 11

12

2 5 10 14

11 22 33 44 55 66 77 88 99 1010


The algorithm working principleFPGA replica of pixel matrix

Eta direction -->

Pixel module is a 328x144 matrix.Replicate it in a hardware matrix.The matrix identifies hits in the same

cluster (local connections).

Load allmodule hits

Loop

ove

r eve

nts

and

pix

el m

odul

es

select left most

top most hit

propagate selection

through cluster

read out cluster

Loop

ove

r clu

ster

s in

a m

odul

e

Averagecalculator

out

Core logic:Hit associated into clusters

high level cluster analysis

high level cluster analysis

2nd pipeline stage


end end

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Clustering by 328x8 slices?Module data

Eta direction -->

Shift of hits comes for free (no extra time)! Just use the slice as a circular bufferin the eta direction. Then hits are shifted by redefining the first column.

SLIDING WINDOW: with one xc5vlx155 process one S-LinkImplement 2 processing matrixes. Process hits at 40MHz rate.


Fill 328x8 slicelike this

Read out 1st cluster

Read out 2nd cluster

And so on

Fill 328x8 slicelike thisModule data

Eta direction -->

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Two priority logic chains

hitpixelcell

select

hitpixelcell

select

hit

hit

X 328 pixels in a column and 144 columns

This logic selects the top most pixel.Similar logic to select the left most column with a hit.

select

a 1st priority logic- needed to select first hit

a 2nd priority logic- needed to readout selected hits (cluster)- position from address bus


hit

sel

sel

hitControllogic

Controllogic

The elementary cell

clk

clk

ROW SEL

COLUMN SEL

AND

Combinatorial logic

Combinatorial logic

8

1st neighborhoodIS_SELECTED

WRITE

IS_HIT

IS_SELECTED

SEL HIT

SEL FORREADOUT

3 STATES (2 FLIP-FLOPS):IS_EMPTYIS_HITIS_SELECTED


Cluster definition:Contiguous hits along side or cornerFlexibility to redefine it

Conclusions• FTK performs global track reconstruction at Level-1 trigger rate

• Using massively parallel Associative Memories, FTK will provide a complete list of 3D tracks at the beginning of Level-2 processing

• Time saved by FTK can be used in Level-2 for more advanced algorithms– Bonus: access to tracks outside Regions of Interest

• FTK easily integrates with current ATLAS DAQ

• Builds on success of Silicon Vertex Trigger (SVT) at CDF

• More info: http://www.pi.infn.it/~orso/ftk/https://twiki.cern.ch/twiki/bin/view/Atlas/FastTracker


Thanks for your attention



xi

Non-linear geometrical constraint for a circle:

F(x1 , x2 , x3 , …) = 0

But for sufficiently small displacements:

F(x1 , x2 , x3 , …) ~ a0 + a1x1 + a2x2 + a3x3 + … = 0

with constant ai(first order expansion of F)

From non-linear to linear constraints


Constraint surface

14 measured coordinates: x1 … x14

5 parameters to fit : , d0, pT, , z0

9 constraints

Linear approximation is good within any given set of physical modules.


• Discovery reach (FTK double b-tag 25 Hz L2 output)

• Note that FTK is rather insensitive to a much higher background rate due to either higher luminosity or MC reality.

Alberto Annovi for the Fast Tracker collaboration Istituto Nazionale di Fisica Nucleare

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Transcript of Alberto Annovi for the Fast Tracker collaboration Istituto Nazionale di Fisica Nucleare