ADVANCEMENT IN EDGE COMPUTING WITH HMI...
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RON MARTINO VP & GM i.MX APPLICATIONS PROCESSOR PRODUCT LINE ADVANCEMENT IN EDGE COMPUTING WITH HMI INTERFACES, ARTIFICIAL INTELLIGENCE AND FD-SOI SEPTEMBER 2017
Transcript of ADVANCEMENT IN EDGE COMPUTING WITH HMI...
RON MARTINO VP & GM i.MX APPLICATIONS PROCESSOR PRODUCT LINE
ADVANCEMENT IN EDGE COMPUTING
WITH HMI INTERFACES, ARTIFICIAL
INTELLIGENCE AND FD-SOI
SEPTEMBER 2017
1 PUBLIC
The New World of Seamless Machine Interfaces
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EMBEDDED PROCESSING
INCREASING NUMBER OF DISPLAYS
PUBLIC
3
EMBEDDED PROCESSING
INCREASING NUMBER OF
CONNECTIONS
PUBLIC
NFC802.11
NFC
802.11p
802.11p
Radar
LF, UHF
NFC Portable Device
Connectivity
NFC
4
EMBEDDED PROCESSING
NEW HUMAN-MACHINE-INTERFACE
CAPABILITIES
PUBLIC
5
EMBEDDED PROCESSING
NEW VISION & SAFETY REQUIREMENTS
PUBLIC
Basic Complex Advanced
Vision Fusion & Control Object Identity & Security Gesture & Face
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ARTIFICIAL INTELLIGENCE
MACHINE INTERACTION
PUBLIC
Industrial
Robotics
Multi Camera
Surveillance
Drones
Automotive
Gesture & Voice Control
Augmented Reality
Object Recognition
Deep Neural Networks &
Machine Learning
Vision, Speech &
Natural Language
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SCALABILITY OF EMBEDDED PROCESSING
LEARNING PUSHED TOWARDS THE EDGE
IT IS ALL
ABOUT THE DATA
&
MAKING THE EDGE
SMARTER OVER
TIME
Complex
Training
Clustering
Training
Inferring
PUBLIC
New
Models
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SCALABILITY OF EMBEDDED PROCESSING
SUBSYSTEM OPTIMIZATION FOR UNIQUE WORKLOADS
PUBLIC
i.MX 8QM A53 A53
A53 A53
A72
A72 M4 M4
4K Video 2x GPU (8 shaders)
2x MIPI-DSI 2x LVDS MIPI-CSI
MIPI-CSI HDMI 2.0 Audio
1GbE
1GbE
PCIe PCIe
USB 3.0 & 2.0
x64 LPDDR4/DDR4
i.MX 8QXP
A35 M4
4K Video 2x GPU (4 shaders)
LVDS/MIPI LVDS/MIPI
MIPI-CSI Audio
1GbE
1GbE PCIe
DSP
USB 3.0 & 2.0
x32 LPDDR4/DDR3L
A35
A35 A35 i.MX 8DX
A35 M4
1080p Video 2x GPU (2 shaders)
LVDS/MIPI LVDS/MIPI
MIPI-CSI Audio
1GbE
PCIe
DSP
USB 2.0
x16 LPDDR4/DDR3L
A35
i.MX 8DM
M4 M4
4K Video
MIPI-DSI 2x LVDS
MIPI-CSI HDMI 2.0 Audio
1GbE
1GbE
PCIe PCIe
USB 3.0 & 2.0
x64 LPDDR4/DDR4
1x GPU (8 shaders)
DSP
A72
A72
DSP
Increasing number of compute domains on a single SOC
DSC
DSC DSC
DSC
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LEVERAGING ARCHITECTURE & IP
8QM PIXEL PIPE
PUBLIC
2x MIPI-CSI2
4 lane
HDMI-RX
Ethernet
AVB
Image
Capture
Subsystem
Display
Processor
MIPI-DSI
4 lane
HDMI/eDP
LVDS
CPU
Cluster GPU_0
VX
GPU_1
VX
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LEVERAGING ARCHITECTURE & IP
NEURAL NET EXAMPLE
PUBLIC
Collect
Video Display
Machine
Decision Neural Net
Classifier
Segmen
-tation &
Render
ICS CPU GPU0 GPU1 DPU MIPI-CSI2
4 lane
MIPI-CSI2
4 lane
Ethernet
AVB
MIPI-DSI
4 lane
HDMI/eDP
LVDS
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SCALABILITY OF EMBEDDED PROCESSING
THE NEW NORMAL FOR EDGE COMPUTING
Ultra-low Power
Dynamic & Static
ARM v8/v8m + GPU/DSP
ARM v7/v7m + 2D/3D
ARM v7m + Audio
i.MX 8
i.MX 8X
i.MX RT
i.MX 7ULP
PUBLIC
Coming
Soon!!
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MPU
MCU
40/28nm
130/90nm
High Performance,
High-level OS,
Graphics/Video/Display
Processing
Low Power,
Real-time OS,
RF/NVM/Mixed-signal
Integration
16/14/10/7nm
40nm
EMBEDDED PROCESSING
YESTERDAY’S
PARADIGM
PUBLIC
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EMBEDDED PROCESSING
FUTURE
Computation & Machine Learning
High Performance,
Power Efficiency,
Mixed-Signal,
Broad Scalability
Manufacturable Flash Processes
Reuse existing foundry tooling
16/14/12/11/10/8/7 ...
28/22/18/12
90/40
RF Integration
Next-generation
memories
FD-SOI
EM
BE
DD
ED
PR
OC
ES
SO
RS
PUBLIC
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EMBEDDED MRAM ON 28NM FD-SOI
SCALING & DIVERSIFICATION
PUBLIC
i.MX 8QXP
i.MX 7ULP
eMRAM
1st 28nm FD-SOI SOC + eMRAM integration test chip in our labs!!
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SCALABILITY OF EMBEDDED PROCESSING
THREE OPTIMIZATION POINTS
ON 28 FD-SOI
PUBLIC
i.MX 8QM
i.MX 8QXP
i.MX 7ULP
1x
5x
12x
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SCALABILITY OF EMBEDDED PROCESSING
BROADEST DYNAMIC
RANGE
PUBLIC
GPU
7000 NU 1 Shader
ARM v7
A7 CPU Cluster
7ULP
Display
MIPI / Alpha
Blending
Parallel I/F
LP IO/ LP Conn
Cortex-M4
ARM DSP EXT
GPU 7000L
4 Shader
VPU H.265 /
H.264
ARM v8
A35 CPU Cluster
Display
Controller
IMG Capture
Audio DSP
HSIO / LSIO / Conn
8QXP
GPU
7000UL2 Shader
VPU H.265 /
H.264
ARM v8
A35 CPU Cluster
8DX
Cortex-M4
Display
Controller
IMG Capture
Audio DSP
HSIO / LSIO / Conn
Cortex-M4
GPU
7000XS/VX
8 Shader
GPU
7000XS/VX
8 Shader
VPU H.265 VPU H.264
ARM v8 A53
CPU Cluster
ARM v8 A72
CPU Cluster
Display
Controller
Display
Controller
Imaging Capture Imaging Capture
Audio DSP HSIO / LSIO / Conn
8QuadMax
Cortex-M4 Cortex-M4
1
3 2
Power Efficiency
High Performance Power-Performance
>>RBB
RVt
TOx
<< Iq
>>FBB LVt
<< Iq
LPower IP
HPerf IP
Lext
LVt RVt
LPower IP Lext
HPerf IP
>Vdd
>Vdd
DVS
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OPTIMIZATION OF TECHNOLOGY – ARCHITECTURE – DESIGN
Advanced Human-Machine-Interface on FD-SOI
PUBLIC
Optimized Cost
High Performance Low Power
Efficient RF Integration
High Precision Mixed Signal
Integration
THE HUMAN EXPERIENCE
• Seamless HMI
• Multi-Sensory Inputs
• Natural Language Interaction
• Augmented Reality
• Machine Learning
• Autonomous Machines
