Advanced Thermal Management Technologies for Electronic … STANFORD.pdf · 2013. 3. 26. · Lots...
Transcript of Advanced Thermal Management Technologies for Electronic … STANFORD.pdf · 2013. 3. 26. · Lots...
Advanced Thermal Management Technologies for Electronic Systems
Ken [email protected] Engineering
Stanford University MEPTEC 2005
no known solutionfin-arrays,heat pipes
excessive
volume
0
50
100
150
200
250
1999 2001 2003 2005 2007
Power Q(W)
High-Performance
Cost-Performance
(including laptops)
?
?
ITRSYear:
ITRS View of Thermal Management Challenge
heat spreaderSi chip
chip carrier
heat sink
junctionchip
qtransistors
Device-Level SEM
metal
IBM
ILDqinterconnects
Rtransistor
Ctransistor
Ttransistors
Cinterconnect Tinterconnect
Rinterconnect
Rheat sink
Cchip
Cheat sink
T
Tambient
Rchip + TIM
Tspreader
Thermal Resistance Hierarchy
Lots of Thermal Activity
Unprecedented startup climate for thermal technologies, in areasranging from microfluidics and thermoelectrics to interfaces (over $60 million in venture capital in 2004, more likely in 2005).
New technologies appearing in a conservative discipline: Pumped liquid cooling in laptops (e.g., Hitachi, Toshiba) and desktops (Apple).
Chip makers are studying liquid cooling in detail, while scaling back power density projections.
Outline
• On chip challenges & solutions• Thermal interface materials• Advanced heat sinks
1995 2000 2005 20152010
interconnectself heatingRinterconnect
On-Chip Thermal Challenges
2
d
dmm
2 Nkdd j~ ρPeak ∆T
~ 30oC at 70 nm node ~ 80oC at 50 nm node
Global WiresGlobal Wires
InterconnectTemperature
Field
Student: Sungjun Im,Proc. IEDM 2000
Silicon
Interconnect Self Heating
Temperature Contour Plot (50 nm technology node)
209 °C209 °CGlobal WiresGlobal Wires
Compounding ITRS trends lead to accelerating peak temperature:low-k dielectric materials with poor thermal conductivitiesincreasing current densities and aspect ratiosincreasing number of interconnect layers
Student: Sungjun Im. Sponsor – MARCO IFC
7.1
ILD
ILDMETMET
2 Nkdd j~ ηρPeak ∆T
0 2 4 6 8 10
120
140
160
180
200
220
Tem
pera
ture
[o C]
Distance from Substrate [µm]
35 nm
50 nm
70 nm
100 nm
130 nm
180 nm
Tem
pera
ture
Ris
e (o C
)
0
100
50
interconnectself heatingRinterconnect
microprocessorhotspots (mm scale)Rchip + TIM
On-Chip Thermal Challenges150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
100 W
50 W
1995 2000 2005 20152010
Rtotal(ITRS 2003)
Rchip
Rhe
atsi
nk
0
0.1
0.2
0.3 oC/W
2000 2005 2010 2015 2020
20191817161514131211109876543210
∆Tmax = 21.4 oCθj-TIM = 0.11 K/W
Conventional Heat Sink, Cu Spreader
Liquid Waterflow
Hotspot
20191817161514131211109876543210
0 5 10 15 200
5
10
15
20
125 W(125 W/cm2)
75 W (25 W/cm2)
Power Map (200W)
2 cm
2 cm
Hotspot Cooling by MicrochannelsJae-Mo Koo, Sungjun Im (Stanford)with Ravi Prasher (Intel)
Microchannel Heat Sink∆Tmax = 13.2 oC, θj-TIM = 0.066 K/W
Hotspot Cooling by Chip-integrated Thermoelectrics
Ali Shakouri, UCSC, Avram Bar-Cohen, UMD. Proc. DARPA Site-Specific Thermal Management Workshop, Jan. 2005
0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 1100098
100
102
104
106
Tem
pera
ture
(o C)
Distance along the Die (oC)
Without TE Cooling (I=0A) 1-Pad Electrode, (I=0.3A) Ring Electrode, (I=0.3A)
Die Thickness=50um; q” fb = 680W/cm2 ; q”avg = 70W/cm2
Fireball = 70um; MicroCooler = 70um; Doping=1x1019cm-3
1995 2000 2005 20152010
interconnectself heatingRinterconnect
microprocessorhotspots (mm scale)Rchip + TIM
On-Chip Thermal Challenges
transistorhotspots (nm scale)Rtransistor
18 nm
ITRS transistor in 2010
Source Drain
Silicide
Bulk Silicon
GateOxide Isolation
Bulk FET
FinFET
Silicide
Silicon substrate
Gate
Strained Si, Ge, SiGe
Buried oxide
SOI/SiGe
back gate(p++ Si)
HfO2
S (Pd) D (Pd)SiO2
top gate (Al) CNT
Carbon nanotubetransistor
UC Berkeley/AMD
IBM Stanford
1995 2000 2005 20152010
Transistor Timeline
Freq
(Hz)
Energy (meV)
Phonon Wavevector qa/2π
10
20
30
40
50
60
Transistor Thermal Processes
High ElectricField
Hot Electrons(Energy E)
Source
Gate
Drain
Optical PhononsOptical Phonons
τ ~ 10 ps
τ ~ 0.1psE > 50 meV
optical(vop ~ 1000 m/s)
IBM
Heat Conductionto Package
τ ~ 1 ms – 1 s
E < 50 meV
Acoustic PhononsAcoustic Phonons
τ ~ 0.1ps
acoustic
(vac ~ 9000 m/s)
???
Students: Eric Pop, Sanjiv Sinha, Jeremey RowletteSponsors: SRC 1043, IBM, Intel
2D Monte Carlo of 18 nm Thin-Body SOI Transistor
Cur
rent
J·E
ITRS Specs:LG=18 nm, tSI=4.5 nm, tOX=1 nm NSD=1e20 cm-3, NCH=1e15 cm-3
ION=1000 µA/µm, IOFF=1 µA/µmΦGATE=4.53 eV (Mo), VDD=0.8 V
if W/L = 4 then Nelec ~ 2500 total!
Pop, Goodson, Dutton, Journal of Applied Physics, Vol. 96, p. 4998 (2004)
Phonon Hotspot TemperatureTe
mpe
ratu
re R
ise
(K)
1 Based on ITRS 2003
Targeted JunctionTemperature
Actual Junction Temperature
HotspotEffect
ULTRA-THINBODY
Year1
Outline
• On chip challenges & solutions• Thermal interface materials• Advanced heat sinks
Carbon Nanotubes in Thermal Interface Materials
• Homogeneous mixture with particlesHu, Jiang, and Goodson, ITHERM 2004, SRC patent pending
• Aligned growth (one side)Hu, Padilla, Xu, Fisher and Goodson Submitted to Semitherm 2005
• Aligned growth (two sides, “thermal nano velcro”)Work in progress! In collaboration with Dai’s group, Stanford
heat spreader
chip
Students: Xuejiao Hu, Angela McConnell, Antonio Padilla, Senthil GovindasamySponsors: SRC 1064, NSF NIRT, IBM, Raytheon, Molecular Nanosystems
heat spreader
chip
chip
heat spreader
CNT
Aligned CNTs on Silicon
Pad PadPt Line
Silicon
SiN
Pressure
Glass
Hu, Padilla, Xu, Fisher, Goodson, submitted to SEMI -THERM 2005
Attachment Pressure 100kPa (14.5 psi)
Attachment Pressure 40kPa (5.8 psi)
Stand-alone Single-walled CNT
poly Si P++
Si substrate
measure Thot
measure Tcold
AC heating current
Alnanotube
cold side
hot side
McConnell, Jiang, and Goodson, NSF Design, Service & Manufacturing Grantees and Research Conference, 2004
polysilicon
polysilicon
1 µm
nanotube
Thermal Conductances of Carbon Nanotubes
Student: Angie McConnell. Sponsor: NSF
Outline
• On chip challenges & solutions• Thermal interface materials• Advanced heat sinks
Space Wars
Heat Sinks are 3000xbigger than chip
Power Delivery~1 cm3
ASICs~1 cm3
Heat Sinks,Heat Pipes,Vapor Chambers
~ 102 cm3
~10-1 cm3
RAM~10-1 cm3
Video~10-1 cm3
They crowd away more important functional components
HOTSPOTS
“Dream Heat Sink” (1998 Brainstorm)
Fluid
ports
Microprocessor
Integrated Pump& controllermicrochannel cooling
at hotspots
Free I/OSurface
IntegratedTemperature
sensors
• no larger or heavier than microprocessor chip
• targeted cooling at hotspots
• fully-integrated, silent, reliable pump
• temperature sensors control pump flowrate
DARPA HereticIntel
1999 2000 2001 2002 2003 2004 2005
AppleAMD
Research Background
Pyrex seal
ChannelsIn silicon
Si chip
Thermalattach
Si chip
Fluidinlet
Outlet Thermalattach3D
2D
Microfluidic Cooling: Government Seed
1 cm1 cm
ElectroOsmotic PumpMicrochannel Modules
DARPA HereticIntel
1999 2000 2001 2002 2003 2004 2005
AppleAMD
CooligyStartup(VC funding)
ProductShipment
MicroCoolers for ComputersResearch Background
Micro hx
EO Pump
Heatrejector
Micro hx
EO Pump
Heatrejector
Microfluidic Cooling: Venture Growth
Zhou et al., Proc. SEMITHERM 2004, Proc. ITHERM 2004
ElectroOsmotic Pumps Groups of Santiago, Goodson, Kenny, Stanford Mechanical EngineeringSponsor: MARCO IFC, DARPA, Intel
1 cm1 cm
Vd
p 2max32εζ
=∆
µ−
−µ
εζ=
)ra(dxdpE)r(u
22
lVAQ
µεζ
=max
•Very high volume to flowrate ratio•Stanford pump performance (Feb 2003):Pmax ~ 2 atm, Qmax ~ 40 ml/min, Vol. ~ 2 cm3
EOF
+ + + +++ ++ ++ + +++ ++
Glass or fused-silica capillary wall
Charge double-layer
Deprotonated silanolgroups
+ -
Idealized pore channel:
Free-standing pump
Siliconmicromachined
pump
1999 2000 2001 2002 2003 2004 2005
MARCO
Mixed Signal I/O
Intel
mixed signal I/O module releases chip backside for RF, Photonic, MEMS I/O usingIntegrated electrical/fluidic interconnects
Microfluidic Cooling: Mixed-Signal Fluid
Mixed Signal Chip
targeted, on-demandmicrochannel cooling
Free I/OSurface
Solid-state EO pump
Mixed Signal Chip
Fluidic I/OPhotonic I/O RF
Integrated MEMSSensing
ElectricalConnections
Fluidic Cooling
Mixed Signal Chip
Fluidic I/OPhotonic I/O RF
Integrated MEMSSensing
ElectricalConnections
Fluidic Cooling
1999 2000 2001 2002 2003 2004 2005
DARPA3DIC
3D IC CoolingMicrofluidic Cooling: 3DICs
Briefly: Refrigeration Techniques
P PPN NN
Cold Side: Active Cooling
Hot Side:Heat Rejection
Current+-
Hot Side: Heat Rejection
Cold Side: Input from Chip
p n p n np
Current
Piezoelectric Actuator, ~3 kHz
Heat Exchangers
Resonator
CompressorPower
Cold Heat Exchanger:Input from Chip
Hot Heat Exchanger:Heat Rejection
Valve(Sprayor Jet)
III
Chip2. Solid State
1. Vapor-Compression
3. Acoustic
Routes to Higher PerformanceA. Majumdar, Science 303, 777 (2004)
M. Dresselhaus, Proc. EPRI Workshop, 2004
cold end
hot end
Ip nI
Point Contacts(Gmelin et al., MPI; Ghoshal et al., IBM
Low-dimensional solidswith reduced phonon conductivity
Electron Tunneling(Kenny Group, Stanford; CoolChips)
electronelectron
conductorinsulator
phonondW < λdB
e,hdW < λdBe,h dW < lmfp
phdW < lmfpph
Thermionic Transport(Bowers, UCSB; Shakouri, UCSC)
Cathode Barrier Anode
Energy
Hot electron
Cold electronHotHot ColdCold
Concluding Remarks
• Power density (W/cm2) is the critical metric for the difficulty of a cooling problem, and is as relevant for individual transistors as it is for hotspots on the microprocessor and air cooling of heat sinks and the computer case.
• Pumped liquid cooling has arrived, and will buy the industry a few more years of power density scaling, specifically to the limits of case-level heat rejection.
• Frontier research opportunities (microfluidics and microthermoelectrics) can extend power density scaling (even to 3D circuits), although they pose major challenges in chip-integration and cost.
Micro Heat Transfer LabKen Goodson, Stanford Mechanical Engineering
Current GroupSanjiv Sinha Roger FlynnXuejiao Hu Julie SteinbrennerSungjun Im (Materials Science) Evelyn Wang Kevin Ness Ankur Jain Jae-Mo Koo Fu-Min WangYue Liang Eon Soo LeeAngela McConnell Dr. Carlos HidrovoJeremy Rowlette (Electrical Engineering) Dr. Eric PopDavid Fogg Dr. Ching-Hsiang Cheng
Recent AlumniProf. Mehdi Asheghi Carnegie Mellon University (ME)Prof. Dan Fletcher UC Berkeley (Bioengineering)Prof. Bill King Georgia Tech (ME)Prof. Katsuo Kurabayashi University of Michigan (ME)Prof. Sungtaek Ju UCLA (ME)Prof. Kaustav Banerjee UC Santa Barbara (EE)Dr. Uma Srinivasan XeroxDr. Per Sverdrup Intel Dr. Peng Zhou CooligyDr. Maxat Touzelbaev AMD