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Te c h n o l o g y W h i t e P a p e r

Addressing the Challenges of Lead-free Technology in Mil/Aero Electronics

Introduction

RoHS (Restriction of Hazardous Substances) and WEEE (Waste from Electrical and Electronic Equipment) have become familiar acronyms to anyone involved in electronics manufacturing. These are the European Union directives that ban the use of lead and five other substances in many electronics applications, effectively initiating the world-wide lead-free movement that has resulted in other countries enacting similar legislation.

The companies affected by these restrictions, including most component manufacturers, have transitioned away from lead-based electronics. Aerospace and defense (A&D) applications are not explicitly named in RoHS and WEEE (yet) and therefore can continue to contain lead. However, the use of lead-free commercial off-the-shelf (COTS) components for advanced technology military applications impacts the industry considerably, particularly with respect to reliability in harsh environments. The most infamous impact is likely tin whiskers, but there are many other effects that arise and must be addressed so that the industry can continue to produce high performance and reliable electronics.

Failure to address lead-free effects can lead to disastrous consequences, as documented in the website that NASA maintains for electronic system failures attributed to tin and other metal whiskers1 in the military, satellite, medical and nuclear power industries. Other failure modes exacerbated by lead-free electronics include pad cratering, printed circuit board de-lamination, and solder joint cracking (see Figure 1).

Understanding and addressing/mitigating lead-free impacts requires significant expenditures, as shown by one manufacturing facility, that was estimated to have spent close to $35M over three years2. These expenditures are increasing the costs of producing A&D electronics in the near and medium terms, but may subside in the longer term if common approaches are taken.

Figure 1: Examples of lead-free failure modesTin Whiskering

(Photo courtesy of P. Bush, SUNY)Pad CrateringPCB De-lamination Solder Joint Cracking

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Group Initiatives Addressing Lead-free Technology

It was recognized several years ago that the lead-free issue impacted the A&D electronics industry extensively, and that a collective risk management approach was required among the affected government agencies (DoD, FAA, etc.), the prime contractors, and lower-tier suppliers. The Lead-free Electronics in Aerospace Project (LEAP) consortium was started in 2004 to work on an approach to myriad lead-free concerns. It has published several important standards dealing with control and management of lead-free issues. This group has since combined with other initiatives and been re-named PERM (Pb-free Electronics Risk Management). PERM continues its vital work on lead-free issues.

An outgrowth of the PERM consortium is a project called Lead-Free Electronics Manhattan Project (LFEMP). This group of subject matter experts was formed to address the multitude of technical risks associated with using lead-free electronics in A&D applications. They have produced two reports2,3. The Phase I report identified best practices with lead-free, but highlighted the significant gaps requiring investigation and resolution for A&D electronics. The Phase II draft report details these gaps and presents a comprehensive and coordinated three-year Pb-free Electronics Risk Reduction (PERR) project to address the gaps. Phase III is intended to execute the PERR project.

There are of course other organizations that have worked on lead-free reliability issues, and continue to do so, including IPC (formerly called the Institute for Interconnecting and Packaging Electronic Circuits), International Electronics Manufacturing Initiative(iNEMI), and the Surface Mount Technology Association (SMTA). In addition, several consortia have focused efforts on researching lead-free reliability applicable to the A&D industry because it is substantially different from other electronics industries, and has lagged in implementing lead-free assembly. However, COTS assembly suppliers to the A&D industry must determine how applicable any research results are to their own lead-free approach to their products, as the details may differ significantly and lead to erroneous reliability conclusions.

Lead-free Reliability Risks for A&D Electronics

The Phase II draft report from the LFEMP outlines five major, top-level R&D project areas to deal with technical risks and knowledge gaps for the use of lead-free electronics in A&D applications:

� Tin whiskers

� Electronics assembly

� Solder joints

� Printed circuit boards

� Components

These five areas are broken down two levels further into individual Level 3 tasks/projects. The entire PERR project is estimated to take three years, with dissemination of important findings on a periodic basis. Funding is currently being sought for the project.

If and when the PERR project comes to fruition, it is expected to resolve the large majority of lead-free technical issues for A&D electronics. In the interim, COTS module suppliers have essentially three main approaches available to them when dealing with lead-free components:

1. Re-ball area array components to tin-lead, and solder with tin-lead solder

2. Accept lead-free components and solder with lead-free solder (predominantly SAC305)

3. Take lead-free components and solder with tin-lead solder

Done properly, the first approach essentially brings electronic assemblies to the baseline solder joint reliability of tin-lead4,5. There are still concerns about tin whiskers and, possibly, printed circuit boards, but further mitigations can be put in place such as solder dipping of non-BGA components and/or conformal coating. Reliability concerns also arise due to additional heat exposure and handling required for component re-processing, although these can be mitigated through appropriate process controls6. Direct costs are likely to be the highest of all three scenarios.

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The second approach is being used world-wide in other industries, and has been favored by some in the COTS industry, due to lower direct costs and reduced lead-time impact. However, the reliability risks and knowledge gaps detailed in the LFEMP reports may not have been addressed. The burden of reliability proof will lie with the customer unless the supplier can show how they have addressed reliability risks and knowledge gaps. There is a large amount of data available for some aspects of this approach (e.g. thermal cycling), but the details need to be assessed as to applicability to a manufacturer’s products. Curtiss-Wright Controls Embedded Computing has been at the forefront of producing lead-free test data in A&D environments (e.g. extended temperature cycling, vibration) on representative COTS components and assemblies, and comparing these to tin-lead and mixed solder approaches.

The last approach is known as a mixed solder approach since area array components (e.g. BGAs) with lead-free solder balls are being soldered with tin-lead solder. This approach is an attempt to get the best of both worlds in terms of lower costs and lead-time impact (no component re-processing), and less perceived risk (tin-lead solder). Once again, the burden of reliability proof lies with the customer unless the supplier can convince them otherwise. While some studies have shown that this approach may result in acceptable thermal cycling reliability using commercial temperature ranges7, others have shown inconsistent reliability across several component packages using an extended temperature range8,9. Overall, the details of this approach (e.g. solder microstructure, strength, fatigue, acceleration factors) are less understood than the lead-free approach.

There are strong indications that the first approach (re-process to tin-lead) is favored by the majority of A&D customers of COTS assemblies, such as system integrators and prime contractors. However, the continuing drive to lower costs in A&D leads to a dilemma with this approach. The second and third approaches involve lower direct cost, but reliability is a question mark for A&D customers. A COTS assembly supplier would need to show they have addressed reliability in the five areas of risk listed above.

Curtiss-Wright has extracted a list of reliability risk factors from the LFEMP reports, intended to guide COTS suppliers in evaluating specific lead-free approaches. The risk factors are shown in the table below ranked in order of risk and certainty of that risk. These are not all the technical risks identified in the LFEMP reports by any means but serve to highlight some of the most critical. In addition, there are overlaps between the risk factors. For example, pad cratering can be caused by shock and vibration, and can also be caused by other stresses.

Furthermore, each risk may be present regardless of which of the previously mentioned lead-free approaches are taken. For example, pad cratering has been experienced on tin-lead soldered assemblies with tin-lead BGAs.

Table 1: Lead-free Technology Reliability RisksRisk Factor Risk Level/Certainty

Tin whiskers High/High

Pad cratering High/High

Shock & vibration High/High

Long term storage High/High

Combined environments High/Medium

PCB interconnects Medium/High

Thermal cycling Medium/High

New manufacturing defects Medium/High

Addressing these risks will go a long way in attempting to convince customers of the reliability of a given lead-free approach. Ideally, a supplier has substantial data available for each risk factor, along with associated knowledge.

Examples of suitable data and knowledge include:

� tin whisker susceptibility test results

� understanding of whisker drivers and risk mitigations

� pad cratering susceptibility test results

� understanding of pad cratering drivers and risk mitigations

� vibration testing results.

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Lead-free data and knowledge can also be shared with consortia, but COTS companies (and others) are less willing to do this because of the substantial resources expended and the competitive advantage gained.

Figure 2: Test vehicles generating lead-free test results (Curtiss-Wright)

The high profile of lead-free reliability risks in A&D and other applications has led to significant activity to understand and address these risks. Ironically, this may ultimately lead to COTS products that are more reliable than current lead-containing products. Curtiss-Wright is proud to be a leader in these endeavors.

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Conclusion

The lead-free movement continues mostly unabated, causing increasing scarcity of lead-containing electronic components. These components form the foundation of advanced technology A&D applications, and thus the reliability risks introduced by lead-free components must be carefully investigated and addressed. The A&D industry has formed several groups to collectively do just that, resulting in significant progress. COTS electronics assembly suppliers to the A&D industry have a duty to be part of this collective. Curtiss-Wright Controls Embedded Computing intends to continue its leadership through extensive lead-free knowledge, risk analysis and mitigation, and regular customer interaction to review lead-free issues.

For further information on our lead-free activities, please email sales@cwcembedded.com

AcronymsA&D - Aerospace and defenseBGA - Ball grid arrayCOTS - Commercial off the shelfDoD - Department of DefenseFAA - Federal Aviation AdministrationiNEMI - International Electronics Manufacturing InitiativeIPC - formerly Institute for Interconnecting and Packaging Electronic CircuitsLEAP - Lead-free Electronics in Aerospace ProjectLFEMP - Lead-Free Electronics Manhattan ProjectNASA - National Aeronautics and Space Administration PERM - Pb-free Electronics Risk Management groupPERR - Pb-free Electronics Risk Reduction projectRoHS - Restriction of Hazardous SubstancesSAC305 - Tin (Sn) / Silver (Ag) / Copper (Cu) solderSMTA - Surface Mount Technology AssociationWEEE - Waste from Electrical and Electronic Equipment

References1. http://nepp.nasa.gov/whisker/failures/index.htm2. Lead Free Electronics Manhattan Project Phase 2 draft report, ACI Technologies,

Inc., February 10, 2010, Contract No. N00014-08-D-0758.3. Lead Free Electronics Manhattan Project Phase 1 report, ACI Technologies, Inc., July

30, 2009, Contract No. N00014-08-D-0758.4. Curtiss-Wright data.5. NAVAIR SBIR – BGA Reballing, DfR Solutions Inc., August 4, 2010, Contract No.

N68335-09-C-0169.6. S. J. Meschter, S.A. McKeown, R. Feathers and E. Arseneau, BGA Re-balling from

Pb-free to Sn-Pb Metallurgy, SMTA International Conference on Soldering and Reliability, Toronto, Ontario, Canada, May 18-20, 2010

7. R. Coyle et al., A Comprehensive Analysis of the Thermal Fatigue Reliability of SnPb and Pb Free Plastic Ball Grid Arrays (PBGA) Using Backward and Forward Compatible Assembly Processes, SMTA Journal, Volume 21, Issue 4, 2008.

8. Curtiss-Wright data.9. P. Borgesen, M. Meilunas, Effects of Cycling Parameters on the Thermal Fatigue Life

of Mixed SnAgCu/SnPb Solder Joints, April 2010.