ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design...
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Transcript of ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design...
![Page 1: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/1.jpg)
ADC – FIR Filter – DACKEVIN COOLEY
![Page 2: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/2.jpg)
Overview Components
Schematic
Hardware Design Considerations
Digital Filters/FPGA Design Tools
Questions
![Page 3: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/3.jpg)
Analog Devices AD9283 8-bit resolution ADC
50 MSPS/80 MSPS/100 MSPS
475 MHz Analog Bandwidth
TTL/CMOS Compatible Digital Outputs and Clock (Encoder) Input
Image Source: www.analog.com
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Analog Devices AD9708 8-bit resolution DAC
125 MSPS Update Rate
Differential Current Outputs
CMOS Digital Inputs
Image Source: www.analog.com
![Page 5: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/5.jpg)
Field Programmable Gate Array (FPGA)
Field Programmable Gate Arrays (FPGAs) are semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. FPGAs can be reprogrammed to desired application or functionality requirements after manufacturing.
Source: www.Xilinx.com
Image Source: http://www2.hdl.co.jp/
![Page 6: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/6.jpg)
FPGA Basics Easily create and connect
complicated digital structures Shift registers Logic gates (AND/OR/NOR, etc.) Multipliers/Adders/Accumulators State machines Digital filters
Massively parallel processing Each data path has dedicated
hardware No competition for resources
![Page 7: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/7.jpg)
Overview Components
Schematic
Hardware Design Considerations
Digital Filters/FPGA Design Tools
Questions
![Page 8: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/8.jpg)
![Page 9: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/9.jpg)
![Page 10: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/10.jpg)
Overview Components
Schematic
Hardware Design Considerations
Digital Filters/FPGA Design Tools
Questions
![Page 11: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/11.jpg)
High-Speed Digital Bus Routing Route each trace as stripline
Signal traces must be length-matched to keep signal skew within tolerance
Rounded length-matching structures are less likely to radiate than structures with hard right-angles.
Differential pairs need to be length-matched and routed together.
![Page 12: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/12.jpg)
High-Speed Digital Bus Routing
PCB design tools help ensure that “skew group” routing rules are followed.
![Page 13: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/13.jpg)
Overview Components
Schematic
Hardware Design Considerations
Digital Filters/FPGA Design Tools
Questions
![Page 14: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/14.jpg)
Digital Filters: Infinite Impulse Response (IIR) Filter
Has a recursive term (feedback)
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Static Timing Analysis Everything has to happen in one
10ns period.
FPGA tools identify critical path.
Pipelining is impossible because of the recursive nature of the filter.
![Page 16: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/16.jpg)
Static Timing Analysis
![Page 17: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/17.jpg)
Static Timing Analysis
![Page 18: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/18.jpg)
Digital Filters: Finite Impulse Response (FIR) Filter
No feedback required!
![Page 19: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/19.jpg)
Even Better: Add Pipelining
![Page 20: ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design Considerations Digital Filters/FPGA Design Tools Questions.](https://reader033.fdocuments.us/reader033/viewer/2022051417/5697c0291a28abf838cd74ab/html5/thumbnails/20.jpg)
Questions?
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References Johnson, H., & Graham, M. (1993). High-Speed Digital Design A Handbook of Black Magic. Upper Saddle River: Prentice Hall.
Mitra, S. K. (2011). Digital Signal Processing A Computer-Based Approach. New York: McGraw-Hill.