Adaptive Back Stepping Control for Linear Induction Motor Drive Using FPGA

8/8/2019 Adaptive Back Stepping Control for Linear Induction Motor Drive Using FPGA

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Adaptive Backstepping Control for Linear Induction Motor Drive Using FPGA

Faa-Jeng Lin, Senior Member, IEEE, Li-Tao Teng and Chih-Kai ChangDepartment of Electrical Engineering

National Dong Hwa UniversityHualien 974, [email protected]

Abstract An adaptive backstepping controller is proposed to

control the mover position of a linear induction motor (LIM)

drive to compensate the uncertainties including the friction force.

First, the dynamic model of an indirect field-oriented LIM drive

is derived. Next, a backstepping approach is designed to

compensate the uncertainties occurred in the motion control

system. Moreover, the uncertainties are lumped and the upper

bound of the lumped uncertainty is necessary in the design of the

backstepping controller. However, the upper bound of the

lumped uncertainty is difficult to obtain in advance in practical

applications. Therefore, an adaptive law is derived to adapt the

value of the lumped uncertainty in real-time, and an adaptive

backstepping control law is resulted. Then, a

field-programmable gate array (FPGA) chip is adopted toimplement the indirect field-oriented mechanism and the

developed control algorithms for possible low-cost and

high-performance industrial applications. The effectiveness of

the proposed control scheme is verified by some experimental

results. With the adaptive backstepping controller, the mover

position of the FPGA-based LIM drive possesses the advantages

of good transient control performance and robustness to

uncertainties for the tracking of periodic reference trajectories.

I. INTRODUCTION

A LIM has many desirable performance features including

high-starting thrust force, no need for a gear between motor

and the motion devices, the reduction of mechanical lossesand the size of motion devices, a high-speed operation, silence,and so on [1]. Due to these advantages LIMs have been used

widely in industrial processes and transportation applications.The driving principles of a LIM are similar to those of a

traditional rotary induction motor (RIM), but its control

characteristics are more complicated than for a RIM, and the

motor parameters are time-varying due to changes inoperating conditions, such as the speed of the mover,

temperature and rail configuration. Moreover, there aresignificant parameter variations in reaction rail resistivity, the

dynamics of the airgap, slip frequency, phase unbalance,

saturation of the magnetizing inductance, and end-effects [2].

Therefore, its mathematical model is difficult to derivecompletely. Furthermore, since the operation of a LIM

involves two contacting bodies, a friction force is inevitablyamong the forces of motion. In addition, this friction

characteristic may be easily varied due to change in normal

forces in contact, and also the temperature and humidity. In a

closed-loop control system, the friction force results in asteady-state error, a limit cycle and a low bandwidth [3].

Unfortunately, friction is a natural phenomenon that is quitedifficult to model, and it is not completely understood.

Therefore, it is impossible to obtain a precise friction model

for practical applications. On the other hand, the dynamicmodel of a LIM can be modified from the dynamic model of

the RIM at certain low speed since a LIM can be visualized as

an unrolled RIM. Thus, field-orientated control [4] can be

adopted to decouple the dynamics of the thrust force and theflux amplitude of the LIM.

A FPGA incorporates the architecture of gate arrays and theprogrammability of a programmable logic device (PLD). It

consists of thousands of logic gates, some of which are

combined together to form a configurable logic block (CLB)

thereby simplifying high-level circuit design.Interconnections between logic gates using software are

externally defined through SRAM and ROM, which willprovide flexibility in modifying the designed circuit without

altering the hardware. Moreover, concurrent operation,

simplicity, programmability, a comparatively low cost and

rapid prototyping make it the favorite choice for prototypingan application specific integrated circuit (ASIC) [5, 6].

Furthermore, all the internal logic elements and therefore allthe control procedures of the FPGA are executed continuously

and simultaneously. The circuits and algorithms can be

developed in the VHSIC hardware description language

(VHDL) [5, 6]. This method is as flexible as any softwaresolution. Another important advantage of VHDL is that it is

technology independent. The same algorithm can be

synthesized into any FPGA and even has a direct path to anASIC, opening interesting possibilities in industrial

applications in terms of performance and cost. However, the

major disadvantage of a FPGA-based system for hardwareimplementation is the limited capacity of available cells.

Therefore, only research on FPGA-based sliding-mode orfuzzy controllers can be found in high-performance control

application and some FPGA-based applications of various

motor drives can be found in [7-9].

In the past decade, research about adaptive backsteppingcontrol has been increased [10-12]. Adaptive backstepping is

a systematic and recursive design methodology for nonlinearfeedback control. This approach is based upon a systematic

procedure for the design of feedback control strategiessuitable for the design of a large class of feedback linearizable

nonlinear systems exhibiting constant uncertainty, andguarantees global regulation and tracking for the class of

nonlinear systems transformable into the parametric-strict

feedback form. The idea of backstepping design is to selectrecursively some appropriate functions of state variables as

pseudo-control inputs for lower dimension subsystems of the

overall system. Each backstepping stage results in a new pseudo-control design, expressed in terms of the

pseudo-control designs from preceding design stages. When

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the procedure terminates, a feedback design for the truecontrol input results which achieves the original design

objective by virtue of a final Lyapunov function, which is

formed by summing up the Lyapunov functions associatedwith each individual design stage [11].

The motivation of this study is to propose a new adaptive

backstepping controller due to its robustness and easy to beimplemented nature to confront the uncertainties that exist in a

field-oriented control LIM drive including the friction force.Moreover, the FPGA chip is adopted to implement the

proposed controller in order to allow possible low-cost and

high-performance industrial applications. The proposed

control algorithms are realized on a 24MHz FPGA(XC2V1000) with 1 million gate counts and 10240 flip-flops

from Xilinx, Inc using VHDL. The design and

implementation of the FPGA-based control IC will bedescribed in detail. Compared with a DSP or a PC-based

adaptive backstepping controller, the merits of the

FPGA-based adaptive backstepping controller are parallelprocessing and small size in addition to low-cost. Moreover,

the developed VHDL code can be easily modified and

implemented to control any type of AC motors as well.

II. INDIRECT FIELD-ORIENTED LINEAR INDUCTION

MOTOR DRIVE

The primary (mover) of the adopted three-phase LIM is

simply a cut open and rolled flat rotary-motor primary. The

secondary usually consists of a sheet conductor usingaluminum with an iron back for the return path of magnetic

flux. The primary and secondary form a single-sided LIM.Moreover, a simple linear encoder is adopted for the feedback

of the mover position. The adopted LIM in this drive system is

a three-phase Y-connected two-pole 3kW 60Hz 180V/14.2A

type. The block diagram of an indirect field-oriented LIMsystem is shown in Fig. 1, where d is the position of mover;*d is the reference trajectory; v is the velocity of mover; *v

is the derivative of reference trajectory; the d-axis primary

command current *ds

i is the command of flux current; the

q-axis primary command current*

qsi is the control effort. The

indirect field-oriented LIM system consists of a LIM, a ramp

comparison current-controlled pulse-width-modulation(PWM) voltage source inverter (VSI), an indirect

field-oriented mechanism, a coordinate translator,e

cos and

esin generator, where

e is the position of the secondary

flux, a speed control loop, and a position control loop.

Three-phase current commands, *ai ,*bi and

*ci are generated

from the coordinate translator for the ramp comparison

current controller. By use of the indirect field-oriented control

technique [4], the electromagnetic force shown in can besimplified as follows:

qsFeiKF = (1)

ds

r

m

pFi

Lh

LnK

2

2

3 = . (2)

Generator

*

d

Limiter

drr

m

TL

ev

edseqs ii sincos** +

)cossin(2

3)sincos(

2

1 ****edseqsedseqs iiii ++

)cossin(2

3)sincos(

2

1 ****edseqsedseqs iiii +++

bi

Encoder

Rectifier

3-phase

220V60Hz

L CPWM

Inverter

RampComparison

CurrentControl

cos

sin

PositionController

SpeedController

CoordinateTranslator

pn

v

Integratorslv

h

vnp

e

Encoder

Signal

v

d

+

+

+

+

Generator

&

sin/cos

Table

)cossin(2

3)sincos(

2


LIM

*

v

+

Encoder

Interface

s in cos

e

d

e

e e

*

dsi

*

qsi

e

e

*

ai*

bi*

ci

aiaT bT cT

Generator

*

d*

d

Limiter

drr

m

TL

evev

edseqs ii sincos** + edseqs ii sincos** +

)cossin(2

3)sincos(

2

1 ****edseqsedseqs iiii ++ )cossin(

2

3)sincos(

2

1 ****edseqsedseqs iiii ++

)cossin(2

3)sincos(

2

1 ****edseqsedseqs iiii +++ )cossin(

2

3)sincos(

2


bibi

Encoder

Rectifier

3-phase

220V60Hz

L CPWM

Inverter

RampComparison

CurrentControl

cos

sin

PositionController

SpeedController

CoordinateTranslator

pnpn

v

Integratorslvslv

h

vnpvn vnp

ee

Encoder

Signal

v

d

+

+

+

+

Generator

&

sin/cos

Table

)cossin(2

3)sincos(

2

1 ****edseqsedseqs iiii +++ )cossin(

2

3)sincos(

2


LIM

*

v*

v

+

Encoder

Interface

s in cos

ee

d

ee

ee ee

*

dsi *ds

i

*

qsi*

qsi

ee

ee

*

ai*

ai*

bi*

bi*

ci*

ci

aiaiaTaT bTbT cTcT

Fig. 1. System configuration of LIM driveThe curve fitting technique based on step response is applied

to find the drive model off line at the nominal case ( 0=L

F ).

Moreover, the scaling is necessary for the digitalimplementation of the proposed FPGA-based LIM drive. The

resolution of the encoder is 1.6104m/s = 22 digital, and the

conversion range of the adopted D/A converter is +2047 to-2048 digital = +5V to -5V, i.e., 1V = 409 digital. Therefore,

by 1.6104/22 = X/409, the scaling X is 29.9388 (m/s)/V. Then

the results are:

AN73.33=F

K , Ns/V2298.83=Kg78.2=M ,

VN1590.1079sKg0455.36 ==D . (3)

The symbol represents the system parameters in the

nominal condition. Though the electromagnetic force can besimplified as (1) via the field-oriented control, considering the

variations of system parameters and external nonlinear and

time-varying disturbance including friction force, the LIM

drive system is a nonlinear time-varying system in practicalapplications.

III. PROPOSED CONTROL SYSTEM

Consider a drive system with parameter variations, externalforce disturbance and friction force for the actual LIM drivesystem, then

vd=& (4)

)]([)()( vfFCUBBvAAvLpmm+++++=& , (5)

where MDAm

= , 0>= MKBFm

, MC 1= ; and

B denote the uncertainties introduced by system parametersand D ;

qspiU = is the control input to the motor drive

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system;L

F is the external disturbance; )(vf is the friction

force. Considering Coulomb friction, viscous friction and

Stribeck effect, the friction force can be formulated as follows

[3]:

vKveFFvFvfv

vv

CSC

s ++= )(sgn)()(sgn)(2

)/(, (6)

whereC

F is the Coulomb friction;S

F is the static friction;

Sv is the Stribeck velocity parameter; vK is the coefficient of

viscous friction; )(sgn is a sign function. Reformulate (5),

then

FUBvAvpmm++=& , (7)

where F is the lumped uncertainty defined by

)]([ vfFCBUAvFLP+++ . (8)

First, the position tracking error is defined as follows:

= dde1

(9)

and = dve &&1

. Next, define the stabilizing function:

111ec= , (10)

where1

c is a positive constant. Define= dve &

12 , then

the derivative of2

e is

+= decve &&&&&112

. (11)

Rewrite the position tracking error dynamics as

2111eece +=& (12)

and

+++= decFUBvAepmm

&&&&112

. (13)

To design the backstepping control system, the lumped

uncertainty is assumed to be bounded, i.e. FF , and

define the following Lyapunov function:

2

2

2

112

1

2

1eeV += , (14)

the derivative of1

V can be derived as

22111eeeeV &&& +=

2221

2

11eeeeec &++=

][1112

2

11edecFUBvAeec

pmm+++++= &&& . (15)

A backstepping control lawp

U is designed as

)]sgn([222111

1 eFecedecvABUmmp

+= &&& , (16)

where2

c is a positive constant, then

])sgn([2222

2

111FeFeceecV ++=&

FeFeecec22

2

22

2

11+=

FeFeecec22

2

22

2

11+

0)(2

2

22

2

11= FFeecec . (17)

Adaptive Backstepping Control System

dField-Oriented Control LIM

qsi

+

s

2s

1c+

+

v

mA

+

s1

1mB

1e

2e

1

s

2c

s

F&

F

d

d

Adaptive Backstepping Control System

dField-Oriented Control LIM

qsi

+

s

2s

1c+

+

v

mA

+

s1

1mB

1e

2e

1

s

2c

s

F&

F

d

d

Fig. 2. Adaptive backstepping control system

Therefore, the backstepping control system is asymptotically

stable even if parametric uncertainty, external force

disturbance and friction force exist.Since the lumped uncertainty F is unknown in practical

applications, the upper bound F is difficult to be determined.Therefore, an adaptive law is proposed to adapt the value of

the lumped uncertainty F . A Lyapunov function is chosen as

2

12

~

2

1FVV

+= , (18)

where FFF ~

= and is a positive constant.

Consider the LIM servo drive system represented by (7). If

the adaptive backstepping control lawp

U is designed as (19)

and the adaptation law is designed as (20), then the stability of

the proposed adaptive backstepping control system can be

guaranteed.

][22111

1 ecedecFvABUmmp

+= &&& . (19)

2 eF =&

. (20)

The detailed proof is omitted in this paper. The designedadaptive backstepping control system is shown in Fig. 2.

Using the adaptive backstepping control design, the velocity

and acceleration of the reference trajectory feedforwardnaturally and results in superior tracking performance.

IV. CIRCUITS DESIGN ON FPGA CHIP

The block diagram of the FPGA-based control system for aLIM drive using current-controlled technique is shown in Fig.3. The current-controlled PWM voltage source inverter (VSI)

is implemented by an intelligent power module (IPM)

switching component (MUBW30-06A7) manufactured byIXYS Co. with a switching frequency of 15KHz. The timing

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bi

LIM

Encoder

Rectifier

3-phase

220V

60Hz

L C

-

+

PWM

inverter

RampComparison

Current

cT

*

aiSignal

Command

EncoderInterface

24MHz

D/A

Data & D/AControl Signal

FPGA

Timing Control Module

Field-Oriented Control Module

v

&)sin( e )cos( e

e

Generator

Adaptive Backstepping

Control ModuleEncoder Interface Module

Data & D/A

Controller

12

12

12

12 12

12

2

36

PWM

Inverter

ControlEncoder

Generator

CLK

Converter

Coordinate

Translator

Generator

12

12

*

dsi

v

12

*

d


Position Controller

*

bi*

ci

ai

bTaT

*

ai

*

bi

*

ci

d

*

qsi

Data & D/A

Controller

24 D/AConverter

*

d

d

bibi

LIM

Encoder

Rectifier

3-phase

220V

60Hz

L C

-

+

PWM

inverter

RampComparison

Current

cTcT

*

ai*

aiSignal

Command

EncoderInterface

24MHz

D/A

Data & D/AControl Signal

FPGA

Timing Control Module

Field-Oriented Control Module

v

&)sin( e )cos( e

e

Generator


Control ModuleEncoder Interface Module

Data & D/A

Controller

12

12

12

12 12

12

2

36

PWM

Inverter

ControlEncoder

Generator

CLK

Converter

Coordinate

Translator

Generator

12

12

*

dsi*

dsi

v

12

*

d*

d


Position Controller

*

bi*

bi*

ci*

ci

aiai

bTbTaTaT

*

ai*

ai

*

bi*

bi

*

ci*

ci

d

*

qsi*

qsi

Data & D/A

Controller

24 D/AConverter

*

d*

d

d

Fig. 3. Block diagram of FPGA-based control system

control module, encoder interface module, the field-orientedcontrol module and the adaptive backstepping control module

are realized on the FPGA chip. Three-phase current

commands,*

ai ,*

bi and*

ci are generated from the coordinatetranslator and sent to three D/A converters for the ramp

comparison current control. Moreover, two D/A converters

are utilized to display the reference trajectory *d , the mover

position d, the control effort *qs

i and the estimated value F

alternately on the oscilloscope. A photo of the experimental

setup including the FPGA chip, the development system, themotor drive and the LIM is shown in Fig. 4.

A. Encoder Interface Module

The block diagram of encoder interface module is shown in

Fig. 5(a), which consists of timing control, two digital filters,a decoder, an up-down counter, two clock (CLK) generators, a

register, a command generator and one adder. The function of

the encoder interface is to obtain the position and speed values

of the mover. The resolutions of the encoder are 0.1m = 1000digital value and 1.6104m/s = 22 digital value at the sampling

frequency 732Hz. The scaling 1V=29.9388m/s is obtainedsince the specification is designed as 1V = 409 digital value.

The pulse count signal PLS and the rotating direction signal

DIR are obtained using the A, B pulse input signals from the

decoder through two digital filters. The position signal d can

be obtained using the PLS and DIR signals through up-down

counter. Moreover, the command generator includes periodicsinusoidal IP and periodic trapezoidal IP in order to generate

the reference trajectory*d . Furthermore, v is the velocity

signal, and results from the difference between the position

signal d and the time delay of d,delay

d .

B. Field-Oriented Control Module

The field-oriented control module shown in Fig. 5(b) is

composed of ae

generator, a coordinate translator, ae

sin

ande

cos generator and timing control. Thee

is obtained

Motor Drive

Linear Induction Motor

FPGA Chip and

Development System

using PC

Motor Drive

Linear Induction Motor

FPGA Chip and

Development System

using PC

Fig. 4. Photo of experimental setup

using the estimated slip velocity signalsl

v , the control effort

signal *qs

i , the velocity signal v and an integrator. Then,

esin and

ecos signals are obtained through the

esin and

ecos generator. Moreover, three-phase current commands,

*

ai ,

*

bi and

*

ci are generated from the coordinate translator,

which consists of six multipliers and five adders, and sent to

three D/A converters for the ramp comparison current

controller.

C. Adaptive Backstepping Control Module

The block diagram of adaptive backstepping control

module is shown in Fig. 5(c). Using (19), the adaptive

backstepping control law*

qsi is designed as

][22111

1* ecedecFvABimmqs

+= &&& , (21)

where 13=m

A digital value and 81.0=m

B digital value.

To implement the control law effectively, the above equation

can be divided into the following six parts: 1) vAm

, this part is

implemented using a multiplier; 2) dteF

=

2

, this part is

implemented using the result of2

e with a multiplier and an

integrator; 3)11

ec & , this part is implemented using the result of

11ec with an adder and a register; 4) d&& , this part is

implemented using the result of

d& with an adder and a

register; 5)1

e , where = dde1

, only an adder is needed to

implement this part; 6)22

ec , where = dve &12

, two

adders, two multipliers and a register are needed to implementthis part.

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Adaptive Back Stepping Control for Linear Induction Motor Drive Using FPGA

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