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Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third partieswhich may result from its use. No license is granted by implication orotherwise under any patent or patent rights of Analog Devices.
aAD6190
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.ATel: 781/329-4700 World Wide Web Site: http://www.analog.comFax: 781/ 326-8703 Analog Devices, Inc., 199
900 MHz RF Transc eiver
FUNCTIONAL BLOCK DIAGRAM
/2
10.7
Z87L00SPREAD-
SPECTRUMCONTROLLER
T/RS/W
ANTFILTER
POWERMANAGEMENT
ANDCONTROL
VOLTAGEREGULATOR
090
PA
090
64/65
10.7 10.7
15MHz SYNTHESIZER
VREG
VBATT
LIMOUT
RSSI
TXON
RXON
VCOON
VREG
AD6190
I Q
VCO
FEATURES
Complete 900 MHz RF TransceiverLNA
Receive MixerTransmit MixerDriver Amplifier
VCOPrescaler
Limiter Amplifier with RSSIOn-Chip Low Dropout RegulatorIndependent Sleep Modes for TX, RX
28-Lead SSOP Package
APPLICATIONS902 MHz928 MHz ISM Band Cordless Telephones
902 MHz928 MHz ISM Band Wireless Data Systems
GENERAL DESCRIPTIONThe AD6190 900 MHz RF T ransceiver provides a completeRF /IF section for systems operating in the 902 MHz928 MHzlicense-free ISM band. T he high level of integration allows severaldozen discrete components to be replaced. I t is ideally suitedfor use in cordless telephone and wireless data applications.
The receiver section includes a Low Noise Amplifier (LN A).
The LNAs output drives an image-reject mixer; the mixersoutput optimized for 10.7 MHz is filtered and processed by thelimiting IF amplifier.
The transmit section accepts a modulated 10.7 MHz IF input,and uses an image-reject upconverter to mix the signal up to the902 MHz928 MHz RF carrier frequency while suppressing theunwanted image and LO components. The RF output is raisedto a nominal 0.5 milliwatt (3 dBm) output level. This outputcan be used directly or can drive an external power amplifier tohigher levels.
The on-chip VCO operates at 2the local oscillator frequency.This reduces oscillator pulling due to strong interferers in-bandor transmitter leakage. An on-chip 64/65 prescaler allows the
VCO to be controlled by a low cost 15 MHz CMOS synthesizer.An on-chip low dropout regulator minimizes VCO pushing. Thetransmit section, receive section, or both, can be placed in a lowcurrent SLEEP mode when not in use. T he AD 6190 900 MHzRF transceiver is packaged in a 28-lead SSOP package.
The AD6190 900 MHz RF T ransceiver is part of the AnalogDevices/Zilog A-to-Z Phone Spread-Spectrum System forcordless telephone and data communications applications. Con-tact Zilog directly at (408) 370-8000 for more information onthe Z87000 series baseband controller chips.
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AD6190SPECIFICATIONS(@ TA= + 25C, VCC= + 3 . 3 V, FIF = 10 .7 MHz, FRF= 902 MHz9 28 MHz, TX IF Inputleve l 137 mV p-p , un less o therwise no ted)
Parameter Conditions Min Typ Max Units
RECEIVE RF SECT ION(L NA to M ixer Output) Source Z = 50, IF Load Z = 330
Power Gain 24 dBNoise Figure 4.2 dB1 dB Compression (Input) 30 dBmInput IP3 17 dBm
Image Rejection FRF= 915 MHz, FLO = 904.3 MHz 28 33 dBcTRAN SMIT UPCONVERTER
Image Rejection F IF = 10.7 MHz, FLO = 904.3 MHz 35 48 dBcLO Feedthrough F IF = 10.7 MHz, FLO= 904.3 M Hz 33 dBm
DRIVER AMPL IFIERNominal Output Power For IF Input Level = 137 mV p-p 3 dBm1 dB Compression 0 +4.5 dBm
VCOOperating Frequency (L O Frequency 2) 1783 1835 MHz
PRESCALERDivision Ratio
PREMOD = 1 64PREMOD = 0 65
Output Level RL= 2.2 k, CL < 10 pF 0.55 1.0 V p-pIF LIM ITER AMPLIFIER
First Stage Gain 24 dBSecond Stage Gain 70 dBAC Output Level RL> 30 k, CL < 30 pF 450 mV p-pDC Level 1.76 VIF Port Impedance F IF = 10.7 MHz 330
RSSI OUTPUTSlope With 10in Series with VCCIF 22 mV/dBOutput Voltage @ 100 dBm RF Input 0.90 V
@ 30 dBm RF Input 2.40 VLinear Range (With Respect to RF Input Level) 70 dBRSSI Log Conformance Error 2 dB
SUPPLY CURRENT (VCC = 3.3 V)T ransmit Mode TXON, VCOON = 1; RXON = 0 93 mAReceive Mode RXON, VCOON = 1; TXON = 0 59 mASleep Mode TXON, VCOON, RXON = 0 270 A
SUPPLY VOLTAGE VBATT 3.0 4.6 VOther Supplies VCCTX, VCCIF, VCCLNA 3.0 3.3 3.6 V
VCO REGULATOR Output Voltage, 3.0 < VBATT < 4.6 V 2.65 2.85 V
TEM PERAT URE RAN GE 20 +85 C
Specifications subject to change without notice.
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CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.Although the AD6190 features proprietary ESD protection circuitry, permanent damagemay occur on devices subjected to high energy electrostatic discharges. T herefore,proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
ABSOLUTE MAXIMUM RATINGS1
Supply VoltageVBATT , VCCI F, LNAVCC, VCCT X to GND . . . .+5.5 V
Maximum RF Input Level Without Damage . . . . . . . +20 dBmInternal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 500 mWOperating Temperature Range . . . . . . . . . . . 25C to +85CStorage Temperature Range . . . . . . . . . . . . 65C to +150C
Lead T emperature Range(Soldering, 60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +300C
ORDERING GUIDE
Model Package Description Package Option
AD6190ARS 28-Lead Shrink Small Outline RS-28AD6190ARSRL 28-Lead Shrink Small Outline, Supplied on Reels, 1500 Units per Reel
Minimum order quantity 25,000 units.
NOTES1Stresses above those listed under Absolute M aximum Ratings may cause permanent damage to the device. T his is a stress rating only; functional operation of thedevice at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum ratingconditions for extended periods may affect device reliability.
2Thermal Characteristics: 28-lead SSOP package JA= 122C/W.
WARNING!
ESD SENSITIVE DEVICE
Figure 1. Test Circuit
AD6190
64/65
REG
2
RSSI
U1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
82pF
10nF
82pF
82pF
10nF220
30154.9
82pF
82pF
0.1F 82pF
0.1F 82pF
15nH
15nH
15nH
220
1.96k
R351.1
Q1
82pF
1nF
VCOON
PRESCALEROUT
TUNEVOLTAGE IN
RSSI OUT
TRANSMITIFIN
RXON F1
82pF 82pF 10nF
8.2nH
82pF 10nF
2.2pF
82pF 100nF
TXON
VCCTX(3.3VDC)
VCC DRIVER(3.3VDC)
TRANSMITRF OUT
LIMITER OUT
VCCLNA(3.3VDC)
15nH
82pF2.2pFLNA IN
6.8H(TDK2012)
6.8pF1k
27pFF1
1082pF 100nF 39VCC MIXER(3.3VDC)
VCCIF(3.3VDC)10100nF 82pF
82pF
10
2.75 VDC
IN
0.1F
39 L1
L239
MODULUS CONTROL
VBATT(3.0-4.5VDC)
C1
D1
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PIN FUNCTION DESCRIPTIONS
No. Pin Name Type Function/Description
1 PREOU T Output Prescaler Output. U sually connected to input of external low frequencyCMOS synthesizer (Fujitsu MB87006A, Siemens PMB2307, or similar).
2 VCOON Control Logic 1 turns on power to VCO, and divider/prescalers.3 VBAT T Power VBAT T connection for regulator. Normally connected to 3.3 V dc or battery.4 VBASE Power Base connection to external regulator pass transistor (M M BT 3906 or similar).5 TANK Input Connection for VCO tank circuit (LC network).6 GND Power Substrate ground connection.7 TANK+ Input Connection for VCO tank circuit (LC network).8 RSSI Output Received Signal Strength Indicator output signal.9 TXIF Input Accepts modulated transmit signal at 10.7 MHz IF.10 VREG Power Regulated VCC for LO from external pass transistor.11 RXON Control Logic 1 turns on power to LNA and receive mixer stages.12 L IM IN Input Input to limiting amplifier.13 IFAMPCOM Input Input signal common for limiting amplifier.14 IFAMPOUT Output Output of first stage of IF amplifier. Normally connected through 10.7 MHz
filter to Pin 12 (L IM IN).15 IFAMPIN Input Input to first stage of IF amplifier.
16 VCCIF Power Local VCC connection for IF amp/limiter stages.17 RX MI XOU T Output 10.7 M H z I F Output. N ormally connected through 10.7 M H z filter to IFamplifier input (Pin 15).
18 LNAGND Power Local ground for LNA.19 GND Power Substrate ground connection.20 RFIN Input LNA Input. Normally driven single-ended from 50source impedance.21 VCCLNA Power VCC for LNA.22 GND Power Substrate ground connection.23 L IMOUT Output 10.7 M Hz limiter output.24 PAGND Power L ocal ground for PA stage emitter. Degeneration may be added.25 RFOUT Output T ransmitted RF output signal at 0 dBm level.26 VCCTX Power Local VCC connection for TX stages.27 T XON Control L ogic 1 turns on power to transmit mixer, buffers, and PA stages.28 PREM OD Input Prescaler M odulus control (H IGH = divide-by-64; L OW = divide-by-65).
PIN CONFIGURATION
PREOUT
RFOUT
VCCTX
TXON
PREMOD
VCOON
VBATT
VBASE
GND
LIMOUT
PAGNDTANK
GND
TANK+
RSSI
TXIF
VREG LNAGND
RFIN
VCCLNA
RXON
LIMIN
IFAMPCOM
IFAMPOUT
LNAGND
IFAMPIN
VCCIF
RXMIXOUT
TOP VIEW(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD6190
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PIN dBm
2.5
1.0
0
115 15105
RSSI
Volts
95 85 75 65 55 45 35 25
2.25
1.25
0.75
0.25
1.75
1.5
0.5
2.0
3.3V
25C
915MHz
3.3V
+25C
915MHz
3.3V
+85C
915MHz
Figure 2. RSSI Voltage vs. Input Power
PIN dBm
2.5
1.0
0115 15105
RSSIVolts
95 85 75 65 55 45 35 25
2.25
1.25
0.75
0.25
1.75
1.5
0.5
2.0
3.0V+25C915MHz
3.3V+25C915MHz
3.5V+25C915MHz
Figure 3. RSSI Voltage vs. Input Power
PIN dBm
5.0
1.0
5.0
115 15105
RSSIERROR
dB
95 85 75 65 55 45 35 25
4.0
0
2.0
4.0
2.0
1.0
3.0
3.0
Figure 4. RSSI Error vs. Input Power
TEMPERATURE C
1000
300
025 8515
LIMITER
V-p-p
5 5 15 25 35 45 55 65 75
900
400
200
100
800
600
700
500
Figure 5. Limiter Output Level vs. Temperature @ 3.3 Vand 915 MHz
CENTER 915.0 MHz#RES BW 10 kHz
VBW 10 kHz SPAN 150.0 MHzSWP 4.50 sec
MARKER915.0 MHz0.0 dBm
L.O.
IMAGE
#AT 30 dBMKR 915.0 MHz
0.0 dBm
Figure 6. Frequency Spectrum
Ch1 10.0mV M 12.5ns Ch1 0V
Tek Run: 4.00GS/s ET Average
V: 72.0ns@: 41.5nsC1 Freq13.899MHzC1 +Duty60.1%
T[ ]
Figure 7. Prescaler Output
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PRODUCT DESCRIPTIONThe AD6190 is a complete RF/IF transceiver for operation inthe 902 MHz928 MHz Industrial, Scientific and Medical(ISM ) frequency band. T ogether with a suitable spread-spectrum controller, the AD6190 can be used to designa spread-spectrum system compliant with F CC Part 15(47CFR15.247) regulations. T he AD6190 is a fully compatible
companion chip to the Zilog Z87L00 ZPhone frequency-hopping spread-spectrum controller.
The AD6190 includes a receive path of LNA, image-rejectmixer, IF amplifier and limiter amplifier with RSSI . T he trans-mit path accepts a 10.7 MHz IF input signal, and uses image-reject upconversion to the 902 MHz928 MHz band. Frequencycontrol is achieved using an on-chip VCO and dual-modulusprescaler connected to an inexpensive low frequency PL L forchannel selection and frequency hopping.
Additionally, an on-chip voltage regulator stabilizes the VCO toprevent LO pushing due to power supply variations.
APPLYING THE AD6190
Receive Signal PathThe AD6190 Low Noise Amplifier (LN A) and image-rejectmixer together provide downconverter with a total gain of 24 dBand a typical Noise Figure (NF) of 4.2 dB.
T he LNA input port exhibits an impedance of 320-j61 at915 M Hz. I n order to provide an optimum match to a 50source, the network shown in Figure 8 should be used.
RF IN
82pF
2.2pF 15nH50
AD6190
Figure 8. LNA Input Matching Circuit
The frequency plan of the AD6190 provides the lowest possibleRF implementation cost. A single conversion design is used witha 10.7 M Hz IF to take advantage of the very low cost filtersavailable. However, since the 902 MHz928 MHz band is widerthan twice the IF, it is possible that undesired in-band signalswill be mixed down to the IF. T hese images could cause inter-ference to the desired signal. It is thus necessary to provide
tunable filtering before the receive mixer, or some other ap-proach to eliminate interference from image signals.
In the AD6190, a technique known as image-reject (or SSB)mixing is used. T his technique suppresses image interference byusing a pair of mixers with quadrature local oscillators. SeeFigure 9.
90
LO
90
IF
OUTRF
INAD6190
Figure 9. Image-Reject Mixer
The RF signal, containing both the desired signal at (FLO+ F IF)and another possible signal at the image frequency of (FLO F IF) isapplied to two mixers in parallel. T hese mixers are driven bylocal oscillator signals in quadrature. T he mixer outputs at thetwo mixer IF ports contain both the desired signal and theimage signal. H owever, the outputs of the two mixers are inquadrature (shifted 90 degrees relative to each other). T heoutputs of the two mixers are then shifted another 90 degreesrelative to each other in a phase-shift network. T he two mixer
outputs thus contain the desired signal and the image signalexactly 180 degrees out of phase. By adding (or subtracting) thetwo signals, the undesired image signals cancel, the desiredsignal components add, and image-rejection occurs. L ocal oscil-lator leakage is suppressed by the use of doubly-balanced mixers.
The quality of the image rejection is a function of the phase andamplitude matching of the quadrature branches of the LO andIF phase-shift networks. In the AD6190, image-rejection istypically 33 dB.
The mixer output that drives the input side of the first10.7 M Hz filter should also be connected through a parallelRL C network of 6.8 pF, 1 k, and 7 pF to the power supply tomatch the 330filter impedance.
The 10.7 M Hz IF signal is then filtered and amplified by a24 dB fixed gain. The output of this stage is further filtered, andapplied to a 6-stage limiting amplifier. T he limiter output signalis typically 450 mV p-p into a 30 k, 30 pF load, with a dcoffset level of approximately 1.76 V dc.
All 10.7 MHz IF filters are assumed to be standard 330imped-ance ceramic types. The AD6190 RX IF signal chain and TX IFinput includes internal matching resistors for this impedance.
When used with the Zilog Z87L00 Spread-Spectrum ControllerIC, the 10.7 MHz IF signal contains the received data encoded inFSK modulation with approximately a33 kHz deviation. TheZ87L00 performs the FSK demodulation in the digital domain.
The RSSI (Received Signal Strength Indicator) signal representsthe strength of the received signal, linear in dB, and scales withsupply voltage. With a 3.3 V supply (through a 10 resistor onthe VCCIF pin), an RF signal level of 100 dBm at the LNAinput will produce an RSSI voltage of approximately 900 mV.
The RSSI voltage will increase with increasing RF input level,at approximately 22 mV/dB to approximately 2.4 V at30 dBm input. T he RSSI output voltage remains above 2.4 Vfor input levels up to +15 dBm.
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OUTLINE DIMENSIONSDimensions shown in inches and (mm).
28-Lead Shrink Small Outline(RS-28)
28 15
141
0.407 (10.34)
0.397 (10.08)
0.
311
(7.
9)
0.3
01
(7.
64)
0.
212
(5.
38)
0.
205
(5.
21)
PIN 1
SEATINGPLANE
0.008 (0.203)
0.002 (0.050)
0.07 (1.79)
0.066 (1.67)
0.0256(0.65)BSC
0.078 (1.98)
0.068 (1.73)
0.015 (0.38)
0.010 (0.25)0.009 (0.229)
0.005 (0.127)
0.03 (0.762)
0.022 (0.558)
80
Mode ControlsThe AD6190 is designed as a time-division-duplex (TDD)radio. T his means that the transmitter and receiver operate atdifferent times. T he AD6190 includes control pins to shut downunused portions of the circuit when not needed, saving power,as shown in the table below. For any mode except Sleep,power must be applied to VBAT T Pin 3 and to all VCC Pins
(16, 21 and 26) to ensure proper operation.NOTE: Do not enable both the transmit and receive pathssimultaneously.
Table I.
Mode RXON TXON VCOON Notes
Receive 1 0 1T ransmit 0 1 1Sleep 0 0 0VCO Only 0 0 1 Allows VCO/PLL
to settle prior totransmit time slot.
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