Accelerated)Stress)Tes-ng)for) Airborne,)High)Reliability ... Bechtold Accelerated... ·...
Transcript of Accelerated)Stress)Tes-ng)for) Airborne,)High)Reliability ... Bechtold Accelerated... ·...
Accelerated Stress Tes-ng for Airborne, High Reliability
Applica-ons Lori Bechtold
Boeing Commercial Airplanes September, 2015
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Introduc-on
• In the U.S., high use of flight: – 6 million people fly each day – 31,000 commercial airplane flights
per day • Extensive safety program is
cri-cal • Reliability enhancement via
Highly Accelerated Life Tes-ng (HALT) – Supports design, test, cer-fica-on
and fleet support – Provides high reliability at entry
into service and lowers maintenance costs
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Airline Maintenance Costs • Maintenance accounts for approximately 5% of airline’s overall opera-ng costs
• Costs include schedule interrup-ons, maintenance technician labor, costs of spares, shipping costs
• Possible warrantee costs for the manufacturer • Improvements in reliability are key to keeping airline opera-ons affordable
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Reliability Enhancement Using HALT • Highly Accelerated Life Tes-ng (HALT) • Thermal Cycling, Power Cycling, Vibra-on Stresses • Stress beyond qualifica-on limits • Increases stepwise to drive weakness to failure • Failure analysis provides product and process improvement
• Speeds reliability maturity, supports entry into service and lowers maintenance costs
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What is HALT? • Used to find product design weaknesses making the product more robust. • HALT is done early during the design development process. • Stresses are applied in steps to find a product's weaknesses, opera-onal
design margins, and destruct limits. • Stresses are higher than normal to obtain -me compression and
accelerate aging. • HALT is not a pass/fail test. It is pro-‐ac-ve! The stresses are increased
un-l the product fails, rather than tes-ng to predefined limits. • All HALT failures represent an opportunity for improvement and will
probably show up in the field. • Many failures are easy and inexpensive to fix. • HALT typically takes 3-‐5 days.
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HALT Program Process Flow • Starts with approved plan • Develop test procedures • Step wise increase of stresses
• Inves-ga-on of failures • End of test when either:
– Unit destroyed – Planned limits are reached
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APPROVED RELIABILITY PROGRAM PLAN
DEVELOP TEST PROCEDURE
START TEST
MONITOR UNIT UNDER TEST
INCREASE STRESS LEVELS
FAILURE DETECTED?
FAILURE ANALYSIS, UNIT REPAIR IF NECESSARY
CONTINUE TEST TO COMPLETE THIS LEVEL
TEST LIMITS REACHED?
TEST COMPLETE DOCUMENT LESSONS LEARNED,
SUBMIT REPORT
NO
NO
YES
YES
UNIT REPAIRED?
YES
NO, UNIT IS DESTROYED
HALT Supports ESS Planning • Environmental Stress Screening (ESS) • Thermal cycling and vibra-on stresses • Drives manufacturing defects to fail in the test chamber rather than in service
• Lowers infant mortality failures • When coupled with failure analysis, review and correc-ve ac-on, may improve overall reliability
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Effects of ESS and HALT
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Failure rate
Time
ESS HALT
Lower Opera*ng Limit Product Spec
Upper Opera*ng Limit
Lower Destruct Limit
Upper Destruct Limit
Opera-ng
Margin
Destruct
Margin
Opera-ng
Margin
Destruct
Margin Failure pdf
Stresses
Defini-ons: Product Limits
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Airborne Environmental Profile
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(Courtesy of Airbus Group)
Accelera-on Model • The most commonly used life-‐stress model for accelerated life tes-ng is the Arrhenius model
R(T) = A exp (-‐Ea / kT) Where: R(T) is the speed of the reac-on A is a constant, derived empirically from test results Ea is the ac-va-on energy k is Boltzman’s constant T is the temperature in degrees K
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Ingredients for a HALT
• Stresses • Specialized Chamber
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Thermocouples and Accelerometers • Multiple thermocouples should be used to monitor air
temp around the product • Thermocouples can be mounted inside unit or even
attached to specific components, processors, power electronics
• Multiple accelerometers should be attached to different parts of the unit to measure differential energy response
• Accelerometers should be placed on dissimilar areas, such as on the rigid case and on an unsupported PCB
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Ingredients for a HALT • Functional Test and Monitoring
• Monitors the functionality of the product under test in real time.
• Should cover all unique signal paths. • For a successful HALT failures must be caught as
they happen. • Work within the limitations of the product under
test.
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Ingredients for a HALT
• Fixturing • Used to secure product during HALT. • The HALT fixturing should be evaluated
very carefully to ensure that it will not cause additional failures that wouldn’t normally occur, or that it doesn’t mask failure that may occur.
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Ingredients for a HALT
• Fixturing • Should not restrict airflow to components • Should not concentrate heat • Should not effect vibration response of
the product – unless that is your intent
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Ingredients for a HALT
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Example HALT • A surface-‐mount technology electronics circuit card is selected
for HALT tes-ng • It will be included in the avionics suite in the EE-‐bay • Vibra-on tes-ng will be random vibra-on, star-ng with
qualifica-on level and increasing by 0.1 increments (1.00, 1.10, 1.20, …)
• Thermal cycling:
• Hardware failure found, mi-gated with packaging change • Reliability in-‐service is improved by a simple hardware change
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Profile No.
Low Temp (°C)
High Temp (°C)
Number of cycles
1 -45 90 3 2 -50 95 3 3 -55 100 3 4 -60 105 3
Conclusions • HALT provides a las-ng value for highly reliable avionics
• Cost of in-‐service removals can be high, includes schedule interrup-ons, maintenance costs, costs of spares, shipping costs and possibly warrantee costs
• HALT is a cost effec-ve approach to improving reliability and providing value to the customer
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Acknowledgements • The author gratefully acknowledges the following contributors to this presenta-on:
Anapathur Ramesh (Boeing) William Nguyen (Boeing) Brel Roundy (Boeing)
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Lori Bechtold – Author Biography • Lori Bechtold is a reliability engineer with Boeing
Commercial Airplanes in Sealle, WA. She holds a B.S. degree from the Massachusels Ins-tute of Technology (M.I.T.), and specializes in reliability analysis, physics of failure modeling and reliability industry standards development. Lori is the Principal Inves-gator of the AVSI Semiconductor Reliability project (AFE 83). She served on the DoD-‐led working group to revise MIL-‐HDBK-‐217. She is chair of the VITA Standards Organiza-on Reliability Working Group, VITA 51. Lori is a member of the IEEE Reliability Society, par-cipated on the IEEE-‐1413.1 and 1332 revision commilees and the SAE/Tech America G-‐41 Commilee.
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